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From: jkratoch@sourceware.org
To: archer-commits@sourceware.org
Subject: [SCM] archer-jankratochvil-autoload: Merge branch 'secmove-misc2-warn-safepath-debug' into secmove-misc2-warn-safepath-debug-warnlocal
Date: Wed, 28 Mar 2012 20:31:00 -0000 [thread overview]
Message-ID: <20120328203055.21544.qmail@sourceware.org> (raw)
The branch, archer-jankratochvil-autoload has been updated
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- Log -----------------------------------------------------------------
commit 2d4d03691bfc2667c6e517ba10c3e66eb407f6bf
Merge: 55f805a ef11444
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 22:28:07 2012 +0200
Merge branch 'secmove-misc2-warn-safepath-debug' into secmove-misc2-warn-safepath-debug-warnlocal
commit ef1144484b0af0bb77ee6387e6596c8a2ebb9d18
Merge: eee4bc5 7942608
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 22:28:06 2012 +0200
Merge branch 'secmove-misc2-warn-safepath' into secmove-misc2-warn-safepath-debug
commit 7942608cd9f2650a647a725762fb32724ebd8b7b
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 22:28:02 2012 +0200
.
commit 55f805a4d24b8cdc407757c73eee19b10f23b853
Merge: 462eed8 eee4bc5
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 22:26:53 2012 +0200
Merge branch 'secmove-misc2-warn-safepath-debug' into secmove-misc2-warn-safepath-debug-warnlocal
commit eee4bc5aed03bca4b679219ce9ab3ada0892b53a
Merge: 2ca277d 57ae568
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 22:26:53 2012 +0200
Merge branch 'secmove-misc2-warn-safepath' into secmove-misc2-warn-safepath-debug
commit 57ae568489a33c426a3889c8bcd887ce86d391d4
Merge: e56482a e8bc56e
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 22:26:53 2012 +0200
Merge branch 'secmove-misc2-warn' into secmove-misc2-warn-safepath
commit e8bc56e029fa7b2abe60df67f348030b98f29b08
Merge: 3ab5faf 51c6545
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 22:26:52 2012 +0200
Merge branch 'secmove-misc2' into secmove-misc2-warn
commit 51c6545fec492eb3cbb1b685846dd7225402f517
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 22:26:49 2012 +0200
.
commit 462eed8aeacb07d440dbc07af0fc63b5a631e140
Merge: 5d9a0e4 2ca277d
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 20:38:32 2012 +0200
Merge branch 'secmove-misc2-warn-safepath-debug' into secmove-misc2-warn-safepath-debug-warnlocal
commit 2ca277d31936548bd4d6d9be04cd92c3df43f1fd
Merge: 9427b4b e56482a
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 20:38:28 2012 +0200
Merge branch 'secmove-misc2-warn-safepath' into secmove-misc2-warn-safepath-debug
Conflicts:
gdb/doc/gdb.texinfo
commit e56482a50943ea08ccbc21d61b4a8bab9f407d2a
Merge: ba755e8 3ab5faf
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 20:17:33 2012 +0200
Merge branch 'secmove-misc2-warn' into secmove-misc2-warn-safepath
Conflicts:
gdb/doc/gdb.texinfo
commit 3ab5fafa248758e3c9d2928913b76ec0f0e75abd
Merge: 9a24de9 161351d
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 20:07:58 2012 +0200
Merge branch 'secmove-misc2' into secmove-misc2-warn
Conflicts:
gdb/doc/gdb.texinfo
commit 161351d6b173b1dfb6972f3540d16ac13e4beb61
Merge: 8ee2757 f8b07b7
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 20:01:58 2012 +0200
Merge branch 'secmove' into secmove-misc2
commit f8b07b7f3dd4d3fbdf6ea5d600cf4413a758d2ee
Merge: 8016fc2 109e341
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 20:01:58 2012 +0200
Merge remote-tracking branch 'gdb/master' into secmove
commit 8ee2757f5c1f228e5772d937b24a3481f621b470
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 28 19:55:09 2012 +0200
.
commit 109e341ea4ed4259a4cc49d16c8b9e7cb70e5f47
Author: Joel Brobecker <brobecker@gnat.com>
Date: Wed Mar 28 17:08:43 2012 +0000
[ia64-linux] Allow libunwind to fetch register 0
On ia64-linux, GDB sometimes prints the following error when trying
to switch to a different task:
(gdb) task 3
Register 0 is not available
This is a random failure that sometimes happens, sometimes does not.
The error comes from the fact that the libunwind library is requesting
the value of register 0 (zero): This eventually leads us to
ia64-linux-nat.c:ia64_linux_fetch_register.
This function relies on ia64_cannot_fetch_register to determine
whether or not we have access to the register's value. The ptrace
interface does not provide the r0 value, and so we end up telling
the regcache that this register's value is not available. And yet,
for r0, we do not need to ask ptrace for its value, since it is
always zero.
So, the fix was to add a special rule for supplying a nul value
when regnum == IA64_GR0_REGNUM.
gdb/ChangeLog:
* ia64-linux-nat.c (ia64_linux_fetch_register): Add special
handling for r0.
commit 251109bb013218e172cc5d4f576b7d7f147a5aa1
Author: ozapawandeep <ozapawandeep>
Date: Wed Mar 28 04:37:43 2012 +0000
Pawandeep Oza updated to write-after-apporval section at the correct order
commit 7bcc0eb208e6c2de92c5f83499e12ecb1a6deea1
Author: gdbadmin <gdbadmin@sourceware.org>
Date: Wed Mar 28 00:00:33 2012 +0000
*** empty log message ***
commit d3eeb91e4f75eacd77a6e4a51f58741299962cd9
Author: Alan Modra <amodra@bigpond.net.au>
Date: Tue Mar 27 23:00:05 2012 +0000
daily update
commit 395529f0c2c0aec007426f83a6f229343f6090ce
Merge: 5d42f3a 8016fc2
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Mar 27 23:21:06 2012 +0200
Merge branch 'secmove' into secmove-misc2
Conflicts:
gdb/doc/gdb.texinfo
commit 8016fc269972e5b0c8c47846b123abcca562a631
Merge: ff72e97 87f14ec
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Mar 27 23:16:57 2012 +0200
Merge remote-tracking branch 'gdb/master' into secmove
commit 5d42f3a1ab8df617af33ae9199271138c1dc5df0
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Mar 27 23:16:51 2012 +0200
.
commit 87f14ecb42140507c841547fbd612023b9853bf1
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Mar 27 20:44:13 2012 +0000
gdb/doc/
* gdb.texinfo (Auto-loading): Move @menu to the end of @node.
Create two new links fir 'objfile-gdb.py file'
and 'dotdebug_gdb_scripts section'.
commit 8e2a924ccdd26b10576befd94558bdb4d5657f02
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Mar 27 20:15:20 2012 +0000
gdb/doc/
* gdb.texinfo (Auto-loading): Rename node reference
'.debug_gdb_scripts section' to 'dotdebug_gdb_scripts section'.
Twice.
(.debug_gdb_scripts section): Rename the node ...
(dotdebug_gdb_scripts section): ... here.
(Maintenance Commands): Also rename this node reference.
commit 7253b9be40dec37c84e2dd54c150639cff7e7361
Author: Pedro Alves <pedro@codesourcery.com>
Date: Tue Mar 27 19:16:23 2012 +0000
Fix formatting.
commit 16aea4340523a95546d3757e0daf981e74ea7162
Author: Pedro Alves <pedro@codesourcery.com>
Date: Tue Mar 27 19:08:33 2012 +0000
2012-03-27 Pedro Alves <palves@redhat.com>
Eliminate struct ui_stream.
* ui-out.h (struct ui_stream): Delete.
(ui_out_field_stream): Adjust prototype.
(ui_out_stream_new, ui_out_stream_delete)
(make_cleanup_ui_out_stream_delete): Delete declarations.
* ui-out.c (ui_out_field_stream): Change prototype to take a
ui_file instead of a ui_stream. Adjust.
(ui_out_stream_new, ui_out_stream_delete, do_stream_delete)
(make_cleanup_ui_out_stream_delete): Delete.
* breakpoint.c (print_breakpoint_location)
(print_one_detail_ranged_breakpoint, print_it_watchpoint): Use
ui_file/mem_fileopen instead of ui_stream/ui_out_stream_new.
* disasm.c (dump_insns): Ditto.
(do_mixed_source_and_assembly, do_assembly_only): Adjust
prototype.
(gdb_disassembly): Use ui_file/mem_fileopen instead of
ui_stream/ui_out_stream_new.
* infcmd.c (print_return_value): Ditto.
* osdata.c (info_osdata_command): Don't allocate a local
ui_stream.
* stack.c (print_frame_arg, print_frame_args, print_frame): Use
ui_file/mem_fileopen instead of ui_stream/ui_out_stream_new.
* tracepoint.c (print_one_static_tracepoint_marker): Don't
allocate a local ui_stream.
* mi/mi-cmd-stack.c (list_arg_or_local): Use ui_file/mem_fileopen
instead of ui_stream/ui_out_stream_new.
(list_args_or_locals): Don't allocate a local ui_stream.
* mi/mi-main.c (get_register, mi_cmd_data_evaluate_expression)
(mi_cmd_data_read_memory): Use ui_file/mem_fileopen instead of
ui_stream/ui_out_stream_new.
* cli/cli-setshow.c (do_setshow_command): Ditto.
commit 5d9a0e424ad53d532c51f4ef3a8cee9162668c36
Merge: c6ac4d0 9427b4b
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Mar 27 19:17:58 2012 +0200
Merge branch 'secmove-misc2-warn-safepath-debug' into secmove-misc2-warn-safepath-debug-warnlocal
commit 9427b4b37af348ca58c310c60b2a944f15ba7ec7
Merge: 04c45ef ba755e8
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Mar 27 19:17:58 2012 +0200
Merge branch 'secmove-misc2-warn-safepath' into secmove-misc2-warn-safepath-debug
commit ba755e8861831324a951e7b1d5997e0f269e4ce4
Merge: 4096420 9a24de9
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Mar 27 19:17:57 2012 +0200
Merge branch 'secmove-misc2-warn' into secmove-misc2-warn-safepath
commit 9a24de9b56953045fa134b9042aa85952b0c0573
Merge: 901c7c9 23562c5
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Mar 27 19:17:57 2012 +0200
Merge branch 'secmove-misc2' into secmove-misc2-warn
commit 23562c5ab19eef61e03148c7ab0ba7ed9b3299af
Merge: c989997 ff72e97
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Mar 27 19:17:57 2012 +0200
Merge branch 'secmove' into secmove-misc2
commit ff72e97cd015fcafd132c9e9e6c79402ceff83a0
Merge: 135e3f7 095df86
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Mar 27 19:17:56 2012 +0200
Merge remote-tracking branch 'gdb/master' into secmove
commit c6ac4d0afc0d1cf246ad07b0466ecd038418b26b
Merge: cd90d56 04c45ef
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Sun Mar 25 22:35:56 2012 +0200
Merge branch 'secmove-misc2-warn-safepath-debug' into secmove-misc2-warn-safepath-debug-warnlocal
commit 04c45ef96f5cacfe6e3ee0f54ff5f6545ea0a796
Merge: 0f6003d 4096420
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Sun Mar 25 22:35:56 2012 +0200
Merge branch 'secmove-misc2-warn-safepath' into secmove-misc2-warn-safepath-debug
commit 40964200e48f8eaaeadba004e288cae4af96a315
Merge: 854a71f 901c7c9
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Sun Mar 25 22:35:55 2012 +0200
Merge branch 'secmove-misc2-warn' into secmove-misc2-warn-safepath
commit 901c7c910d2a0d554e42d3e4345203e8f71ae53b
Merge: 9e607b5 c989997
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Sun Mar 25 22:35:55 2012 +0200
Merge branch 'secmove-misc2' into secmove-misc2-warn
commit c989997d6d141e551fe59fc72b473e6eaf15feaa
Merge: 8699684 135e3f7
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Sun Mar 25 22:35:55 2012 +0200
Merge branch 'secmove' into secmove-misc2
commit 135e3f78997d4886c66ae487217b62322da2ce00
Merge: 640f462 bb4f55d
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Sun Mar 25 22:35:55 2012 +0200
Merge remote-tracking branch 'gdb/master' into secmove
-----------------------------------------------------------------------
Summary of changes:
bfd/version.h | 2 +-
gdb/ChangeLog | 80 ++
gdb/MAINTAINERS | 2 +-
gdb/NEWS | 6 +-
gdb/arm-linux-tdep.c | 5 +
gdb/arm-tdep.c | 2061 ++++++++++++++++++++++++++++++++++++
gdb/arm-tdep.h | 5 +
gdb/breakpoint.c | 28 +-
gdb/cli/cli-setshow.c | 28 +-
gdb/disasm.c | 22 +-
gdb/doc/ChangeLog | 15 +
gdb/doc/gdb.texinfo | 589 +++++++----
gdb/gdbserver/ChangeLog | 9 +
gdb/gdbserver/linux-low.c | 2 +-
gdb/gdbserver/server.c | 4 -
gdb/ia64-linux-nat.c | 10 +
gdb/infcmd.c | 10 +-
gdb/m68klinux-nat.c | 10 +-
gdb/mi/mi-cmd-stack.c | 22 +-
gdb/mi/mi-main.c | 55 +-
gdb/osdata.c | 5 +-
gdb/stack.c | 34 +-
gdb/tracepoint.c | 3 -
gdb/ui-out.c | 37 +-
gdb/ui-out.h | 19 +-
gdb/version.in | 2 +-
sim/common/ChangeLog | 4 +
sim/common/sim-core.h | 8 +
sim/erc32/ChangeLog | 1 +
sim/m32r/ChangeLog | 4 +
sim/m32r/traps-linux.c | 1 -
sim/testsuite/sim/bfin/ChangeLog | 6 +
sim/testsuite/sim/bfin/allinsn.exp | 28 +
33 files changed, 2726 insertions(+), 391 deletions(-)
First 500 lines of diff:
diff --git a/bfd/version.h b/bfd/version.h
index 17420a6..d9d8427 100644
--- a/bfd/version.h
+++ b/bfd/version.h
@@ -1,4 +1,4 @@
-#define BFD_VERSION_DATE 20120325
+#define BFD_VERSION_DATE 20120328
#define BFD_VERSION @bfd_version@
#define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@
#define REPORT_BUGS_TO @report_bugs_to@
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 36547a3..0b3f886 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,83 @@
+2012-03-28 Joel Brobecker <brobecker@adacore.com>
+
+ * ia64-linux-nat.c (ia64_linux_fetch_register): Add special
+ handling for r0.
+
+2012-03-27 Pedro Alves <palves@redhat.com>
+
+ Eliminate struct ui_stream.
+
+ * ui-out.h (struct ui_stream): Delete.
+ (ui_out_field_stream): Adjust prototype.
+ (ui_out_stream_new, ui_out_stream_delete)
+ (make_cleanup_ui_out_stream_delete): Delete declarations.
+ * ui-out.c (ui_out_field_stream): Change prototype to take a
+ ui_file instead of a ui_stream. Adjust.
+ (ui_out_stream_new, ui_out_stream_delete, do_stream_delete)
+ (make_cleanup_ui_out_stream_delete): Delete.
+ * breakpoint.c (print_breakpoint_location)
+ (print_one_detail_ranged_breakpoint, print_it_watchpoint): Use
+ ui_file/mem_fileopen instead of ui_stream/ui_out_stream_new.
+ * disasm.c (dump_insns): Ditto.
+ (do_mixed_source_and_assembly, do_assembly_only): Adjust
+ prototype.
+ (gdb_disassembly): Use ui_file/mem_fileopen instead of
+ ui_stream/ui_out_stream_new.
+ * infcmd.c (print_return_value): Ditto.
+ * osdata.c (info_osdata_command): Don't allocate a local
+ ui_stream.
+ * stack.c (print_frame_arg, print_frame_args, print_frame): Use
+ ui_file/mem_fileopen instead of ui_stream/ui_out_stream_new.
+ * tracepoint.c (print_one_static_tracepoint_marker): Don't
+ allocate a local ui_stream.
+ * mi/mi-cmd-stack.c (list_arg_or_local): Use ui_file/mem_fileopen
+ instead of ui_stream/ui_out_stream_new.
+ (list_args_or_locals): Don't allocate a local ui_stream.
+ * mi/mi-main.c (get_register, mi_cmd_data_evaluate_expression)
+ (mi_cmd_data_read_memory): Use ui_file/mem_fileopen instead of
+ ui_stream/ui_out_stream_new.
+ * cli/cli-setshow.c (do_setshow_command): Ditto.
+
+2012-03-27 Oza Pawandeep <oza.pawandeep@gmail.com>
+
+ * arm-linux-tdep.c (arm_linux_init_abi): Call
+ set_gdbarch_process_record. Initialize `arm_swi_record' field.
+ * arm-tdep.c (arm_process_record): New function.
+ (deallocate_reg_mem): New function.
+ (decode_insn): New function.
+ (thumb_record_branch): New function.
+ (thumb_record_ldm_stm_swi(): New function.
+ (thumb_record_misc): New function.
+ (thumb_record_ld_st_stack): New function.
+ (thumb_record_ld_st_imm_offset): New function.
+ (thumb_record_ld_st_reg_offset(): New function.
+ (thumb_record_add_sub_cmp_mov): New function.
+ (thumb_record_shift_add_sub): New function.
+ (arm_record_coproc_data_proc): New function.
+ (arm_record_coproc): New function.
+ (arm_record_b_bl): New function.
+ (arm_record_ld_st_multiple): New function.
+ (arm_record_ld_st_reg_offset): New function.
+ (arm_record_ld_st_imm_offset): New function.
+ (arm_record_data_proc_imm): New function.
+ (arm_record_data_proc_misc_ld_str): New function.
+ (arm_record_extension_space): New function.
+ (arm_record_strx): New function.
+ (sbo_sbz): New function.
+ (struct insn_decode_record): New structure for arm insn record.
+ (REG_ALLOC): New macro for reg allocations.
+ (MEM_ALLOC): New macro for memory allocations.
+ * arm-tdep.h (struct gdbarch_tdep): New field 'arm_swi_record'.
+
+2012-03-27 Andreas Schwab <schwab@linux-m68k.org>
+
+ * m68klinux-nat.c (fetch_register): Fix strict-aliasing violation.
+ (store_register): Likewise.
+
+2012-03-26 Oza Pawandeep <oza.pawandeep@gmail.com>
+
+ * MAINTAINERS (Write After Approval): Add myself to the list.
+
2012-03-25 Jan Kratochvil <jan.kratochvil@redhat.com>
* NEWS (set breakpoint condition-evaluation): Change "gdb" to "host".
diff --git a/gdb/MAINTAINERS b/gdb/MAINTAINERS
index a6dceae..3cf2c97 100644
--- a/gdb/MAINTAINERS
+++ b/gdb/MAINTAINERS
@@ -583,6 +583,7 @@ Hans-Peter Nilsson hp@bitrange.com
David O'Brien obrien@freebsd.org
Alexandre Oliva aoliva@redhat.com
Karen Osmond karen.osmond@gmail.com
+Pawandeep Oza oza.pawandeep@gmail.com
Denis Pilat denis.pilat@st.com
Kevin Pouget kevin.pouget@st.com
Paul Pluzhnikov ppluzhnikov@google.com
@@ -650,7 +651,6 @@ Wu Zhou woodzltc@cn.ibm.com
Yoshinori Sato ysato@users.sourceforge.jp
Hui Zhu teawater@gmail.com
-
Past Maintainers
Whenever removing yourself, or someone else, from this file, consider
diff --git a/gdb/NEWS b/gdb/NEWS
index 5ec5252..5e5d806 100644
--- a/gdb/NEWS
+++ b/gdb/NEWS
@@ -3,6 +3,10 @@
*** Changes since GDB 7.4
+* GDB now supports reversible debugging on ARM, it allows you to
+ debug basic ARM and THUMB instructions, and provides
+ record/replay support.
+
* The option "symbol-reloading" has been deleted as it is no longer used.
* Python scripting
@@ -125,7 +129,7 @@ set auto-load off
Disable auto-loading globally.
show auto-load
- Show auto-loading setting of all kinds of auto-loaded files,
+ Show auto-loading setting of all kinds of auto-loaded files.
set auto-load gdb-scripts on|off
show auto-load gdb-scripts
diff --git a/gdb/arm-linux-tdep.c b/gdb/arm-linux-tdep.c
index e41205b..486e6ed 100644
--- a/gdb/arm-linux-tdep.c
+++ b/gdb/arm-linux-tdep.c
@@ -1155,8 +1155,13 @@ arm_linux_init_abi (struct gdbarch_info info,
simple_displaced_step_free_closure);
set_gdbarch_displaced_step_location (gdbarch, displaced_step_at_entry_point);
+ /* Reversible debugging, process record. */
+ set_gdbarch_process_record (gdbarch, arm_process_record);
tdep->syscall_next_pc = arm_linux_syscall_next_pc;
+
+ /* Syscall record. */
+ tdep->arm_swi_record = NULL;
}
/* Provide a prototype to silence -Wmissing-prototypes. */
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index a3cdc7c..08c5ed4 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -55,6 +55,8 @@
#include "gdb_assert.h"
#include "vec.h"
+#include "record.h"
+
#include "features/arm-with-m.c"
#include "features/arm-with-m-fpa-layout.c"
#include "features/arm-with-iwmmxt.c"
@@ -10444,3 +10446,2062 @@ vfp - VFP co-processor."),
NULL, /* FIXME: i18n: "ARM debugging is %s. */
&setdebuglist, &showdebuglist);
}
+
+/* ARM-reversible process record data structures. */
+
+#define ARM_INSN_SIZE_BYTES 4
+#define THUMB_INSN_SIZE_BYTES 2
+#define THUMB2_INSN_SIZE_BYTES 4
+
+
+#define INSN_S_L_BIT_NUM 20
+
+#define REG_ALLOC(REGS, LENGTH, RECORD_BUF) \
+ do \
+ { \
+ unsigned int reg_len = LENGTH; \
+ if (reg_len) \
+ { \
+ REGS = XNEWVEC (uint32_t, reg_len); \
+ memcpy(®S[0], &RECORD_BUF[0], sizeof(uint32_t)*LENGTH); \
+ } \
+ } \
+ while (0)
+
+#define MEM_ALLOC(MEMS, LENGTH, RECORD_BUF) \
+ do \
+ { \
+ unsigned int mem_len = LENGTH; \
+ if (mem_len) \
+ { \
+ MEMS = XNEWVEC (struct arm_mem_r, mem_len); \
+ memcpy(&MEMS->len, &RECORD_BUF[0], \
+ sizeof(struct arm_mem_r) * LENGTH); \
+ } \
+ } \
+ while (0)
+
+/* Checks whether insn is already recorded or yet to be decoded. (boolean expression). */
+#define INSN_RECORDED(ARM_RECORD) \
+ (0 != (ARM_RECORD)->reg_rec_count || 0 != (ARM_RECORD)->mem_rec_count)
+
+/* ARM memory record structure. */
+struct arm_mem_r
+{
+ uint32_t len; /* Record length. */
+ CORE_ADDR addr; /* Memory address. */
+};
+
+/* ARM instruction record contains opcode of current insn
+ and execution state (before entry to decode_insn()),
+ contains list of to-be-modified registers and
+ memory blocks (on return from decode_insn()). */
+
+typedef struct insn_decode_record_t
+{
+ struct gdbarch *gdbarch;
+ struct regcache *regcache;
+ CORE_ADDR this_addr; /* Address of the insn being decoded. */
+ uint32_t arm_insn; /* Should accommodate thumb. */
+ uint32_t cond; /* Condition code. */
+ uint32_t opcode; /* Insn opcode. */
+ uint32_t decode; /* Insn decode bits. */
+ uint32_t mem_rec_count; /* No of mem records. */
+ uint32_t reg_rec_count; /* No of reg records. */
+ uint32_t *arm_regs; /* Registers to be saved for this record. */
+ struct arm_mem_r *arm_mems; /* Memory to be saved for this record. */
+} insn_decode_record;
+
+
+/* Checks ARM SBZ and SBO mandatory fields. */
+
+static int
+sbo_sbz (uint32_t insn, uint32_t bit_num, uint32_t len, uint32_t sbo)
+{
+ uint32_t ones = bits (insn, bit_num - 1, (bit_num -1) + (len - 1));
+
+ if (!len)
+ return 1;
+
+ if (!sbo)
+ ones = ~ones;
+
+ while (ones)
+ {
+ if (!(ones & sbo))
+ {
+ return 0;
+ }
+ ones = ones >> 1;
+ }
+ return 1;
+}
+
+typedef enum
+{
+ ARM_RECORD_STRH=1,
+ ARM_RECORD_STRD
+} arm_record_strx_t;
+
+typedef enum
+{
+ ARM_RECORD=1,
+ THUMB_RECORD,
+ THUMB2_RECORD
+} record_type_t;
+
+
+static int
+arm_record_strx (insn_decode_record *arm_insn_r, uint32_t *record_buf,
+ uint32_t *record_buf_mem, arm_record_strx_t str_type)
+{
+
+ struct regcache *reg_cache = arm_insn_r->regcache;
+ ULONGEST u_regval[2]= {0};
+
+ uint32_t reg_src1 = 0, reg_src2 = 0;
+ uint32_t immed_high = 0, immed_low = 0,offset_8 = 0, tgt_mem_addr = 0;
+ uint32_t opcode1 = 0;
+
+ arm_insn_r->opcode = bits (arm_insn_r->arm_insn, 21, 24);
+ arm_insn_r->decode = bits (arm_insn_r->arm_insn, 4, 7);
+ opcode1 = bits (arm_insn_r->arm_insn, 20, 24);
+
+
+ if (14 == arm_insn_r->opcode || 10 == arm_insn_r->opcode)
+ {
+ /* 1) Handle misc store, immediate offset. */
+ immed_low = bits (arm_insn_r->arm_insn, 0, 3);
+ immed_high = bits (arm_insn_r->arm_insn, 8, 11);
+ reg_src1 = bits (arm_insn_r->arm_insn, 16, 19);
+ regcache_raw_read_unsigned (reg_cache, reg_src1,
+ &u_regval[0]);
+ if (ARM_PC_REGNUM == reg_src1)
+ {
+ /* If R15 was used as Rn, hence current PC+8. */
+ u_regval[0] = u_regval[0] + 8;
+ }
+ offset_8 = (immed_high << 4) | immed_low;
+ /* Calculate target store address. */
+ if (14 == arm_insn_r->opcode)
+ {
+ tgt_mem_addr = u_regval[0] + offset_8;
+ }
+ else
+ {
+ tgt_mem_addr = u_regval[0] - offset_8;
+ }
+ if (ARM_RECORD_STRH == str_type)
+ {
+ record_buf_mem[0] = 2;
+ record_buf_mem[1] = tgt_mem_addr;
+ arm_insn_r->mem_rec_count = 1;
+ }
+ else if (ARM_RECORD_STRD == str_type)
+ {
+ record_buf_mem[0] = 4;
+ record_buf_mem[1] = tgt_mem_addr;
+ record_buf_mem[2] = 4;
+ record_buf_mem[3] = tgt_mem_addr + 4;
+ arm_insn_r->mem_rec_count = 2;
+ }
+ }
+ else if (12 == arm_insn_r->opcode || 8 == arm_insn_r->opcode)
+ {
+ /* 2) Store, register offset. */
+ /* Get Rm. */
+ reg_src1 = bits (arm_insn_r->arm_insn, 0, 3);
+ /* Get Rn. */
+ reg_src2 = bits (arm_insn_r->arm_insn, 16, 19);
+ regcache_raw_read_unsigned (reg_cache, reg_src1, &u_regval[0]);
+ regcache_raw_read_unsigned (reg_cache, reg_src2, &u_regval[1]);
+ if (15 == reg_src2)
+ {
+ /* If R15 was used as Rn, hence current PC+8. */
+ u_regval[0] = u_regval[0] + 8;
+ }
+ /* Calculate target store address, Rn +/- Rm, register offset. */
+ if (12 == arm_insn_r->opcode)
+ {
+ tgt_mem_addr = u_regval[0] + u_regval[1];
+ }
+ else
+ {
+ tgt_mem_addr = u_regval[1] - u_regval[0];
+ }
+ if (ARM_RECORD_STRH == str_type)
+ {
+ record_buf_mem[0] = 2;
+ record_buf_mem[1] = tgt_mem_addr;
+ arm_insn_r->mem_rec_count = 1;
+ }
+ else if (ARM_RECORD_STRD == str_type)
+ {
+ record_buf_mem[0] = 4;
+ record_buf_mem[1] = tgt_mem_addr;
+ record_buf_mem[2] = 4;
+ record_buf_mem[3] = tgt_mem_addr + 4;
+ arm_insn_r->mem_rec_count = 2;
+ }
+ }
+ else if (11 == arm_insn_r->opcode || 15 == arm_insn_r->opcode
+ || 2 == arm_insn_r->opcode || 6 == arm_insn_r->opcode)
+ {
+ /* 3) Store, immediate pre-indexed. */
+ /* 5) Store, immediate post-indexed. */
+ immed_low = bits (arm_insn_r->arm_insn, 0, 3);
+ immed_high = bits (arm_insn_r->arm_insn, 8, 11);
+ offset_8 = (immed_high << 4) | immed_low;
+ reg_src1 = bits (arm_insn_r->arm_insn, 16, 19);
+ regcache_raw_read_unsigned (reg_cache, reg_src1, &u_regval[0]);
+ /* Calculate target store address, Rn +/- Rm, register offset. */
+ if (15 == arm_insn_r->opcode || 6 == arm_insn_r->opcode)
+ {
+ tgt_mem_addr = u_regval[0] + offset_8;
+ }
+ else
+ {
+ tgt_mem_addr = u_regval[0] - offset_8;
+ }
+ if (ARM_RECORD_STRH == str_type)
+ {
+ record_buf_mem[0] = 2;
+ record_buf_mem[1] = tgt_mem_addr;
+ arm_insn_r->mem_rec_count = 1;
+ }
+ else if (ARM_RECORD_STRD == str_type)
+ {
+ record_buf_mem[0] = 4;
+ record_buf_mem[1] = tgt_mem_addr;
+ record_buf_mem[2] = 4;
+ record_buf_mem[3] = tgt_mem_addr + 4;
+ arm_insn_r->mem_rec_count = 2;
+ }
+ /* Record Rn also as it changes. */
+ *(record_buf) = bits (arm_insn_r->arm_insn, 16, 19);
+ arm_insn_r->reg_rec_count = 1;
+ }
+ else if (9 == arm_insn_r->opcode || 13 == arm_insn_r->opcode
+ || 0 == arm_insn_r->opcode || 4 == arm_insn_r->opcode)
+ {
+ /* 4) Store, register pre-indexed. */
+ /* 6) Store, register post -indexed. */
+ reg_src1 = bits (arm_insn_r->arm_insn, 0, 3);
+ reg_src2 = bits (arm_insn_r->arm_insn, 16, 19);
+ regcache_raw_read_unsigned (reg_cache, reg_src1, &u_regval[0]);
+ regcache_raw_read_unsigned (reg_cache, reg_src2, &u_regval[1]);
+ /* Calculate target store address, Rn +/- Rm, register offset. */
+ if (13 == arm_insn_r->opcode || 4 == arm_insn_r->opcode)
+ {
+ tgt_mem_addr = u_regval[0] + u_regval[1];
+ }
+ else
+ {
+ tgt_mem_addr = u_regval[1] - u_regval[0];
+ }
+ if (ARM_RECORD_STRH == str_type)
+ {
+ record_buf_mem[0] = 2;
+ record_buf_mem[1] = tgt_mem_addr;
+ arm_insn_r->mem_rec_count = 1;
+ }
+ else if (ARM_RECORD_STRD == str_type)
+ {
+ record_buf_mem[0] = 4;
+ record_buf_mem[1] = tgt_mem_addr;
+ record_buf_mem[2] = 4;
+ record_buf_mem[3] = tgt_mem_addr + 4;
+ arm_insn_r->mem_rec_count = 2;
+ }
+ /* Record Rn also as it changes. */
+ *(record_buf) = bits (arm_insn_r->arm_insn, 16, 19);
+ arm_insn_r->reg_rec_count = 1;
+ }
+ return 0;
+}
+
+/* Handling ARM extension space insns. */
+
+static int
+arm_record_extension_space (insn_decode_record *arm_insn_r)
+{
+ uint32_t ret = 0; /* Return value: -1:record failure ; 0:success */
+ uint32_t opcode1 = 0, opcode2 = 0, insn_op1 = 0;
+ uint32_t record_buf[8], record_buf_mem[8];
+ uint32_t reg_src1 = 0;
+ uint32_t immed_high = 0, immed_low = 0,offset_8 = 0, tgt_mem_addr = 0;
+ struct regcache *reg_cache = arm_insn_r->regcache;
+ ULONGEST u_regval = 0;
+
+ gdb_assert (!INSN_RECORDED(arm_insn_r));
+ /* Handle unconditional insn extension space. */
+
+ opcode1 = bits (arm_insn_r->arm_insn, 20, 27);
+ opcode2 = bits (arm_insn_r->arm_insn, 4, 7);
+ if (arm_insn_r->cond)
+ {
+ /* PLD has no affect on architectural state, it just affects
+ the caches. */
+ if (5 == ((opcode1 & 0xE0) >> 5))
+ {
+ /* BLX(1) */
+ record_buf[0] = ARM_PS_REGNUM;
+ record_buf[1] = ARM_LR_REGNUM;
+ arm_insn_r->reg_rec_count = 2;
+ }
+ /* STC2, LDC2, MCR2, MRC2, CDP2: <TBD>, co-processor insn. */
+ }
+
+
+ opcode1 = bits (arm_insn_r->arm_insn, 25, 27);
+ if (3 == opcode1 && bit (arm_insn_r->arm_insn, 4))
+ {
+ ret = -1;
+ /* Undefined instruction on ARM V5; need to handle if later
+ versions define it. */
+ }
+
+ opcode1 = bits (arm_insn_r->arm_insn, 24, 27);
+ opcode2 = bits (arm_insn_r->arm_insn, 4, 7);
+ insn_op1 = bits (arm_insn_r->arm_insn, 20, 23);
+
+ /* Handle arithmetic insn extension space. */
+ if (!opcode1 && 9 == opcode2 && 1 != arm_insn_r->cond
+ && !INSN_RECORDED(arm_insn_r))
+ {
hooks/post-receive
--
Repository for Project Archer.
next reply other threads:[~2012-03-28 20:31 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-28 20:31 jkratoch [this message]
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2012-03-29 8:50 jkratoch
2012-03-29 6:21 jkratoch
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2012-03-25 19:10 jkratoch
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2012-03-19 20:15 jkratoch
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