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* [SCM] users/jkratoch/indexcxx: .
@ 2017-04-22 19:20 jkratoch
0 siblings, 0 replies; 4+ messages in thread
From: jkratoch @ 2017-04-22 19:20 UTC (permalink / raw)
To: archer-commits
The branch, users/jkratoch/indexcxx has been updated
via c5141d02425a95ed688b640eebfc99ede92e61de (commit)
from 19072274ff8508f49bba532d84a6a2039b6ffad0 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email.
- Log -----------------------------------------------------------------
commit c5141d02425a95ed688b640eebfc99ede92e61de
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Sat Apr 22 18:57:26 2017 +0200
.
-----------------------------------------------------------------------
Summary of changes:
gdb/dwarf2read.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
First 500 lines of diff:
diff --git a/gdb/dwarf2read.c b/gdb/dwarf2read.c
index 4730681..92683da 100644
--- a/gdb/dwarf2read.c
+++ b/gdb/dwarf2read.c
@@ -23250,7 +23250,8 @@ public:
// Return size of the buffer.
- size_t size () const
+ size_t
+ size () const
{
return vec.size ();
}
hooks/post-receive
--
Repository for Project Archer.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [SCM] users/jkratoch/indexcxx: .
@ 2017-05-15 14:49 jkratoch
0 siblings, 0 replies; 4+ messages in thread
From: jkratoch @ 2017-05-15 14:49 UTC (permalink / raw)
To: archer-commits
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 151392 bytes --]
The branch, users/jkratoch/indexcxx has been updated
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- Log -----------------------------------------------------------------
commit dfba29cc316c649da098a49b084fbdd8ba3d84f2
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Mon May 15 16:44:07 2017 +0200
.
commit 78ffdc7c8838d5e8203ef2faf779ea5d332fef2f
Merge: bdbdd85 52a86f8
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Mon May 15 16:38:05 2017 +0200
Merge remote-tracking branch 'gdb/master' into indexcxx
commit 52a86f843b6dee1de9977293da9786649b146b05
Author: Nick Clifton <nickc@redhat.com>
Date: Mon May 15 15:29:02 2017 +0100
Fix use of ARM ADR and ADRl pseudo-instructions with thumb function symbols.
PR gas/21458
* config/tc-arm.c (do_adr): If the ADR involves a thumb function
symbol, ensure that the T bit will be set.
(do_adrl): Likewise.
(do_t_adr): Likewise.
* testsuite/gas/arm/pr21458.s: New test.
* testsuite/gas/arm/pr21458.d: New test driver.
commit b32465c97c12cc6049cefcde1beb3e2bfbfa232c
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 13:52:04 2017 +0100
MIPS16e2: Add new MIPS16e2 relaxation GAS and LD tests
Verify MIPS16 PC-relative instruction relaxation using the MIPS16e2 LUI
instruction rather than an LI/SLL instruction pair.
gas/
* testsuite/gas/mips/mips16-pcrel-1.d: Remove `-mips3' from `as'
flags.
* testsuite/gas/mips/mips16-pcrel-pic-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-0.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-reloc-4.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-reloc-5.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-reloc-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-reloc-7.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-4.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-5.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-7.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-9.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-2.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-3.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-7.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d:
Likewise.
* testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-2.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-2.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-3.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-6.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-7.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-2.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-3.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-6.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-7.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-8.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-9.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-8.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-9.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-8.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-9.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-1.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-2.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-3.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-4.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-5.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-6.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-7.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-4.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-6.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-4.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-6.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-4.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-6.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-4.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-6.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-4.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-6.d:
New test.
* testsuite/gas/mips/mips16-pcrel-1.l: Adjust line numbers.
* testsuite/gas/mips/mips16-pcrel-1.s: Adjust for alignment
preservation between MIPS16 and MIPS16e2 code.
* testsuite/gas/mips/mips.exp: Run MIPS16 relaxation tests over
all MIPS16 architectures.
ld/
* testsuite/ld-mips-elf/mips16e2-pcrel-0.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-1.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-addend-2.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-addend-6.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-n32-0.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-n32-1.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-0.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-1.d: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
commit 3f3467ffc4b0a397a7017b8ab729e4c0060b25f0
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 13:45:42 2017 +0100
MIPS16e2: Add new MIPS16e2 ASE binutils and GAS tests
Verify MIPS16e2 ASE instruction assembly, disassembly and object file
flags.
binutils/
* testsuite/binutils-all/mips/mips16-undecoded.d: Add `-mips3'
to `as' flags.
* testsuite/binutils-all/mips/mips16e2-undecoded.d: New test.
* testsuite/binutils-all/mips/mips16e2-extend-insn.d: New test.
* testsuite/binutils-all/mips/mips16-undecoded.s: Remove
`.module mips3'.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
gas/
* testsuite/gas/mips/mips16e2.d: New test.
* testsuite/gas/mips/mips16e2-mt.d: New test.
* testsuite/gas/mips/mips16e2-sub.d: New test.
* testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test.
* testsuite/gas/mips/mips16e2-mt-sub.d: New test.
* testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test.
* testsuite/gas/mips/mips16e2-hilo.d: New test.
* testsuite/gas/mips/mips16e2-hilo-n32.d: New test.
* testsuite/gas/mips/mips16e2-reloc-error.d: New test.
* testsuite/gas/mips/mips16e2-imm-error.d: New test.
* testsuite/gas/mips/elf_ase_mips16e2.d: New test.
* testsuite/gas/mips/elf_ase_mips16e2-2.d: New test.
* testsuite/gas/mips/elf-rel9-mips16e2.d: New test.
* testsuite/gas/mips/mips16e2-lui.d: New test.
* testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test.
* testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test.
* testsuite/gas/mips/mips16e2@lui-2.d: New test.
* testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output.
* testsuite/gas/mips/mips16e2-imm-error.l: New stderr output.
* testsuite/gas/mips/mips16e2@lui-2.l: New stderr output.
* testsuite/gas/mips/mips16e2.s: New test source.
* testsuite/gas/mips/mips16e2-mt.s: New test source.
* testsuite/gas/mips/mips16e2-sub.s: New test source.
* testsuite/gas/mips/mips16e2-mt-sub.s: New test source.
* testsuite/gas/mips/mips16e2-hilo.s: New test source.
* testsuite/gas/mips/mips16e2-reloc-error.s: New test source.
* testsuite/gas/mips/mips16e2-imm-error.s: New test source.
* testsuite/gas/mips/elf-rel9-mips16e2.s: New test source.
* testsuite/gas/mips/mips16e2-lui.s: New test source.
* testsuite/gas/mips/mips.exp: Expand `mips32r2-sync',
`mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2
architectures. Run the new tests.
commit 70ab592fbae1725ac576012dd1242328e20e664a
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 13:40:50 2017 +0100
MIPS16e2: Add MIPS16e2 ASE GAS test infrastructure
Define a new 32-bit and 64-bit MIPS16e2 test architecture and adjust
existing tests now run against these architectures accordingly.
gas/
* testsuite/gas/mips/mips.exp (run_dump_test_arch): Add
`mips16e2@' prefix.
(run_list_test_arch): Likewise.
(mips16e2-32, mips16e2-64): New architectures.
* testsuite/gas/mips/mips16e2-32@mips16-macro.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-macro-t.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-macro-e.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16e-64.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-sub.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d: New test.
* testsuite/gas/mips/mips16e2@relax-swap3.d: New test.
* testsuite/gas/mips/mips16-32@mips16-asmacro.d: Remove `source'
tag. Add `-I$srcdir/$subdir' to `as' flags.
* testsuite/gas/mips/mips16-64@mips16-asmacro.d: Likewise.
* testsuite/gas/mips/mips16e2-32@mips16-macro.l: New stderr
output.
* testsuite/gas/mips/mips16e2-32@mips16-macro-t.l: New stderr
output.
* testsuite/gas/mips/mips16e2-32@mips16-macro-e.l: New stderr
output.
* testsuite/gas/mips/mips16e2-32@mips16-insn-t.l: New stderr
output.
* testsuite/gas/mips/mips16e2-32@mips16-insn-e.l: New stderr
output.
* testsuite/gas/mips/mips16-sub.s: Add `.set nomips16e2'.
* testsuite/gas/mips/mips16e-sub.s: Likewise.
* testsuite/gas/mips/mips16e-64-sub.s: Likewise.
* testsuite/gas/mips/mips16-asmacro.s: Remove `.set mips32'.
* testsuite/gas/mips/mips16-32@mips16-asmacro.s: New test
source.
* testsuite/gas/mips/mips16-64@mips16-asmacro.s: New test
source.
commit 25499ac7ee92bca177c9436383ee167d6a220066
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 13:26:01 2017 +0100
MIPS16e2: Add MIPS16e2 ASE support
Add MIPS16e2 ASE support as per the architecture specification[1],
including in particular:
1. A new ELF ASE flag to mark MIPS16e2 binaries.
2. MIPS16e2 instruction assembly support, including a relaxation update
to use LUI rather than an LI/SLL instruction pair for loading the
high part of 32-bit addresses.
3. MIPS16e2 instruction disassembly support, including updated rules for
extended forms of instructions that are now subdecoded and therefore
do not alias to the original MIPS16 ISA revision instructions even
for encodings that are not valid in the MIPS16e2 instruction set.
Add `-mmips16e2' and `-mno-mips16e2' GAS command-line options and their
corresponding `mips16e2' and `no-mips16e2' settings for the `.set' and
`.module' pseudo-ops. Control the availability of the MT ASE subset of
the MIPS16e2 instruction set with a combination of these controls and
the preexisting MT ASE controls.
Parts of this change by Matthew Fortune and Andrew Bennett.
References:
[1] "MIPS32 Architecture for Programmers: MIPS16e2 Application-Specific
Extension Technical Reference Manual", Imagination Technologies
Ltd., Document Number: MD01172, Revision 01.00, April 26, 2016
include/
* elf/mips.h (AFL_ASE_MIPS16E2): New macro.
(AFL_ASE_MASK): Adjust accordingly.
* opcode/mips.h: Document new operand codes defined.
(mips_operand_type): Add OP_REG28 enum value.
(INSN2_SHORT_ONLY): Update description.
(ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros.
bfd/
* elfxx-mips.c (print_mips_ases): Handle MIPS16e2 ASE.
opcodes/
* mips-dis.c (mips_arch_choices): Add ASE_MIPS16E2 and
ASE_MIPS16E2_MT flags to the unnamed MIPS16 entry.
(mips_convert_abiflags_ases): Handle the AFL_ASE_MIPS16E2 flag.
(print_insn_arg) <OP_REG28>: Add handler.
(validate_insn_args) <OP_REG28>: Handle.
(print_mips16_insn_arg): Handle MIPS16 instructions that require
32-bit encoding and 9-bit immediates.
(print_insn_mips16): Handle MIPS16 instructions that require
32-bit encoding and MFC0/MTC0 operand decoding.
* mips16-opc.c (decode_mips16_operand) <'>', '9', 'G', 'N', 'O'>
<'Q', 'T', 'b', 'c', 'd', 'r', 'u'>: Add handlers.
(RD_C0, WR_C0, E2, E2MT): New macros.
(mips16_opcodes): Add entries for MIPS16e2 instructions:
GP-relative "addiu" and its "addu" spelling, "andi", "cache",
"di", "ehb", "ei", "ext", "ins", GP-relative "lb", "lbu", "lh",
"lhu", and "lw" instructions, "ll", "lui", "lwl", "lwr", "mfc0",
"movn", "movtn", "movtz", "movz", "mtc0", "ori", "pause",
"pref", "rdhwr", "sc", GP-relative "sb", "sh" and "sw"
instructions, "swl", "swr", "sync" and its "sync_acquire",
"sync_mb", "sync_release", "sync_rmb" and "sync_wmb" aliases,
"xori", "dmt", "dvpe", "emt" and "evpe". Add split
regular/extended entries for original MIPS16 ISA revision
instructions whose extended forms are subdecoded in the MIPS16e2
ISA revision: "li", "sll" and "srl".
binutils/
* readelf.c (print_mips_ases): Handle MIPS16e2 ASE.
* NEWS: Mention MIPS16e2 ASE support.
gas/
* config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `e2' flag.
(RELAX_MIPS16_E2): New macro.
(RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO)
(RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT)
(RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT)
(RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED)
(RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED)
(RELAX_MIPS16_MARK_ALWAYS_EXTENDED)
(RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED, RELAX_MIPS16_MACRO)
(RELAX_MIPS16_MARK_MACRO, RELAX_MIPS16_CLEAR_MACRO): Shift bits.
(mips16_immed_extend): New prototype.
(options): Add OPTION_MIPS16E2 and OPTION_NO_MIPS16E2 enum
values.
(md_longopts): Add "mmips16e2" and "mno-mips16e2" options.
(mips_ases): Add "mips16e2" entry.
(mips_set_ase): Handle MIPS16e2 ASE.
(insn_insert_operand): Explicitly handle immediates with MIPS16
instructions that require 32-bit encoding.
(is_opcode_valid_16): Pass enabled ASE bitmask on to
`opcode_is_member'.
(validate_mips_insn): Explicitly handle immediates with MIPS16
instructions that require 32-bit encoding.
(operand_reg_mask) <OP_REG28>: Add handler.
(match_reg28_operand): New function.
(match_operand) <OP_REG28>: Add handler.
(append_insn): Pass ASE_MIPS16E2 setting to RELAX_MIPS16_ENCODE.
(match_mips16_insn): Handle MIPS16 instructions that require
32-bit encoding and `V' and `u' operand codes.
(mips16_ip): Allow any characters except from `.' in opcodes.
(mips16_immed_extend): Handle 9-bit immediates. Do not shuffle
immediates whose width is not one of these listed.
(md_estimate_size_before_relax): Handle MIPS16e2 relaxation.
(mips_relax_frag): Likewise.
(md_convert_frag): Likewise.
(mips_convert_ase_flags): Handle MIPS16e2 ASE.
* doc/as.texinfo (Target MIPS options): Add `-mmips16e2' and
`-mno-mips16e2' options.
(-mmips16e2, -mno-mips16e2): New options.
* doc/c-mips.texi (MIPS Options): Add `-mmips16e2' and
`-mno-mips16e2' options.
(MIPS ASE Instruction Generation Overrides): Add `.set mips16e2'
and `.set nomips16e2'.
commit 20c59b843a90300e5f9e07add83f5c72c8f994a6
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 13:21:01 2017 +0100
MIPS16/GAS: Improve [32768,65535] out-of-range operand error diagnostics
Improve out-of-range operand error diagnostics for invalid values in the
[32768,65535] range used for a signed 16-bit immediate, making the
message consistent with that used for other invalid values, e.g.:
foo.s:1: Error: operand 2 must be an immediate expression `addiu $2,$gp,32768'
foo.s:2: Error: invalid operands `lw $2,32768($gp)'
vs:
foo.s:3: Error: operand 3 out of range `addiu $2,$gp,-32769'
foo.s:4: Error: operand 2 out of range `lw $2,-32769($gp)'
This case does not currently trigger however, for two reasons.
First, for regular MIPS and microMIPS assembly in the case of no match
caused by `match_int_operand' here, the function is always called again
from `mips_ip' via `match_insns', `match_insn' and then `match_operand'
for the same opcode table's entry with `lax_match' set to TRUE, in which
case the attempt to match succeeds and no error is issued.
Second, in the case of MIPS16 assembly no call to `match_int_operand' is
made at all for signed 16-bit immediates, because such immediates are
currently only matched with extensible instructions, and these are
handled in `match_mips16_insn' via `match_expression' directly rather
than via `match_operand'.
This will change for MIPS16 code with MIPS16e2 support introduced, where
non-extensible instructions accepting signed 16-bit immediates will be
added, so make the case work well right from the start:
foo.s:1: Error: operand 3 out of range `addiu $2,$gp,32768'
foo.s:2: Error: operand 2 out of range `lw $2,32768($gp)'
gas/
* config/tc-mips.c (match_int_operand): Call
`match_out_of_range' before returning failure for 0x8000-0xffff
values conditionally allowed.
commit 602b88e3ab372729b53d130068f069dd363032db
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 13:19:20 2017 +0100
MIPS16/GAS: Improve non-constant operand error diagnostics
Improve operand error diagnostics for non-constant expressions used for
a 16-bit immediate, making the message more descriptive and indicating
the offending operand, e.g.:
foo.s:1: Error: invalid operands `lui $2,foo-bar'
will show as:
foo.s:1: Error: operand 2 must be constant `lui $2,foo-bar'
This case does not currently trigger however, for two reasons.
First, for regular MIPS and microMIPS assembly in the case of no match
caused by `match_int_operand' here, the function is always called again
from `mips_ip' via `match_insns', `match_insn' and then `match_operand'
for the same opcode table's entry with `lax_match' set to TRUE, in which
case the attempt to match succeeds and no error is issued.
Second, in the case of MIPS16 assembly no call to `match_int_operand' is
made at all for 16-bit immediates, because such immediates are currently
only matched with extensible instructions, and these are handled in
`match_mips16_insn' via `match_expression' directly rather than via
`match_operand'.
This will change for MIPS16 code with MIPS16e2 support introduced, where
non-extensible instructions accepting 16-bit immediates will be added,
so make the case work well right from the start.
gas/
* config/tc-mips.c (match_int_operand): Call
`match_not_constant' before returning failure for a non-constant
16-bit immediate conditionally allowed.
commit c96425c560d640df9c416ff4e6a8c49c1f3b1119
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 13:17:18 2017 +0100
MIPS/GAS: Improve bignum operand error diagnostics
Improve bignum operand error diagnostics for cases where a constant
would be accepted and report them as range errors, also indicating the
offending operand and instruction, e.g.:
$ cat bignum.s
addiu $2, 0x10000000000000000
break 0x10000000000000000
$ as -o bignum.o bignum.s
bignum.s:1: Error: bignum invalid
bignum.s:2: Error: operand 1 must be constant `break 0x10000000000000000'
$
now show as:
$ as -o bignum.o bignum.s
bignum.s:1: Error: operand 2 out of range `addiu $2,0x10000000000000000'
bignum.s:2: Error: operand 1 out of range `break 0x10000000000000000'
$
gas/
* config/tc-mips.c (match_const_int): Call `match_out_of_range'
rather than `match_not_constant' for unrelocated operands
retrieved as an `O_big' expression.
(match_int_operand): Call `match_out_of_range' for relocatable
operands retrieved as an `O_big' expression.
(match_mips16_insn): Call `match_out_of_range' for relaxable
operands retrieved as an `O_big' expression.
* testsuite/gas/mips/addiu-error.d: New test.
* testsuite/gas/mips/mips16@addiu-error.d: New test.
* testsuite/gas/mips/micromips@addiu-error.d: New test.
* testsuite/gas/mips/break-error.d: New test.
* testsuite/gas/mips/lui-1.l: Adjust error message.
* testsuite/gas/mips/addiu-error.l: New stderr output.
* testsuite/gas/mips/mips16@addiu-error.l: New stderr output.
* testsuite/gas/mips/micromips@addiu-error.l: New stderr output.
* testsuite/gas/mips/break-error.l: New stderr output.
* testsuite/gas/mips/addiu-error.s: New test source.
* testsuite/gas/mips/break-error.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
commit 1a7bf198b67c4b99e9adeaeba38c6874ec354c12
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 13:13:41 2017 +0100
MIPS16/GAS: Improve non-immediate operand error diagnostics
Improve non-immediate operand error diagnostics for extensible MIPS16
instructions and make it match corresponding regular MIPS and microMIPS
handling, e.g:
$ cat addiu.s
addiu $4, $3, $2
$ as -o addiu.o addiu.s
addiu.s: Assembler messages:
addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2'
$ as -mips16 -o addiu.o addiu.s
addiu.s: Assembler messages:
addiu.s:1: Error: invalid operands `addiu $4,$3,$2'
$
To do so observe that for extensible MIPS16 instructions and a non-PC
relative operand this case is handled by an explicit OT_INTEGER check in
`match_mips16_insn' returning a failure right away and consequently
preventing a call to `match_expression' from being made. As from commit
d436c1c2e889 ("Improve error reporting for register expressions"),
<https://sourceware.org/ml/binutils/2013-08/msg00134.html>, however the
check has become redundant as `match_expression' now only ever returns
success for OT_INTEGER argument tokens, and a special case of an OT_CHAR
`(' token already handled by `match_mips16_insn' just ahead of the
`match_expression' call. Previously it also returned success for OT_REG
argument tokens.
Let the call to `match_expression' always happen then, yielding the same
failure for the affected cases, however with more accurate diagnostics
provided by the call making reporting consistent:
$ as -mips16 -o addiu.o addiu.s
addiu.s: Assembler messages:
addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2'
$
gas/
* config/tc-mips.c (match_mips16_insn): Remove the explicit
OT_INTEGER check before the `match_expression' call.
* testsuite/gas/mips/mips16-insn-e.l: Adjust messages.
* testsuite/gas/mips/mips16-32@mips16-insn-e.l: Likewise.
* testsuite/gas/mips/mips16-64@mips16-insn-e.l: Likewise.
* testsuite/gas/mips/mips16e-32@mips16-insn-e.l: Likewise.
* testsuite/gas/mips/mips16-reg-error.d: New test.
* testsuite/gas/mips/mips16-reg-error.l: New stderr output.
* testsuite/gas/mips/mips16-reg-error.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.
commit e295202f606accec7623c961997a295a8e680247
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 13:09:37 2017 +0100
MIPS16/GAS: Improve disallowed relocation operand error diagnostics
Improve disallowed relocation operand error diagnostics for MIPS16 code
and make it match corresponding regular MIPS and microMIPS handling,
e.g:
$ cat sltu.s
sltu $2, %lo(foo)
$ as -o sltu.o sltu.s
sltu.s: Assembler messages:
sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)'
$ as -mips16 -o sltu.o sltu.s
sltu.s: Assembler messages:
sltu.s:1: Error: invalid operands `sltu $2,%lo(foo)'
$
To do so call `match_not_constant' from `match_mips16_insn' whenever a
disallowed relocation operation has been noticed, like `match_const_int'
does, making reporting consistent:
$ as -mips16 -o sltu.o sltu.s
sltu.s: Assembler messages:
sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)'
$
gas/
* config/tc-mips.c (match_mips16_insn): Call
`match_not_constant' for a disallowed relocation operation.
* testsuite/gas/mips/mips16-reloc-error.d: New test.
* testsuite/gas/mips/mips16-reloc-error.l: New stderr output.
* testsuite/gas/mips/mips16-reloc-error.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.
commit c76081bc874d7d41eb6f41ea79a4ac0f906467d0
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 13:06:54 2017 +0100
MIPS/GAS/testsuite: Convert LUI list tests to dump tests
gas/
* testsuite/gas/mips/lui-1.d: New test.
* testsuite/gas/mips/lui-2.d: New test.
* gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests
into the new tests.
commit fdfb475260daf591d05407ea7affa39122a5b7f6
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 13:04:19 2017 +0100
MIPS/opcodes: Remove an incorrect MT ASE reference in MFC0/MTC0 decoding
The `sel' operand of CP0 move instructions is a part of the base ISA and
has nothing to do with the MT ASE.
opcodes/
* mips-dis.c (print_insn_args) <default>: Remove an MT ASE
reference in CP0 move operand decoding.
commit a54d5f8bb3eb4772a94779a5d37b644aeee72bca
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 13:02:16 2017 +0100
MIPS/GAS: Update `match_const_int' description
Remove a stale reference to FALLBACK parameter from the description of
`match_const_int', matching commit 1a00e61226b3 ("Remove soft_match"),
<https://sourceware.org/ml/binutils/2013-08/msg00133.html>.
gas/
* config/tc-mips.c (match_const_int): Update description.
commit 32035f5151b6ec76af0b62d9db8774b76eddc091
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 12:47:26 2017 +0100
MIPS/GAS/doc: Refer to `.module' rather than `.set'
Complement commit 919731affbef ("Add MIPS .module directive") and update
the GAS manual to refer to the `.module' rather than `.set' directive in
command-line option descriptions, following an observation that unlike
`.set' and like the respective command-line option the use of the
`.module' directive affects the ISA and ASE flags recorded in the object
file produced, and therefore it is `.module' rather than `.set' that
corresponds to the respective command-line option.
gas/
* doc/as.texinfo (-mips16, -no-mips16): Refer to `.module
mips16' rather than `.set mips16'.
(-mmicromips, -mno-micromips): Refer to `.module micromips' and
`.module nomicromips' rather than `.set micromips' and `.set
nomicromips'.
(-msmartmips, -mno-smartmips): Refer to `.module smartmips'
rather than `.set smartmips'.
* doc/c-mips.texi (MIPS Options): Refer to `.module mips16',
`.module micromips', `.module nomicromips' and `.module
smartmips' rather than `.set mips16', `.set micromips', `.set
nomicromips' and `.set smartmips' respectively.
commit 5f2ad7a3c73fcec0a7891794eb5aade73bac8523
Author: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
Date: Mon May 15 14:43:15 2017 +0200
Fix gdb procfs.c compilation on Solaris
Prompted by the creation of the gdb 8.0 branch, I tried to build it on
x86_64-pc-solaris2.12, but failed:
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c: In function `target_ops* procfs_target()':
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:186:27: error: invalid conversion from `void (*)(target_ops*, char*, char*, char**, int)' to `void (*)(target_ops*, const char*, const string&, char**, int) {aka void (*)(target_ops*, const char*, const std::__cxx11::basic_string<char>&, char**, int)}' [-fpermissive]
t->to_create_inferior = procfs_create_inferior;
^~~~~~~~~~~~~~~~~~~~~~
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c: At global scope:
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:125:13: warning: `void procfs_create_inferior(target_ops*, char*, char*, char**, int)' declared `static' but never defined [-Wunused-function]
static void procfs_create_inferior (struct target_ops *, char *,
^~~~~~~~~~~~~~~~~~~~~~
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:4529:1: warning: `void procfs_create_inferior(target_ops*, const char*, const string&, char**, int)' defined but not used [-Wunused-function]
procfs_create_inferior (struct target_ops *ops, const char *exec_file,
^~~~~~~~~~~~~~~~~~~~~~
This can easily be fixed by the following patch.
* procfs.c (procfs_create_inferior): Change prototype to match
definition.
commit 786e3eba7915df35df1d98a300e06f757336c75b
Author: Nick Clifton <nickc@redhat.com>
Date: Mon May 15 13:12:49 2017 +0100
Add .debug_gdb_scripts section to PE linker scripts.
PR ld/21459
* scripttempl/pe.sc: Add .debug_gdb_scripts section.
* scripttempl/pep.sc: Likewise.
commit fba2af917d78bb1d8ef0d508b9246ad32fed1afd
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Mon May 15 00:00:38 2017 +0000
Automatic date update in version.in
commit cd85e51ad3921eabd7030974ce375123a0848cce
Author: John David Anglin <danglin@gcc.gnu.org>
Date: Sun May 14 16:06:06 2017 -0400
Fix match and mask for 64-bit bb opcode.
commit 097eb00398891370779bb6562965bcdf357a292f
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Sun May 14 00:00:28 2017 +0000
Automatic date update in version.in
commit 67f46fed806465c005b15c97d33947f4c0abb25c
Author: James Clarke <jrtc27@jrtc27.com>
Date: Sat May 13 08:01:15 2017 -0700
Fix assertion failure relaxing TLS for position-independent executables.
gold/
PR gold/21444
* gold.cc (Target_sparc::Relocate::relocate_tls): Local
variables are final for position-independent executables. This
has to be consistent with Target_sparc::Scan::local otherwise
they will disagree as to whether local-exec is used.
commit adf3dde510088ef8dc46d04df05baf36adb0ed1e
Author: Eli Zaretskii <eliz@gnu.org>
Date: Sat May 13 11:10:00 2017 +0300
Avoid compiler warning in MinGW build
gdb:
2017-05-13 Eli Zaretskii <eliz@gnu.org>
* tui/tui.c (tui_enable): Cast "unknown" to 'char *' to avoid a
C++ compiler warning.
commit c0c05aad81ef32899e809570c18932bcfb588009
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Sat May 13 00:00:51 2017 +0000
Automatic date update in version.in
commit 6bf56e7482e220ff98655b5285736a37dd602c17
Author: Igor Kudrin <ikudrin@accesssoftek.com>
Date: Fri May 12 15:24:32 2017 -0700
Fix misplacement of a relaxed section on AArch64.
gold/ChangeLog
PR gold/21430
* aarch64.cc
(AArch64_relobj::convert_input_section_to_relaxed_section):
Set the section offset to -1ULL.
(Target_aarch64::relocate_section): Adjust the view in case
of a relaxed input section.
* testsuite/Makefile.am (pr21430): New test.
* testsuite/Makefile.in: Regenerate
* testsuite/pr21430.s: New test source file.
* testsuite/pr21430.sh: New test script.
commit 73caa85d4a97eb991e581ccba3ff4eccce5e2e1d
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Fri May 12 08:07:21 2017 -0700
x86: Merge X86_ISA_1_USED/X86_ISA_1_NEEDED properties
If there are more than GNU property note in an input, we should merge
X86_ISA_1_USED and X86_ISA_1_NEEDED properties.
bfd/
* elf32-i386.c (elf_i386_parse_gnu_properties): Merge
GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_ISA_1_NEEDED
properties.
* elf64-x86-64.c (elf_x86_64_parse_gnu_properties): Likewise.
ld/
* testsuite/ld-i386/i386.exp: Run property-x86-3.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-i386/property-x86-3.d: New file.
* testsuite/ld-i386/property-x86-3.s: Likewise.
* testsuite/ld-x86-64/property-x86-3.d: Likewise.
* testsuite/ld-x86-64/property-x86-3.s: Likewise.
commit 6830f270e7b6676e7a77c1b8080941e35003d918
Author: Tom Tromey <tom@tromey.com>
Date: Thu May 11 22:22:36 2017 -0600
Avoid exponential behavior in rust_evaluate_subexp
The STRUCTOP_STRUCT case in rust_evaluate_subexp would evaluate its
LHS, and then, if it did not need Rust-specific treatment, it would
back up and re-evaluate the entire STRUCTOP_STRUCT part of the
expression using evaluate_subexp_standard. This yields exponential
behavior and causes some expressions to evaluate extremely slowly.
The fix is to simply do the needed work inline.
This is PR rust/21483.
ChangeLog
2017-05-12 Tom Tromey <tom@tromey.com>
PR rust/21483:
* rust-lang.c (rust_evaluate_subexp) <STRUCTOP_STRUCT>: Don't
recurse, just call value_struct_elt directly.
commit 68f2f2e308a8585c39ddb2f391a9ae8d779c5029
Author: Tom Tromey <tom@tromey.com>
Date: Thu May 11 19:50:47 2017 -0600
Fix rust_dump_subexp_body
rust_dump_subexp_body was not correct in a couple of cases. While
debugging the bug I was really interested in, this caused a crash.
This patch fixes the problems. No test case because, IIRC there
generally aren't tests for expression dumping.
ChangeLog
2017-05-12 Tom Tromey <tom@tromey.com>
* rust-lang.c (rust_dump_subexp_body) <STRUCTOP_ANONYMOUS,
OP_RUST_ARRAY>: Fix.
commit 256afbc259c1e22fafba601a27cf3c8d7bdde417
Author: Tom Tromey <tom@tromey.com>
Date: Thu May 11 19:44:43 2017 -0600
Replace "return" with "break"
This replaces a "return" with a "break" in rust_print_subexp, for
consistency.
ChangeLog
2017-05-12 Tom Tromey <tom@tromey.com>
* rust-lang.c (rust_print_subexp): Replace "return" with "break".
commit be3f1006743f04f0b133de7fa8085a3e4c49b193
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Fri May 12 02:28:54 2017 +0100
MIPS/GAS: Unify GP-relative percent-ops
For a reason that is unclear commit d6f165938798 ("Support for MIPS16
HI16/LO16 relocations"),
<https://sourceware.org/ml/binutils/2005-02/msg00332.html>, which has
added support for the R_MIPS16_GPREL relocation, has spelled its
corresponding MIPS16 percent-op as `%gprel', rather than `%gp_rel' which
is how its regular MIPS counterpart is spelled. To make assembly code
sharing easier between the regular MIPS and the MIPS16 ISA make both
percent-op spellings acceptable in both kinds of code now.
Parts of this change by Matthew Fortune.
gas/
* config/tc-mips.c (mips_percent_op): Add "%gprel".
(mips16_percent_op): Add "%gp_rel".
* testsuite/gas/mips/elf-rel8.s:: Add `%gprel' forms.
* testsuite/gas/mips/elf-rel8-mips16.s: Add `%gp_rel' forms.
* testsuite/gas/mips/elf-rel8.d: Adjust accordingly.
* testsuite/gas/mips/elf-rel8-mips16.d: Likewise.
commit a4f89915135f6760917c01dc783de5b674234d84
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Fri May 12 01:09:36 2017 +0100
MIPS16/opcodes: Make the handling of BREAK and SDBBP consistent
Disassemble the MIPS16 BREAK and SDBBP instruction's immediate operand
in the hexadecimal rather than decimal numeral system and add respective
operandless variants with an implicit 0 operand, making our handling of
these instructions consistent with how we have processed their regular
MIPS and microMIPS counterparts since forever.
opcodes/
* mips16-opc.c (decode_mips16_operand) <'6'>: Switch the operand
type to hexadecimal.
(mips16_opcodes): Add operandless "break" and "sdbbp" entries.
binutils/
* testsuite/binutils-all/mips/mips16-extend-insn.d: Adjust BREAK
and SDBBP disassembly.
gas/
* testsuite/gas/mips/mips16.d: Adjust BREAK disassembly.
* testsuite/gas/mips/mips16-64@mips16.d: Likewise.
* testsuite/gas/mips/mips16-64.d: Likewise.
* testsuite/gas/mips/mips16-64@mips16-64.d: Likewise.
* testsuite/gas/mips/mips16-macro.d: Likewise.
* testsuite/gas/mips/mips16-64@mips16-macro.d: Likewise.
* testsuite/gas/mips/mips16-sub.d: Likewise.
* testsuite/gas/mips/mips16-32@mips16-sub.d: Likewise.
commit de428bc53335d88c21eda38a823d5a4008468e52
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Fri May 12 00:00:43 2017 +0000
Automatic date update in version.in
commit 99e2d67a0edd1a8feca82036feb93709fee488fa
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Fri May 12 00:46:45 2017 +0100
MIPS/opcodes: Mark descriptive SYNC mnemonics as aliases
Following the way how descriptive SYNC mnemonics have been defined in
the architecture[1][2] mark them as aliases, so that the generic SYNC
instruction can be alternatively disassembled along with its immediate
operand, as noted in the documents referred.
References:
[1] "MIPS Architecture For Programmers, Volume II-A: The MIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00086,
Revision 5.04, December 11, 2013, Table 4.7 "Encodings of the
Bits[10:6] of the SYNC instruction; the SType Field", p. 305
[2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
Revision 5.04, January 15, 2014, Table 5.28 "Encodings of the
Bits[10:6] of the SYNC instruction; the SType Field", p. 481
opcodes/
* mips-opc.c (mips_builtin_opcodes): Mark "synciobdma", "syncs",
"syncw", "syncws", "sync_acquire", "sync_mb", "sync_release",
"sync_rmb" and "sync_wmb" as aliases.
* micromips-opc.c (micromips_opcodes): Mark "sync_acquire",
"sync_mb", "sync_release", "sync_rmb" and "sync_wmb" as aliases.
gas/
* testsuite/gas/mips/mips32r2-sync-1.d: New test.
* testsuite/gas/mips/micromips@mips32r2-sync-1.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
commit f2c29a169242d0c564afb46ecaf160422b28bfbb
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Thu May 11 11:26:26 2017 -0700
x86-64: Rename .plt.bnd to .plt.sec
Rename .plt.bnd to .plt.sec to indicate that this is used as the second
PLT section. There is no change in run-time behavior. We also scan the
.plt.sec section to synthesize PLT symbols.
bfd/
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Rename plt_bnd
to plt_second.
(elf_x86_64_link_hash_table): Rename plt_bnd/plt_bnd_eh_frame
to plt_second/plt_second_eh_frame.
(elf_x86_64_link_hash_newfunc): Updated.
(elf_x86_64_allocate_dynrelocs): Likewise.
(elf_x86_64_size_dynamic_sections): Likewise.
(elf_x86_64_relocate_section): Likewise.
(elf_x86_64_finish_dynamic_symbol): Likewise.
(elf_x86_64_finish_dynamic_sections): Likewise.
(elf_x86_64_plt_type): Rename plt_bnd to plt_second.
(elf_x86_64_get_synthetic_symtab): Updated. Also scan the
.plt.sec section.
(elf_backend_setup_gnu_properties): Updated. Create the
.plt.sec section instead of the .plt.sec section.
ld/
* emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): Replace
.plt.bnd with .plt.sec.
* testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise.
* testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise.
* testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise.
* testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise.
* testsuite/ld-x86-64/bnd-plt-1.d: Likewise.
* testsuite/ld-x86-64/mpx3.dd: Likewise.
* testsuite/ld-x86-64/mpx3n.dd: Likewise.
* testsuite/ld-x86-64/mpx4.dd: Likewise.
* testsuite/ld-x86-64/mpx4n.dd: Likewise.
* testsuite/ld-x86-64/plt-main-bnd-now.rd: Likewise.
* testsuite/ld-x86-64/pr21038b-now.d: Likewise.
* testsuite/ld-x86-64/pr21038b.d: Likewise.
* testsuite/ld-x86-64/pr21038c-now.d: Likewise.
* testsuite/ld-x86-64/pr21038c.d: Likewise.
commit dc2be3d2f6de530aac40983e79e29e050f40e759
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Thu May 11 07:42:30 2017 -0700
x86: Generate PLT relocations for -z now
This patch partially reverses:
commit 25070364b0ce33eed46aa5d78ebebbec6accec7e
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Sat May 16 07:00:21 2015 -0700
Don't generate PLT relocations for now binding
to support LD_AUDIT and LD_PROFILE with -z now. If there is an existing
GOT relocation, it is still used to avoid PLT relocation against the same
function symbol.
bfd/
* elf32-i386.c (elf_i386_allocate_dynrelocs): Partially revert
commit 25070364b0ce33eed46aa5d78ebebbec6accec7e.
* elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewse.
ld/
* testsuite/ld-i386/plt-pic2.dd: Updated.
* testsuite/ld-i386/plt2.dd: Likewise.
* testsuite/ld-i386/plt2.rd: Likewise.
* testsuite/ld-i386/pr17689now.rd: Likewise.
* testsuite/ld-ifunc/ifunc-16-i386-now.d: Likewise.
* testsuite/ld-ifunc/ifunc-16-x86-64-now.d: Likewise.
* testsuite/ld-ifunc/pr17154-i386-now.d: Likewise.
* testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise.
* testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise.
* testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise.
* testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise.
* testsuite/ld-x86-64/plt2.dd: Likewise.
* testsuite/ld-x86-64/plt2.rd: Likewise.
* testsuite/ld-x86-64/pr17689now.rd: Likewise.
* testsuite/ld-x86-64/pr21038b-now.d: Likewise.
* testsuite/ld-x86-64/pr21038c-now.d: Likewise.
commit f96f371cbb33454544a9f1827c239c4375f0b60e
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Thu May 11 00:00:48 2017 +0000
Automatic date update in version.in
commit 7f401e8417160ba5cdad60a38c8a3cbce395a5c5
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Wed May 10 20:14:11 2017 +0100
MIPS/GAS/testsuite: Convert ISA override list tests to dump tests
And remove the zillion duplicate sources. Also `mips1@isa-override-2.l'
is the same as `r3000@isa-override-2.l', so remove the latter too, now
that `r3000@isa-override-2.d' can name a file to match stderr output
against.
gas/
* testsuite/gas/mips/isa-override-2.d: New test.
* testsuite/gas/mips/mips1@isa-override-2.d: New test.
* testsuite/gas/mips/r3000@isa-override-2.d: New test.
* testsuite/gas/mips/r3900@isa-override-2.d: New test.
* testsuite/gas/mips/mips2@isa-override-2.d: New test.
* testsuite/gas/mips/mips32@isa-override-2.d: New test.
* testsuite/gas/mips/mips32r2@isa-override-2.d: New test.
* testsuite/gas/mips/mips32r3@isa-override-2.d: New test.
* testsuite/gas/mips/mips32r5@isa-override-2.d: New test.
* testsuite/gas/mips/mips32r6@isa-override-2.d: New test.
* testsuite/gas/mips/octeon3@isa-override-2.d: New test.
* testsuite/gas/mips/r3000@isa-override-2.l: Remove list test.
* testsuite/gas/mips/mips1@isa-override-2.s: Remove test source.
* testsuite/gas/mips/r3000@isa-override-2.s: Remove test source.
* testsuite/gas/mips/r3900@isa-override-2.s: Remove test source.
* testsuite/gas/mips/mips2@isa-override-2.s: Remove test source.
* testsuite/gas/mips/mips32@isa-override-2.s: Remove test
source.
* testsuite/gas/mips/mips32r2@isa-override-2.s: Remove test
source.
* testsuite/gas/mips/mips32r3@isa-override-2.s: Remove test
source.
* testsuite/gas/mips/mips32r5@isa-override-2.s: Remove test
source.
* testsuite/gas/mips/mips32r6@isa-override-2.s: Remove test
source.
* testsuite/gas/mips/octeon3@isa-override-2.s: Remove test
source.
* gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests
into the new tests.
commit 40e5240e1f32b1cc36c45551eb3f59253c40f317
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Wed May 10 19:03:15 2017 +0100
MIPS/binutils/testsuite: Define names of temporary files
Define `tempfile' and `copyfile' in `mips.exp' so that standalone script
execution via `RUNTESTFLAGS=mips.exp' works rather than producing:
Running .../binutils/testsuite/binutils-all/mips/mips.exp ...
ERROR: tcl error sourcing
.../binutils/testsuite/binutils-all/mips/mips.exp.
ERROR: can't read "tempfile": no such variable
while executing
"binutils_assemble_flags ${srcfile} $tempfile $opts(as)"
(procedure "run_dump_test" line 207)
invoked from within
"run_dump_test "mips-ase-1""
invoked from within
"if [is_elf_format] {
run_dump_test "mips-ase-1"
run_dump_test "mips-ase-2"
run_dump_test "mips-ase-3"
run_dump_test "mixed-mips16"
..."
(file ".../binutils/testsuite/binutils-all/mips/mips.exp" line 22)
invoked from within
"source .../binutils/testsuite/binutils-all/mips/mips.exp"
("uplevel" body line 1)
invoked from within
"uplevel #0 source .../binutils/testsuite/binutils-all/mips/mips.exp"
invoked from within
"catch "uplevel #0 source $test_file_name""
testcase .../binutils/testsuite/binutils-all/mips/mips.exp completed in 0 seconds
binutils/
* testsuite/binutils-all/mips/mips.exp: Define `tempfile' and
`copyfile' variables.
commit 5d69120bfff3e532242083acd636dc68f23ea831
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Wed May 10 10:51:35 2017 -0700
i386: Set CHECK_RELOCS_AFTER_OPEN_INPUT to yes
All linker targets based on elf32-i386 should check relocations after
opening all inputs since this is how elf32-i386 works.
* emulparams/i386lynx.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Set
to yes.
* emulparams/i386moss.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/i386nw.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise.
commit 9fc1813479e1518197949105c3f34da8c2e30984
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Wed May 10 18:19:56 2017 +0100
MIPS/GAS/testsuite: Correct swapped MIPS16e subset test names
Correct the test names swapped between common and 64-bit MIPS16e subset
tests.
gas/
* testsuite/gas/mips/mips16e-sub.d: Correct test name.
* testsuite/gas/mips/mips16-32@mips16e-sub.d: Likewise.
* testsuite/gas/mips/mips16-64@mips16e-sub.d: Likewise.
* testsuite/gas/mips/mips16e-64-sub.d: Likewise.
* testsuite/gas/mips/mips16-32@mips16e-64-sub.d: Likewise.
* testsuite/gas/mips/mips16-64@mips16e-64-sub.d: Likewise.
* testsuite/gas/mips/mips16e-32@mips16e-64-sub.d: Likewise.
commit db84b98a160d20f30dbdae3e3405cfb0fa680fbd
Author: Jose E. Marchesi <jose.marchesi@oracle.com>
Date: Wed May 10 18:44:19 2017 +0200
bfd: fix the deletion of relocs in sparc64
This patch fixes the deletion of relocations in BFD sections in
sparc64 targets.
A specialized `_bfd_set_reloc' function is provided that updates the
internal canon_reloc_count(sec) counter instead of sec->reloc_count.
Additionally, the `write_relocs' callback in elf64-sparc is adapted to
use the canon_reloc_count to traverse `sec->orelocation'.
Tested in sparc64-linux-gnu targets.
Fixes an existing failure in the merge-notes objcopy test.
No regressions.
bfd/ChangeLog:
2017-05-10 Jose E. Marchesi <jose.marchesi@oracle.com>
* elf64-sparc.c (elf64_sparc_set_reloc): New function.
(bfd_elf64_set_reloc): Define.
(elf64_sparc_write_relocs): Use `canon_reloc_count'.
commit 2318686590bd252a47f494554dfc11bc18a3e58b
Author: Jose E. Marchesi <jose.marchesi@oracle.com>
Date: Wed May 10 18:40:04 2017 +0200
bfd: new BFD target entry point _bfd_set_reloc.
This patch adds a new entry point to the BFD_JUMP_TABLE_RELOCS. The
previous common implementation `bfd_set_reloc', in bfd/bfd.c, has been
moved to bfd/reloc.c with the name `_bfd_generic_set_reloc', and all
BFD targets has been adapted to use it.
This patch doesn't introduce any change on functionality, but prepares
the ground for further work.
bfd/ChangeLog:
2017-05-10 Jose E. Marchesi <jose.marchesi@oracle.com>
* targets.c (BFD_JUMP_TABLE_RELOCS): Add NAME##_set_reloc.
(struct bfd_target): New field _bfd_set_reloc.
* bfd.c (bfd_set_reloc): Call backend _set_bfd.
* reloc.c (_bfd_generic_set_reloc): New function.
* coffcode.h (coff_set_reloc): Define to _bfd_generic_set_reloc.
* nlm-target.h (nlm_set_reloc): Likewise.
* coff-rs6000.c (_bfd_xcoff_set_reloc): Likewise.
* aout-tic30.c (MY_set_reloc): Likewise.
* aout-target.h (MY_set_reloc): Likewise.
* elfxx-target.h (bfd_elfNN_set_reloc): Likewise.
* coff-alpha.c (_bfd_ecoff_set_reloc): Likewise.
* mach-o-target.c (bfd_mach_o_set_reloc): Likewise.
* vms-alpha.c (alpha_vms_set_reloc): Likewise.
* aout-adobe.c (aout_32_set_reloc): Likewise.
* bout.c (b_out_set_reloc): Likewise.
* coff-mips.c (_bfd_ecoff_set_reloc): Likewise.
* i386os9k.c (aout_32_set_reloc): Likewise.
* ieee.c (ieee_set_reloc): Likewise.
* oasys.c (oasys_set_reloc): Likewise.
* som.c (som_set_reloc): Likewise.
* versados.c (versados_set_reloc): Likewise.
* coff64-rs6000.c (rs6000_xcoff64_vec): Add
_bfd_generic_set_reloc.
(rs6000_xcoff64_aix_vec): LIkewise.
* libbfd.c (_bfd_norelocs_set_reloc): New function.
* libbfd-in.h: Prototype for _bfd_norelocs_set_reloc.
* i386msdos.c (msdos_set_reloc): Define to
_bfd_norelocs_set_reloc.
* elfcode.h (elf_set_reloc): Define.
* bfd-in2.h: Regenerated.
commit aab82f4c201a2612c0fb6d5b66d8e4ce2f036f1c
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Wed May 10 09:28:00 2017 -0700
x86-64: Use .plt.bnd for IFUNC function address
When -z bndplt is used, we must use the .plt.bnd entry for IFUNC function
address.
bfd/
PR ld/21481
* elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Use .plt.bnd
for IFUNC function address.
ld/
PR ld/21481
* testsuite/ld-x86-64/pr21481a.c: New file.
* testsuite/ld-x86-64/pr21481b.S: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/21481 tests.
commit f78c0b915888ab388f9bdac826d7ac18dc944c28
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Wed May 10 14:37:21 2017 +0100
MIPS/GAS/testsuite: Remove stale `mips16-macro' list test output
Complement commit c60aaac10f9a1 ("MIPS/GAS/testsuite: Extend MIPS16
testing over multiple ISAs") and remove a stale `mips16-macro' list test
output replaced with the `mips16-32@mips16-macro' stderr output.
gas/
* testsuite/gas/mips/mips16-macro.l: Remove list test.
commit 58667758b1f907f8983d8a065333e3c38e311e88
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Wed May 10 14:17:19 2017 +0100
MIPS/GAS/testsuite: Remove last remnants of ECOFF support
Complement commit 16e5e222b6ea ("Make gas/mips/mips.exp ELF-only"),
<https://sourceware.org/ml/binutils/2013-06/msg00195.html>, and commit
fcedb9f3ca87 ("MIPS/GAS/testsuite: Remove remnants of a.out/ECOFF
support"), and remove stale ECOFF test dumps previously missed.
gas/
* testsuite/gas/mips/r3900@ecoff@ld.d: Remove test.
* testsuite/gas/mips/mips2@ecoff@ld.d: Remove test.
* testsuite/gas/mips/mips32@ecoff@ld.d: Remove test.
* testsuite/gas/mips/mips32r2@ecoff@ld.d: Remove test.
* testsuite/gas/mips/r3900@ecoff@ld-forward.d: Remove test.
* testsuite/gas/mips/mips2@ecoff@ld-forward.d: Remove test.
* testsuite/gas/mips/mips32@ecoff@ld-forward.d: Remove test.
* testsuite/gas/mips/mips32r2@ecoff@ld-forward.d: Remove test.
* testsuite/gas/mips/mips1@ecoff@sd.d: Remove test.
* testsuite/gas/mips/r3000@ecoff@sd.d: Remove test.
* testsuite/gas/mips/r3900@ecoff@sd.d: Remove test.
* testsuite/gas/mips/mips2@ecoff@sd.d: Remove test.
* testsuite/gas/mips/mips32@ecoff@sd.d: Remove test.
* testsuite/gas/mips/mips32r2@ecoff@sd.d: Remove test.
* testsuite/gas/mips/mips1@ecoff@sd-forward.d: Remove test.
* testsuite/gas/mips/r3000@ecoff@sd-forward.d: Remove test.
* testsuite/gas/mips/r3900@ecoff@sd-forward.d: Remove test.
* testsuite/gas/mips/mips2@ecoff@sd-forward.d: Remove test.
* testsuite/gas/mips/mips32@ecoff@sd-forward.d: Remove test.
* testsuite/gas/mips/mips32r2@ecoff@sd-forward.d: Remove test.
commit 53a346d8236aec06f1d3c767716d3340fb0aa013
Author: Claudiu Zissulescu <claziss@synopsys.com>
Date: Wed May 10 14:42:22 2017 +0200
[ARC] Object attributes.
gas/
2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/attr-arc600.d: New file.
* testsuite/gas/arc/attr-arc600_mul32x16.d: Likewise.
* testsuite/gas/arc/attr-arc600_norm.d: Likewise.
* testsuite/gas/arc/attr-arc601.d: Likewise.
* testsuite/gas/arc/attr-arc601_mul32x16.d: Likewise.
* testsuite/gas/arc/attr-arc601_mul64.d: Likewise.
* testsuite/gas/arc/attr-arc601_norm.d: Likewise.
* testsuite/gas/arc/attr-arc700.d: Likewise.
* testsuite/gas/arc/attr-arcem.d: Likewise.
* testsuite/gas/arc/attr-archs.d: Likewise.
* testsuite/gas/arc/attr-autodetect-1.d: Likewise.
* testsuite/gas/arc/attr-autodetect-1.s: Likewise.
* testsuite/gas/arc/attr-cpu-a601.d: Likewise.
* testsuite/gas/arc/attr-cpu-a601.s: Likewise.
* testsuite/gas/arc/attr-cpu-a700.d: Likewise.
* testsuite/gas/arc/attr-cpu-a700.s: Likewise.
* testsuite/gas/arc/attr-cpu-em.d: Likewise.
* testsuite/gas/arc/attr-cpu-em.s: Likewise.
* testsuite/gas/arc/attr-cpu-hs.d: Likewise.
* testsuite/gas/arc/attr-cpu-hs.s: Likewise.
* testsuite/gas/arc/attr-em.d: Likewise.
* testsuite/gas/arc/attr-em4.d: Likewise.
* testsuite/gas/arc/attr-em4_dmips.d: Likewise.
* testsuite/gas/arc/attr-em4_fpuda.d: Likewise.
* testsuite/gas/arc/attr-em4_fpus.d: Likewise.
* testsuite/gas/arc/attr-hs.d: Likewise.
* testsuite/gas/arc/attr-hs34.d: Likewise.
* testsuite/gas/arc/attr-hs38.d: Likewise.
* testsuite/gas/arc/attr-hs38_linux.d: Likewise.
* testsuite/gas/arc/attr-mul64.d: Likewise.
* testsuite/gas/arc/attr-name.d: Likewise.
* testsuite/gas/arc/attr-name.s: Likewise.
* testsuite/gas/arc/attr-nps400.d: Likewise.
* testsuite/gas/arc/attr-override-mcpu.d: Likewise.
* testsuite/gas/arc/attr-override-mcpu.s
* testsuite/gas/arc/attr-quarkse_em.d: Likewise.
* testsuite/gas/arc/blank.s: Likewise.
* testsuite/gas/elf/section2.e-arc: Likewise.
* testsuite/gas/arc/cpu-pseudop-1.d: Update test.
* testsuite/gas/arc/cpu-pseudop-2.d: Likewise.
* testsuite/gas/arc/nps400-0.d: Likewise.
* testsuite/gas/elf/elf.exp: Set target_machine for ARC.
* config/tc-arc.c (opcode/arc-attrs.h): Include.
(ARC_GET_FLAG, ARC_SET_FLAG, streq): Define.
(arc_attribute): Declare new function.
(md_pseudo_table): Add arc_attribute.
(cpu_types): Rename default cpu features.
(selected_cpu): Set the default OSABI flag.
(mpy_option): New variable.
(pic_option): Likewise.
(sda_option): Likewise.
(tls_option): Likewise.
(feature_type, feature_list): Remove.
(arc_initial_eflag): Likewise.
(attributes_set_explicitly): New variable.
(arc_check_feature): Check also for the conflicting features.
(arc_select_cpu): Refactor assignment of selected_cpu.eflags.
(arc_option): Remove setting of private flags and architecture.
(check_cpu_feature): Refactor feature names.
(autodetect_attributes): New function.
(assemble_tokens): Use above function.
(md_parse_option): Refactor feature names.
(arc_attribute): New function.
(arc_set_attribute_int): Likewise.
(arc_set_attribute_string): Likewise.
(arc_stralloc): Likewise.
(arc_set_public_attributes): Likewise.
(arc_md_end): Likewise.
(arc_copy_symbol_attributes): Likewise.
(rc_convert_symbolic_attribute): Likewise.
* config/tc-arc.h (md_end): Define.
(CONVERT_SYMBOLIC_ATTRIBUTE): Likewise.
(TC_COPY_SYMBOL_ATTRIBUTES): Likewise.
* doc/c-arc.texi: Document ARC object attributes.
binutils/
2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
* readelf.c (decode_ARC_machine_flags): Recognize OSABI v4.
(get_arc_section_type_name): New function.
(get_section_type_name): Use the above function.
(display_arc_attribute): New function.
(process_arc_specific): Likewise.
(process_arch_specific): Handle ARC specific information.
* testsuite/binutils-all/strip-3.d: Consider ARC.attributes
section.
include/
2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
* elf/arc.h (SHT_ARC_ATTRIBUTES): Define.
(Tag_ARC_*): Define.
(E_ARC_OSABI_V4): Define.
(E_ARC_OSABI_CURRENT): Reassign it.
(TAG_CPU_*): Define.
* opcode/arc-attrs.h: New file.
* opcode/arc.h (insn_subclass_t): Assign enum values.
(insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64.
(ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT)
(ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP)
(ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW)
(ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC)
(ARC_CRC): Delete.
bfd/
2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
* elf32-arc.c (FEATURE_LIST_NAME): Define.
(CONFLICT_LIST): Likewise.
(opcode/arc-attrs.h): Include.
(arc_elf_print_private_bfd_data): Print OSABI v4 flag.
(arc_extract_features): New file.
(arc_stralloc): Likewise.
(arc_elf_merge_attributes): Likewise.
(arc_elf_merge_private_bfd_data): Use object attributes.
(bfd_arc_get_mach_from_attributes): New function.
(arc_elf_object_p): Use object attributes.
(arc_elf_final_write_processing): Likewise.
(elf32_arc_obj_attrs_arg_type): New function.
(elf32_arc_obj_attrs_handle_unknown): Likewise.
(elf32_arc_section_from_shdr): Likewise.
(elf_backend_obj_attrs_vendor): Define.
(elf_backend_obj_attrs_section): Likewise.
(elf_backend_obj_attrs_arg_type): Likewise.
(elf_backend_obj_attrs_section_type): Likewise.
(elf_backend_obj_attrs_handle_unknown): Likewise.
(elf_backend_section_from_shdr): Likewise.
ld/
2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/ld-arc/attr-merge-0.d: New file.
* testsuite/ld-arc/attr-merge-0.s: Likewise.
* testsuite/ld-arc/attr-merge-0e.s: Likewise.
* testsuite/ld-arc/attr-merge-1.d: Likewise.
* testsuite/ld-arc/attr-merge-1.s: Likewise.
* testsuite/ld-arc/attr-merge-1e.s: Likewise.
* testsuite/ld-arc/attr-merge-2.d: Likewise.
* testsuite/ld-arc/attr-merge-2.s: Likewise.
* testsuite/ld-arc/attr-merge-3.d: Likewise.
* testsuite/ld-arc/attr-merge-3.s: Likewise.
* testsuite/ld-arc/attr-merge-3e.s: Likewise.
* testsuite/ld-arc/attr-merge-4.s: Likewise.
* testsuite/ld-arc/attr-merge-5.d: Likewise.
* testsuite/ld-arc/attr-merge-5a.s: Likewise.
* testsuite/ld-arc/attr-merge-5b.s: Likewise.
* testsuite/ld-arc/attr-merge-conflict-isa.d: Likewise.
* testsuite/ld-arc/attr-merge-err-isa.d: Likewise.
* testsuite/ld-arc/attr-merge-incompatible-cpu.d: Likewise.
* testsuite/ld-arc/got-01.d: Update test.
* testsuite/ld-arc/attr-merge-err-quarkse.d: New file.
* testsuite/ld-arc/attr-quarkse.s: Likewise.
* testsuite/ld-arc/attr-quarkse2.s: Likewise.
opcodes/
2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
* arc-dis.c (parse_option): Update quarkse_em option..
* arc-ext-tbl.h (dsp_fp_flt2i, dsp_fp_i2flt): Change subclass to
QUARKSE1.
(dsp_fp_div, dsp_fp_cmp): Change subclass to QUARKSE2.
commit 21d1fbeed4b7c4d006e399437445519e6505088f
Author: Kaz Kojima <kkojima@rr.iij4u.or.jp>
Date: Wed May 10 09:15:19 2017 +0900
Remove Kaz Kojima as SH maintainer.
commit 8010f3ed8d459f98b8ff8b8577a0ed422c836e0d
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Wed May 10 00:00:42 2017 +0000
Automatic date update in version.in
commit a6da46304894741d50a6f4ca2263b5cc158740e4
Author: Awson <kyrab@mail.ru>
Date: Tue May 9 14:42:43 2017 +0100
Support pe-bigobj-x86-64 as an output format in 64-bit PE based linkers.
PR ld/21471
* pe-dll.c (pe_detail_list): Add entry for pe-bigobj-x86-64.
commit 94bb8dfe28219e4b747cb874aae401d18df91c9b
Author: Yao Qi <yao.qi@linaro.org>
Date: Tue May 9 12:36:53 2017 +0100
Use std::forward_list for current_regcache
gdb:
2017-05-09 Yao Qi <yao.qi@linaro.org>
* regcache.c: Include <forward_list>.
(struct regcache_list): Remove.
(current_regcache): Update.
(get_thread_arch_aspace_regcache): Update for std::forward_list.
(regcache_thread_ptid_changed): Likewise.
(registers_changed_ptid): Likewise.
(current_regcache_size): Likewise.
commit 8248946cc5fd4522de630b9d86627af6e8fe0097
Author: Yao Qi <yao.qi@linaro.org>
Date: Tue May 9 12:36:53 2017 +0100
Add current_regcache unit test
This patch adds a unit test to current_regcache, to make sure it is
correctly updated by get_thread_arch_aspace_regcache and
registers_changed_ptid.
gdb:
2017-05-09 Yao Qi <yao.qi@linaro.org>
* regcache.c [GDB_SELF_TEST]: Include selftest.h.
(current_regcache_size): New function.
(current_regcache_test): New function.
(_initialize_regcache) [GDB_SELF_TEST]: Register the unit test.
commit e645cf40b111daef4518a58547de577eb9379ccb
Author: Andrew Goedhart <Andrewgoedhart@simplepowersolutions.co.za>
Date: Tue May 9 12:14:48 2017 +0100
Fix resolution of R_ARM_THM_ALU_PREL_11_0 relocation against Thumb symbols.
PR ld/21458
* elf32-arm.c (elf32_arm_final_link_relocate): Set the bottom bit
of the value when resolving a R_ARM_THM_ALU_PREL_11_0 relocation
and the destination is a Thumb symbol.
commit d2732b697fe56ff4274a4bc45add9386c17f8a07
Author: Alan Modra <amodra@gmail.com>
Date: Tue May 9 17:10:17 2017 +0930
ld.texinfo, use "affects" instead of "effects"
* ld.texinfo (orphan sections): Grammar fix.
commit 56eeb7f2cbdb16f513b825af426ee38d8f7efe3a
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Tue May 9 00:00:40 2017 +0000
Automatic date update in version.in
commit dd9e66ee9549c872fad36a21d521b68b14429f38
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Mon May 8 13:37:50 2017 -0700
Add missing initializer to silence GCC 4.2
Silence GCC 4.2:
elf64-x86-64.c: In function âelf_x86_64_get_synthetic_symtabâ:
elf64-x86-64.c:6490: warning: missing initializer
elf64-x86-64.c:6490: warning: (near initialization for âplts[3].secâ)
* elf32-i386.c (elf_i386_get_synthetic_symtab): Add missing
initializer for GCC 4.2.
* lf64-x86-64.c (elf_x86_64_get_synthetic_symtab): Likewise.
commit 38b123494b38ae09168387c0502acd1f23c1b601
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Mon May 8 12:24:11 2017 -0700
x86-64: Improve PLT generation and synthetic PLT symbols
On x86-64, the procedure linkage table (PLT) is used to
1. Call external function.
2. Call internal IFUNC function. The best implementation is selected
for the target processor at run-time.
3. Act as the canonical function address.
4. Support LD_AUDIT to audit external function calls.
5. Support LD_PROFILE to profile external function calls.
PLT looks like:
PLT0: push GOT[1]
jmp *GOT[2]
nop
PLT1: jmp *GOT[name1_index]
push name1_reloc_index
jmp PLT0
GOT is an array of addresses. Initially the GOT entry of name1 is
filled with the address of the "push name1_reloc_index" instruction.
The function, name1, is called via "jmp *GOT[name1]" in the PLT entry.
Even when lazy binding is disabled by "-z now", the PLT0 entry may
still be used with LD_AUDIT or LD_PROFILE if PLT entry is used for
canonical function address.
When linker is invoked with "-z bndplt", a different PLT layout in .plt
is used:
PLT0: push GOT[1]
bnd jmp *GOT[2]
nop
PLT1: push name1_reloc_index
bnd jmp PLT0
nop
together with a second PLT section, .pl.bnd:
PLT1: bnd jmp *GOT[name1_index]
nop
where the GOT entry of name1 is filled with the address of the push
instruction of the corresponding entry in .plt.
1. With lazy binding, when the external function, name1, is called the
first time, dynamic linker is called via PLT0 to update GOT[name1_index]
with the actual address of name1 and transfers control to name1
afterwards.
2. PLT is also used to call a local IFUNC function, name1, run-time
loader updates GOT[name1_index] when loading the module.
This patch
1. Remove PLT layout configurations from x86-64 backend_data.
2. Add generic, lay and non-lazy PLT layout configurations to x86-64
link_hash_table. Generic PLT layout includes the PLT entry templates,
information how to update the first instruction in PLT and PLT eh_frame
informaton, which are initialized in x86-64 setup_gnu_properties, based
on "-z bndplt" and target selection. PLT section alignment is also set
to PLT entry size for non-NaCl target.
3. Remove elf_x86_64_create_dynamic_sections. create_dynamic_sections
isn't always called, but GOT relocations need GOT relocations. Instead,
create all x86-64 specific dynamic sections with alignment to their entry
size in x86-64 setup_gnu_properties, which initializes elf.dynobj, so
that x86-64 check_relocs can be simplified.
4. Rewrite elf_x86_64_get_synthetic_symtab to check PLT sections against
all dynamic relocations to support both lazy and non-lazy PLTs.
There is no change in PLT. The only externally visible change is the
improvement of synthetic PLT symbols for .plt.got.
bfd/
* elf64-x86-64.c (PLT_ENTRY_SIZE): Renamed to ...
(LAZY_PLT_ENTRY_SIZE): This.
(NON_LAZY_PLT_ENTRY_SIZE): New.
(elf_x86_64_plt0_entry): Renamed to ...
(elf_x86_64_lazy_plt0_entry): This.
(elf_x86_64_plt_entry): Renamed to ...
(elf_x86_64_lazy_plt_entry): This.
(elf_x86_64_bnd_plt0_entry): Renamed to ...
(elf_x86_64_lazy_bnd_plt0_entry): This.
(elf_x86_64_legacy_plt_entry): Removed.
(elf_x86_64_bnd_plt_entry): Renamed to ...
(elf_x86_64_lazy_bnd_plt_entry): This.
(elf_x86_64_legacy_plt2_entry): Renamed to ...
(elf_x86_64_non_lazy_plt_entry): This.
(elf_x86_64_bnd_plt2_entry): Renamed to ...
(elf_x86_64_non_lazy_bnd_plt_entry): This.
(elf_x86_64_eh_frame_plt): Renamed to ...
(elf_x86_64_eh_frame_lazy_plt): This.
(elf_x86_64_eh_frame_bnd_plt): Renamed to ...
(elf_x86_64_eh_frame_lazy_bnd_plt): This.
(elf_x86_64_eh_frame_plt_got): Renamed to ...
(elf_x86_64_eh_frame_non_lazy_plt): This.
(elf_x86_64_lazy_plt_layout): New.
(elf_x86_64_non_lazy_plt_layout): Likewise.
(elf_x86_64_plt_layout): Likewise.
(elf_x86_64_backend_data): Remove PLT layout information. Add
os for target system.
(GET_PLT_ENTRY_SIZE): Removed.
(elf_x86_64_lazy_plt): New.
(elf_x86_64_non_lazy_plt): Likewise.
(elf_x86_64_lazy_bnd_plt): Likewise.
(elf_x86_64_non_lazy_bnd_plt): Likewise.
(elf_x86-64_arch_bed): Updated.
(elf_x86_64_link_hash_table): Add plt, lazy_plt and non_lazy_plt.
(elf_x86_64_create_dynamic_sections): Removed.
(elf_x86_64_check_relocs): Don't check elf.dynobj. Don't call
_bfd_elf_create_ifunc_sections nor _bfd_elf_create_got_section.
(elf_x86-64_adjust_dynamic_symbol): Updated.
(elf_x86_64_allocate_dynrelocs): Updated. Pass 0 as PLT header
size to _bfd_elf_allocate_ifunc_dyn_relocs and don't allocate
size for PLT0 if there is no PLT0. Get plt_entry_size from
non_lazy_plt for non-lazy PLT entries.
(elf_x86_64_size_dynamic_sections): Updated. Get plt_entry_size
from non_lazy_plt for non-lazy PLT entries.
(elf_x86-64_relocate_section): Updated. Properly get PLT index
if there is no PLT0.
(elf_x86_64_finish_dynamic_symbol): Updated. Fill the first slot
in the PLT entry with generic PLT layout. Fill the non-lazy PLT
entries with non-lazy PLT layout. Don't fill the second and third
slots in the PLT entry if there is no PLT0.
(elf_x86_64_finish_dynamic_sections): Updated. Don't fill PLT0
if there is no PLT0. Set sh_entsize on the .plt.got section.
(compare_relocs): New.
(elf_x86_64_plt_type): Likewise.
(elf_x86_64_plt): Likewise.
(elf_x86_64_nacl_plt): New. Forward declaration.
(elf_x86_64_get_plt_sym_val): Removed.
(elf_x86_64_get_synthetic_symtab): Rewrite to check PLT sections
against all dynamic relocations.
(elf_x86_64_link_setup_gnu_properties): New function.
(elf_backend_create_dynamic_sections): Updated.
(elf_backend_setup_gnu_properties): New.
(elf_x86_64_nacl_plt): New.
(elf_x86_64_nacl_arch_bed): Updated.
ld/
* testsuite/ld-ifunc/ifunc-16-x86-64-now.d: New file.
* testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise.
* testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise.
* testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise.
* testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise.
* testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise.
* testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise.
* testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise.
* testsuite/ld-x86-64/mpx3n.dd: Likewise.
* testsuite/ld-x86-64/mpx4n.dd: Likewise.
* testsuite/ld-x86-64/plt-main-bnd-now.rd: Likewise.
* testsuite/ld-x86-64/plt2.dd: Likewise.
* testsuite/ld-x86-64/plt2.rd: Likewise.
* testsuite/ld-x86-64/plt2.s: Likewise.
* testsuite/ld-x86-64/pr20830a-now.d: Likewise.
* testsuite/ld-x86-64/pr20830b-now.d: Likewise.
* testsuite/ld-x86-64/pr21038a-now.d: Likewise.
* testsuite/ld-x86-64/pr21038b-now.d: Likewise.
* testsuite/ld-x86-64/pr21038c-now.d: Likewise.
* testsuite/ld-x86-64/load1b-nacl.d: Updated.
* testsuite/ld-x86-64/load1b.d: Likewise.
* testsuite/ld-x86-64/plt-main-bnd.dd: Likewise.
* testsuite/ld-x86-64/pr20253-1h.d: Likewise.
* testsuite/ld-x86-64/pr20830a.d: Update the .plt.got section
with func@plt.
* testsuite/ld-x86-64/pr20830b.d: Likewise.
* testsuite/ld-x86-64/pr21038a.d: Likewise.
* testsuite/ld-x86-64/pr21038c.d: Likewise.
* testsuite/ld-x86-64/mpx.exp: Add some -z now tests.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
commit d7ab4911f8aa3e1cd06ece40f74d0b4a532d6a10
Author: Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Date: Mon May 8 19:10:42 2017 +0200
S/390: Fix ifunc missing runtime reloc
This fixes a problem with a missing R_390_64 reloc against .data for a
function pointer to an ifunc function.
No regressions on s390x.
Pushed to mainline.
bfd/ChangeLog:
2017-05-08 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* elf-s390-common.c: Don't check non_got_ref flag.
* elf32-s390.c (elf_s390_relocate_section): Likewise.
* elf64-s390.c (elf_s390_relocate_section): Likewise.
commit f604c2a2a54ebf88e4a51986c7cdedffe7b3313a
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Mon May 8 10:10:22 2017 -0700
i386: Improve PLT generation and synthetic PLT symbols
On i386, the procedure linkage table (PLT) is used to
1. Call external function.
2. Call internal IFUNC function. The best implementation is selected
for the target processor at run-time.
3. Act as the canonical function address.
4. Support LD_AUDIT to audit external function calls.
5. Support LD_PROFILE to profile external function calls.
PLT looks like:
PLT0: push GOT[1]
jmp *GOT[2]
nop
PLT1: jmp *GOT[name1_index]
push name1_reloc_index
jmp PLT0
GOT is an array of addresses. Initially the GOT entry of name1 is
filled with the address of the "push name1_reloc_index" instruction.
The function, name1, is called via "jmp *GOT[name1]" in the PLT entry.
Even when lazy binding is disabled by "-z now", the PLT0 entry may
still be used with LD_AUDIT or LD_PROFILE if PLT entry is used for
canonical function address.
1. With lazy binding, when the external function, name1, is called the
first time, dynamic linker is called via PLT0 to update GOT[name1_index]
with the actual address of name1 and transfers control to name1
afterwards.
2. PLT is also used to call a local IFUNC function, name1, run-time
loader updates GOT[name1_index] when loading the module.
This patch
1. Remove PLT layout configurations from i386 backend_data.
2. Add generic, lay and non-lazy PLT layout configurations to i386
link_hash_table. Generic PLT layout includes the PLT entry templates,
information how to update the first instruction in PLT and PLT eh_frame
informaton, which are initialized in i386 setup_gnu_properties, based
on PIC and target selection. PLT section alignment is also set to PLT
entry size for non-NaCl/VxWorks target.
3. Remove elf_i386_create_dynamic_sections. create_dynamic_sections
isn't always called, but GOT relocations need GOT relocations. Instead,
create all i386 specific dynamic sections in i386 setup_gnu_properties,
which initializes elf.dynobj, so that i386 check_relocs can be simplified.
4. Rewrite elf_i386_get_synthetic_symtab to check PLT sections against
all dynamic relocations to support both lazy and non-lazy PLTs.
bfd/
* elf32-i386.c (PLT_ENTRY_SIZE): Renamed to ...
(LAZY_PLT_ENTRY_SIZE): This.
(NON_LAZY_PLT_ENTRY_SIZE): New.
(elf_i386_plt0_entry): Renamed to ...
(elf_i386_lazy_plt0_entry): This.
(elf_i386_plt_entry): Renamed to ...
(elf_i386_lazy_plt_entry): This.
(elf_i386_pic_plt0_entry): Renamed to ...
(elf_i386_pic_lazy_plt0_entry): This.
(elf_i386_pic_plt_entry): Renamed to ...
(elf_i386_pic_lazy_plt_entry): This.
(elf_i386_got_plt_entry): Renamed to ...
(elf_i386_non_lazy_plt_entry): This.
(elf_i386_pic_got_plt_entry): Renamed to ...
(elf_i386_pic_non_lazy_plt_entry): This.
(elf_i386_eh_frame_plt): Renamed to ...
(elf_i386_eh_frame_lazy_plt): This.
(elf_i386_eh_frame_plt_got): Renamed to ...
(elf_i386_eh_frame_non_lazy_plt): This.
(elf_i386_plt_layout): Renamed to ...
(elf_i386_lazy_plt_layout): This. Remove eh_frame_plt_got and
eh_frame_plt_got_size.
(elf_i386_non_lazy_plt_layout): New.
(elf_i386_plt_layout): Likewise.
(elf_i386_non_lazy_plt): Likewise.
(GET_PLT_ENTRY_SIZE): Removed.
(elf_i386_plt): Renamed to ...
(elf_i386_lazy_plt): This.
(elf_i386_backend_data): Remove plt. Rename is_vxworks to os.
(elf_i386_arch_bed): Updated.
(elf_i386_link_hash_table): Add plt, lazy_plt and non_lazy_plt.
(elf_i386_create_dynamic_sections): Removed.
(elf_i386_check_relocs): Don't check elf.dynobj. Don't call
_bfd_elf_create_ifunc_sections nor _bfd_elf_create_got_section.
(elf_i386_adjust_dynamic_symbol): Updated.
(elf_i386_allocate_dynrelocs): Updated. Pass 0 as PLT header
size to _bfd_elf_allocate_ifunc_dyn_relocs and don't allocate
size for PLT0 if there is no PLT0.
(elf_i386_size_dynamic_sections): Updated. Check whether GOT
output section is discarded only if GOT isn't empty.
(elf_i386_relocate_section): Updated. Properly get PLT index
if there is no PLT0.
(elf_i386_finish_dynamic_symbol): Updated. Don't fill the
second and third slots in the PLT entry if there is no PLT0.
(elf_i386_finish_dynamic_sections): Updated. Don't fill PLT0
if there is no PLT0. Set sh_entsize on the .plt.got section.
(elf_i386_nacl_plt): Forward declaration.
(elf_i386_get_plt_sym_val): Removed.
(elf_i386_get_synthetic_symtab): Rewrite to check PLT sections
against all dynamic relocations.
(elf_i386_link_setup_gnu_properties): New function.
(elf_backend_create_dynamic_sections): Updated.
(elf_backend_setup_gnu_properties): New.
(elf_i386_nacl_plt): Updated.
(elf_i386_nacl_arch_bed): Likewise.
(elf_i386_vxworks_arch_bed): Likewise.
ld/
* testsuite/ld-i386/i386.exp: Add some -z now tests.
* testsuite/ld-i386/plt-pic2.dd: New file.
* testsuite/ld-i386/plt2.dd: Likewise.
* testsuite/ld-i386/plt2.rd: Likewise.
* testsuite/ld-i386/plt2.s: Likewise.
* testsuite/ld-ifunc/ifunc-16-i386-now.d: Likewise.
* testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise.
* testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise.
* testsuite/ld-ifunc/pr17154-i386-now.d: Likewise.
* testsuite/ld-i386/pr20830.d: Update the .plt.got section
with func@plt.
commit 046734ff424bc5a4c1b6a69630d5bb31aa67165c
Author: Thomas Preud'homme <thomas.preudhomme@arm.com>
Date: Mon May 8 15:26:51 2017 +0100
Make import libraries relocatable objects
For ELF targets --out-implib currently generates an executable file
(e_type is ET_EXEC) despite the file being expected to be linked against
some other object file to make an executable later. It seems therefore
more sensible to make the import library a relocatable object file
(e_type set to ET_REL).
Incidentally, as dicted by requirement 8 of
"ARM v8-M Security Extensions: Requirements on Development Tools"
(document ARM-ECM-0359818) version 1.0, import libraries generated when
using --cmse-implib *must* be relocatable object file so this commit
also adds an assert there in case the type of ELF import library is
changed again in the future.
2017-05-08 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elflink.c (elf_output_implib): Remove executable flag from import
library bfd.
* elf32-arm.c (elf32_arm_filter_implib_symbols): Assert that the import
library is a relocatable object file.
ld/
* testsuite/ld-arm/arm-elf.exp
(Secure gateway import library generation): Check e_type field
of import library and executable produced.
* testsuite/ld-arm/cmse-implib.type: Expectations for e_type field.
commit 313c59612298b022a408ca390bd5f73f28708015
Author: Alan Hayward <alan.hayward@arm.com>
Date: Mon May 8 09:40:07 2017 +0100
Remove some uses of MAX_REGISTER_SIZE from mips-tdep.c
gdb/
* mips-tdep.c (mips_o32_return_value): Remove unused buffer.
(print_gp_register_row): Use get_frame_register_value.
commit 27bfc1d1c2cbcafccddef51ef82b309ef147c4a8
Author: Alan Hayward <alan.hayward@arm.com>
Date: Mon May 8 09:37:26 2017 +0100
Remove some uses of MAX_REGISTER_SIZE from mips-linux-tdep.c
gdb/
* mips-linux-tdep.c (mips_supply_gregset): Use raw_supply_zeroed.
(mips_supply_fpregset): Likewise.
(mips64_supply_gregset): Likewise.
commit 146e6c5cc7b19ea56a033415511e38a2d0656e42
Author: Alan Hayward <alan.hayward@arm.com>
Date: Mon May 8 09:35:45 2017 +0100
Remove some uses of MAX_REGISTER_SIZE uses from mn10300-linux-tdep.c
gdb/
* mn10300-linux-tdep.c (am33_supply_gregset_method): Use
regcache->raw_supply_zeroed.
commit b48e3ca69abef81d729d01d7c720fb23697c3590
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Mon May 8 00:00:41 2017 +0000
Automatic date update in version.in
-----------------------------------------------------------------------
Summary of changes:
bfd/ChangeLog | 249 +++
bfd/aout-adobe.c | 1 +
bfd/aout-target.h | 3 +
bfd/aout-tic30.c | 3 +
bfd/bfd-in2.h | 5 +
bfd/bfd.c | 12 +-
bfd/bout.c | 1 +
bfd/coff-alpha.c | 3 +
bfd/coff-mips.c | 1 +
bfd/coff-rs6000.c | 1 +
bfd/coff64-rs6000.c | 2 +
bfd/coffcode.h | 4 +
bfd/elf-s390-common.c | 4 +-
bfd/elf32-arc.c | 439 ++++++-
bfd/elf32-arm.c | 8 +
bfd/elf32-i386.c | 1240 ++++++++++-----
bfd/elf32-s390.c | 2 +-
bfd/elf64-s390.c | 7 +-
bfd/elf64-sparc.c | 24 +-
bfd/elf64-x86-64.c | 1575 ++++++++++++--------
bfd/elflink.c | 3 +-
bfd/elfxx-mips.c | 2 +
bfd/elfxx-target.h | 3 +
bfd/i386msdos.c | 1 +
bfd/i386os9k.c | 2 +
bfd/ieee.c | 1 +
bfd/libbfd-in.h | 2 +
bfd/libbfd.c | 9 +
bfd/libbfd.h | 8 +
bfd/mach-o-target.c | 1 +
bfd/nlm-target.h | 1 +
bfd/oasys.c | 1 +
bfd/reloc.c | 26 +
bfd/som.c | 1 +
bfd/targets.c | 3 +
bfd/versados.c | 1 +
bfd/version.h | 2 +-
bfd/vms-alpha.c | 5 +
binutils/ChangeLog | 38 +
binutils/MAINTAINERS | 1 -
binutils/NEWS | 2 +
binutils/readelf.c | 202 +++
binutils/testsuite/binutils-all/mips/mips.exp | 10 +
.../binutils-all/mips/mips16-extend-insn.d | 4 +-
.../testsuite/binutils-all/mips/mips16-undecoded.d | 2 +-
.../testsuite/binutils-all/mips/mips16-undecoded.s | 1 -
.../binutils-all/mips/mips16e2-extend-insn.d | 355 +++++
.../binutils-all/mips/mips16e2-undecoded.d | 189 +++
binutils/testsuite/binutils-all/strip-3.d | 2 +-
gas/ChangeLog | 509 +++++++
gas/config/tc-arc.c | 375 ++++-
gas/config/tc-arc.h | 11 +
gas/config/tc-arm.c | 19 +-
gas/config/tc-mips.c | 202 ++-
gas/doc/as.texinfo | 21 +-
gas/doc/c-arc.texi | 16 +
gas/doc/c-mips.texi | 26 +-
gas/testsuite/gas/arc/attr-arc600.d | 10 +
gas/testsuite/gas/arc/attr-arc600_mul32x16.d | 10 +
gas/testsuite/gas/arc/attr-arc600_norm.d | 10 +
gas/testsuite/gas/arc/attr-arc601.d | 10 +
gas/testsuite/gas/arc/attr-arc601_mul32x16.d | 10 +
gas/testsuite/gas/arc/attr-arc601_mul64.d | 10 +
gas/testsuite/gas/arc/attr-arc601_norm.d | 10 +
gas/testsuite/gas/arc/attr-arc700.d | 10 +
gas/testsuite/gas/arc/attr-arcem.d | 10 +
gas/testsuite/gas/arc/attr-archs.d | 11 +
gas/testsuite/gas/arc/attr-autodetect-1.d | 11 +
gas/testsuite/gas/arc/attr-autodetect-1.s | 4 +
gas/testsuite/gas/arc/attr-cpu-a601.d | 8 +
gas/testsuite/gas/arc/attr-cpu-a601.s | 1 +
gas/testsuite/gas/arc/attr-cpu-a700.d | 8 +
gas/testsuite/gas/arc/attr-cpu-a700.s | 1 +
gas/testsuite/gas/arc/attr-cpu-em.d | 8 +
gas/testsuite/gas/arc/attr-cpu-em.s | 1 +
gas/testsuite/gas/arc/attr-cpu-hs.d | 9 +
gas/testsuite/gas/arc/attr-cpu-hs.s | 1 +
gas/testsuite/gas/arc/attr-em.d | 10 +
gas/testsuite/gas/arc/attr-em4.d | 11 +
gas/testsuite/gas/arc/attr-em4_dmips.d | 11 +
gas/testsuite/gas/arc/attr-em4_fpuda.d | 11 +
gas/testsuite/gas/arc/attr-em4_fpus.d | 11 +
gas/testsuite/gas/arc/attr-hs.d | 11 +
gas/testsuite/gas/arc/attr-hs34.d | 11 +
gas/testsuite/gas/arc/attr-hs38.d | 11 +
gas/testsuite/gas/arc/attr-hs38_linux.d | 11 +
gas/testsuite/gas/arc/attr-mul64.d | 10 +
gas/testsuite/gas/arc/attr-name.d | 22 +
gas/testsuite/gas/arc/attr-name.s | 17 +
gas/testsuite/gas/arc/attr-nps400.d | 11 +
gas/testsuite/gas/arc/attr-override-mcpu.d | 10 +
gas/testsuite/gas/arc/attr-override-mcpu.s | 1 +
gas/testsuite/gas/arc/attr-quarkse_em.d | 11 +
gas/testsuite/gas/arc/blank.s | 1 +
gas/testsuite/gas/arc/cpu-pseudop-1.d | 2 +-
gas/testsuite/gas/arc/cpu-pseudop-2.d | 2 +-
gas/testsuite/gas/arc/nps400-0.d | 2 +-
gas/testsuite/gas/arm/pr21458.d | 27 +
gas/testsuite/gas/arm/pr21458.s | 40 +
gas/testsuite/gas/elf/elf.exp | 3 +
gas/testsuite/gas/elf/section2.e-arc | 9 +
gas/testsuite/gas/mips/addiu-error.d | 3 +
gas/testsuite/gas/mips/addiu-error.l | 8 +
gas/testsuite/gas/mips/addiu-error.s | 11 +
gas/testsuite/gas/mips/break-error.d | 3 +
gas/testsuite/gas/mips/break-error.l | 8 +
gas/testsuite/gas/mips/break-error.s | 11 +
gas/testsuite/gas/mips/elf-rel8-mips16.d | 8 +-
gas/testsuite/gas/mips/elf-rel8-mips16.s | 7 +
gas/testsuite/gas/mips/elf-rel8.d | 6 +
gas/testsuite/gas/mips/elf-rel8.s | 6 +
gas/testsuite/gas/mips/elf-rel9-mips16e2.d | 69 +
gas/testsuite/gas/mips/elf-rel9-mips16e2.s | 62 +
gas/testsuite/gas/mips/elf_ase_mips16e2-2.d | 21 +
gas/testsuite/gas/mips/elf_ase_mips16e2.d | 5 +
gas/testsuite/gas/mips/isa-override-2.d | 4 +
gas/testsuite/gas/mips/lui-1.d | 3 +
gas/testsuite/gas/mips/lui-1.l | 2 +-
gas/testsuite/gas/mips/lui-2.d | 3 +
gas/testsuite/gas/mips/micromips@addiu-error.d | 4 +
gas/testsuite/gas/mips/micromips@addiu-error.l | 8 +
gas/testsuite/gas/mips/micromips@mips32r2-sync-1.d | 29 +
gas/testsuite/gas/mips/mips.exp | 240 +++-
gas/testsuite/gas/mips/mips16-32@mips16-asmacro.d | 3 +-
gas/testsuite/gas/mips/mips16-32@mips16-asmacro.s | 2 +
gas/testsuite/gas/mips/mips16-32@mips16-insn-e.l | 14 +-
gas/testsuite/gas/mips/mips16-32@mips16-sub.d | 14 +-
gas/testsuite/gas/mips/mips16-32@mips16e-64-sub.d | 2 +-
gas/testsuite/gas/mips/mips16-32@mips16e-sub.d | 2 +-
gas/testsuite/gas/mips/mips16-64.d | 14 +-
gas/testsuite/gas/mips/mips16-64@mips16-64.d | 14 +-
gas/testsuite/gas/mips/mips16-64@mips16-asmacro.d | 3 +-
gas/testsuite/gas/mips/mips16-64@mips16-asmacro.s | 2 +
gas/testsuite/gas/mips/mips16-64@mips16-insn-e.l | 22 +-
gas/testsuite/gas/mips/mips16-64@mips16-macro.d | 16 +-
gas/testsuite/gas/mips/mips16-64@mips16.d | 14 +-
gas/testsuite/gas/mips/mips16-64@mips16e-64-sub.d | 2 +-
gas/testsuite/gas/mips/mips16-64@mips16e-sub.d | 2 +-
gas/testsuite/gas/mips/mips16-asmacro.s | 1 -
gas/testsuite/gas/mips/mips16-insn-e.l | 22 +-
gas/testsuite/gas/mips/mips16-macro.d | 16 +-
gas/testsuite/gas/mips/mips16-macro.l | 12 -
gas/testsuite/gas/mips/mips16-pcrel-1.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-1.l | 6 +-
gas/testsuite/gas/mips/mips16-pcrel-1.s | 19 +-
gas/testsuite/gas/mips/mips16-pcrel-absolute-2.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-absolute-3.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-absolute-6.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-absolute-7.d | 2 +-
.../gas/mips/mips16-pcrel-absolute-n32-4.d | 2 +-
.../gas/mips/mips16-pcrel-absolute-n32-6.d | 2 +-
.../gas/mips/mips16-pcrel-absolute-n64-4.d | 2 +-
.../gas/mips/mips16-pcrel-absolute-n64-6.d | 2 +-
.../gas/mips/mips16-pcrel-absolute-n64-sym32-4.d | 2 +-
.../gas/mips/mips16-pcrel-absolute-n64-sym32-6.d | 2 +-
.../gas/mips/mips16-pcrel-absolute-pic-6.d | 2 +-
.../gas/mips/mips16-pcrel-absolute-pic-n32-4.d | 2 +-
.../gas/mips/mips16-pcrel-absolute-pic-n32-6.d | 2 +-
.../gas/mips/mips16-pcrel-absolute-pic-n64-4.d | 2 +-
.../gas/mips/mips16-pcrel-absolute-pic-n64-6.d | 2 +-
.../mips/mips16-pcrel-absolute-pic-n64-sym32-4.d | 2 +-
.../mips/mips16-pcrel-absolute-pic-n64-sym32-6.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-addend-4.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-addend-5.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-addend-6.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-addend-7.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-addend-9.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-addend-n32-8.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-addend-n32-9.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-addend-n64-8.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-addend-n64-9.d | 2 +-
.../gas/mips/mips16-pcrel-addend-n64-sym32-8.d | 2 +-
.../gas/mips/mips16-pcrel-addend-n64-sym32-9.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-addend-pic-9.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-n32-0.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-n32-1.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-n64-0.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-n64-1.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-pic-1.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-reloc-4.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-reloc-5.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-reloc-6.d | 2 +-
gas/testsuite/gas/mips/mips16-pcrel-reloc-7.d | 2 +-
gas/testsuite/gas/mips/mips16-reg-error.d | 3 +
gas/testsuite/gas/mips/mips16-reg-error.l | 54 +
gas/testsuite/gas/mips/mips16-reg-error.s | 81 +
gas/testsuite/gas/mips/mips16-reloc-error.d | 3 +
gas/testsuite/gas/mips/mips16-reloc-error.l | 28 +
gas/testsuite/gas/mips/mips16-reloc-error.s | 52 +
gas/testsuite/gas/mips/mips16-sub.d | 14 +-
gas/testsuite/gas/mips/mips16-sub.s | 1 +
gas/testsuite/gas/mips/mips16.d | 14 +-
gas/testsuite/gas/mips/mips16@addiu-error.d | 4 +
gas/testsuite/gas/mips/mips16@addiu-error.l | 8 +
gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.l | 14 +-
gas/testsuite/gas/mips/mips16e-32@mips16e-64-sub.d | 2 +-
gas/testsuite/gas/mips/mips16e-64-sub.d | 2 +-
gas/testsuite/gas/mips/mips16e-64-sub.s | 1 +
gas/testsuite/gas/mips/mips16e-sub.d | 2 +-
gas/testsuite/gas/mips/mips16e-sub.s | 1 +
gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.d | 4 +
gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.l | 131 ++
gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.d | 4 +
gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.l | 43 +
.../gas/mips/mips16e2-32@mips16-macro-e.d | 4 +
.../gas/mips/mips16e2-32@mips16-macro-e.l | 56 +
.../gas/mips/mips16e2-32@mips16-macro-t.d | 4 +
.../gas/mips/mips16e2-32@mips16-macro-t.l | 56 +
gas/testsuite/gas/mips/mips16e2-32@mips16-macro.d | 5 +
gas/testsuite/gas/mips/mips16e2-32@mips16-macro.l | 12 +
gas/testsuite/gas/mips/mips16e2-32@mips16-sub.d | 5 +
.../gas/mips/mips16e2-32@mips16e-64-sub.d | 5 +
gas/testsuite/gas/mips/mips16e2-32@mips16e-64.d | 4 +
gas/testsuite/gas/mips/mips16e2-hilo-n32.d | 419 ++++++
gas/testsuite/gas/mips/mips16e2-hilo.d | 419 ++++++
gas/testsuite/gas/mips/mips16e2-hilo.s | 239 +++
gas/testsuite/gas/mips/mips16e2-imm-error.d | 4 +
gas/testsuite/gas/mips/mips16e2-imm-error.l | 67 +
gas/testsuite/gas/mips/mips16e2-imm-error.s | 79 +
gas/testsuite/gas/mips/mips16e2-lui.d | 22 +
gas/testsuite/gas/mips/mips16e2-lui.s | 18 +
gas/testsuite/gas/mips/mips16e2-mt-sub.d | 33 +
gas/testsuite/gas/mips/mips16e2-mt-sub.s | 4 +
gas/testsuite/gas/mips/mips16e2-mt.d | 21 +
gas/testsuite/gas/mips/mips16e2-mt.s | 21 +
gas/testsuite/gas/mips/mips16e2-reloc-error.d | 4 +
gas/testsuite/gas/mips/mips16e2-reloc-error.l | 18 +
gas/testsuite/gas/mips/mips16e2-reloc-error.s | 39 +
gas/testsuite/gas/mips/mips16e2-sub.d | 749 ++++++++++
gas/testsuite/gas/mips/mips16e2-sub.s | 3 +
gas/testsuite/gas/mips/mips16e2.d | 731 +++++++++
gas/testsuite/gas/mips/mips16e2.s | 210 +++
gas/testsuite/gas/mips/mips16e2@lui-2.d | 4 +
gas/testsuite/gas/mips/mips16e2@lui-2.l | 5 +
gas/testsuite/gas/mips/mips16e2@mips16-pcrel-0.d | 44 +
gas/testsuite/gas/mips/mips16e2@mips16-pcrel-1.d | 52 +
gas/testsuite/gas/mips/mips16e2@mips16-pcrel-2.d | 6 +
.../gas/mips/mips16e2@mips16-pcrel-absolute-1.d | 5 +
.../gas/mips/mips16e2@mips16-pcrel-absolute-2.d | 15 +
.../gas/mips/mips16e2@mips16-pcrel-absolute-3.d | 5 +
.../gas/mips/mips16e2@mips16-pcrel-absolute-4.d | 27 +
.../gas/mips/mips16e2@mips16-pcrel-absolute-5.d | 5 +
.../gas/mips/mips16e2@mips16-pcrel-absolute-6.d | 27 +
.../gas/mips/mips16e2@mips16-pcrel-absolute-7.d | 5 +
.../mips/mips16e2@mips16-pcrel-absolute-n32-4.d | 5 +
.../mips/mips16e2@mips16-pcrel-absolute-n32-6.d | 5 +
.../mips16e2@mips16-pcrel-absolute-n64-sym32-4.d | 5 +
.../mips16e2@mips16-pcrel-absolute-n64-sym32-6.d | 5 +
.../mips/mips16e2@mips16-pcrel-absolute-pic-4.d | 5 +
.../mips/mips16e2@mips16-pcrel-absolute-pic-6.d | 5 +
.../mips16e2@mips16-pcrel-absolute-pic-n32-4.d | 5 +
.../mips16e2@mips16-pcrel-absolute-pic-n32-6.d | 5 +
...ips16e2@mips16-pcrel-absolute-pic-n64-sym32-4.d | 5 +
...ips16e2@mips16-pcrel-absolute-pic-n64-sym32-6.d | 5 +
.../gas/mips/mips16e2@mips16-pcrel-absolute.d | 15 +
.../gas/mips/mips16e2@mips16-pcrel-addend-2.d | 20 +
.../gas/mips/mips16e2@mips16-pcrel-addend-3.d | 19 +
.../gas/mips/mips16e2@mips16-pcrel-addend-6.d | 20 +
.../gas/mips/mips16e2@mips16-pcrel-addend-7.d | 19 +
.../gas/mips/mips16e2@mips16-pcrel-addend-8.d | 43 +
.../gas/mips/mips16e2@mips16-pcrel-addend-9.d | 43 +
.../gas/mips/mips16e2@mips16-pcrel-addend-n32-8.d | 43 +
.../gas/mips/mips16e2@mips16-pcrel-addend-n32-9.d | 43 +
.../mips16e2@mips16-pcrel-addend-n64-sym32-8.d | 75 +
.../mips16e2@mips16-pcrel-addend-n64-sym32-9.d | 75 +
.../gas/mips/mips16e2@mips16-pcrel-delay-0.d | 34 +
.../gas/mips/mips16e2@mips16-pcrel-delay-1.d | 39 +
.../gas/mips/mips16e2@mips16-pcrel-n32-0.d | 44 +
.../gas/mips/mips16e2@mips16-pcrel-n32-1.d | 52 +
.../gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d | 60 +
.../gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d | 68 +
.../gas/mips/mips16e2@mips16-pcrel-reloc-2.d | 20 +
.../gas/mips/mips16e2@mips16-pcrel-reloc-3.d | 19 +
.../gas/mips/mips16e2@mips16-pcrel-reloc-6.d | 20 +
.../gas/mips/mips16e2@mips16-pcrel-reloc-7.d | 19 +
gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d | 34 +
gas/testsuite/gas/mips/mips16e2@mips16e2-sub.d | 5 +
gas/testsuite/gas/mips/mips16e2@mips32r2-sync-1.d | 29 +
gas/testsuite/gas/mips/mips16e2@mips32r2-sync.d | 29 +
gas/testsuite/gas/mips/mips16e2@relax-swap3.d | 19 +
gas/testsuite/gas/mips/mips1@ecoff@sd-forward.d | 5 -
gas/testsuite/gas/mips/mips1@ecoff@sd.d | 5 -
gas/testsuite/gas/mips/mips1@isa-override-2.d | 4 +
gas/testsuite/gas/mips/mips1@isa-override-2.s | 18 -
gas/testsuite/gas/mips/mips2@ecoff@ld-forward.d | 5 -
gas/testsuite/gas/mips/mips2@ecoff@ld.d | 5 -
gas/testsuite/gas/mips/mips2@ecoff@sd-forward.d | 5 -
gas/testsuite/gas/mips/mips2@ecoff@sd.d | 5 -
gas/testsuite/gas/mips/mips2@isa-override-2.d | 4 +
gas/testsuite/gas/mips/mips2@isa-override-2.s | 18 -
gas/testsuite/gas/mips/mips32@ecoff@ld-forward.d | 5 -
gas/testsuite/gas/mips/mips32@ecoff@ld.d | 5 -
gas/testsuite/gas/mips/mips32@ecoff@sd-forward.d | 5 -
gas/testsuite/gas/mips/mips32@ecoff@sd.d | 5 -
gas/testsuite/gas/mips/mips32@isa-override-2.d | 4 +
gas/testsuite/gas/mips/mips32@isa-override-2.s | 18 -
gas/testsuite/gas/mips/mips32r2-sync-1.d | 29 +
gas/testsuite/gas/mips/mips32r2@ecoff@ld-forward.d | 5 -
gas/testsuite/gas/mips/mips32r2@ecoff@ld.d | 5 -
gas/testsuite/gas/mips/mips32r2@ecoff@sd-forward.d | 5 -
gas/testsuite/gas/mips/mips32r2@ecoff@sd.d | 5 -
gas/testsuite/gas/mips/mips32r2@isa-override-2.d | 4 +
gas/testsuite/gas/mips/mips32r2@isa-override-2.s | 18 -
gas/testsuite/gas/mips/mips32r3@isa-override-2.d | 4 +
gas/testsuite/gas/mips/mips32r3@isa-override-2.s | 18 -
gas/testsuite/gas/mips/mips32r5@isa-override-2.d | 4 +
gas/testsuite/gas/mips/mips32r5@isa-override-2.s | 18 -
gas/testsuite/gas/mips/mips32r6@isa-override-2.d | 4 +
gas/testsuite/gas/mips/mips32r6@isa-override-2.s | 18 -
gas/testsuite/gas/mips/octeon3@isa-override-2.d | 4 +
gas/testsuite/gas/mips/octeon3@isa-override-2.s | 18 -
gas/testsuite/gas/mips/r3000@ecoff@sd-forward.d | 5 -
gas/testsuite/gas/mips/r3000@ecoff@sd.d | 5 -
gas/testsuite/gas/mips/r3000@isa-override-2.d | 4 +
gas/testsuite/gas/mips/r3000@isa-override-2.l | 4 -
gas/testsuite/gas/mips/r3000@isa-override-2.s | 18 -
gas/testsuite/gas/mips/r3900@ecoff@ld-forward.d | 5 -
gas/testsuite/gas/mips/r3900@ecoff@ld.d | 5 -
gas/testsuite/gas/mips/r3900@ecoff@sd-forward.d | 5 -
gas/testsuite/gas/mips/r3900@ecoff@sd.d | 5 -
gas/testsuite/gas/mips/r3900@isa-override-2.d | 4 +
gas/testsuite/gas/mips/r3900@isa-override-2.s | 18 -
gdb/ChangeLog | 58 +
gdb/dwarf2read.c | 7 +-
gdb/mips-linux-tdep.c | 18 +-
gdb/mips-tdep.c | 9 +-
gdb/mn10300-linux-tdep.c | 17 +-
gdb/procfs.c | 4 +-
gdb/regcache.c | 132 ++-
gdb/rust-lang.c | 22 +-
gdb/tui/tui.c | 2 +-
gold/ChangeLog | 21 +
gold/aarch64.cc | 27 +-
gold/sparc.cc | 2 +-
gold/testsuite/Makefile.am | 11 +
gold/testsuite/Makefile.in | 17 +-
gold/testsuite/pr21430.s | 15 +
gold/testsuite/pr21430.sh | 73 +
include/ChangeLog | 30 +
include/elf/arc.h | 34 +-
include/elf/mips.h | 3 +-
include/opcode/arc-attrs.h | 72 +
include/opcode/arc.h | 88 +-
include/opcode/hppa.h | 2 +-
include/opcode/mips.h | 39 +-
ld/ChangeLog | 168 +++
ld/emulparams/elf_x86_64.sh | 2 +-
ld/emulparams/i386lynx.sh | 1 +
ld/emulparams/i386moss.sh | 1 +
ld/emulparams/i386nw.sh | 1 +
ld/ld.texinfo | 2 +-
ld/pe-dll.c | 11 +
ld/scripttempl/pe.sc | 10 +
ld/scripttempl/pep.sc | 10 +
ld/testsuite/ld-arc/attr-merge-0.d | 12 +
ld/testsuite/ld-arc/attr-merge-0.s | 2 +
ld/testsuite/ld-arc/attr-merge-0e.s | 1 +
ld/testsuite/ld-arc/attr-merge-1.d | 12 +
ld/testsuite/ld-arc/attr-merge-1.s | 2 +
ld/testsuite/ld-arc/attr-merge-1e.s | 2 +
ld/testsuite/ld-arc/attr-merge-2.d | 12 +
ld/testsuite/ld-arc/attr-merge-2.s | 2 +
ld/testsuite/ld-arc/attr-merge-3.d | 12 +
ld/testsuite/ld-arc/attr-merge-3.s | 1 +
ld/testsuite/ld-arc/attr-merge-3e.s | 1 +
ld/testsuite/ld-arc/attr-merge-4.s | 2 +
ld/testsuite/ld-arc/attr-merge-5.d | 13 +
ld/testsuite/ld-arc/attr-merge-5a.s | 3 +
ld/testsuite/ld-arc/attr-merge-5b.s | 2 +
ld/testsuite/ld-arc/attr-merge-conflict-isa.d | 6 +
ld/testsuite/ld-arc/attr-merge-err-isa.d | 5 +
ld/testsuite/ld-arc/attr-merge-err-quarkse.d | 5 +
ld/testsuite/ld-arc/attr-merge-incompatible-cpu.d | 5 +
ld/testsuite/ld-arc/attr-quarkse.s | 2 +
ld/testsuite/ld-arc/attr-quarkse2.s | 2 +
ld/testsuite/ld-arc/got-01.d | 2 +-
ld/testsuite/ld-arm/arm-elf.exp | 3 +-
ld/testsuite/ld-arm/cmse-implib.type | 9 +
ld/testsuite/ld-i386/i386.exp | 22 +
ld/testsuite/ld-i386/plt-pic2.dd | 33 +
ld/testsuite/ld-i386/plt2.dd | 34 +
ld/testsuite/ld-i386/plt2.rd | 9 +
ld/testsuite/ld-i386/plt2.s | 7 +
ld/testsuite/ld-i386/pr17689now.rd | 3 +-
ld/testsuite/ld-i386/pr20830.d | 4 +-
ld/testsuite/ld-i386/property-x86-3.d | 9 +
ld/testsuite/ld-i386/property-x86-3.s | 51 +
ld/testsuite/ld-ifunc/ifunc-16-i386-now.d | 10 +
ld/testsuite/ld-ifunc/ifunc-16-x86-64-now.d | 10 +
ld/testsuite/ld-ifunc/ifunc-2-i386-now.d | 36 +
ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d | 36 +
ld/testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d | 32 +
ld/testsuite/ld-ifunc/ifunc-2-x86-64-now.d | 32 +
ld/testsuite/ld-ifunc/pr17154-i386-now.d | 52 +
ld/testsuite/ld-ifunc/pr17154-x86-64-now.d | 51 +
ld/testsuite/ld-mips-elf/mips-elf.exp | 10 +
ld/testsuite/ld-mips-elf/mips16e2-pcrel-0.d | 37 +
ld/testsuite/ld-mips-elf/mips16e2-pcrel-1.d | 45 +
ld/testsuite/ld-mips-elf/mips16e2-pcrel-addend-2.d | 17 +
ld/testsuite/ld-mips-elf/mips16e2-pcrel-addend-6.d | 17 +
ld/testsuite/ld-mips-elf/mips16e2-pcrel-n32-0.d | 6 +
ld/testsuite/ld-mips-elf/mips16e2-pcrel-n32-1.d | 6 +
.../ld-mips-elf/mips16e2-pcrel-n64-sym32-0.d | 6 +
.../ld-mips-elf/mips16e2-pcrel-n64-sym32-1.d | 6 +
ld/testsuite/ld-x86-64/bnd-branch-1-now.d | 45 +
ld/testsuite/ld-x86-64/bnd-ifunc-1-now.d | 33 +
ld/testsuite/ld-x86-64/bnd-ifunc-2-now.d | 59 +
ld/testsuite/ld-x86-64/bnd-ifunc-2.d | 2 +-
ld/testsuite/ld-x86-64/bnd-plt-1-now.d | 55 +
ld/testsuite/ld-x86-64/bnd-plt-1.d | 2 +-
ld/testsuite/ld-x86-64/load1b-nacl.d | 76 +-
ld/testsuite/ld-x86-64/load1b.d | 77 +-
ld/testsuite/ld-x86-64/mpx.exp | 10 +
ld/testsuite/ld-x86-64/mpx3.dd | 2 +-
ld/testsuite/ld-x86-64/mpx3n.dd | 28 +
ld/testsuite/ld-x86-64/mpx4.dd | 2 +-
ld/testsuite/ld-x86-64/mpx4n.dd | 25 +
ld/testsuite/ld-x86-64/plt-main-bnd-now.rd | 3 +
ld/testsuite/ld-x86-64/plt-main-bnd.dd | 2 +-
ld/testsuite/ld-x86-64/plt2.dd | 33 +
ld/testsuite/ld-x86-64/plt2.rd | 9 +
ld/testsuite/ld-x86-64/plt2.s | 7 +
ld/testsuite/ld-x86-64/pr17689now.rd | 3 +-
ld/testsuite/ld-x86-64/pr20253-1h.d | 12 +-
ld/testsuite/ld-x86-64/pr20830a-now.d | 68 +
ld/testsuite/ld-x86-64/pr20830a.d | 4 +-
ld/testsuite/ld-x86-64/pr20830b-now.d | 60 +
ld/testsuite/ld-x86-64/pr20830b.d | 4 +-
ld/testsuite/ld-x86-64/pr21038a-now.d | 72 +
ld/testsuite/ld-x86-64/pr21038a.d | 4 +-
ld/testsuite/ld-x86-64/pr21038b-now.d | 70 +
ld/testsuite/ld-x86-64/pr21038b.d | 4 +-
ld/testsuite/ld-x86-64/pr21038c-now.d | 87 ++
ld/testsuite/ld-x86-64/pr21038c.d | 8 +-
ld/testsuite/ld-x86-64/pr21481a.c | 8 +
ld/testsuite/ld-x86-64/pr21481b.S | 56 +
ld/testsuite/ld-x86-64/property-x86-3.d | 9 +
ld/testsuite/ld-x86-64/property-x86-3.s | 51 +
ld/testsuite/ld-x86-64/x86-64.exp | 75 +
opcodes/ChangeLog | 54 +
opcodes/arc-dis.c | 3 +-
opcodes/arc-ext-tbl.h | 10 +-
opcodes/arc-tbl.h | 46 +-
opcodes/micromips-opc.c | 10 +-
opcodes/mips-dis.c | 90 +-
opcodes/mips-opc.c | 18 +-
opcodes/mips16-opc.c | 102 ++-
449 files changed, 13045 insertions(+), 2052 deletions(-)
create mode 100644 binutils/testsuite/binutils-all/mips/mips16e2-extend-insn.d
create mode 100644 binutils/testsuite/binutils-all/mips/mips16e2-undecoded.d
create mode 100644 gas/testsuite/gas/arc/attr-arc600.d
create mode 100644 gas/testsuite/gas/arc/attr-arc600_mul32x16.d
create mode 100644 gas/testsuite/gas/arc/attr-arc600_norm.d
create mode 100644 gas/testsuite/gas/arc/attr-arc601.d
create mode 100644 gas/testsuite/gas/arc/attr-arc601_mul32x16.d
create mode 100644 gas/testsuite/gas/arc/attr-arc601_mul64.d
create mode 100644 gas/testsuite/gas/arc/attr-arc601_norm.d
create mode 100644 gas/testsuite/gas/arc/attr-arc700.d
create mode 100644 gas/testsuite/gas/arc/attr-arcem.d
create mode 100644 gas/testsuite/gas/arc/attr-archs.d
create mode 100644 gas/testsuite/gas/arc/attr-autodetect-1.d
create mode 100644 gas/testsuite/gas/arc/attr-autodetect-1.s
create mode 100644 gas/testsuite/gas/arc/attr-cpu-a601.d
create mode 100644 gas/testsuite/gas/arc/attr-cpu-a601.s
create mode 100644 gas/testsuite/gas/arc/attr-cpu-a700.d
create mode 100644 gas/testsuite/gas/arc/attr-cpu-a700.s
create mode 100644 gas/testsuite/gas/arc/attr-cpu-em.d
create mode 100644 gas/testsuite/gas/arc/attr-cpu-em.s
create mode 100644 gas/testsuite/gas/arc/attr-cpu-hs.d
create mode 100644 gas/testsuite/gas/arc/attr-cpu-hs.s
create mode 100644 gas/testsuite/gas/arc/attr-em.d
create mode 100644 gas/testsuite/gas/arc/attr-em4.d
create mode 100644 gas/testsuite/gas/arc/attr-em4_dmips.d
create mode 100644 gas/testsuite/gas/arc/attr-em4_fpuda.d
create mode 100644 gas/testsuite/gas/arc/attr-em4_fpus.d
create mode 100644 gas/testsuite/gas/arc/attr-hs.d
create mode 100644 gas/testsuite/gas/arc/attr-hs34.d
create mode 100644 gas/testsuite/gas/arc/attr-hs38.d
create mode 100644 gas/testsuite/gas/arc/attr-hs38_linux.d
create mode 100644 gas/testsuite/gas/arc/attr-mul64.d
create mode 100644 gas/testsuite/gas/arc/attr-name.d
create mode 100644 gas/testsuite/gas/arc/attr-name.s
create mode 100644 gas/testsuite/gas/arc/attr-nps400.d
create mode 100644 gas/testsuite/gas/arc/attr-override-mcpu.d
create mode 100644 gas/testsuite/gas/arc/attr-override-mcpu.s
create mode 100644 gas/testsuite/gas/arc/attr-quarkse_em.d
create mode 100644 gas/testsuite/gas/arc/blank.s
create mode 100644 gas/testsuite/gas/arm/pr21458.d
create mode 100644 gas/testsuite/gas/arm/pr21458.s
create mode 100644 gas/testsuite/gas/elf/section2.e-arc
create mode 100644 gas/testsuite/gas/mips/addiu-error.d
create mode 100644 gas/testsuite/gas/mips/addiu-error.l
create mode 100644 gas/testsuite/gas/mips/addiu-error.s
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create mode 100644 gas/testsuite/gas/mips/break-error.l
create mode 100644 gas/testsuite/gas/mips/break-error.s
create mode 100644 gas/testsuite/gas/mips/elf-rel9-mips16e2.d
create mode 100644 gas/testsuite/gas/mips/elf-rel9-mips16e2.s
create mode 100644 gas/testsuite/gas/mips/elf_ase_mips16e2-2.d
create mode 100644 gas/testsuite/gas/mips/elf_ase_mips16e2.d
create mode 100644 gas/testsuite/gas/mips/isa-override-2.d
create mode 100644 gas/testsuite/gas/mips/lui-1.d
create mode 100644 gas/testsuite/gas/mips/lui-2.d
create mode 100644 gas/testsuite/gas/mips/micromips@addiu-error.d
create mode 100644 gas/testsuite/gas/mips/micromips@addiu-error.l
create mode 100644 gas/testsuite/gas/mips/micromips@mips32r2-sync-1.d
create mode 100644 gas/testsuite/gas/mips/mips16-32@mips16-asmacro.s
create mode 100644 gas/testsuite/gas/mips/mips16-64@mips16-asmacro.s
delete mode 100644 gas/testsuite/gas/mips/mips16-macro.l
create mode 100644 gas/testsuite/gas/mips/mips16-reg-error.d
create mode 100644 gas/testsuite/gas/mips/mips16-reg-error.l
create mode 100644 gas/testsuite/gas/mips/mips16-reg-error.s
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create mode 100644 gas/testsuite/gas/mips/mips16-reloc-error.s
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create mode 100644 gas/testsuite/gas/mips/mips16@addiu-error.l
create mode 100644 gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.l
create mode 100644 gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.l
create mode 100644 gas/testsuite/gas/mips/mips16e2-32@mips16-macro-e.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-32@mips16-macro-e.l
create mode 100644 gas/testsuite/gas/mips/mips16e2-32@mips16-macro-t.d
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create mode 100644 gas/testsuite/gas/mips/mips16e2-32@mips16-macro.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-32@mips16-macro.l
create mode 100644 gas/testsuite/gas/mips/mips16e2-32@mips16-sub.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-32@mips16e-64.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-hilo-n32.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-hilo.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-hilo.s
create mode 100644 gas/testsuite/gas/mips/mips16e2-imm-error.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-imm-error.l
create mode 100644 gas/testsuite/gas/mips/mips16e2-imm-error.s
create mode 100644 gas/testsuite/gas/mips/mips16e2-lui.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-lui.s
create mode 100644 gas/testsuite/gas/mips/mips16e2-mt-sub.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-mt-sub.s
create mode 100644 gas/testsuite/gas/mips/mips16e2-mt.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-mt.s
create mode 100644 gas/testsuite/gas/mips/mips16e2-reloc-error.d
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create mode 100644 gas/testsuite/gas/mips/mips16e2-sub.d
create mode 100644 gas/testsuite/gas/mips/mips16e2-sub.s
create mode 100644 gas/testsuite/gas/mips/mips16e2.d
create mode 100644 gas/testsuite/gas/mips/mips16e2.s
create mode 100644 gas/testsuite/gas/mips/mips16e2@lui-2.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@lui-2.l
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-0.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-1.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-2.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-1.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-2.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-3.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-4.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-5.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-6.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-7.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-4.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-6.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-4.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-6.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-4.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-6.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-4.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-6.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-4.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-6.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-absolute.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-addend-2.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-addend-3.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-addend-6.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-addend-7.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-addend-8.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-addend-9.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-8.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-9.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-8.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-9.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-2.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-3.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-6.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-7.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips16e2-sub.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips32r2-sync-1.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@mips32r2-sync.d
create mode 100644 gas/testsuite/gas/mips/mips16e2@relax-swap3.d
delete mode 100644 gas/testsuite/gas/mips/mips1@ecoff@sd-forward.d
delete mode 100644 gas/testsuite/gas/mips/mips1@ecoff@sd.d
create mode 100644 gas/testsuite/gas/mips/mips1@isa-override-2.d
delete mode 100644 gas/testsuite/gas/mips/mips1@isa-override-2.s
delete mode 100644 gas/testsuite/gas/mips/mips2@ecoff@ld-forward.d
delete mode 100644 gas/testsuite/gas/mips/mips2@ecoff@ld.d
delete mode 100644 gas/testsuite/gas/mips/mips2@ecoff@sd-forward.d
delete mode 100644 gas/testsuite/gas/mips/mips2@ecoff@sd.d
create mode 100644 gas/testsuite/gas/mips/mips2@isa-override-2.d
delete mode 100644 gas/testsuite/gas/mips/mips2@isa-override-2.s
delete mode 100644 gas/testsuite/gas/mips/mips32@ecoff@ld-forward.d
delete mode 100644 gas/testsuite/gas/mips/mips32@ecoff@ld.d
delete mode 100644 gas/testsuite/gas/mips/mips32@ecoff@sd-forward.d
delete mode 100644 gas/testsuite/gas/mips/mips32@ecoff@sd.d
create mode 100644 gas/testsuite/gas/mips/mips32@isa-override-2.d
delete mode 100644 gas/testsuite/gas/mips/mips32@isa-override-2.s
create mode 100644 gas/testsuite/gas/mips/mips32r2-sync-1.d
delete mode 100644 gas/testsuite/gas/mips/mips32r2@ecoff@ld-forward.d
delete mode 100644 gas/testsuite/gas/mips/mips32r2@ecoff@ld.d
delete mode 100644 gas/testsuite/gas/mips/mips32r2@ecoff@sd-forward.d
delete mode 100644 gas/testsuite/gas/mips/mips32r2@ecoff@sd.d
create mode 100644 gas/testsuite/gas/mips/mips32r2@isa-override-2.d
delete mode 100644 gas/testsuite/gas/mips/mips32r2@isa-override-2.s
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delete mode 100644 gas/testsuite/gas/mips/mips32r5@isa-override-2.s
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delete mode 100644 gas/testsuite/gas/mips/mips32r6@isa-override-2.s
create mode 100644 gas/testsuite/gas/mips/octeon3@isa-override-2.d
delete mode 100644 gas/testsuite/gas/mips/octeon3@isa-override-2.s
delete mode 100644 gas/testsuite/gas/mips/r3000@ecoff@sd-forward.d
delete mode 100644 gas/testsuite/gas/mips/r3000@ecoff@sd.d
create mode 100644 gas/testsuite/gas/mips/r3000@isa-override-2.d
delete mode 100644 gas/testsuite/gas/mips/r3000@isa-override-2.l
delete mode 100644 gas/testsuite/gas/mips/r3000@isa-override-2.s
delete mode 100644 gas/testsuite/gas/mips/r3900@ecoff@ld-forward.d
delete mode 100644 gas/testsuite/gas/mips/r3900@ecoff@ld.d
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create mode 100644 gas/testsuite/gas/mips/r3900@isa-override-2.d
delete mode 100644 gas/testsuite/gas/mips/r3900@isa-override-2.s
create mode 100644 gold/testsuite/pr21430.s
create mode 100755 gold/testsuite/pr21430.sh
create mode 100644 include/opcode/arc-attrs.h
create mode 100644 ld/testsuite/ld-arc/attr-merge-0.d
create mode 100644 ld/testsuite/ld-arc/attr-merge-0.s
create mode 100644 ld/testsuite/ld-arc/attr-merge-0e.s
create mode 100644 ld/testsuite/ld-arc/attr-merge-1.d
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create mode 100644 ld/testsuite/ld-arc/attr-merge-2.d
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create mode 100644 ld/testsuite/ld-arc/attr-merge-3.d
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create mode 100644 ld/testsuite/ld-arc/attr-merge-3e.s
create mode 100644 ld/testsuite/ld-arc/attr-merge-4.s
create mode 100644 ld/testsuite/ld-arc/attr-merge-5.d
create mode 100644 ld/testsuite/ld-arc/attr-merge-5a.s
create mode 100644 ld/testsuite/ld-arc/attr-merge-5b.s
create mode 100644 ld/testsuite/ld-arc/attr-merge-conflict-isa.d
create mode 100644 ld/testsuite/ld-arc/attr-merge-err-isa.d
create mode 100644 ld/testsuite/ld-arc/attr-merge-err-quarkse.d
create mode 100644 ld/testsuite/ld-arc/attr-merge-incompatible-cpu.d
create mode 100644 ld/testsuite/ld-arc/attr-quarkse.s
create mode 100644 ld/testsuite/ld-arc/attr-quarkse2.s
create mode 100644 ld/testsuite/ld-arm/cmse-implib.type
create mode 100644 ld/testsuite/ld-i386/plt-pic2.dd
create mode 100644 ld/testsuite/ld-i386/plt2.dd
create mode 100644 ld/testsuite/ld-i386/plt2.rd
create mode 100644 ld/testsuite/ld-i386/plt2.s
create mode 100644 ld/testsuite/ld-i386/property-x86-3.d
create mode 100644 ld/testsuite/ld-i386/property-x86-3.s
create mode 100644 ld/testsuite/ld-ifunc/ifunc-16-i386-now.d
create mode 100644 ld/testsuite/ld-ifunc/ifunc-16-x86-64-now.d
create mode 100644 ld/testsuite/ld-ifunc/ifunc-2-i386-now.d
create mode 100644 ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d
create mode 100644 ld/testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d
create mode 100644 ld/testsuite/ld-ifunc/ifunc-2-x86-64-now.d
create mode 100644 ld/testsuite/ld-ifunc/pr17154-i386-now.d
create mode 100644 ld/testsuite/ld-ifunc/pr17154-x86-64-now.d
create mode 100644 ld/testsuite/ld-mips-elf/mips16e2-pcrel-0.d
create mode 100644 ld/testsuite/ld-mips-elf/mips16e2-pcrel-1.d
create mode 100644 ld/testsuite/ld-mips-elf/mips16e2-pcrel-addend-2.d
create mode 100644 ld/testsuite/ld-mips-elf/mips16e2-pcrel-addend-6.d
create mode 100644 ld/testsuite/ld-mips-elf/mips16e2-pcrel-n32-0.d
create mode 100644 ld/testsuite/ld-mips-elf/mips16e2-pcrel-n32-1.d
create mode 100644 ld/testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-0.d
create mode 100644 ld/testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-1.d
create mode 100644 ld/testsuite/ld-x86-64/bnd-branch-1-now.d
create mode 100644 ld/testsuite/ld-x86-64/bnd-ifunc-1-now.d
create mode 100644 ld/testsuite/ld-x86-64/bnd-ifunc-2-now.d
create mode 100644 ld/testsuite/ld-x86-64/bnd-plt-1-now.d
create mode 100644 ld/testsuite/ld-x86-64/mpx3n.dd
create mode 100644 ld/testsuite/ld-x86-64/mpx4n.dd
create mode 100644 ld/testsuite/ld-x86-64/plt-main-bnd-now.rd
create mode 100644 ld/testsuite/ld-x86-64/plt2.dd
create mode 100644 ld/testsuite/ld-x86-64/plt2.rd
create mode 100644 ld/testsuite/ld-x86-64/plt2.s
create mode 100644 ld/testsuite/ld-x86-64/pr20830a-now.d
create mode 100644 ld/testsuite/ld-x86-64/pr20830b-now.d
create mode 100644 ld/testsuite/ld-x86-64/pr21038a-now.d
create mode 100644 ld/testsuite/ld-x86-64/pr21038b-now.d
create mode 100644 ld/testsuite/ld-x86-64/pr21038c-now.d
create mode 100644 ld/testsuite/ld-x86-64/pr21481a.c
create mode 100644 ld/testsuite/ld-x86-64/pr21481b.S
create mode 100644 ld/testsuite/ld-x86-64/property-x86-3.d
create mode 100644 ld/testsuite/ld-x86-64/property-x86-3.s
First 500 lines of diff:
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 27ac8c3..52c192d 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,252 @@
+2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
+
+ * elfxx-mips.c (print_mips_ases): Handle MIPS16e2 ASE.
+
+2017-05-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf32-i386.c (elf_i386_parse_gnu_properties): Merge
+ GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_ISA_1_NEEDED
+ properties.
+ * elf64-x86-64.c (elf_x86_64_parse_gnu_properties): Likewise.
+
+2017-05-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf64-x86-64.c (elf_x86_64_link_hash_entry): Rename plt_bnd
+ to plt_second.
+ (elf_x86_64_link_hash_table): Rename plt_bnd/plt_bnd_eh_frame
+ to plt_second/plt_second_eh_frame.
+ (elf_x86_64_link_hash_newfunc): Updated.
+ (elf_x86_64_allocate_dynrelocs): Likewise.
+ (elf_x86_64_size_dynamic_sections): Likewise.
+ (elf_x86_64_relocate_section): Likewise.
+ (elf_x86_64_finish_dynamic_symbol): Likewise.
+ (elf_x86_64_finish_dynamic_sections): Likewise.
+ (elf_x86_64_plt_type): Rename plt_bnd to plt_second.
+ (elf_x86_64_get_synthetic_symtab): Updated. Also scan the
+ .plt.sec section.
+ (elf_backend_setup_gnu_properties): Updated. Create the
+ .plt.sec section instead of the .plt.sec section.
+
+2017-05-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf32-i386.c (elf_i386_allocate_dynrelocs): Partially revert
+ commit 25070364b0ce33eed46aa5d78ebebbec6accec7e.
+ * elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewse.
+
+2017-05-10 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * elf64-sparc.c (elf64_sparc_set_reloc): New function.
+ (bfd_elf64_set_reloc): Define.
+ (elf64_sparc_write_relocs): Use `canon_reloc_count'.
+
+2017-05-10 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * targets.c (BFD_JUMP_TABLE_RELOCS): Add NAME##_set_reloc.
+ (struct bfd_target): New field _bfd_set_reloc.
+ * bfd.c (bfd_set_reloc): Call backend _set_bfd.
+ * reloc.c (_bfd_generic_set_reloc): New function.
+ * coffcode.h (coff_set_reloc): Define to _bfd_generic_set_reloc.
+ * nlm-target.h (nlm_set_reloc): Likewise.
+ * coff-rs6000.c (_bfd_xcoff_set_reloc): Likewise.
+ * aout-tic30.c (MY_set_reloc): Likewise.
+ * aout-target.h (MY_set_reloc): Likewise.
+ * elfxx-target.h (bfd_elfNN_set_reloc): Likewise.
+ * coff-alpha.c (_bfd_ecoff_set_reloc): Likewise.
+ * mach-o-target.c (bfd_mach_o_set_reloc): Likewise.
+ * vms-alpha.c (alpha_vms_set_reloc): Likewise.
+ * aout-adobe.c (aout_32_set_reloc): Likewise.
+ * bout.c (b_out_set_reloc): Likewise.
+ * coff-mips.c (_bfd_ecoff_set_reloc): Likewise.
+ * i386os9k.c (aout_32_set_reloc): Likewise.
+ * ieee.c (ieee_set_reloc): Likewise.
+ * oasys.c (oasys_set_reloc): Likewise.
+ * som.c (som_set_reloc): Likewise.
+ * versados.c (versados_set_reloc): Likewise.
+ * coff64-rs6000.c (rs6000_xcoff64_vec): Add
+ _bfd_generic_set_reloc.
+ (rs6000_xcoff64_aix_vec): LIkewise.
+ * libbfd.c (_bfd_norelocs_set_reloc): New function.
+ * libbfd-in.h: Prototype for _bfd_norelocs_set_reloc.
+ * i386msdos.c (msdos_set_reloc): Define to
+ _bfd_norelocs_set_reloc.
+ * elfcode.h (elf_set_reloc): Define.
+ * bfd-in2.h: Regenerated.
+
+2017-05-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/21481
+ * elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Use .plt.bnd
+ for IFUNC function address.
+
+2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * elf32-arc.c (FEATURE_LIST_NAME): Define.
+ (CONFLICT_LIST): Likewise.
+ (opcode/arc-attrs.h): Include.
+ (arc_elf_print_private_bfd_data): Print OSABI v4 flag.
+ (arc_extract_features): New file.
+ (arc_stralloc): Likewise.
+ (arc_elf_merge_attributes): Likewise.
+ (arc_elf_merge_private_bfd_data): Use object attributes.
+ (bfd_arc_get_mach_from_attributes): New function.
+ (arc_elf_object_p): Use object attributes.
+ (arc_elf_final_write_processing): Likewise.
+ (elf32_arc_obj_attrs_arg_type): New function.
+ (elf32_arc_obj_attrs_handle_unknown): Likewise.
+ (elf32_arc_section_from_shdr): Likewise.
+ (elf_backend_obj_attrs_vendor): Define.
+ (elf_backend_obj_attrs_section): Likewise.
+ (elf_backend_obj_attrs_arg_type): Likewise.
+ (elf_backend_obj_attrs_section_type): Likewise.
+ (elf_backend_obj_attrs_handle_unknown): Likewise.
+ (elf_backend_section_from_shdr): Likewise.
+
+2017-05-09 Andrew Goedhart <Andrewgoedhart@simplepowersolutions.co.za>
+
+ PR ld/21458
+ * elf32-arm.c (elf32_arm_final_link_relocate): Set the bottom bit
+ of the value when resolving a R_ARM_THM_ALU_PREL_11_0 relocation
+ and the destination is a Thumb symbol.
+
+2017-05-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf32-i386.c (elf_i386_get_synthetic_symtab): Add missing
+ initializer to silence GCC 4.2.
+ * lf64-x86-64.c (elf_x86_64_get_synthetic_symtab): Likewise.
+
+2017-05-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf64-x86-64.c (PLT_ENTRY_SIZE): Renamed to ...
+ (LAZY_PLT_ENTRY_SIZE): This.
+ (NON_LAZY_PLT_ENTRY_SIZE): New.
+ (elf_x86_64_plt0_entry): Renamed to ...
+ (elf_x86_64_lazy_plt0_entry): This.
+ (elf_x86_64_plt_entry): Renamed to ...
+ (elf_x86_64_lazy_plt_entry): This.
+ (elf_x86_64_bnd_plt0_entry): Renamed to ...
+ (elf_x86_64_lazy_bnd_plt0_entry): This.
+ (elf_x86_64_legacy_plt_entry): Removed.
+ (elf_x86_64_bnd_plt_entry): Renamed to ...
+ (elf_x86_64_lazy_bnd_plt_entry): This.
+ (elf_x86_64_legacy_plt2_entry): Renamed to ...
+ (elf_x86_64_non_lazy_plt_entry): This.
+ (elf_x86_64_bnd_plt2_entry): Renamed to ...
+ (elf_x86_64_non_lazy_bnd_plt_entry): This.
+ (elf_x86_64_eh_frame_plt): Renamed to ...
+ (elf_x86_64_eh_frame_lazy_plt): This.
+ (elf_x86_64_eh_frame_bnd_plt): Renamed to ...
+ (elf_x86_64_eh_frame_lazy_bnd_plt): This.
+ (elf_x86_64_eh_frame_plt_got): Renamed to ...
+ (elf_x86_64_eh_frame_non_lazy_plt): This.
+ (elf_x86_64_lazy_plt_layout): New.
+ (elf_x86_64_non_lazy_plt_layout): Likewise.
+ (elf_x86_64_plt_layout): Likewise.
+ (elf_x86_64_backend_data): Remove PLT layout information. Add
+ os for target system.
+ (GET_PLT_ENTRY_SIZE): Removed.
+ (elf_x86_64_lazy_plt): New.
+ (elf_x86_64_non_lazy_plt): Likewise.
+ (elf_x86_64_lazy_bnd_plt): Likewise.
+ (elf_x86_64_non_lazy_bnd_plt): Likewise.
+ (elf_x86-64_arch_bed): Updated.
+ (elf_x86_64_link_hash_table): Add plt, lazy_plt and non_lazy_plt.
+ (elf_x86_64_create_dynamic_sections): Removed.
+ (elf_x86_64_check_relocs): Don't check elf.dynobj. Don't call
+ _bfd_elf_create_ifunc_sections nor _bfd_elf_create_got_section.
+ (elf_x86-64_adjust_dynamic_symbol): Updated.
+ (elf_x86_64_allocate_dynrelocs): Updated. Pass 0 as PLT header
+ size to _bfd_elf_allocate_ifunc_dyn_relocs and don't allocate
+ size for PLT0 if there is no PLT0. Get plt_entry_size from
+ non_lazy_plt for non-lazy PLT entries.
+ (elf_x86_64_size_dynamic_sections): Updated. Get plt_entry_size
+ from non_lazy_plt for non-lazy PLT entries.
+ (elf_x86-64_relocate_section): Updated. Properly get PLT index
+ if there is no PLT0.
+ (elf_x86_64_finish_dynamic_symbol): Updated. Fill the first slot
+ in the PLT entry with generic PLT layout. Fill the non-lazy PLT
+ entries with non-lazy PLT layout. Don't fill the second and third
+ slots in the PLT entry if there is no PLT0.
+ (elf_x86_64_finish_dynamic_sections): Updated. Don't fill PLT0
+ if there is no PLT0. Set sh_entsize on the .plt.got section.
+ (compare_relocs): New.
+ (elf_x86_64_plt_type): Likewise.
+ (elf_x86_64_plt): Likewise.
+ (elf_x86_64_nacl_plt): New. Forward declaration.
+ (elf_x86_64_get_plt_sym_val): Removed.
+ (elf_x86_64_get_synthetic_symtab): Rewrite to check PLT sections
+ against all dynamic relocations.
+ (elf_x86_64_link_setup_gnu_properties): New function.
+ (elf_backend_create_dynamic_sections): Updated.
+ (elf_backend_setup_gnu_properties): New.
+ (elf_x86_64_nacl_plt): New.
+ (elf_x86_64_nacl_arch_bed): Updated.
+
+2017-05-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf32-i386.c (PLT_ENTRY_SIZE): Renamed to ...
+ (LAZY_PLT_ENTRY_SIZE): This.
+ (NON_LAZY_PLT_ENTRY_SIZE): New.
+ (elf_i386_plt0_entry): Renamed to ...
+ (elf_i386_lazy_plt0_entry): This.
+ (elf_i386_plt_entry): Renamed to ...
+ (elf_i386_lazy_plt_entry): This.
+ (elf_i386_pic_plt0_entry): Renamed to ...
+ (elf_i386_pic_lazy_plt0_entry): This.
+ (elf_i386_pic_plt_entry): Renamed to ...
+ (elf_i386_pic_lazy_plt_entry): This.
+ (elf_i386_got_plt_entry): Renamed to ...
+ (elf_i386_non_lazy_plt_entry): This.
+ (elf_i386_pic_got_plt_entry): Renamed to ...
+ (elf_i386_pic_non_lazy_plt_entry): This.
+ (elf_i386_eh_frame_plt): Renamed to ...
+ (elf_i386_eh_frame_lazy_plt): This.
+ (elf_i386_eh_frame_plt_got): Renamed to ...
+ (elf_i386_eh_frame_non_lazy_plt): This.
+ (elf_i386_plt_layout): Renamed to ...
+ (elf_i386_lazy_plt_layout): This. Remove eh_frame_plt_got and
+ eh_frame_plt_got_size.
+ (elf_i386_non_lazy_plt_layout): New.
+ (elf_i386_plt_layout): Likewise.
+ (elf_i386_non_lazy_plt): Likewise.
+ (GET_PLT_ENTRY_SIZE): Removed.
+ (elf_i386_plt): Renamed to ...
+ (elf_i386_lazy_plt): This.
+ (elf_i386_backend_data): Remove plt. Rename is_vxworks to os.
+ (elf_i386_arch_bed): Updated.
+ (elf_i386_link_hash_table): Add plt, lazy_plt and non_lazy_plt.
+ (elf_i386_create_dynamic_sections): Removed.
+ (elf_i386_check_relocs): Don't check elf.dynobj. Don't call
+ _bfd_elf_create_ifunc_sections nor _bfd_elf_create_got_section.
+ (elf_i386_adjust_dynamic_symbol): Updated.
+ (elf_i386_allocate_dynrelocs): Updated. Pass 0 as PLT header
+ size to _bfd_elf_allocate_ifunc_dyn_relocs and don't allocate
+ size for PLT0 if there is no PLT0.
+ (elf_i386_size_dynamic_sections): Updated. Check whether GOT
+ output section is discarded only if GOT isn't empty.
+ (elf_i386_relocate_section): Updated. Properly get PLT index
+ if there is no PLT0.
+ (elf_i386_finish_dynamic_symbol): Updated. Don't fill the
+ second and third slots in the PLT entry if there is no PLT0.
+ (elf_i386_finish_dynamic_sections): Updated. Don't fill PLT0
+ if there is no PLT0. Set sh_entsize on the .plt.got section.
+ (elf_i386_nacl_plt): Forward declaration.
+ (elf_i386_get_plt_sym_val): Removed.
+ (elf_i386_get_synthetic_symtab): Rewrite to check PLT sections
+ against all dynamic relocations.
+ (elf_i386_link_setup_gnu_properties): New function.
+ (elf_backend_create_dynamic_sections): Updated.
+ (elf_backend_setup_gnu_properties): New.
+ (elf_i386_nacl_plt): Updated.
+ (elf_i386_nacl_arch_bed): Likewise.
+ (elf_i386_vxworks_arch_bed): Likewise.
+
+2017-05-08 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * elflink.c (elf_output_implib): Remove executable flag from import
+ library bfd.
+ * elf32-arm.c (elf32_arm_filter_implib_symbols): Assert that the import
+ library is a relocatable object file.
+
2017-05-01 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/21404
diff --git a/bfd/aout-adobe.c b/bfd/aout-adobe.c
index d47dd20..a2c927d 100644
--- a/bfd/aout-adobe.c
+++ b/bfd/aout-adobe.c
@@ -474,6 +474,7 @@ aout_adobe_sizeof_headers (bfd *ignore_abfd ATTRIBUTE_UNUSED,
#define aout_32_bfd_final_link _bfd_generic_final_link
#define aout_32_bfd_link_split_section _bfd_generic_link_split_section
#define aout_32_bfd_link_check_relocs _bfd_generic_link_check_relocs
+#define aout_32_set_reloc _bfd_generic_set_reloc
const bfd_target aout_adobe_vec =
{
diff --git a/bfd/aout-target.h b/bfd/aout-target.h
index 9f77c95..2e98c4d 100644
--- a/bfd/aout-target.h
+++ b/bfd/aout-target.h
@@ -450,6 +450,9 @@ MY_bfd_final_link (bfd *abfd, struct bfd_link_info *info)
#ifndef MY_canonicalize_reloc
#define MY_canonicalize_reloc NAME (aout, canonicalize_reloc)
#endif
+#ifndef MY_set_reloc
+#define MY_set_reloc _bfd_generic_set_reloc
+#endif
#ifndef MY_make_empty_symbol
#define MY_make_empty_symbol NAME (aout, make_empty_symbol)
#endif
diff --git a/bfd/aout-tic30.c b/bfd/aout-tic30.c
index 29dad9f..5db3da7 100644
--- a/bfd/aout-tic30.c
+++ b/bfd/aout-tic30.c
@@ -905,6 +905,9 @@ tic30_aout_set_arch_mach (bfd *abfd,
#ifndef MY_canonicalize_reloc
#define MY_canonicalize_reloc NAME (aout, canonicalize_reloc)
#endif
+#ifndef MY_set_reloc
+#define MY_set_reloc _bfd_generic_set_reloc
+#endif
#ifndef MY_make_empty_symbol
#define MY_make_empty_symbol NAME (aout, make_empty_symbol)
#endif
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 17a35c0..8617881 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -7075,6 +7075,8 @@ long bfd_canonicalize_reloc
void bfd_set_reloc
(bfd *abfd, asection *sec, arelent **rel, unsigned int count);
+#define bfd_set_reloc(abfd, asect, location, count) \
+ BFD_SEND (abfd, _bfd_set_reloc, (abfd, asect, location, count))
bfd_boolean bfd_set_file_flags (bfd *abfd, flagword flags);
int bfd_get_arch_size (bfd *abfd);
@@ -7542,12 +7544,15 @@ typedef struct bfd_target
#define BFD_JUMP_TABLE_RELOCS(NAME) \
NAME##_get_reloc_upper_bound, \
NAME##_canonicalize_reloc, \
+ NAME##_set_reloc, \
NAME##_bfd_reloc_type_lookup, \
NAME##_bfd_reloc_name_lookup
long (*_get_reloc_upper_bound) (bfd *, sec_ptr);
long (*_bfd_canonicalize_reloc)
(bfd *, sec_ptr, arelent **, struct bfd_symbol **);
+ void (*_bfd_set_reloc)
+ (bfd *, sec_ptr, arelent **, unsigned int);
/* See documentation on reloc types. */
reloc_howto_type *
(*reloc_type_lookup) (bfd *, bfd_reloc_code_real_type);
diff --git a/bfd/bfd.c b/bfd/bfd.c
index 23a4350..c6fce45 100644
--- a/bfd/bfd.c
+++ b/bfd/bfd.c
@@ -1064,18 +1064,10 @@ DESCRIPTION
section @var{sec} to the values @var{rel} and @var{count}.
The argument @var{abfd} is ignored.
+.#define bfd_set_reloc(abfd, asect, location, count) \
+. BFD_SEND (abfd, _bfd_set_reloc, (abfd, asect, location, count))
*/
-void
-bfd_set_reloc (bfd *ignore_abfd ATTRIBUTE_UNUSED,
- sec_ptr asect,
- arelent **location,
- unsigned int count)
-{
- asect->orelocation = location;
- asect->reloc_count = count;
-}
-
/*
FUNCTION
bfd_set_file_flags
diff --git a/bfd/bout.c b/bfd/bout.c
index 1d3bf66..0a6f8db 100644
--- a/bfd/bout.c
+++ b/bfd/bout.c
@@ -1392,6 +1392,7 @@ b_out_bfd_get_relocated_section_contents (bfd *output_bfd,
#define b_out_bfd_define_common_symbol bfd_generic_define_common_symbol
#define aout_32_get_section_contents_in_window _bfd_generic_get_section_contents_in_window
#define b_out_bfd_link_check_relocs _bfd_generic_link_check_relocs
+#define b_out_set_reloc _bfd_generic_set_reloc
extern const bfd_target bout_le_vec;
diff --git a/bfd/coff-alpha.c b/bfd/coff-alpha.c
index 9ce1975..8ecba2f 100644
--- a/bfd/coff-alpha.c
+++ b/bfd/coff-alpha.c
@@ -2342,6 +2342,9 @@ static const struct ecoff_backend_data alpha_ecoff_backend_data =
#define _bfd_ecoff_bfd_define_common_symbol bfd_generic_define_common_symbol
#define _bfd_ecoff_bfd_link_check_relocs _bfd_generic_link_check_relocs
+/* Installing internal relocations in a section is also generic. */
+#define _bfd_ecoff_set_reloc _bfd_generic_set_reloc
+
const bfd_target alpha_ecoff_le_vec =
{
"ecoff-littlealpha", /* name */
diff --git a/bfd/coff-mips.c b/bfd/coff-mips.c
index f872ebe..45c65f8 100644
--- a/bfd/coff-mips.c
+++ b/bfd/coff-mips.c
@@ -1356,6 +1356,7 @@ static const struct ecoff_backend_data mips_ecoff_backend_data =
#define _bfd_ecoff_section_already_linked \
_bfd_coff_section_already_linked
#define _bfd_ecoff_bfd_define_common_symbol bfd_generic_define_common_symbol
+#define _bfd_ecoff_set_reloc _bfd_generic_set_reloc
extern const bfd_target mips_ecoff_be_vec;
diff --git a/bfd/coff-rs6000.c b/bfd/coff-rs6000.c
index e2b149b..b49e393 100644
--- a/bfd/coff-rs6000.c
+++ b/bfd/coff-rs6000.c
@@ -3993,6 +3993,7 @@ const struct xcoff_dwsect_name xcoff_dwsect_names[] = {
/* For reloc entry points. */
#define _bfd_xcoff_get_reloc_upper_bound coff_get_reloc_upper_bound
#define _bfd_xcoff_canonicalize_reloc coff_canonicalize_reloc
+#define _bfd_xcoff_set_reloc _bfd_generic_set_reloc
#define _bfd_xcoff_bfd_reloc_type_lookup _bfd_xcoff_reloc_type_lookup
#define _bfd_xcoff_bfd_reloc_name_lookup _bfd_xcoff_reloc_name_lookup
diff --git a/bfd/coff64-rs6000.c b/bfd/coff64-rs6000.c
index e919dcb..56458e0 100644
--- a/bfd/coff64-rs6000.c
+++ b/bfd/coff64-rs6000.c
@@ -2720,6 +2720,7 @@ const bfd_target rs6000_xcoff64_vec =
/* Reloc */
coff_get_reloc_upper_bound,
coff_canonicalize_reloc,
+ _bfd_generic_set_reloc,
xcoff64_reloc_type_lookup,
xcoff64_reloc_name_lookup,
@@ -2979,6 +2980,7 @@ const bfd_target rs6000_xcoff64_aix_vec =
/* Reloc */
coff_get_reloc_upper_bound,
coff_canonicalize_reloc,
+ _bfd_generic_set_reloc,
xcoff64_reloc_type_lookup,
xcoff64_reloc_name_lookup,
diff --git a/bfd/coffcode.h b/bfd/coffcode.h
index 96a7886..f9d3978 100644
--- a/bfd/coffcode.h
+++ b/bfd/coffcode.h
@@ -5439,6 +5439,10 @@ coff_canonicalize_reloc (bfd * abfd,
return section->reloc_count;
}
+#ifndef coff_set_reloc
+#define coff_set_reloc _bfd_generic_set_reloc
+#endif
+
#ifndef coff_reloc16_estimate
#define coff_reloc16_estimate dummy_reloc16_estimate
diff --git a/bfd/elf-s390-common.c b/bfd/elf-s390-common.c
index 1570365..8795fb9 100644
--- a/bfd/elf-s390-common.c
+++ b/bfd/elf-s390-common.c
@@ -161,9 +161,7 @@ keep:
h->type = STT_FUNC;
}
- /* We need dynamic relocation for STT_GNU_IFUNC symbol only when
- there is a non-GOT reference in a shared object. */
- if (!bfd_link_pic (info) || !h->non_got_ref)
+ if (!bfd_link_pic (info))
*head = NULL;
/* Finally, allocate space. */
diff --git a/bfd/elf32-arc.c b/bfd/elf32-arc.c
index 5f1505e..b00207e 100644
--- a/bfd/elf32-arc.c
+++ b/bfd/elf32-arc.c
@@ -29,6 +29,10 @@
#include "opcode/arc.h"
#include "arc-plt.h"
+#define FEATURE_LIST_NAME bfd_feature_list
+#define CONFLICT_LIST bfd_conflict_list
+#include "opcode/arc-attrs.h"
+
/* #define ARC_ENABLE_DEBUG 1 */
#ifdef ARC_ENABLE_DEBUG
static const char *
@@ -442,8 +446,9 @@ arc_elf_print_private_bfd_data (bfd *abfd, void * ptr)
case E_ARC_OSABI_ORIG : fprintf (file, " (ABI:legacy)"); break;
case E_ARC_OSABI_V2 : fprintf (file, " (ABI:v2)"); break;
case E_ARC_OSABI_V3 : fprintf (file, " (ABI:v3)"); break;
+ case E_ARC_OSABI_V4 : fprintf (file, " (ABI:v4)"); break;
default:
- fprintf (file, "(ABI:unknown)");
+ fprintf (file, " (ABI:unknown)");
break;
}
@@ -500,6 +505,301 @@ arc_info_to_howto_rel (bfd * abfd ATTRIBUTE_UNUSED,
cache_ptr->howto = arc_elf_howto (r_type);
}
+/* Extract CPU features from an NTBS. */
+
+static unsigned
+arc_extract_features (const char *p)
+{
+ unsigned i, r = 0;
+
+ if (!p)
+ return 0;
+
+ for (i = 0; i < ARRAY_SIZE (bfd_feature_list); i++)
+ {
+ char *t = strstr (p, bfd_feature_list[i].attr);
+ unsigned l = strlen (bfd_feature_list[i].attr);
+ if ((t != NULL)
+ && (t[l] == ','
+ || t[l] == '\0'))
+ r |= bfd_feature_list[i].feature;
+ }
hooks/post-receive
--
Repository for Project Archer.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [SCM] users/jkratoch/indexcxx: .
@ 2017-04-02 11:01 jkratoch
0 siblings, 0 replies; 4+ messages in thread
From: jkratoch @ 2017-04-02 11:01 UTC (permalink / raw)
To: archer-commits
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 82448 bytes --]
The branch, users/jkratoch/indexcxx has been updated
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- Log -----------------------------------------------------------------
commit 590d37ae8d079e541cf184782899ef84b2b3f569
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Fri Mar 31 22:45:48 2017 +0200
.
commit e3dd10552e7c9e09bb49edc72f141aeefcf72bf3
Merge: 72626a1 fecb9c4
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Fri Mar 31 19:06:38 2017 +0200
Merge remote-tracking branch 'gdb/master' into indexcxx
commit fecb9c46659c576e9e2c790eff2a25df8203a97f
Author: Palmer Dabbelt <palmer@dabbelt.com>
Date: Wed Mar 29 16:05:40 2017 -0700
RISC-V: Allow ISA subsets to be disabled
Without this patch, passing "-march=rv64ic -march=rv64i" results in
you getting a "RV64IC" toolchain, which isn't expected.
gas/ChangeLog:
2017-03-30 Palmer Dabbelt <palmer@dabbelt.com>
* config/tc-riscv.c (riscv_clear_subsets): New function.
(riscv_add_subset): Call riscv_clear_subsets and riscv_set_rvc to
clear RVC when it's been previously set.
commit 858f82bf7e6531f4ad821285359c759c835f9dce
Author: Andrew Waterman <andrew@sifive.com>
Date: Wed Mar 22 02:09:56 2017 -0700
RISC-V: Add physical memory protection CSRs
2017-03-27 Andrew Waterman <andrew@sifive.com>
* opcode/riscv-opc.h (CSR_PMPCFG0): New define.
(CSR_PMPCFG1): Likewise.
(CSR_PMPCFG2): Likewise.
(CSR_PMPCFG3): Likewise.
(CSR_PMPADDR0): Likewise.
(CSR_PMPADDR1): Likewise.
(CSR_PMPADDR2): Likewise.
(CSR_PMPADDR3): Likewise.
(CSR_PMPADDR4): Likewise.
(CSR_PMPADDR5): Likewise.
(CSR_PMPADDR6): Likewise.
(CSR_PMPADDR7): Likewise.
(CSR_PMPADDR8): Likewise.
(CSR_PMPADDR9): Likewise.
(CSR_PMPADDR10): Likewise.
(CSR_PMPADDR11): Likewise.
(CSR_PMPADDR12): Likewise.
(CSR_PMPADDR13): Likewise.
(CSR_PMPADDR14): Likewise.
(CSR_PMPADDR15): Likewise.
(pmpcfg0): Declare register.
(pmpcfg1): Likewise.
(pmpcfg2): Likewise.
(pmpcfg3): Likewise.
(pmpaddr0): Likewise.
(pmpaddr1): Likewise.
(pmpaddr2): Likewise.
(pmpaddr3): Likewise.
(pmpaddr4): Likewise.
(pmpaddr5): Likewise.
(pmpaddr6): Likewise.
(pmpaddr7): Likewise.
(pmpaddr8): Likewise.
(pmpaddr9): Likewise.
(pmpaddr10): Likewise.
(pmpaddr11): Likewise.
(pmpaddr12): Likewise.
(pmpaddr13): Likewise.
(pmpaddr14): Likewise.
(pmpaddr15): Likewise.
commit 8fa5b777488105287e56937365523d01e51c2eb3
Author: Simon Marchi <simon.marchi@polymtl.ca>
Date: Fri Mar 31 11:19:44 2017 -0400
gdbserver: Suffix generated C files with -generated
I noticed that there were some missing files in gdbserver's gitignore
(some generated register format .c files). Of course the easy fix would
be to add those files to .gitignore, but I think we can do a better job,
so that we don't have to worry about adding generated files to
.gitignore or the clean Makefile target.
I suggest naming all generated source files -generated.c. This way, we
can use a single rule in .gitignore and do a "rm -f *-generated.c" to
clean them up.
New in v2:
- Don't rename version.o and xml-builtin.o
gdb/gdbserver/ChangeLog:
* .gitignore: Remove generated files, replace with wildcard.
* (clean): Replace removal of generated files with wildcard.
(version.c): Replace with...
(version-generated.c): ...this.
(xml-builtin.c): Replace with...
(xml-builtin-generated.c): ...this.
(%-ipa.o: %-generated.c, %.o: %-generated.c): New rules.
(%.c: *regformats*): Replace with...
(%-generated.c: *regformats*): ...this.
commit efdf7a02db60e7371ba6372e47b510aadecbae28
Author: Pip Cet <pipcet@gmail.com>
Date: Fri Mar 31 13:07:01 2017 +0100
Fix minor problems with previous wasm32 binutils commit.
binutils * NEWS: Use "WebAssembly" consistently.
* testsuite/binutils-all/wasm32/wasm32.exp: Fix copyright notice.
commit dc1e4d6dedcb8ee3bb195f0db711f6aa164b8ab4
Author: Nick Clifton <nickc@redhat.com>
Date: Fri Mar 31 12:54:38 2017 +0100
Reduce the size of s390 symbol tables by allowing relocations in mergeable string sections (eg .debug_str) to be made section relative rather than symbol relative.
PR gas/21333
* config/tc-s390.c (tc_s390_fix_adjustable): Allow non pc-relative
fixups in mergeable sections to be adjusted.
commit 938ec663b8ec03336bd0387ee8f8d6f18f199025
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Fri Mar 31 00:00:31 2017 +0000
Automatic date update in version.in
commit f96bd6c2d7a3801fabbf9d834f7a29b752aa7532
Author: Pip Cet <pipcet@gmail.com>
Date: Thu Mar 30 10:57:21 2017 +0100
Add support for the WebAssembly file format and the wasm32 ELF conversion to gas and the binutils.
binutils * readelf.c: Add support for wasm32 ELF format WebAssembly files.
(guess_is_rela): Likewise.
(dump_relocations): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_none_reloc_): Likewise.
* NEWS: Mention the new support.
* testsuite/lib/binutils-common.exp (is_elf_format): Mark wasm32
as ELF target.
(supports_gnu_unique): Mark wasm32 as supporting STB_GNU_UNIQUE.
* testsuite/binutils-all/nm.exp: Mark wasm32 as requiring .size annotations.
* testsuite/binutils-all/wasm32: New directory.
* testsuite/binutils-all/wasm32/create-wasm.d: New file.
* testsuite/binutils-all/wasm32/create-wasm.s: Likewise.
* testsuite/binutils-all/wasm32/custom-section.d: Likewise.
* testsuite/binutils-all/wasm32/custom-section.s: Likewise.
* testsuite/binutils-all/wasm32/invalid-wasm-1.d: Likewise.
* testsuite/binutils-all/wasm32/invalid-wasm-1.s: Likewise.
* testsuite/binutils-all/wasm32/long-sections.d: Likewise.
* testsuite/binutils-all/wasm32/long-sections.s: Likewise.
* testsuite/binutils-all/wasm32/parse-wasm.d: Likewise.
* testsuite/binutils-all/wasm32/parse-wasm.s: Likewise.
* testsuite/binutils-all/wasm32/parse-wasm-2.d: Likewise.
* testsuite/binutils-all/wasm32/parse-wasm-2.s: Likewise.
* testsuite/binutils-all/wasm32/prepared-section.d: Likewise.
* testsuite/binutils-all/wasm32/prepared-section.s: Likewise.
* testsuite/binutils-all/wasm32/wasm32.exp: New file, run tests.
gas * config/tc-wasm32.h: New file: Add WebAssembly assembler target.
* config/tc-wasm32.c: New file: Add WebAssembly assembler target.
* Makefile.am: Add WebAssembly assembler target.
* configure.tgt: Add WebAssembly assembler target.
* doc/c-wasm32.texi: New file: Start documenting WebAssembly
assembler.
* doc/all.texi: Define WASM32.
* doc/as.texinfo: Add WebAssembly entries.
* NEWS: Mention the new support.
* Makefile.in: Regenerate.
* po/gas.pot: Regenerate.
* po/POTFILES.in: Regenerate.
* testsuite/gas/wasm32: New directory.
* testsuite/gas/wasm32/allinsn.d: New file.
* testsuite/gas/wasm32/allinsn.s: New file.
* testsuite/gas/wasm32/illegal.l: New file.
* testsuite/gas/wasm32/illegal.s: New file.
* testsuite/gas/wasm32/illegal-2.l: New file.
* testsuite/gas/wasm32/illegal-2.s: New file.
* testsuite/gas/wasm32/illegal-3.l: New file.
* testsuite/gas/wasm32/illegal-3.s: New file.
* testsuite/gas/wasm32/illegal-4.l: New file.
* testsuite/gas/wasm32/illegal-4.s: New file.
* testsuite/gas/wasm32/illegal-5.l: New file.
* testsuite/gas/wasm32/illegal-5.s: New file.
* testsuite/gas/wasm32/illegal-6.l: New file.
* testsuite/gas/wasm32/illegal-6.s: New file.
* testsuite/gas/wasm32/illegal-7.l: New file.
* testsuite/gas/wasm32/illegal-7.s: New file.
* testsuite/gas/wasm32/illegal-8.l: New file.
* testsuite/gas/wasm32/illegal-8.s: New file.
* testsuite/gas/wasm32/illegal-9.l: New file.
* testsuite/gas/wasm32/illegal-9.s: New file.
* testsuite/gas/wasm32/illegal-10.l: New file.
* testsuite/gas/wasm32/illegal-10.s: New file.
* testsuite/gas/wasm32/illegal-11.l: New file.
* testsuite/gas/wasm32/illegal-11.s: New file.
* testsuite/gas/wasm32/illegal-12.l: New file.
* testsuite/gas/wasm32/illegal-12.s: New file.
* testsuite/gas/wasm32/illegal-13.l: New file.
* testsuite/gas/wasm32/illegal-13.s: New file.
* testsuite/gas/wasm32/illegal-14.l: New file.
* testsuite/gas/wasm32/illegal-14.s: New file.
* testsuite/gas/wasm32/illegal-15.l: New file.
* testsuite/gas/wasm32/illegal-15.s: New file.
* testsuite/gas/wasm32/illegal-16.l: New file.
* testsuite/gas/wasm32/illegal-16.s: New file.
* testsuite/gas/wasm32/illegal-17.l: New file.
* testsuite/gas/wasm32/illegal-17.s: New file.
* testsuite/gas/wasm32/illegal-18.l: New file.
* testsuite/gas/wasm32/illegal-18.s: New file.
* testsuite/gas/wasm32/illegal-19.l: New file.
* testsuite/gas/wasm32/illegal-19.s: New file.
* testsuite/gas/wasm32/illegal-20.l: New file.
* testsuite/gas/wasm32/illegal-20.s: New file.
* testsuite/gas/wasm32/illegal-21.l: New file.
* testsuite/gas/wasm32/illegal-21.s: New file.
* testsuite/gas/wasm32/illegal-22.l: New file.
* testsuite/gas/wasm32/illegal-22.s: New file.
* testsuite/gas/wasm32/illegal-24.l: New file.
* testsuite/gas/wasm32/illegal-24.s: New file.
* testsuite/gas/wasm32/illegal-25.l: New file.
* testsuite/gas/wasm32/illegal-25.s: New file.
* testsuite/gas/wasm32/reloc.d: New file.
* testsuite/gas/wasm32/reloc.s: New file.
* testsuite/gas/wasm32/wasm32.exp: New tests for WebAssembly
architecture.
opcodes * configure.ac: Add (empty) bfd_wasm32_arch target.
* configure: Regenerate
* po/opcodes.pot: Regenerate.
include * opcode/wasm.h: New file to support wasm32 architecture.
* elf/wasm32.h: Add R_WASM32_32 relocation.
bfd * elf32-wasm32.c: Add relocation code, two relocs.
* reloc.c: Add wasm32 relocations.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
* bfd/po/bfd.pot: Regenerate.
commit 662659a1a582af14aa45a458005e2a4df514b6d7
Author: Iain Buclaw <ibuclaw@gdcproject.org>
Date: Thu Mar 30 10:43:03 2017 +0200
Fix classification of `module.type' in D lexer.
The two-tier lexer in gdb/d-exp.y, which resolves fully qualified names
missed a case where `module.type' was not being classified as one token.
And so when the grammar takes over, it matched the remaining tokens
against the rule `TypeExp . IdentifierExp', where we were expecting to
instead match cast expression `( TypeExp ) UnaryExpression'.
Adding a case for TYPE_CODE_MODULE in type_aggregate_p means that
classify_inner_name will get a chance to lookup the symbol.
This was noticed when using `watch -l', and got the rather confusing
response:
A syntax error in expression, near `) 0x0add4e55'.
So it's been included in the testsuite, along with another test that
does effectively the same expression, but explicitly.
gdb/ChangeLog:
* d-exp.y (type_aggregate_p): Treat TYPE_CODE_MODULE as being
aggregate-like.
gdb/testsuite/ChangeLog:
* gdb.dlang/watch-loc.c: New file.
* gdb.dlang/watch-loc.exp: New file.
commit a62b75569b0e8038cf7c61350bf6fd5d0d6b64f8
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Thu Mar 30 00:00:41 2017 +0000
Automatic date update in version.in
commit 72626a106545009c1054d6fdf7625fcc3e9b3dff
Merge: 025edc4 ec13808
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 29 22:51:59 2017 +0200
Merge remote-tracking branch 'gdb/master' into indexcxx
commit ec13808ef07550f8a5f87fad1945739da1f10c81
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Wed Mar 29 21:53:43 2017 +0200
Fix warning: Invalid entry in .debug_gdb_scripts section
$ gdb rustc
Reading symbols from rustc...Reading symbols from /usr/lib/debug/usr/bin/rustc.debug...done.
done.
warning: Invalid entry in .debug_gdb_scripts section
/usr/bin/rustc
Section Headers:
[Nr] Name Type Address Off Size ES Flg Lk Inf Al
[15] .debug_gdb_scripts PROGBITS 00000000000008ed 0008ed 000022 00 AMS 0 0 1
/usr/lib/debug/usr/bin/rustc.debug
Section Headers:
[Nr] Name Type Address Off Size ES Flg Lk Inf Al
[15] .debug_gdb_scripts NOBITS 00000000000008ed 000280 000022 00 AMS 0 0 1
There remains questionable whether bfd_get_section_by_name() should not return
an error for !SEC_LOAD but I haven't investigated that.
gdb/ChangeLog
2017-03-29 Jan Kratochvil <jan.kratochvil@redhat.com>
* auto-load.c (auto_load_section_scripts): Check SEC_HAS_CONTENTS.
gdb/testsuite/ChangeLog
2017-03-29 Jan Kratochvil <jan.kratochvil@redhat.com>
* gdb.python/py-section-script.exp (sepdebug): New testcases.
commit f7c514a3784384215692c43d66f013d7640db277
Author: Jose E. Marchesi <jose.marchesi@oracle.com>
Date: Wed Mar 29 21:20:23 2017 +0200
opcodes: sparc: support missing SPARC ASIs from UA2005, UA2007, OSA2011, & OSA2015
commit 1231656410996d2cc271486adc743a0fafe2ab4d
Author: Yao Qi <yao.qi@linaro.org>
Date: Wed Mar 29 16:56:31 2017 +0100
Add constructor and destructor to thread_info
This patch adds constructor and destructor to thread_info.
gdb:
2017-03-29 Yao Qi <yao.qi@linaro.org>
* gdbthread.h (struct thread_info): Declare constructor and
destructor. Add some in-class member initializers.
* thread.c (free_thread): Remove.
(init_thread_list): Call delete instead of free_thread.
(new_thread): Call thread_info constructor.
(thread_info::thread_info): New function.
(thread_info::~thread_info): New function.
(delete_thread_1): Call delete instead of free_thread.
(make_cleanup_restore_current_thread): Move tp and frame to
inner block.
commit 52be03fd13a26ecda4f27c451a434f19eded0ca6
Author: Alan Modra <amodra@gmail.com>
Date: Wed Mar 29 13:43:06 2017 +1030
PowerPC -Mraw disassembly
This adds -Mraw for PowerPC objdump, a disassembler option to display
the underlying machine instruction rather than aliases. For example,
"rlwinm" always rather than "rotlwi" when the instruction is
performing a simple rotate.
binutils/
* doc/binutils.texi (objdump): Document PowerPC -M options.
gas/
* config/tc-ppc.c (md_parse_option): Reject -mraw.
include/
* opcode/ppc.h (PPC_OPCODE_RAW): Define.
(PPC_OPCODE_*): Make them all unsigned long long constants.
opcodes/
* ppc-dis.c (ppc_opts): Set PPC_OPCODE_PPC for "any" flags. Add
"raw" option.
(lookup_powerpc): Don't special case -1 dialect. Handle
PPC_OPCODE_RAW.
(print_insn_powerpc): Mask out PPC_OPCODE_ANY on first
lookup_powerpc call, pass it on second.
commit e643cb45bf85fa5c8c49a89ff177de246af4212e
Author: Nick Clifton <nickc@redhat.com>
Date: Wed Mar 29 12:27:44 2017 +0100
Improve the speed of scanning PE binaries for line number information.
PR binutils/18025
* coff-bfd.h (struct coff_section_data): Add new fields:
saved_bias and bias.
* coffgen.c (coff_find_nearest_line_with_names): Cache the bias
computed for PE binaries.
* dwarf2.c (scan_unit_for_symbols): Only warn once about each
missing abbrev.
commit 7cc0cd2903612a0730de6ba00181b9016e77ea3d
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Wed Mar 29 00:00:28 2017 +0000
Automatic date update in version.in
commit 086554e8e6b222518f12acab34e6cc7b5af7fde7
Author: Hans-Peter Nilsson <hp@bitrange.com>
Date: Tue Mar 28 23:43:09 2017 +0200
Fix for PR ld/16044: elf32-cris.c h->plt.refcount inconsistency
commit fe5f7374bef8f23ffa0fe0dee0f9b05e0a218a29
Author: Anton Kolesov <Anton.Kolesov@synopsys.com>
Date: Fri Feb 10 14:12:09 2017 +0300
arc: Add prologue analysis
Add a prologue analysis that recognizes all instructions that may happen in
compiler-generated prologue, including various stores, core register moves,
subtraction and ENTER_S instruction that does a lot of prologue actions through
microcode.
Testcases cover various prologue scenarios, including instructions that are
spread across multiple 16-bit encodings (for example there are 7 encodings of
store instruction).
gdb/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* arc-tdep.c (arc_frame_cache): Add support for prologue analysis.
(arc_skip_prologue): Likewise.
(arc_make_frame_cache): Likewise.
(arc_pv_get_operand): New function.
(arc_is_in_prologue): Likewise.
(arc_analyze_prologue): Likewise.
(arc_print_frame_cache): Likewise.
(MAX_PROLOGUE_LENGTH): New constant.
gdb/doc/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* gdb.texinfo (Synopsys ARC): Document "set debug arc 2".
gdb/testsuite/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* gdb.arch/arc-analyze-prologue.S: New file.
* gdb.arch/arc-analyze-prologue.exp: Likewise.
commit eea787570f708e51048f812808e6cbd76fde6919
Author: Anton Kolesov <Anton.Kolesov@synopsys.com>
Date: Fri Feb 10 14:12:06 2017 +0300
arc: Add disassembler helper
Add disassembler helper for GDB, that uses opcodes structure arc_instruction
and adds convenience functions to handle instruction operands. This interface
solves at least those problems with arc_instruction:
* Some instructions, like "push_s", have implicit operands which are not
directly present in arc_instruction.
* Operands of particular meaning, like branch/jump targets, have various
locations and meaning depending on type of branch/target.
* Access to operand value is abstracted into a separate function, so callee
code shouldn't bother if operand value is an immediate value or in a
register.
Testcases included in this commit are fairly limited - they test exclusively
branch instructions, something that will be used in software single stepping.
Most of the other parts of this disassembler helper are tested during prologue
analysis testing.
gdb/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* configure.tgt: Add arc-insn.o.
* arc-tdep.c (arc_delayed_print_insn): Make non-static.
(dump_arc_instruction_command): New function.
(arc_fprintf_disasm): Likewise.
(arc_disassemble_info): Likewise.
(arc_insn_get_operand_value): Likewise.
(arc_insn_get_operand_value_signed): Likewise.
(arc_insn_get_memory_base_reg): Likewise.
(arc_insn_get_memory_offset): Likewise.
(arc_insn_get_branch_target): Likewise.
(arc_insn_dump): Likewise.
(arc_insn_get_linear_next_pc): Likewise.
* arc-tdep.h (arc_delayed_print_insn): Add function declaration.
(arc_disassemble_info): Likewise.
(arc_insn_get_branch_target): Likewise.
(arc_insn_get_linear_next_pc): Likewise.
* NEWS: Mention new "maint print arc arc-instruction".
gdb/doc/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* gdb.texinfo (Synopsys ARC): Add "maint print arc arc-instruction".
gdb/testsuite/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* gdb.arch/arc-decode-insn.S: New file.
* gdb.arch/arc-decode-insn.exp: Likewise.
commit 3be78afdeddd3ebf57eb0df8b029cf596f468c7a
Author: Anton Kolesov <Anton.Kolesov@synopsys.com>
Date: Fri Feb 10 14:12:01 2017 +0300
arc: Add "maintenance print arc" command prefix
Add an "arc" sublist to "maintenance print" command list. The list is empty
for now, its purpose is to contain commands that print internal state of some
ARC-specific structures.
gdb/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* arc-tdep (maintenance_print_arc_list): New variable.
(maintenance_print_arc_command): New function.
commit 296ec4fa2afb14abc400fa0109d7288eb958c544
Author: Anton Kolesov <Anton.Kolesov@synopsys.com>
Date: Fri Feb 10 14:11:46 2017 +0300
arc: Align internal regnums with architectural regnums
Add ARC_LIMM_REGNUM to arc_regnum enumeration and assign a number 62 to it.
This ensures that for core registers internal register numbers in this enum are
the same as architectural numbers. This allows to use internal register
numbers in the contexts where architectural number is implied, for example when
disassembling instruction during prologue analysis.
gdb/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* arc-tdep.c (core_v2_register_names, core_arcompact_register_names)
Add "limm" and "reserved".
(arc_cannot_fetch_register, arc_cannot_store_register): Add
ARC_RESERVED_REGNUM and ARC_LIMM_REGNUM.
* arc-tdep.h (arc_regnum): Likewise.
commit 081c108e3688d67f257d4b98c9012ef2677b3b18
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Tue Mar 28 00:00:37 2017 +0000
Automatic date update in version.in
commit a12e714b775ce025444af15dcfbd5a420363ad53
Author: Max Filippov <jcmvbkbc@gmail.com>
Date: Fri Nov 18 16:08:48 2016 -0800
gdbserver: xtensa: support THREADPTR register
Provide aceess to the THREADPTR register to remote gdb.
gdb/gdbserver/
2017-03-27 Max Filippov <jcmvbkbc@gmail.com>
* linux-xtensa-low.c (regnum::R_THREADPTR): New enum member.
(xtensa_fill_gregset): Call collect_register_by_name for
threadptr register.
(xtensa_store_gregset): Call supply_register_by_name for
threadptr register.
commit f74f865e5030057deb8a6a56af4a9e003d82cdcd
Author: Max Filippov <jcmvbkbc@gmail.com>
Date: Fri Nov 18 11:39:47 2016 -0800
gdb: xtensa-linux: support THREADPTR register
Make THREADPTR user register accessible.
gdb/
2017-03-27 Max Filippov <jcmvbkbc@gmail.com>
* xtensa-linux-nat.c (fill_gregset): Call regcache_raw_collect
for THREADPTR register.
(supply_gregset_reg): Call regcache_raw_supply for THREADPTR
register.
* xtensa-tdep.c (XTENSA_DBREGN_UREG): New definition.
(xtensa_derive_tdep): Initialize tdep->threadptr_regnum.
* xtensa-tdep.h (gdbarch_tdep::threadptr_regnum): New field.
commit 0d0bf81a6729478563c3851ccfca435222ddfa25
Author: Max Filippov <jcmvbkbc@gmail.com>
Date: Tue Feb 21 15:41:31 2017 -0800
gdb: xtensa: fix test for privileged register number
There are no a0-a15 pseudoregisters at the top of the register set in
call0 registers layout. All registers above gdbarch_num_regs (gdbarch)
are privileged. Treat them as such. This fixes the following gdb
assertion seen when 'finish' command is invoked:
regcache.c:649: internal-error: register_status
regcache_raw_read(regcache*, int, gdb_byte*):
Assertion `regnum >= 0 && regnum < regcache->descr->nr_raw_registers'
failed.
gdb/
2017-03-27 Max Filippov <jcmvbkbc@gmail.com>
* xtensa-tdep.c (xtensa_pseudo_register_read): Treat all
registers above gdbarch_num_regs (gdbarch) as privileged in
call0 ABI.
commit 1a09b50a463ad005946849540da136b5cbe6237b
Author: Max Filippov <jcmvbkbc@gmail.com>
Date: Fri Nov 18 08:58:21 2016 -0800
gdbserver: xtensa: add call0 support
Correctly handle a0- registers on requests from remote gdb. This fixes
'Register 1 is not available'
and subsequent assertion in the remote gdb connecting to the gdbserver:
'findvar.c:291: internal-error: value_of_register_lazy:
Assertion `frame_id_p(get_frame_id (frame))' failed.'
The register structure is the same for windowed and call0 ABIs because
currently linux kernel internally requires windowed registers, so they
are always present.
gdb/gdbserver/
2017-03-27 Max Filippov <jcmvbkbc@gmail.com>
* linux-xtensa-low.c (xtensa_fill_gregset): Call collect_register
for all registers in a0_regnum..a0_regnum + C0_NREGS range.
(xtensa_store_gregset): Call supply_register for all registers in
a0_regnum..a0_regnum + C0_NREGS range.
commit 0ce4291e3ffd90d2b94e02b4557d716c043bf02e
Author: Max Filippov <jcmvbkbc@gmail.com>
Date: Fri Nov 18 09:48:01 2016 -0800
gdb: xtensa-linux: add call0 support
Correctly handle a0- registers. This allows debugging call0 code in
linux natively.
The register structure is the same for windowed and call0 ABIs because
currently linux kernel internally requires windowed registers, so they are
always present.
gdb/
2017-03-27 Max Filippov <jcmvbkbc@gmail.com>
* xtensa-linux-nat.c (fill_gregset): Call regcache_raw_collect
for a single specified register or for all registers in
a0_base..a0_base + C0_NREGS range.
(supply_gregset_reg): Call regcache_raw_supply for a single
specified register or for all registers in a0_base..a0_base +
C0_NREGS range.
commit c56054f9a80e157e3d2d5109821abd191b68f0ea
Author: Max Filippov <jcmvbkbc@gmail.com>
Date: Tue Feb 21 17:14:37 2017 -0800
gdb: gdbserver: xtensa: make C0_NREGS available
Both gdb and gdbserver need this definition to properly work with call0
ABI. Make it available to both.
gdb/
2017-03-27 Max Filippov <jcmvbkbc@gmail.com>
* arch/xtensa.h (C0_NREGS): Add definition.
* xtensa-tdep.c (C0_NREGS): Remove definition.
commit a43986283d61ffd4d7dc9b20c0ecb73cd345206c
Author: Max Filippov <jcmvbkbc@gmail.com>
Date: Fri Nov 18 09:39:41 2016 -0800
gdb: xtensa: clean up xtensa_default_isa initialization
This fixes segfault in native gdb because isa is not initialized at the
point of call to xtensa_isa_maxlength.
gdb/
2017-03-27 Max Filippov <jcmvbkbc@gmail.com>
* xtensa-tdep.c (xtensa_scan_prologue, call0_analyze_prologue):
Drop xtensa_default_isa initialization.
(xtensa_gdbarch_init): Initialize xtensa_default_isa.
commit 8c43009f48a0d4be497cf7c1285784aa70fc5abd
Author: Pedro Alves <palves@redhat.com>
Date: Mon Mar 27 15:57:19 2017 +0100
dwarf2read.c: Clean up out of bounds handling
Multiple places in dwarf2read.c open code 1-based to 0-based index
conversion and check for out of bounds accesses to lh->include_dirs
and lh->file_names. This commit factors those out to a couple methods
and uses them throughout.
gdb/ChangeLog:
2017-03-27 Pedro Alves <palves@redhat.com>
* dwarf2read.c (file_entry) <dir_index>: Add comment.
(file_entry::include_dir): New method.
(line_header::include_dir_at, line_header::file_name_at): New
methods.
(setup_type_unit_groups, setup_type_unit_groups)
(psymtab_include_file_name): Simplify using the new methods.
(lnp_state_machine) <the_line_header>: New field.
<file>: Add comment.
(lnp_state_machine::current_file): New method.
(dwarf_record_line): Simplify using the new methods.
(init_lnp_state_machine): Initialize the "the_line_header" field.
(dwarf_decode_lines_1, dwarf_decode_lines, file_file_name):
Simplify using the new methods.
commit a7e80b9e21eb907ac5c90de7452588c059db0cec
Author: Pedro Alves <palves@redhat.com>
Date: Mon Mar 27 13:56:49 2017 +0100
gdb/cp-name-parser.y: Eliminate make_empty, use cplus_demangle_fill_component
The demangler exports the cplus_demangle_fill_component function that
clients should use to initialize demangle_component components that
use the "s_binary" union member. cp-name-parser.y uses it in some
places, via the fill_comp wrapper, but not all. Several places
instead use a GDB-specific "make_empty" function. Because this
function does not call any of the demangler "fill" functions, we had
to patch it recently to clear the allocated demangle_component's
"d_printing" field, which is supposedly a "private" demangler field.
To avoid such problems in the future, this commit switches those
places to use "fill_comp" instead, and eliminates the "make_empty"
function.
gdb/ChangeLog:
2017-03-27 Pedro Alves <palves@redhat.com>
* cp-name-parser.y (make_empty): Delete.
(demangler_special, nested_name, ptr_operator, array_indicator)
(direct_declarator, declarator_1): Use fill_comp instead of
make_empty.
commit b1a42fdfa31937d7e05df34afee970ac0ad239e1
Author: Pedro Alves <palves@redhat.com>
Date: Mon Mar 27 13:56:49 2017 +0100
cplus_demangle_fill_component: Handle DEMANGLE_COMPONENT_RVALUE_REFERENCE
This patch almost a decade ago:
...
2007-08-31 Douglas Gregor <doug.gregor@gmail.com>
* cp-demangle.c (d_dump): Handle
DEMANGLE_COMPONENT_RVALUE_REFERENCE.
(d_make_comp): Ditto.
...
... missed doing the same change to cplus_demangle_fill_component that
was done to d_make_comp. I.e., teach it to only validate that we're
not passing in a "right" subtree. GDB has recently (finally) learned
about rvalue references, and a change to make it use
cplus_demangle_fill_component more ran into an assertion because of
this.
(GDB is the only user of cplus_demangle_fill_component in both the gcc
and binutils-gdb trees.)
libiberty/ChangeLog:
2017-03-27 Pedro Alves <palves@redhat.com>
* cp-demint.c (cplus_demangle_fill_component): Handle
DEMANGLE_COMPONENT_RVALUE_REFERENCE.
commit a6be053897be3786ceda9a59d17befe11454f6d2
Author: Pip Cet <pipcet@gmail.com>
Date: Mon Mar 27 13:41:39 2017 +0100
Add support for the WebAssembly backend to the BFD library.
* wasm-module.c: New file to support WebAssembly modules.
* wasm-module.h: New file to support WebAssembly modules.
* doc/webassembly.texi: Start documenting wasm-module.c.
* config.bfd: Add wasm_vec.
* targets.c: Likewise.
* configure.ac: Likewise.
* Makefile.am: Add entries for wasm-module.c.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
commit 210477268d4ac5cad937e811888a5c932206794c
Author: Pedro Alves <palves@redhat.com>
Date: Mon Mar 27 12:28:03 2017 +0100
Fix gdb_xml_debug/gdb_xml_error ATTRIBUTE_PRINTF use
The declarations of gdb_xml_debug and gdb_xml_error are passing "0" as
"first-to-check" argument to ATTRIBUTE_PRINTF, as if they were va_args
functions. Consequently, the arguments to gdb_xml_debug /
gdb_xml_error aren't being checked against the format strings.
With that fixed, a couple obvious bugs are exposed, both fixed by this
commit.
gdb/ChangeLog:
2017-03-27 Pedro Alves <palves@redhat.com>
* xml-support.h (gdb_xml_debug): Pass a "first-to-check" argument
to ATTRIBUTE_PRINTF.
* solib-target.c (library_list_start_list): Print "string" not
"version".
* xml-tdesc.c (tdesc_start_field): Pass "field_name" to
gdb_xml_error call.
commit 9b7539374617a94c2d646f49e1bbfc954b11891d
Author: Alan Modra <amodra@gmail.com>
Date: Mon Mar 27 08:19:48 2017 +1030
PR21303, objdump doesn't show e200z4 insns
PR 21303
opcodes/
* ppc-dis.c (struct ppc_mopt): Comment.
(ppc_opts <e200z4>): Move PPC_OPCODE_VLE from .sticky to .cpu.
gas/
* testsuite/gas/ppc/pr21303.d,
* testsuite/gas/ppc/pr21303.s: New test
* testsuite/gas/ppc/ppc.exp: Run it.
commit d721ba37d8995b9c11a0b8eef0f4d2dc022f85aa
Author: Pedro Alves <palves@redhat.com>
Date: Mon Mar 27 11:56:28 2017 +0100
gdb: Make ldirname return a std::string
Eliminates several uses of cleanups.
Tested on x86_64 Fedora 23 with Python 2 and 3.
gdb/ChangeLog
2017-03-27 Pedro Alves <palves@redhat.com>
* dwarf2read.c (struct file_and_directory): New.
(dwarf2_get_dwz_file): Adjust to use std::string.
(dw2_get_file_names_reader): Adjust to use file_and_directory.
(find_file_and_directory): Adjust to return a file_and_directory
object.
(read_file_scope): Adjust to use file_and_directory. Remove
make_cleanup/do_cleanups calls.
(open_and_init_dwp_file): Adjust to use std::string. Remove
make_cleanup/do_cleanups calls.
* python/python.c (do_start_initialization): Adjust to ldirname
returning a std::string.
* utils.c (ldirname): Now returns a std::string.
* utils.h (ldirname): Change return type to std::string.
* xml-syscall.c (xml_init_syscalls_info): Adjust to ldirname
returning a std::string.
* xml-tdesc.c (file_read_description_xml): Likewise.
commit 79b1d3cb362385c38af9cfb44c0c87b939711fbc
Author: Pip Cet <pipcet@gmail.com>
Date: Mon Mar 27 11:45:24 2017 +0100
oops - forgot to add the bfd/ChangeLog entry...
commit 8fb740dd3032543b833b141011aa2005c035d024
Author: Pip Cet <pipcet@gmail.com>
Date: Mon Mar 27 11:39:50 2017 +0100
Add minimal support for WebAssembly backend to the BFD library.
include * elf/wasm32.h: New file to support wasm32 architecture.
bfd * cpu-wasm32.c: New file to support wasm32 architecture.
* elf32-wasm32.c: New file to support wasm32 architecture.
* Makefile.am: Add wasm32 architecture.
* archures.c: Likewise.
* config.bfd: Likewise.
* configure.ac: Likewise.
* targets.c: Likewise.
commit c0c31e91adc6aabe7c96f02dd51a0f6200a982da
Author: Rinat Zelig <rinat@mellanox.com>
Date: Mon Mar 27 11:14:30 2017 +0100
Implement ARC NPS-400 Ultra Ip and Miscellaneous instructions.
opcodes * arc-nps400-tbl.h: Add Ultra Ip and Miscellaneous instructions format.
* arc-opc.c: Add defines. e.g. F_NJ, F_NM , F_NO_T, F_NPS_SR, F_NPS_M, F_NPS_CORE, F_NPS_ALL.
(insert_nps_misc_imm_offset): New function.
(extract_nps_misc imm_offset): New function.
(arc_num_flag_operands): Add F_NJ, F_NM, F_NO_T.
(arc_flag_special_cases): Add F_NJ, F_NM, F_NO_T.
include * opcode/arc.h (insn_class_t): Add ULTRAIP and MISC class.
gas * testsuite/gas/arc/nps400-12.s: New file.
* testsuite/gas/arc/nps400-12.d: New file.
commit cf31b44f3c4d839db0dcce10e0c4cc47d3be4ff1
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Mon Mar 27 00:00:35 2017 +0000
Automatic date update in version.in
commit f124168208a5927e9f1b9843094ec2bf2aad2edf
Author: Jim Wilson <jim.wilson@linaro.org>
Date: Sat Mar 25 20:32:02 2017 -0700
Fix bug with cmn/adds where C flag was incorrectly set.
sim/aarch64/
* simulator.c (set_flags_for_add32): Cast result to uint32_t in carry
flag check.
sim/testsuite/sim/aarch64/
* adds.s: Add checks for values -2 and 1, where C is not set.
commit 7ed687b257a4182771079c582887498d0a98810c
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Sun Mar 26 00:00:20 2017 +0000
Automatic date update in version.in
commit 275c67ffb452f21f5c002cd0c7bbfd244848111d
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Sat Mar 25 00:00:12 2017 +0000
Automatic date update in version.in
commit ed771251e16c8c66cbdd03738135e76caef6937e
Author: Alan Hayward <alan.hayward@arm.com>
Date: Fri Mar 24 16:53:05 2017 +0000
Remove MAX_REGISTER_SIZE from target.c
gdb/
* regcache.c (regcache_debug_print_register): New function.
* regcache.h (regcache_debug_print_register): New declaration.
* target.c (debug_print_register): Remove.
(target_fetch_registers): Call regcache_debug_print_register.
(target_store_registers): Likewise.
commit 568c1b9f503649d19ed1d17e6970f212e6b6317d
Author: Pádraig Brady <pbrady@fb.com>
Date: Fri Mar 24 15:12:53 2017 +0000
Avoid segfault on invalid directory table
gdb was segfaulting during backtrace on a binary here, where
fe->dir_index parsed from the DWARF info was seen to access beyond the
provided include_dirs array.
This commit bounds the access to entries actually written to the
array, and was verified to output the backtrace correctly.
gdb/ChangeLog:
* dwarf2read.c (setup_type_unit_groups): Ensure dir_index doesn't
reference beyond the 'lh->include_dirs' array before accessing to
it.
(psymtab_include_file_name): Likewise.
(dwarf_decode_lines_1): Likewise.
(dwarf_decode_lines): Likewise.
(file_file_name): Likewise.
commit 62785b09987359ede74a98fac11343827f7181af
Author: Thomas Preud'homme <thomas.preudhomme@arm.com>
Date: Fri Mar 24 13:22:16 2017 +0000
[GAS/ARM] Fix selected_cpu with default CPU and -mcpu
When GAS is compiled with DEFAULT_CPU set and then run with a -mcpu or
-march option, selected_cpu will be set to the default CPU. This means
the -mcpu is ignored which is surprising behavior. This commit instead
sets selected_cpu from the value passed to -mcpu/-march.
2017-03-24 Thomas preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.: (md_begin): Set selected_cpu from *mcpu_cpu_opt when
CPU_DEFAULT is defined.
commit c72cea5aec39df2d7a105755691a61460ee64f59
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Fri Mar 24 12:25:49 2017 +0000
readelf: Fix incorrect "Version definition past end of section" message (ChangeLog)
Correct ChangeLog entry for commit c9f02c3e2949 ("readelf: Fix incorrect
"Version definition past end of section" message").
commit cad1105d6a28e1199e82653619fbd63c2b9d4fa6
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Fri Mar 24 00:00:33 2017 +0000
Automatic date update in version.in
commit 3e00d44febb8093d8dc0e6842b975afb194c4fd1
Author: Simon Marchi <simon.marchi@ericsson.com>
Date: Thu Mar 23 13:37:06 2017 -0400
Remove some unnecessary inferior_ptid setting/restoring when fetching/storing registers
Now that the to_fetch_registers, to_store_registers and
to_prepare_to_store target methods don't rely on the value of
inferior_ptid anymore, we can remove a bunch of now unnecessary setting
and restoring of inferior_ptid.
The asserts added recently in target_fetch_registers and
target_store_registers, which validate that inferior_ptid matches the
regcache's ptid, must go away. It's the whole point of this effort, to
not require inferior_ptid to have a particular value when calling these
functions.
One thing that I noticed is how sol-thread.c's ps_lgetregs and friends
use the current value of inferior_ptid instead of what's passed as
argument (ph->ptid), unlike proc-service.c's versions of the same
functions. Is it expected? I left it like this in the current patch,
but unless there's a good reason for it to be that way, I guess we
should make it use the parameter.
gdb/ChangeLog:
* fbsd-tdep.c (fbsd_corefile_thread): Don't set/restore
inferior_ptid.
* proc-service.c (ps_lgetregs, ps_lsetregs, ps_lgetfpregs,
ps_lsetfpregs): Likewise.
* regcache.c (regcache_raw_update, regcache_raw_write): Likewise.
* sol-thread.c (ps_lgetregs, ps_lsetregs, ps_lgetfpregs,
ps_lsetfpregs): Likewise.
* target.c (target_fetch_registers, target_store_registers):
Remove asserts.
commit 077ae656a69fcf144f68848a3f6f2cb559b62987
Author: Alan Hayward <alan.hayward@arm.com>
Date: Thu Mar 23 14:40:58 2017 +0000
Remove MAX_REGISTER_SIZE from sol-thread.c
gdb/
* sol-thread.c (sol_thread_store_registers): Remove regcache calls.
commit 1e2b521d987a34898ca959a33972be8912511ba0
Author: Yao Qi <yao.qi@linaro.org>
Date: Thu Mar 23 14:11:04 2017 +0000
Handle PRFM in AArch64 process record
This patch fixes the bug of handling PRFM instruction. PRFM is documented
in a table with other load and store instructions, but it doesn't do any
load or store. This patch also adds a unit test to PRFM instruction.
gdb:
2017-03-23 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_process_record_test): Declare.
(_initialize_aarch64_tdep): Register it.
(aarch64_record_load_store): Handle PRFM instruction.
(aarch64_process_record_test): New function.
commit 338771252e913f82df8a445cb3e748a791b1cba8
Author: Yao Qi <yao.qi@linaro.org>
Date: Thu Mar 23 14:11:04 2017 +0000
Fix code indentation
gdb:
2017-03-23 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_record_load_store): Fix code
indentation.
commit a0eef9404b0fcfc8b0fbe7511d094a419ac631e9
Author: Yao Qi <yao.qi@linaro.org>
Date: Thu Mar 23 14:11:04 2017 +0000
Remove AARCH64_RECORD_FAILURE
It is not used at all.
gdb:
2017-03-23 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c: Remove AARCH64_RECORD_FAILURE.
commit 1a5e158b68d0fb3b1ba3d038e87c841239572a35
Author: Andreas Arnez <arnez@linux.vnet.ibm.com>
Date: Thu Mar 23 12:51:14 2017 +0100
Remove constness of libdir in do_start_initialization
The patch "Fix memory leak in python.c:do_start_initialization"
(https://sourceware.org/ml/gdb-patches/2017-03/msg00407.html) introduced a
compilation error on some platforms:
../../binutils-gdb/gdb/python/python.c: In function bool do_start_initialization():
../../binutils-gdb/gdb/python/python.c:1556:16: error: invalid conversion from const void* to void* [-fpermissive]
xfree (libdir);
^
This is fixed by removing the constness of libdir's data type.
gdb/ChangeLog:
* python/python.c (do_start_initialization): Remove 'const' from
data type of libdir.
commit 3f2a3564b1c3872e4a380f2484d40ce2495a4835
Author: Philipp Rudo <prudo@linux.vnet.ibm.com>
Date: Thu Mar 23 12:22:11 2017 +0100
Fix memory leak in python.c:do_start_initialization
When intializing Python the path to the python binary is build the
following way
progname = concat (ldirname (python_libdir), SLASH_STRING, "bin",
SLASH_STRING, "python", (char *) NULL);
This is problematic as both concat and ldirname allocate memory for the
string they return. Thus the memory allocated by ldirname cannot be
accessed afterwards causing a memory leak. Fix it by temporarily storing
libdir in a variable and xfree it after concat.
gdb/ChangeLog:
python/python.c (do_start_initialization): Fix memory leak.
commit ad36c6ce7c176a0bade3b3f09b801e65ab5ef93f
Author: GDB Administrator <gdbadmin@sourceware.org>
Date: Thu Mar 23 00:00:42 2017 +0000
Automatic date update in version.in
commit 19683c0408d66d9e48085fd5af009ad7d83aa3cd
Author: Palmer Dabbelt <palmer@dabbelt.com>
Date: Tue Mar 21 08:36:44 2017 -0700
Sanitize RISC-V GAS help text, documentation
It looks like I missed the GAS help text when going through all the
documentation last time, so it printed some of the old-format (never
upstream) arguments. I fixed this, and when I went to check doc/ I
noticed it was missing the '-fpic'/'-fno-pic' options.
-----------------------------------------------------------------------
Summary of changes:
bfd/ChangeLog | 54 +
bfd/Makefile.am | 6 +
bfd/Makefile.in | 9 +
bfd/archures.c | 4 +
bfd/bfd-in2.h | 14 +
bfd/coff-bfd.h | 2 +
bfd/coffgen.c | 40 +-
bfd/config.bfd | 6 +
bfd/configure | 2 +
bfd/configure.ac | 2 +
bfd/cpu-wasm32.c | 36 +
bfd/doc/webassembly.texi | 33 +
bfd/dwarf2.c | 20 +-
bfd/elf32-cris.c | 9 +-
bfd/elf32-wasm32.c | 155 +
bfd/libbfd.h | 10 +
bfd/po/SRC-POTFILES.in | 3 +
bfd/po/bfd.pot | 1348 ++++----
bfd/reloc.c | 23 +
bfd/targets.c | 5 +
bfd/version.h | 2 +-
bfd/wasm-module.c | 839 +++++
bfd/wasm-module.h | 52 +
binutils/ChangeLog | 38 +
binutils/NEWS | 2 +
binutils/doc/binutils.texi | 34 +-
binutils/readelf.c | 9 +
binutils/testsuite/binutils-all/nm.exp | 3 +-
.../testsuite/binutils-all/wasm32/create-wasm.d | 10 +
.../testsuite/binutils-all/wasm32/create-wasm.s | 6 +
.../testsuite/binutils-all/wasm32/custom-section.d | 11 +
.../testsuite/binutils-all/wasm32/custom-section.s | 4 +
.../testsuite/binutils-all/wasm32/invalid-wasm-1.d | 6 +
.../testsuite/binutils-all/wasm32/invalid-wasm-1.s | 7 +
.../testsuite/binutils-all/wasm32/invalid-wasm-2.d | 6 +
.../testsuite/binutils-all/wasm32/invalid-wasm-2.s | 7 +
.../testsuite/binutils-all/wasm32/long-sections.d | 13 +
.../testsuite/binutils-all/wasm32/long-sections.s | 9 +
.../testsuite/binutils-all/wasm32/parse-wasm-2.d | 15 +
.../testsuite/binutils-all/wasm32/parse-wasm-2.s | 43 +
.../testsuite/binutils-all/wasm32/parse-wasm.d | 8 +
.../testsuite/binutils-all/wasm32/parse-wasm.s | 7 +
.../binutils-all/wasm32/prepared-section.d | 10 +
.../binutils-all/wasm32/prepared-section.s | 6 +
binutils/testsuite/binutils-all/wasm32/wasm32.exp | 29 +
binutils/testsuite/lib/binutils-common.exp | 4 +
gas/ChangeLog | 110 +
gas/Makefile.am | 2 +
gas/Makefile.in | 17 +
gas/NEWS | 2 +
gas/config/tc-arm.c | 4 +-
gas/config/tc-ppc.c | 3 +-
gas/config/tc-riscv.c | 24 +-
gas/config/tc-s390.c | 6 +-
gas/config/tc-wasm32.c | 821 +++++
gas/config/tc-wasm32.h | 89 +
gas/configure.tgt | 3 +
gas/doc/all.texi | 1 +
gas/doc/as.texinfo | 9 +-
gas/doc/c-riscv.texi | 8 +
gas/doc/c-wasm32.texi | 119 +
gas/po/POTFILES.in | 2 +
gas/po/gas.pot | 3486 ++++++++++----------
gas/testsuite/gas/arc/nps400-12.d | 59 +
gas/testsuite/gas/arc/nps400-12.s | 71 +
gas/testsuite/gas/ppc/ppc.exp | 1 +
gas/testsuite/gas/ppc/pr21303.d | 12 +
gas/testsuite/gas/ppc/pr21303.s | 5 +
gas/testsuite/gas/wasm32/allinsn.d | 198 ++
gas/testsuite/gas/wasm32/allinsn.s | 171 +
gas/testsuite/gas/wasm32/illegal-10.l | 3 +
gas/testsuite/gas/wasm32/illegal-10.s | 1 +
gas/testsuite/gas/wasm32/illegal-11.l | 3 +
gas/testsuite/gas/wasm32/illegal-11.s | 1 +
gas/testsuite/gas/wasm32/illegal-12.l | 3 +
gas/testsuite/gas/wasm32/illegal-12.s | 1 +
gas/testsuite/gas/wasm32/illegal-13.l | 3 +
gas/testsuite/gas/wasm32/illegal-13.s | 1 +
gas/testsuite/gas/wasm32/illegal-14.l | 3 +
gas/testsuite/gas/wasm32/illegal-14.s | 1 +
gas/testsuite/gas/wasm32/illegal-15.l | 3 +
gas/testsuite/gas/wasm32/illegal-15.s | 1 +
gas/testsuite/gas/wasm32/illegal-16.l | 3 +
gas/testsuite/gas/wasm32/illegal-16.s | 1 +
gas/testsuite/gas/wasm32/illegal-17.l | 3 +
gas/testsuite/gas/wasm32/illegal-17.s | 1 +
gas/testsuite/gas/wasm32/illegal-18.l | 3 +
gas/testsuite/gas/wasm32/illegal-18.s | 1 +
gas/testsuite/gas/wasm32/illegal-19.l | 3 +
gas/testsuite/gas/wasm32/illegal-19.s | 1 +
gas/testsuite/gas/wasm32/illegal-2.l | 3 +
gas/testsuite/gas/wasm32/illegal-2.s | 1 +
gas/testsuite/gas/wasm32/illegal-20.l | 3 +
gas/testsuite/gas/wasm32/illegal-20.s | 1 +
gas/testsuite/gas/wasm32/illegal-21.l | 3 +
gas/testsuite/gas/wasm32/illegal-21.s | 1 +
gas/testsuite/gas/wasm32/illegal-22.l | 3 +
gas/testsuite/gas/wasm32/illegal-24.l | 3 +
gas/testsuite/gas/wasm32/illegal-24.s | 1 +
gas/testsuite/gas/wasm32/illegal-25.l | 3 +
gas/testsuite/gas/wasm32/illegal-25.s | 1 +
gas/testsuite/gas/wasm32/illegal-3.l | 3 +
gas/testsuite/gas/wasm32/illegal-3.s | 1 +
gas/testsuite/gas/wasm32/illegal-4.l | 3 +
gas/testsuite/gas/wasm32/illegal-4.s | 1 +
gas/testsuite/gas/wasm32/illegal-5.l | 3 +
gas/testsuite/gas/wasm32/illegal-5.s | 1 +
gas/testsuite/gas/wasm32/illegal-6.l | 3 +
gas/testsuite/gas/wasm32/illegal-6.s | 1 +
gas/testsuite/gas/wasm32/illegal-7.l | 3 +
gas/testsuite/gas/wasm32/illegal-7.s | 1 +
gas/testsuite/gas/wasm32/illegal-8.l | 3 +
gas/testsuite/gas/wasm32/illegal-8.s | 1 +
gas/testsuite/gas/wasm32/illegal-9.l | 3 +
gas/testsuite/gas/wasm32/illegal-9.s | 1 +
gas/testsuite/gas/wasm32/illegal.l | 3 +
gas/testsuite/gas/wasm32/illegal.s | 1 +
gas/testsuite/gas/wasm32/reloc.d | 18 +
gas/testsuite/gas/wasm32/reloc.s | 3 +
gas/testsuite/gas/wasm32/wasm32.exp | 58 +
gdb/ChangeLog | 202 ++
gdb/NEWS | 3 +
gdb/aarch64-tdep.c | 75 +-
gdb/arc-tdep.c | 852 +++++-
gdb/arc-tdep.h | 41 +
gdb/arch/xtensa.h | 2 +
gdb/auto-load.c | 3 +-
gdb/common/common-defs.h | 14 +
gdb/cp-name-parser.y | 60 +-
gdb/d-exp.y | 1 +
gdb/doc/ChangeLog | 8 +
gdb/doc/gdb.texinfo | 7 +-
gdb/dwarf2read.c | 415 ++--
gdb/fbsd-tdep.c | 4 -
gdb/gdbserver/.gitignore | 18 +-
gdb/gdbserver/ChangeLog | 27 +
gdb/gdbserver/Makefile.in | 68 +-
gdb/gdbserver/linux-xtensa-low.c | 39 +
gdb/gdbthread.h | 54 +-
gdb/proc-service.c | 36 +-
gdb/python/python.c | 2 +-
gdb/regcache.c | 52 +-
gdb/regcache.h | 6 +
gdb/sol-thread.c | 57 +-
gdb/solib-target.c | 2 +-
gdb/target.c | 46 +-
gdb/testsuite/ChangeLog | 14 +
gdb/testsuite/gdb.arch/arc-analyze-prologue.S | 903 +++++
gdb/testsuite/gdb.arch/arc-analyze-prologue.exp | 201 ++
gdb/testsuite/gdb.arch/arc-decode-insn.S | 1002 ++++++
gdb/testsuite/gdb.arch/arc-decode-insn.exp | 132 +
gdb/testsuite/gdb.dlang/watch-loc.c | 36 +
gdb/testsuite/gdb.dlang/watch-loc.exp | 83 +
gdb/testsuite/gdb.python/py-section-script.exp | 38 +
gdb/thread.c | 69 +-
gdb/utils.c | 10 +-
gdb/utils.h | 2 +-
gdb/xml-support.h | 4 +-
gdb/xml-syscall.c | 8 +-
gdb/xml-tdesc.c | 12 +-
gdb/xtensa-linux-nat.c | 36 +
gdb/xtensa-tdep.c | 15 +-
gdb/xtensa-tdep.h | 1 +
include/ChangeLog | 61 +
include/elf/wasm32.h | 30 +
include/opcode/arc.h | 14 +-
include/opcode/ppc.h | 80 +-
include/opcode/riscv-opc.h | 40 +
include/opcode/wasm.h | 226 ++
ld/ChangeLog | 9 +-
ld/testsuite/ld-cris/dso-1c.s | 2 +
ld/testsuite/ld-cris/dso-2b.s | 2 +
ld/testsuite/ld-cris/dso-4.s | 6 +
ld/testsuite/ld-cris/pr16044.d | 43 +
libiberty/ChangeLog | 5 +
libiberty/cp-demint.c | 1 +
opcodes/ChangeLog | 37 +
opcodes/arc-nps400-tbl.h | 72 +
opcodes/arc-opc.c | 880 +++--
opcodes/configure | 1 +
opcodes/configure.ac | 1 +
opcodes/po/opcodes.pot | 339 +-
opcodes/ppc-dis.c | 42 +-
opcodes/sparc-opc.c | 28 +
sim/aarch64/ChangeLog | 5 +
sim/aarch64/simulator.c | 2 +-
sim/testsuite/sim/aarch64/ChangeLog | 4 +
sim/testsuite/sim/aarch64/adds.s | 17 +
188 files changed, 11484 insertions(+), 3481 deletions(-)
create mode 100644 bfd/cpu-wasm32.c
create mode 100644 bfd/doc/webassembly.texi
create mode 100644 bfd/elf32-wasm32.c
create mode 100644 bfd/wasm-module.c
create mode 100644 bfd/wasm-module.h
create mode 100644 binutils/testsuite/binutils-all/wasm32/create-wasm.d
create mode 100644 binutils/testsuite/binutils-all/wasm32/create-wasm.s
create mode 100644 binutils/testsuite/binutils-all/wasm32/custom-section.d
create mode 100644 binutils/testsuite/binutils-all/wasm32/custom-section.s
create mode 100644 binutils/testsuite/binutils-all/wasm32/invalid-wasm-1.d
create mode 100644 binutils/testsuite/binutils-all/wasm32/invalid-wasm-1.s
create mode 100644 binutils/testsuite/binutils-all/wasm32/invalid-wasm-2.d
create mode 100644 binutils/testsuite/binutils-all/wasm32/invalid-wasm-2.s
create mode 100644 binutils/testsuite/binutils-all/wasm32/long-sections.d
create mode 100644 binutils/testsuite/binutils-all/wasm32/long-sections.s
create mode 100644 binutils/testsuite/binutils-all/wasm32/parse-wasm-2.d
create mode 100644 binutils/testsuite/binutils-all/wasm32/parse-wasm-2.s
create mode 100644 binutils/testsuite/binutils-all/wasm32/parse-wasm.d
create mode 100644 binutils/testsuite/binutils-all/wasm32/parse-wasm.s
create mode 100644 binutils/testsuite/binutils-all/wasm32/prepared-section.d
create mode 100644 binutils/testsuite/binutils-all/wasm32/prepared-section.s
create mode 100644 binutils/testsuite/binutils-all/wasm32/wasm32.exp
create mode 100644 gas/config/tc-wasm32.c
create mode 100644 gas/config/tc-wasm32.h
create mode 100644 gas/doc/c-wasm32.texi
create mode 100644 gas/testsuite/gas/arc/nps400-12.d
create mode 100644 gas/testsuite/gas/arc/nps400-12.s
create mode 100644 gas/testsuite/gas/ppc/pr21303.d
create mode 100644 gas/testsuite/gas/ppc/pr21303.s
create mode 100644 gas/testsuite/gas/wasm32/allinsn.d
create mode 100644 gas/testsuite/gas/wasm32/allinsn.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-10.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-10.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-11.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-11.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-12.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-12.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-13.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-13.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-14.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-14.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-15.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-15.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-16.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-16.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-17.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-17.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-18.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-18.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-19.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-19.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-2.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-2.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-20.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-20.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-21.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-21.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-22.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-24.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-24.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-25.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-25.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-3.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-3.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-4.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-4.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-5.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-5.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-6.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-6.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-7.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-7.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-8.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-8.s
create mode 100644 gas/testsuite/gas/wasm32/illegal-9.l
create mode 100644 gas/testsuite/gas/wasm32/illegal-9.s
create mode 100644 gas/testsuite/gas/wasm32/illegal.l
create mode 100644 gas/testsuite/gas/wasm32/illegal.s
create mode 100644 gas/testsuite/gas/wasm32/reloc.d
create mode 100644 gas/testsuite/gas/wasm32/reloc.s
create mode 100644 gas/testsuite/gas/wasm32/wasm32.exp
create mode 100644 gdb/testsuite/gdb.arch/arc-analyze-prologue.S
create mode 100644 gdb/testsuite/gdb.arch/arc-analyze-prologue.exp
create mode 100644 gdb/testsuite/gdb.arch/arc-decode-insn.S
create mode 100644 gdb/testsuite/gdb.arch/arc-decode-insn.exp
create mode 100644 gdb/testsuite/gdb.dlang/watch-loc.c
create mode 100644 gdb/testsuite/gdb.dlang/watch-loc.exp
create mode 100644 include/elf/wasm32.h
create mode 100644 include/opcode/wasm.h
create mode 100644 ld/testsuite/ld-cris/dso-1c.s
create mode 100644 ld/testsuite/ld-cris/dso-2b.s
create mode 100644 ld/testsuite/ld-cris/dso-4.s
create mode 100644 ld/testsuite/ld-cris/pr16044.d
First 500 lines of diff:
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 50e76c2..bb851c7 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,57 @@
+2017-03-30 Pip Cet <pipcet@gmail.com>
+
+ * elf32-wasm32.c: Add relocation code, two relocs.
+ * reloc.c: Add wasm32 relocations.
+ * libbfd.h: Regenerate.
+ * bfd-in2.h: Regenerate.
+ * bfd/po/bfd.pot: Regenerate.
+
+2017-03-29 Nick Clifton <nickc@redhat.com>
+
+ PR binutils/18025
+ * coff-bfd.h (struct coff_section_data): Add new fields:
+ saved_bias and bias.
+ * coffgen.c (coff_find_nearest_line_with_names): Cache the bias
+ computed for PE binaries.
+ * dwarf2.c (scan_unit_for_symbols): Only warn once about each
+ missing abbrev.
+
+2017-03-28 Hans-Peter Nilsson <hp@axis.com>
+
+ PR ld/16044
+ * elf32-cris.c (elf_cris_adjust_gotplt_to_got): Adjust BFD_ASSERT
+ to handle a local symbol with a hash-symbol-entry; without PLT.
+ Add BFD_ASSERT for an incidental case with GOT entry present.
+ (cris_elf_check_relocs): Increment PLT refcount only if the symbol
+ isn't forced-or-set local.
+
+2017-03-27 Pip Cet <pipcet@gmail.com>
+
+ * wasm-module.c: New file to support WebAssembly modules.
+ * wasm-module.h: New file to support WebAssembly modules.
+ * doc/webassembly.texi: Start documenting wasm-module.c.
+ * config.bfd: Add wasm_vec.
+ * targets.c: Likewise.
+ * configure.ac: Likewise.
+ * Makefile.am: Add entries for wasm-module.c.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * po/SRC-POTFILES.in: Regenerate.
+
+2017-03-27 Pip Cet <pipcet@gmail.com>
+
+ * cpu-wasm32.c: New file to support wasm32 architecture.
+ * elf32-wasm32.c: New file to support wasm32 architecture.
+ * Makefile.am: Add wasm32 architecture.
+ * archures.c: Likewise.
+ * config.bfd: Likewise.
+ * configure.ac: Likewise.
+ * targets.c: Likewise.
+ * Makefile.in: Regenerate.
+ * bfd-in2.h: Regenerate.
+ * configure: Regenerate.
+ * po/SRC-POTFILES.in: Regenerate.
+
2017-03-20 Alan Modra <amodra@gmail.com>
PR 21266
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index 0b02263..49ab092 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -169,6 +169,7 @@ ALL_MACHINES = \
cpu-vax.lo \
cpu-visium.lo \
cpu-w65.lo \
+ cpu-wasm32.lo \
cpu-we32k.lo \
cpu-xc16x.lo \
cpu-xgate.lo \
@@ -257,6 +258,7 @@ ALL_MACHINES_CFILES = \
cpu-v850_rh850.c \
cpu-vax.c \
cpu-visium.c \
+ cpu-wasm32.c \
cpu-w65.c \
cpu-we32k.c \
cpu-xc16x.c \
@@ -383,6 +385,7 @@ BFD32_BACKENDS = \
elf32-v850.lo \
elf32-vax.lo \
elf32-visium.lo \
+ elf32-wasm32.lo \
elf32-xc16x.lo \
elf32-xgate.lo \
elf32-xstormy16.lo \
@@ -456,6 +459,7 @@ BFD32_BACKENDS = \
versados.lo \
vms-lib.lo \
vms-misc.lo \
+ wasm-module.lo \
xcofflink.lo \
xsym.lo \
xtensa-isa.lo \
@@ -576,6 +580,7 @@ BFD32_BACKENDS_CFILES = \
elf32-v850.c \
elf32-vax.c \
elf32-visium.c \
+ elf32-wasm32.c \
elf32-xc16x.c \
elf32-xgate.c \
elf32-xstormy16.c \
@@ -648,6 +653,7 @@ BFD32_BACKENDS_CFILES = \
versados.c \
vms-lib.c \
vms-misc.c \
+ wasm-module.c \
xcofflink.c \
xsym.c \
xtensa-isa.c \
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index 096c7ef..fed5117 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -502,6 +502,7 @@ ALL_MACHINES = \
cpu-vax.lo \
cpu-visium.lo \
cpu-w65.lo \
+ cpu-wasm32.lo \
cpu-we32k.lo \
cpu-xc16x.lo \
cpu-xgate.lo \
@@ -590,6 +591,7 @@ ALL_MACHINES_CFILES = \
cpu-v850_rh850.c \
cpu-vax.c \
cpu-visium.c \
+ cpu-wasm32.c \
cpu-w65.c \
cpu-we32k.c \
cpu-xc16x.c \
@@ -717,6 +719,7 @@ BFD32_BACKENDS = \
elf32-v850.lo \
elf32-vax.lo \
elf32-visium.lo \
+ elf32-wasm32.lo \
elf32-xc16x.lo \
elf32-xgate.lo \
elf32-xstormy16.lo \
@@ -790,6 +793,7 @@ BFD32_BACKENDS = \
versados.lo \
vms-lib.lo \
vms-misc.lo \
+ wasm-module.lo \
xcofflink.lo \
xsym.lo \
xtensa-isa.lo \
@@ -910,6 +914,7 @@ BFD32_BACKENDS_CFILES = \
elf32-v850.c \
elf32-vax.c \
elf32-visium.c \
+ elf32-wasm32.c \
elf32-xc16x.c \
elf32-xgate.c \
elf32-xstormy16.c \
@@ -982,6 +987,7 @@ BFD32_BACKENDS_CFILES = \
versados.c \
vms-lib.c \
vms-misc.c \
+ wasm-module.c \
xcofflink.c \
xsym.c \
xtensa-isa.c \
@@ -1446,6 +1452,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-vax.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-visium.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-w65.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-wasm32.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-we32k.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-xc16x.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-xgate.Plo@am__quote@
@@ -1534,6 +1541,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-v850.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-vax.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-visium.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-wasm32.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-xc16x.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-xgate.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-xstormy16.Plo@am__quote@
@@ -1665,6 +1673,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vms-alpha.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vms-lib.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vms-misc.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/wasm-module.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xcofflink.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xsym.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xtensa-isa.Plo@am__quote@
diff --git a/bfd/archures.c b/bfd/archures.c
index c909db0..c6e7152 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -528,6 +528,8 @@ DESCRIPTION
.#define bfd_mach_nios2r2 2
. bfd_arch_visium, {* Visium *}
.#define bfd_mach_visium 1
+. bfd_arch_wasm32, {* WebAssembly *}
+.#define bfd_mach_wasm32 1
. bfd_arch_pru, {* PRU *}
.#define bfd_mach_pru 0
. bfd_arch_last
@@ -654,6 +656,7 @@ extern const bfd_arch_info_type bfd_v850_arch;
extern const bfd_arch_info_type bfd_v850_rh850_arch;
extern const bfd_arch_info_type bfd_vax_arch;
extern const bfd_arch_info_type bfd_visium_arch;
+extern const bfd_arch_info_type bfd_wasm32_arch;
extern const bfd_arch_info_type bfd_w65_arch;
extern const bfd_arch_info_type bfd_we32k_arch;
extern const bfd_arch_info_type bfd_xstormy16_arch;
@@ -746,6 +749,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_vax_arch,
&bfd_visium_arch,
&bfd_w65_arch,
+ &bfd_wasm32_arch,
&bfd_we32k_arch,
&bfd_xstormy16_arch,
&bfd_xtensa_arch,
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 59403af..fbd379f 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2372,6 +2372,8 @@ enum bfd_architecture
#define bfd_mach_nios2r2 2
bfd_arch_visium, /* Visium */
#define bfd_mach_visium 1
+ bfd_arch_wasm32, /* WebAssembly */
+#define bfd_mach_wasm32 1
bfd_arch_pru, /* PRU */
#define bfd_mach_pru 0
bfd_arch_last
@@ -6462,6 +6464,18 @@ assembler and not (currently) written to any object files. */
BFD_RELOC_VISIUM_HI16_PCREL,
BFD_RELOC_VISIUM_LO16_PCREL,
BFD_RELOC_VISIUM_IM16_PCREL,
+
+/* WebAssembly relocations. */
+ BFD_RELOC_WASM32_LEB128,
+ BFD_RELOC_WASM32_LEB128_GOT,
+ BFD_RELOC_WASM32_LEB128_GOT_CODE,
+ BFD_RELOC_WASM32_LEB128_PLT,
+ BFD_RELOC_WASM32_PLT_INDEX,
+ BFD_RELOC_WASM32_ABS32_CODE,
+ BFD_RELOC_WASM32_COPY,
+ BFD_RELOC_WASM32_CODE_POINTER,
+ BFD_RELOC_WASM32_INDEX,
+ BFD_RELOC_WASM32_PLT_SIG,
BFD_RELOC_UNUSED };
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
diff --git a/bfd/coff-bfd.h b/bfd/coff-bfd.h
index c76bf3a..97117b3 100644
--- a/bfd/coff-bfd.h
+++ b/bfd/coff-bfd.h
@@ -50,6 +50,8 @@ struct coff_section_tdata
/* If this is TRUE, the contents entry may not be freed. */
bfd_boolean keep_contents;
/* Information cached by coff_find_nearest_line. */
+ bfd_boolean saved_bias;
+ bfd_signed_vma bias;
bfd_vma offset;
unsigned int i;
const char *function;
diff --git a/bfd/coffgen.c b/bfd/coffgen.c
index 5a61f6d..3c60ed4 100644
--- a/bfd/coffgen.c
+++ b/bfd/coffgen.c
@@ -2259,6 +2259,8 @@ coff_find_nearest_line_with_names (bfd *abfd,
&coff_data(abfd)->dwarf2_find_line_info))
return TRUE;
+ sec_data = coff_section_data (abfd, section);
+
/* If the DWARF lookup failed, but there is DWARF information available
then the problem might be that the file has been rebased. This tool
changes the VMAs of all the sections, but it does not update the DWARF
@@ -2267,8 +2269,26 @@ coff_find_nearest_line_with_names (bfd *abfd,
{
bfd_signed_vma bias;
- bias = _bfd_dwarf2_find_symbol_bias (symbols,
- & coff_data (abfd)->dwarf2_find_line_info);
+ /* Create a cache of the result for the next call. */
+ if (sec_data == NULL && section->owner == abfd)
+ {
+ amt = sizeof (struct coff_section_tdata);
+ section->used_by_bfd = bfd_zalloc (abfd, amt);
+ sec_data = (struct coff_section_tdata *) section->used_by_bfd;
+ }
+
+ if (sec_data != NULL && sec_data->saved_bias)
+ bias = sec_data->saved_bias;
+ else
+ {
+ bias = _bfd_dwarf2_find_symbol_bias (symbols,
+ & coff_data (abfd)->dwarf2_find_line_info);
+ if (sec_data)
+ {
+ sec_data->saved_bias = TRUE;
+ sec_data->bias = bias;
+ }
+ }
if (bias
&& _bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section,
@@ -2363,10 +2383,16 @@ coff_find_nearest_line_with_names (bfd *abfd,
}
}
- /* Now wander though the raw linenumbers of the section. */
- /* If we have been called on this section before, and the offset we
- want is further down then we can prime the lookup loop. */
- sec_data = coff_section_data (abfd, section);
+ if (section->lineno_count == 0)
+ {
+ *functionname_ptr = NULL;
+ *line_ptr = 0;
+ return TRUE;
+ }
+
+ /* Now wander though the raw linenumbers of the section.
+ If we have been called on this section before, and the offset
+ we want is further down then we can prime the lookup loop. */
if (sec_data != NULL
&& sec_data->i > 0
&& offset >= sec_data->offset)
@@ -2395,6 +2421,7 @@ coff_find_nearest_line_with_names (bfd *abfd,
coff_symbol_type *coff = (coff_symbol_type *) (l->u.sym);
if (coff->symbol.value > offset)
break;
+
*functionname_ptr = coff->symbol.name;
last_value = coff->symbol.value;
if (coff->native)
@@ -2451,6 +2478,7 @@ coff_find_nearest_line_with_names (bfd *abfd,
section->used_by_bfd = bfd_zalloc (abfd, amt);
sec_data = (struct coff_section_tdata *) section->used_by_bfd;
}
+
if (sec_data != NULL)
{
sec_data->offset = offset;
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 52db9a4..1235c2c 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -197,6 +197,7 @@ tilegx*) targ_archs=bfd_tilegx_arch ;;
tilepro*) targ_archs=bfd_tilepro_arch ;;
v850*) targ_archs="bfd_v850_arch bfd_v850_rh850_arch" ;;
visium*) targ_archs=bfd_visium_arch ;;
+wasm32) targ_archs=bfd_wasm32_arch ;;
x86_64*) targ_archs=bfd_i386_arch ;;
xtensa*) targ_archs=bfd_xtensa_arch ;;
xgate) targ_archs=bfd_xgate_arch ;;
@@ -1793,6 +1794,11 @@ case "${targ}" in
targ_defvec=visium_elf32_vec
;;
+ wasm32-*-*)
+ targ_defvec=wasm32_elf32_vec
+ targ_selvecs="wasm_vec"
+ ;;
+
we32k-*-*)
targ_defvec=we32k_coff_vec
;;
diff --git a/bfd/configure b/bfd/configure
index 83256d2..7cae4ae 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -14569,6 +14569,8 @@ do
ft32_elf32_vec) tb="$tb elf32-ft32.lo elf32.lo $elf" ;;
visium_elf32_vec) tb="$tb elf32-visium.lo elf32.lo $elf" ;;
w65_coff_vec) tb="$tb coff-w65.lo reloc16.lo $coffgen" ;;
+ wasm_vec) tb="$tb wasm-module.lo" ;;
+ wasm32_elf32_vec) tb="$tb elf32-wasm32.lo elf32.lo $elf" ;;
we32k_coff_vec) tb="$tb coff-we32k.lo $coffgen" ;;
x86_64_coff_vec) tb="$tb coff-x86_64.lo $coff"; target_size=64 ;;
x86_64_elf32_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf-nacl.lo elf64.lo elf32.lo $elf"; target_size=64 ;;
diff --git a/bfd/configure.ac b/bfd/configure.ac
index ee0c537..feb1231 100644
--- a/bfd/configure.ac
+++ b/bfd/configure.ac
@@ -700,6 +700,8 @@ do
ft32_elf32_vec) tb="$tb elf32-ft32.lo elf32.lo $elf" ;;
visium_elf32_vec) tb="$tb elf32-visium.lo elf32.lo $elf" ;;
w65_coff_vec) tb="$tb coff-w65.lo reloc16.lo $coffgen" ;;
+ wasm_vec) tb="$tb wasm-module.lo" ;;
+ wasm32_elf32_vec) tb="$tb elf32-wasm32.lo elf32.lo $elf" ;;
we32k_coff_vec) tb="$tb coff-we32k.lo $coffgen" ;;
x86_64_coff_vec) tb="$tb coff-x86_64.lo $coff"; target_size=64 ;;
x86_64_elf32_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf-nacl.lo elf64.lo elf32.lo $elf"; target_size=64 ;;
diff --git a/bfd/cpu-wasm32.c b/bfd/cpu-wasm32.c
new file mode 100644
index 0000000..19d4cb9
--- /dev/null
+++ b/bfd/cpu-wasm32.c
@@ -0,0 +1,36 @@
+/* BFD support for the WebAssembly target
+ Copyright (C) 2017 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+#include "libiberty.h"
+
+#define N(number, print, default, next) \
+{ 32, 32, 8, bfd_arch_wasm32, number, "wasm32", "wasm32", 4, default, bfd_default_compatible, \
+ bfd_default_scan, bfd_arch_default_fill, next }
+
+static const bfd_arch_info_type arch_info_struct[] =
+{
+ N (bfd_mach_wasm32, "wasm32", TRUE, NULL)
+};
+
+const bfd_arch_info_type bfd_wasm32_arch =
+ N (bfd_mach_wasm32, "wasm32", TRUE, & arch_info_struct[0]);
diff --git a/bfd/doc/webassembly.texi b/bfd/doc/webassembly.texi
new file mode 100644
index 0000000..ad65094
--- /dev/null
+++ b/bfd/doc/webassembly.texi
@@ -0,0 +1,33 @@
+@section WebAssembly backend
+The WebAssembly module file format, at present, is a very simple
+object file format with up to 11 numbered sections plus named
+``custom'' sections. At present, there is no standard for relocations
+or symbols, though a @code{"name"} subsection can assign names to
+function indices and local variables.
+
+As such, it offers no real advantages over ELF, and intermediate ELF
+files can be used to produce WebAssembly modules. The WebAssembly
+backend aims to enable the opposite: reading a WebAssembly module and
+producing an ELF file containing the same information, which can then
+be manipulated and inspected with standard tools.
+
+When writing WebAssembly modules, the WebAssembly backend attempts to
+determine based on the section name whether to use a numeric section
+id, a named section header, or to include the section verbatim,
+assuming it already contains any necessary header.
+
+Function names are supported as symbols; local names and WebAssembly
+relocation sections are currently unsupported.
+
+There are slight differences in the LEB128 integer implementations
+between the WebAssembly specification and the BFD code; these result
+in some malformed WebAssembly modules being treated as valid.
+
+@menu
+* File layout::
+@end menu
+
+@node File layout, WebAssembly
+@subsection File layout
+For a description of the WebAssembly file format, see
+@url{https://github.com/WebAssembly/design/blob/master/BinaryEncoding.md}.
diff --git a/bfd/dwarf2.c b/bfd/dwarf2.c
index 722ee0d..132a674 100644
--- a/bfd/dwarf2.c
+++ b/bfd/dwarf2.c
@@ -2738,12 +2738,19 @@ scan_unit_for_symbols (struct comp_unit *unit)
continue;
}
- abbrev = lookup_abbrev (abbrev_number,unit->abbrevs);
+ abbrev = lookup_abbrev (abbrev_number, unit->abbrevs);
if (! abbrev)
{
- _bfd_error_handler
- (_("Dwarf Error: Could not find abbrev number %u."),
- abbrev_number);
+ static unsigned int previous_failed_abbrev = -1U;
+
+ /* Avoid multiple reports of the same missing abbrev. */
+ if (abbrev_number != previous_failed_abbrev)
+ {
+ _bfd_error_handler
+ (_("Dwarf Error: Could not find abbrev number %u."),
+ abbrev_number);
+ previous_failed_abbrev = abbrev_number;
+ }
bfd_set_error (bfd_error_bad_value);
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^ permalink raw reply [flat|nested] 4+ messages in thread
* [SCM] users/jkratoch/indexcxx: .
@ 2016-11-29 21:45 jkratoch
0 siblings, 0 replies; 4+ messages in thread
From: jkratoch @ 2016-11-29 21:45 UTC (permalink / raw)
To: archer-commits
The branch, users/jkratoch/indexcxx has been updated
via 4951936409ad913e04f1a9f6a7cdbb21c1da926f (commit)
via 12c6aeb662a13ad186f09dbc19802dd610df04a1 (commit)
via 17e1104673523c5605ea4e3cc56eb5e8fecc059f (commit)
from 87bc51b0838253b27e691f307a161517fdb35ba2 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email.
- Log -----------------------------------------------------------------
commit 4951936409ad913e04f1a9f6a7cdbb21c1da926f
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Nov 29 22:45:32 2016 +0100
.
commit 12c6aeb662a13ad186f09dbc19802dd610df04a1
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Nov 29 09:44:33 2016 +0100
.
commit 17e1104673523c5605ea4e3cc56eb5e8fecc059f
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue Nov 29 09:40:38 2016 +0100
.
-----------------------------------------------------------------------
Summary of changes:
gdb/dwarf2read.c | 24 +++++++++++++++---------
1 files changed, 15 insertions(+), 9 deletions(-)
First 500 lines of diff:
diff --git a/gdb/dwarf2read.c b/gdb/dwarf2read.c
index ed494ac..84f6234 100644
--- a/gdb/dwarf2read.c
+++ b/gdb/dwarf2read.c
@@ -2019,7 +2019,7 @@ byte_swap (offset_type value)
#define MAYBE_SWAP(V) byte_swap (V)
#else
-#define MAYBE_SWAP(V) (V)
+#define MAYBE_SWAP(V) static_cast<offset_type>(V)
#endif /* WORDS_BIGENDIAN */
/* Read the given attribute value as an address, taking the attribute's
@@ -22605,7 +22605,9 @@ public:
template<typename T> void
add_data (const T &data)
{
- std::copy (&data, &data + 1, add_size (sizeof (data)));
+ std::copy (reinterpret_cast<const gdb_byte *> (&data),
+ reinterpret_cast<const gdb_byte *> (&data + 1),
+ add_size (sizeof (data)));
}
void
@@ -22685,10 +22687,11 @@ hash_expand (struct mapped_symtab *symtab)
symtab->data.resize (old_entries.size () * 2);
for (auto &it:old_entries)
- {
- auto &ref (find_slot (symtab, it->name));
- ref = std::move (it);
- }
+ if (it)
+ {
+ auto &ref (find_slot (symtab, it->name));
+ ref = std::move (it);
+ }
}
// gcc/libstdc++-v3/include/bits/unique_ptr.h
@@ -22817,7 +22820,7 @@ write_hash_table (struct mapped_symtab *symtab, DataBuf &output, DataBuf &cpool)
{
/* Elements are sorted vectors of the indices of all the CUs that hold
an object of this name. */
- std::unordered_set<std::vector<offset_type>> symbol_hash_table;
+ std::unordered_map<std::vector<offset_type>, offset_type> symbol_hash_table;
/* We add all the index vectors to the constant pool first, to
ensure alignment is ok. */
@@ -22825,7 +22828,11 @@ write_hash_table (struct mapped_symtab *symtab, DataBuf &output, DataBuf &cpool)
{
if (!it)
continue;
- if (!symbol_hash_table.insert (it->cu_indices).second)
+ gdb_assert (it->index_offset == 0);
+ const auto insertpair (symbol_hash_table.emplace (it->cu_indices,
+ cpool.size ()));
+ it->index_offset = insertpair.first->second;
+ if (!insertpair.second)
continue;
cpool.add_data (MAYBE_SWAP (it->cu_indices.size ()));
for (const auto iter:it->cu_indices)
@@ -23046,7 +23053,6 @@ write_one_signatured_type (void **slot, void *d)
= (struct signatured_type_index_data *) d;
struct signatured_type *entry = (struct signatured_type *) *slot;
struct partial_symtab *psymtab = entry->per_cu.v.psymtab;
- gdb_byte val[8];
write_psymbols (info->symtab,
info->psyms_seen,
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