From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 57237 invoked by alias); 15 May 2017 14:49:32 -0000 Mailing-List: contact archer-commits-help@sourceware.org; run by ezmlm Sender: Precedence: bulk List-Post: List-Help: List-Subscribe: Received: (qmail 57211 invoked by uid 9674); 15 May 2017 14:49:31 -0000 Date: Mon, 15 May 2017 14:49:00 -0000 Message-ID: <20170515144931.57111.qmail@sourceware.org> From: jkratoch@sourceware.org To: archer-commits@sourceware.org Subject: [SCM] users/jkratoch/indexcxx: . X-Git-Refname: refs/heads/users/jkratoch/indexcxx X-Git-Reftype: branch X-Git-Oldrev: bdbdd8567e59bc6d54749dbfcc001502fffe18a9 X-Git-Newrev: dfba29cc316c649da098a49b084fbdd8ba3d84f2 X-SW-Source: 2017-q2/txt/msg00021.txt.bz2 List-Id: The branch, users/jkratoch/indexcxx has been updated via dfba29cc316c649da098a49b084fbdd8ba3d84f2 (commit) via 78ffdc7c8838d5e8203ef2faf779ea5d332fef2f (commit) via 52a86f843b6dee1de9977293da9786649b146b05 (commit) via b32465c97c12cc6049cefcde1beb3e2bfbfa232c (commit) via 3f3467ffc4b0a397a7017b8ab729e4c0060b25f0 (commit) via 70ab592fbae1725ac576012dd1242328e20e664a (commit) via 25499ac7ee92bca177c9436383ee167d6a220066 (commit) via 20c59b843a90300e5f9e07add83f5c72c8f994a6 (commit) via 602b88e3ab372729b53d130068f069dd363032db (commit) via c96425c560d640df9c416ff4e6a8c49c1f3b1119 (commit) via 1a7bf198b67c4b99e9adeaeba38c6874ec354c12 (commit) via e295202f606accec7623c961997a295a8e680247 (commit) via c76081bc874d7d41eb6f41ea79a4ac0f906467d0 (commit) via fdfb475260daf591d05407ea7affa39122a5b7f6 (commit) via a54d5f8bb3eb4772a94779a5d37b644aeee72bca (commit) via 32035f5151b6ec76af0b62d9db8774b76eddc091 (commit) via 5f2ad7a3c73fcec0a7891794eb5aade73bac8523 (commit) via 786e3eba7915df35df1d98a300e06f757336c75b (commit) via fba2af917d78bb1d8ef0d508b9246ad32fed1afd (commit) via cd85e51ad3921eabd7030974ce375123a0848cce (commit) via 097eb00398891370779bb6562965bcdf357a292f (commit) via 67f46fed806465c005b15c97d33947f4c0abb25c (commit) via adf3dde510088ef8dc46d04df05baf36adb0ed1e (commit) via c0c05aad81ef32899e809570c18932bcfb588009 (commit) via 6bf56e7482e220ff98655b5285736a37dd602c17 (commit) via 73caa85d4a97eb991e581ccba3ff4eccce5e2e1d (commit) via 6830f270e7b6676e7a77c1b8080941e35003d918 (commit) via 68f2f2e308a8585c39ddb2f391a9ae8d779c5029 (commit) via 256afbc259c1e22fafba601a27cf3c8d7bdde417 (commit) via be3f1006743f04f0b133de7fa8085a3e4c49b193 (commit) via a4f89915135f6760917c01dc783de5b674234d84 (commit) via de428bc53335d88c21eda38a823d5a4008468e52 (commit) via 99e2d67a0edd1a8feca82036feb93709fee488fa (commit) via f2c29a169242d0c564afb46ecaf160422b28bfbb (commit) via dc2be3d2f6de530aac40983e79e29e050f40e759 (commit) via f96f371cbb33454544a9f1827c239c4375f0b60e (commit) via 7f401e8417160ba5cdad60a38c8a3cbce395a5c5 (commit) via 40e5240e1f32b1cc36c45551eb3f59253c40f317 (commit) via 5d69120bfff3e532242083acd636dc68f23ea831 (commit) via 9fc1813479e1518197949105c3f34da8c2e30984 (commit) via db84b98a160d20f30dbdae3e3405cfb0fa680fbd (commit) via 2318686590bd252a47f494554dfc11bc18a3e58b (commit) via aab82f4c201a2612c0fb6d5b66d8e4ce2f036f1c (commit) via f78c0b915888ab388f9bdac826d7ac18dc944c28 (commit) via 58667758b1f907f8983d8a065333e3c38e311e88 (commit) via 53a346d8236aec06f1d3c767716d3340fb0aa013 (commit) via 21d1fbeed4b7c4d006e399437445519e6505088f (commit) via 8010f3ed8d459f98b8ff8b8577a0ed422c836e0d (commit) via a6da46304894741d50a6f4ca2263b5cc158740e4 (commit) via 94bb8dfe28219e4b747cb874aae401d18df91c9b (commit) via 8248946cc5fd4522de630b9d86627af6e8fe0097 (commit) via e645cf40b111daef4518a58547de577eb9379ccb (commit) via d2732b697fe56ff4274a4bc45add9386c17f8a07 (commit) via 56eeb7f2cbdb16f513b825af426ee38d8f7efe3a (commit) via dd9e66ee9549c872fad36a21d521b68b14429f38 (commit) via 38b123494b38ae09168387c0502acd1f23c1b601 (commit) via d7ab4911f8aa3e1cd06ece40f74d0b4a532d6a10 (commit) via f604c2a2a54ebf88e4a51986c7cdedffe7b3313a (commit) via 046734ff424bc5a4c1b6a69630d5bb31aa67165c (commit) via 313c59612298b022a408ca390bd5f73f28708015 (commit) via 27bfc1d1c2cbcafccddef51ef82b309ef147c4a8 (commit) via 146e6c5cc7b19ea56a033415511e38a2d0656e42 (commit) via b48e3ca69abef81d729d01d7c720fb23697c3590 (commit) from bdbdd8567e59bc6d54749dbfcc001502fffe18a9 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email. - Log ----------------------------------------------------------------- commit dfba29cc316c649da098a49b084fbdd8ba3d84f2 Author: Jan Kratochvil Date: Mon May 15 16:44:07 2017 +0200 . commit 78ffdc7c8838d5e8203ef2faf779ea5d332fef2f Merge: bdbdd85 52a86f8 Author: Jan Kratochvil Date: Mon May 15 16:38:05 2017 +0200 Merge remote-tracking branch 'gdb/master' into indexcxx commit 52a86f843b6dee1de9977293da9786649b146b05 Author: Nick Clifton Date: Mon May 15 15:29:02 2017 +0100 Fix use of ARM ADR and ADRl pseudo-instructions with thumb function symbols. PR gas/21458 * config/tc-arm.c (do_adr): If the ADR involves a thumb function symbol, ensure that the T bit will be set. (do_adrl): Likewise. (do_t_adr): Likewise. * testsuite/gas/arm/pr21458.s: New test. * testsuite/gas/arm/pr21458.d: New test driver. commit b32465c97c12cc6049cefcde1beb3e2bfbfa232c Author: Maciej W. Rozycki Date: Mon May 15 13:52:04 2017 +0100 MIPS16e2: Add new MIPS16e2 relaxation GAS and LD tests Verify MIPS16 PC-relative instruction relaxation using the MIPS16e2 LUI instruction rather than an LI/SLL instruction pair. gas/ * testsuite/gas/mips/mips16-pcrel-1.d: Remove `-mips3' from `as' flags. * testsuite/gas/mips/mips16-pcrel-pic-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-5.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-5.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-2.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-3.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d: Likewise. * testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-5.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16-pcrel-1.l: Adjust line numbers. * testsuite/gas/mips/mips16-pcrel-1.s: Adjust for alignment preservation between MIPS16 and MIPS16e2 code. * testsuite/gas/mips/mips.exp: Run MIPS16 relaxation tests over all MIPS16 architectures. ld/ * testsuite/ld-mips-elf/mips16e2-pcrel-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-1.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-2.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-6.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-1.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-1.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests. commit 3f3467ffc4b0a397a7017b8ab729e4c0060b25f0 Author: Maciej W. Rozycki Date: Mon May 15 13:45:42 2017 +0100 MIPS16e2: Add new MIPS16e2 ASE binutils and GAS tests Verify MIPS16e2 ASE instruction assembly, disassembly and object file flags. binutils/ * testsuite/binutils-all/mips/mips16-undecoded.d: Add `-mips3' to `as' flags. * testsuite/binutils-all/mips/mips16e2-undecoded.d: New test. * testsuite/binutils-all/mips/mips16e2-extend-insn.d: New test. * testsuite/binutils-all/mips/mips16-undecoded.s: Remove `.module mips3'. * testsuite/binutils-all/mips/mips.exp: Run the new tests. gas/ * testsuite/gas/mips/mips16e2.d: New test. * testsuite/gas/mips/mips16e2-mt.d: New test. * testsuite/gas/mips/mips16e2-sub.d: New test. * testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test. * testsuite/gas/mips/mips16e2-mt-sub.d: New test. * testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test. * testsuite/gas/mips/mips16e2-hilo.d: New test. * testsuite/gas/mips/mips16e2-hilo-n32.d: New test. * testsuite/gas/mips/mips16e2-reloc-error.d: New test. * testsuite/gas/mips/mips16e2-imm-error.d: New test. * testsuite/gas/mips/elf_ase_mips16e2.d: New test. * testsuite/gas/mips/elf_ase_mips16e2-2.d: New test. * testsuite/gas/mips/elf-rel9-mips16e2.d: New test. * testsuite/gas/mips/mips16e2-lui.d: New test. * testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test. * testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test. * testsuite/gas/mips/mips16e2@lui-2.d: New test. * testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output. * testsuite/gas/mips/mips16e2-imm-error.l: New stderr output. * testsuite/gas/mips/mips16e2@lui-2.l: New stderr output. * testsuite/gas/mips/mips16e2.s: New test source. * testsuite/gas/mips/mips16e2-mt.s: New test source. * testsuite/gas/mips/mips16e2-sub.s: New test source. * testsuite/gas/mips/mips16e2-mt-sub.s: New test source. * testsuite/gas/mips/mips16e2-hilo.s: New test source. * testsuite/gas/mips/mips16e2-reloc-error.s: New test source. * testsuite/gas/mips/mips16e2-imm-error.s: New test source. * testsuite/gas/mips/elf-rel9-mips16e2.s: New test source. * testsuite/gas/mips/mips16e2-lui.s: New test source. * testsuite/gas/mips/mips.exp: Expand `mips32r2-sync', `mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2 architectures. Run the new tests. commit 70ab592fbae1725ac576012dd1242328e20e664a Author: Maciej W. Rozycki Date: Mon May 15 13:40:50 2017 +0100 MIPS16e2: Add MIPS16e2 ASE GAS test infrastructure Define a new 32-bit and 64-bit MIPS16e2 test architecture and adjust existing tests now run against these architectures accordingly. gas/ * testsuite/gas/mips/mips.exp (run_dump_test_arch): Add `mips16e2@' prefix. (run_list_test_arch): Likewise. (mips16e2-32, mips16e2-64): New architectures. * testsuite/gas/mips/mips16e2-32@mips16-macro.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-macro-t.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-macro-e.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-insn-t.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-insn-e.d: New test. * testsuite/gas/mips/mips16e2-32@mips16e-64.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-sub.d: New test. * testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d: New test. * testsuite/gas/mips/mips16e2@relax-swap3.d: New test. * testsuite/gas/mips/mips16-32@mips16-asmacro.d: Remove `source' tag. Add `-I$srcdir/$subdir' to `as' flags. * testsuite/gas/mips/mips16-64@mips16-asmacro.d: Likewise. * testsuite/gas/mips/mips16e2-32@mips16-macro.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-macro-t.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-macro-e.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-insn-t.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-insn-e.l: New stderr output. * testsuite/gas/mips/mips16-sub.s: Add `.set nomips16e2'. * testsuite/gas/mips/mips16e-sub.s: Likewise. * testsuite/gas/mips/mips16e-64-sub.s: Likewise. * testsuite/gas/mips/mips16-asmacro.s: Remove `.set mips32'. * testsuite/gas/mips/mips16-32@mips16-asmacro.s: New test source. * testsuite/gas/mips/mips16-64@mips16-asmacro.s: New test source. commit 25499ac7ee92bca177c9436383ee167d6a220066 Author: Maciej W. Rozycki Date: Mon May 15 13:26:01 2017 +0100 MIPS16e2: Add MIPS16e2 ASE support Add MIPS16e2 ASE support as per the architecture specification[1], including in particular: 1. A new ELF ASE flag to mark MIPS16e2 binaries. 2. MIPS16e2 instruction assembly support, including a relaxation update to use LUI rather than an LI/SLL instruction pair for loading the high part of 32-bit addresses. 3. MIPS16e2 instruction disassembly support, including updated rules for extended forms of instructions that are now subdecoded and therefore do not alias to the original MIPS16 ISA revision instructions even for encodings that are not valid in the MIPS16e2 instruction set. Add `-mmips16e2' and `-mno-mips16e2' GAS command-line options and their corresponding `mips16e2' and `no-mips16e2' settings for the `.set' and `.module' pseudo-ops. Control the availability of the MT ASE subset of the MIPS16e2 instruction set with a combination of these controls and the preexisting MT ASE controls. Parts of this change by Matthew Fortune and Andrew Bennett. References: [1] "MIPS32 Architecture for Programmers: MIPS16e2 Application-Specific Extension Technical Reference Manual", Imagination Technologies Ltd., Document Number: MD01172, Revision 01.00, April 26, 2016 include/ * elf/mips.h (AFL_ASE_MIPS16E2): New macro. (AFL_ASE_MASK): Adjust accordingly. * opcode/mips.h: Document new operand codes defined. (mips_operand_type): Add OP_REG28 enum value. (INSN2_SHORT_ONLY): Update description. (ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros. bfd/ * elfxx-mips.c (print_mips_ases): Handle MIPS16e2 ASE. opcodes/ * mips-dis.c (mips_arch_choices): Add ASE_MIPS16E2 and ASE_MIPS16E2_MT flags to the unnamed MIPS16 entry. (mips_convert_abiflags_ases): Handle the AFL_ASE_MIPS16E2 flag. (print_insn_arg) : Add handler. (validate_insn_args) : Handle. (print_mips16_insn_arg): Handle MIPS16 instructions that require 32-bit encoding and 9-bit immediates. (print_insn_mips16): Handle MIPS16 instructions that require 32-bit encoding and MFC0/MTC0 operand decoding. * mips16-opc.c (decode_mips16_operand) <'>', '9', 'G', 'N', 'O'> <'Q', 'T', 'b', 'c', 'd', 'r', 'u'>: Add handlers. (RD_C0, WR_C0, E2, E2MT): New macros. (mips16_opcodes): Add entries for MIPS16e2 instructions: GP-relative "addiu" and its "addu" spelling, "andi", "cache", "di", "ehb", "ei", "ext", "ins", GP-relative "lb", "lbu", "lh", "lhu", and "lw" instructions, "ll", "lui", "lwl", "lwr", "mfc0", "movn", "movtn", "movtz", "movz", "mtc0", "ori", "pause", "pref", "rdhwr", "sc", GP-relative "sb", "sh" and "sw" instructions, "swl", "swr", "sync" and its "sync_acquire", "sync_mb", "sync_release", "sync_rmb" and "sync_wmb" aliases, "xori", "dmt", "dvpe", "emt" and "evpe". Add split regular/extended entries for original MIPS16 ISA revision instructions whose extended forms are subdecoded in the MIPS16e2 ISA revision: "li", "sll" and "srl". binutils/ * readelf.c (print_mips_ases): Handle MIPS16e2 ASE. * NEWS: Mention MIPS16e2 ASE support. gas/ * config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `e2' flag. (RELAX_MIPS16_E2): New macro. (RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO) (RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT) (RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT) (RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED) (RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED) (RELAX_MIPS16_MARK_ALWAYS_EXTENDED) (RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED, RELAX_MIPS16_MACRO) (RELAX_MIPS16_MARK_MACRO, RELAX_MIPS16_CLEAR_MACRO): Shift bits. (mips16_immed_extend): New prototype. (options): Add OPTION_MIPS16E2 and OPTION_NO_MIPS16E2 enum values. (md_longopts): Add "mmips16e2" and "mno-mips16e2" options. (mips_ases): Add "mips16e2" entry. (mips_set_ase): Handle MIPS16e2 ASE. (insn_insert_operand): Explicitly handle immediates with MIPS16 instructions that require 32-bit encoding. (is_opcode_valid_16): Pass enabled ASE bitmask on to `opcode_is_member'. (validate_mips_insn): Explicitly handle immediates with MIPS16 instructions that require 32-bit encoding. (operand_reg_mask) : Add handler. (match_reg28_operand): New function. (match_operand) : Add handler. (append_insn): Pass ASE_MIPS16E2 setting to RELAX_MIPS16_ENCODE. (match_mips16_insn): Handle MIPS16 instructions that require 32-bit encoding and `V' and `u' operand codes. (mips16_ip): Allow any characters except from `.' in opcodes. (mips16_immed_extend): Handle 9-bit immediates. Do not shuffle immediates whose width is not one of these listed. (md_estimate_size_before_relax): Handle MIPS16e2 relaxation. (mips_relax_frag): Likewise. (md_convert_frag): Likewise. (mips_convert_ase_flags): Handle MIPS16e2 ASE. * doc/as.texinfo (Target MIPS options): Add `-mmips16e2' and `-mno-mips16e2' options. (-mmips16e2, -mno-mips16e2): New options. * doc/c-mips.texi (MIPS Options): Add `-mmips16e2' and `-mno-mips16e2' options. (MIPS ASE Instruction Generation Overrides): Add `.set mips16e2' and `.set nomips16e2'. commit 20c59b843a90300e5f9e07add83f5c72c8f994a6 Author: Maciej W. Rozycki Date: Mon May 15 13:21:01 2017 +0100 MIPS16/GAS: Improve [32768,65535] out-of-range operand error diagnostics Improve out-of-range operand error diagnostics for invalid values in the [32768,65535] range used for a signed 16-bit immediate, making the message consistent with that used for other invalid values, e.g.: foo.s:1: Error: operand 2 must be an immediate expression `addiu $2,$gp,32768' foo.s:2: Error: invalid operands `lw $2,32768($gp)' vs: foo.s:3: Error: operand 3 out of range `addiu $2,$gp,-32769' foo.s:4: Error: operand 2 out of range `lw $2,-32769($gp)' This case does not currently trigger however, for two reasons. First, for regular MIPS and microMIPS assembly in the case of no match caused by `match_int_operand' here, the function is always called again from `mips_ip' via `match_insns', `match_insn' and then `match_operand' for the same opcode table's entry with `lax_match' set to TRUE, in which case the attempt to match succeeds and no error is issued. Second, in the case of MIPS16 assembly no call to `match_int_operand' is made at all for signed 16-bit immediates, because such immediates are currently only matched with extensible instructions, and these are handled in `match_mips16_insn' via `match_expression' directly rather than via `match_operand'. This will change for MIPS16 code with MIPS16e2 support introduced, where non-extensible instructions accepting signed 16-bit immediates will be added, so make the case work well right from the start: foo.s:1: Error: operand 3 out of range `addiu $2,$gp,32768' foo.s:2: Error: operand 2 out of range `lw $2,32768($gp)' gas/ * config/tc-mips.c (match_int_operand): Call `match_out_of_range' before returning failure for 0x8000-0xffff values conditionally allowed. commit 602b88e3ab372729b53d130068f069dd363032db Author: Maciej W. Rozycki Date: Mon May 15 13:19:20 2017 +0100 MIPS16/GAS: Improve non-constant operand error diagnostics Improve operand error diagnostics for non-constant expressions used for a 16-bit immediate, making the message more descriptive and indicating the offending operand, e.g.: foo.s:1: Error: invalid operands `lui $2,foo-bar' will show as: foo.s:1: Error: operand 2 must be constant `lui $2,foo-bar' This case does not currently trigger however, for two reasons. First, for regular MIPS and microMIPS assembly in the case of no match caused by `match_int_operand' here, the function is always called again from `mips_ip' via `match_insns', `match_insn' and then `match_operand' for the same opcode table's entry with `lax_match' set to TRUE, in which case the attempt to match succeeds and no error is issued. Second, in the case of MIPS16 assembly no call to `match_int_operand' is made at all for 16-bit immediates, because such immediates are currently only matched with extensible instructions, and these are handled in `match_mips16_insn' via `match_expression' directly rather than via `match_operand'. This will change for MIPS16 code with MIPS16e2 support introduced, where non-extensible instructions accepting 16-bit immediates will be added, so make the case work well right from the start. gas/ * config/tc-mips.c (match_int_operand): Call `match_not_constant' before returning failure for a non-constant 16-bit immediate conditionally allowed. commit c96425c560d640df9c416ff4e6a8c49c1f3b1119 Author: Maciej W. Rozycki Date: Mon May 15 13:17:18 2017 +0100 MIPS/GAS: Improve bignum operand error diagnostics Improve bignum operand error diagnostics for cases where a constant would be accepted and report them as range errors, also indicating the offending operand and instruction, e.g.: $ cat bignum.s addiu $2, 0x10000000000000000 break 0x10000000000000000 $ as -o bignum.o bignum.s bignum.s:1: Error: bignum invalid bignum.s:2: Error: operand 1 must be constant `break 0x10000000000000000' $ now show as: $ as -o bignum.o bignum.s bignum.s:1: Error: operand 2 out of range `addiu $2,0x10000000000000000' bignum.s:2: Error: operand 1 out of range `break 0x10000000000000000' $ gas/ * config/tc-mips.c (match_const_int): Call `match_out_of_range' rather than `match_not_constant' for unrelocated operands retrieved as an `O_big' expression. (match_int_operand): Call `match_out_of_range' for relocatable operands retrieved as an `O_big' expression. (match_mips16_insn): Call `match_out_of_range' for relaxable operands retrieved as an `O_big' expression. * testsuite/gas/mips/addiu-error.d: New test. * testsuite/gas/mips/mips16@addiu-error.d: New test. * testsuite/gas/mips/micromips@addiu-error.d: New test. * testsuite/gas/mips/break-error.d: New test. * testsuite/gas/mips/lui-1.l: Adjust error message. * testsuite/gas/mips/addiu-error.l: New stderr output. * testsuite/gas/mips/mips16@addiu-error.l: New stderr output. * testsuite/gas/mips/micromips@addiu-error.l: New stderr output. * testsuite/gas/mips/break-error.l: New stderr output. * testsuite/gas/mips/addiu-error.s: New test source. * testsuite/gas/mips/break-error.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. commit 1a7bf198b67c4b99e9adeaeba38c6874ec354c12 Author: Maciej W. Rozycki Date: Mon May 15 13:13:41 2017 +0100 MIPS16/GAS: Improve non-immediate operand error diagnostics Improve non-immediate operand error diagnostics for extensible MIPS16 instructions and make it match corresponding regular MIPS and microMIPS handling, e.g: $ cat addiu.s addiu $4, $3, $2 $ as -o addiu.o addiu.s addiu.s: Assembler messages: addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2' $ as -mips16 -o addiu.o addiu.s addiu.s: Assembler messages: addiu.s:1: Error: invalid operands `addiu $4,$3,$2' $ To do so observe that for extensible MIPS16 instructions and a non-PC relative operand this case is handled by an explicit OT_INTEGER check in `match_mips16_insn' returning a failure right away and consequently preventing a call to `match_expression' from being made. As from commit d436c1c2e889 ("Improve error reporting for register expressions"), , however the check has become redundant as `match_expression' now only ever returns success for OT_INTEGER argument tokens, and a special case of an OT_CHAR `(' token already handled by `match_mips16_insn' just ahead of the `match_expression' call. Previously it also returned success for OT_REG argument tokens. Let the call to `match_expression' always happen then, yielding the same failure for the affected cases, however with more accurate diagnostics provided by the call making reporting consistent: $ as -mips16 -o addiu.o addiu.s addiu.s: Assembler messages: addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2' $ gas/ * config/tc-mips.c (match_mips16_insn): Remove the explicit OT_INTEGER check before the `match_expression' call. * testsuite/gas/mips/mips16-insn-e.l: Adjust messages. * testsuite/gas/mips/mips16-32@mips16-insn-e.l: Likewise. * testsuite/gas/mips/mips16-64@mips16-insn-e.l: Likewise. * testsuite/gas/mips/mips16e-32@mips16-insn-e.l: Likewise. * testsuite/gas/mips/mips16-reg-error.d: New test. * testsuite/gas/mips/mips16-reg-error.l: New stderr output. * testsuite/gas/mips/mips16-reg-error.s: New test source. * testsuite/gas/mips/mips.exp: Run the new test. commit e295202f606accec7623c961997a295a8e680247 Author: Maciej W. Rozycki Date: Mon May 15 13:09:37 2017 +0100 MIPS16/GAS: Improve disallowed relocation operand error diagnostics Improve disallowed relocation operand error diagnostics for MIPS16 code and make it match corresponding regular MIPS and microMIPS handling, e.g: $ cat sltu.s sltu $2, %lo(foo) $ as -o sltu.o sltu.s sltu.s: Assembler messages: sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)' $ as -mips16 -o sltu.o sltu.s sltu.s: Assembler messages: sltu.s:1: Error: invalid operands `sltu $2,%lo(foo)' $ To do so call `match_not_constant' from `match_mips16_insn' whenever a disallowed relocation operation has been noticed, like `match_const_int' does, making reporting consistent: $ as -mips16 -o sltu.o sltu.s sltu.s: Assembler messages: sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)' $ gas/ * config/tc-mips.c (match_mips16_insn): Call `match_not_constant' for a disallowed relocation operation. * testsuite/gas/mips/mips16-reloc-error.d: New test. * testsuite/gas/mips/mips16-reloc-error.l: New stderr output. * testsuite/gas/mips/mips16-reloc-error.s: New test source. * testsuite/gas/mips/mips.exp: Run the new test. commit c76081bc874d7d41eb6f41ea79a4ac0f906467d0 Author: Maciej W. Rozycki Date: Mon May 15 13:06:54 2017 +0100 MIPS/GAS/testsuite: Convert LUI list tests to dump tests gas/ * testsuite/gas/mips/lui-1.d: New test. * testsuite/gas/mips/lui-2.d: New test. * gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests into the new tests. commit fdfb475260daf591d05407ea7affa39122a5b7f6 Author: Maciej W. Rozycki Date: Mon May 15 13:04:19 2017 +0100 MIPS/opcodes: Remove an incorrect MT ASE reference in MFC0/MTC0 decoding The `sel' operand of CP0 move instructions is a part of the base ISA and has nothing to do with the MT ASE. opcodes/ * mips-dis.c (print_insn_args) : Remove an MT ASE reference in CP0 move operand decoding. commit a54d5f8bb3eb4772a94779a5d37b644aeee72bca Author: Maciej W. Rozycki Date: Mon May 15 13:02:16 2017 +0100 MIPS/GAS: Update `match_const_int' description Remove a stale reference to FALLBACK parameter from the description of `match_const_int', matching commit 1a00e61226b3 ("Remove soft_match"), . gas/ * config/tc-mips.c (match_const_int): Update description. commit 32035f5151b6ec76af0b62d9db8774b76eddc091 Author: Maciej W. Rozycki Date: Mon May 15 12:47:26 2017 +0100 MIPS/GAS/doc: Refer to `.module' rather than `.set' Complement commit 919731affbef ("Add MIPS .module directive") and update the GAS manual to refer to the `.module' rather than `.set' directive in command-line option descriptions, following an observation that unlike `.set' and like the respective command-line option the use of the `.module' directive affects the ISA and ASE flags recorded in the object file produced, and therefore it is `.module' rather than `.set' that corresponds to the respective command-line option. gas/ * doc/as.texinfo (-mips16, -no-mips16): Refer to `.module mips16' rather than `.set mips16'. (-mmicromips, -mno-micromips): Refer to `.module micromips' and `.module nomicromips' rather than `.set micromips' and `.set nomicromips'. (-msmartmips, -mno-smartmips): Refer to `.module smartmips' rather than `.set smartmips'. * doc/c-mips.texi (MIPS Options): Refer to `.module mips16', `.module micromips', `.module nomicromips' and `.module smartmips' rather than `.set mips16', `.set micromips', `.set nomicromips' and `.set smartmips' respectively. commit 5f2ad7a3c73fcec0a7891794eb5aade73bac8523 Author: Rainer Orth Date: Mon May 15 14:43:15 2017 +0200 Fix gdb procfs.c compilation on Solaris Prompted by the creation of the gdb 8.0 branch, I tried to build it on x86_64-pc-solaris2.12, but failed: /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c: In function `target_ops* procfs_target()': /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:186:27: error: invalid conversion from `void (*)(target_ops*, char*, char*, char**, int)' to `void (*)(target_ops*, const char*, const string&, char**, int) {aka void (*)(target_ops*, const char*, const std::__cxx11::basic_string&, char**, int)}' [-fpermissive] t->to_create_inferior = procfs_create_inferior; ^~~~~~~~~~~~~~~~~~~~~~ /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c: At global scope: /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:125:13: warning: `void procfs_create_inferior(target_ops*, char*, char*, char**, int)' declared `static' but never defined [-Wunused-function] static void procfs_create_inferior (struct target_ops *, char *, ^~~~~~~~~~~~~~~~~~~~~~ /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:4529:1: warning: `void procfs_create_inferior(target_ops*, const char*, const string&, char**, int)' defined but not used [-Wunused-function] procfs_create_inferior (struct target_ops *ops, const char *exec_file, ^~~~~~~~~~~~~~~~~~~~~~ This can easily be fixed by the following patch. * procfs.c (procfs_create_inferior): Change prototype to match definition. commit 786e3eba7915df35df1d98a300e06f757336c75b Author: Nick Clifton Date: Mon May 15 13:12:49 2017 +0100 Add .debug_gdb_scripts section to PE linker scripts. PR ld/21459 * scripttempl/pe.sc: Add .debug_gdb_scripts section. * scripttempl/pep.sc: Likewise. commit fba2af917d78bb1d8ef0d508b9246ad32fed1afd Author: GDB Administrator Date: Mon May 15 00:00:38 2017 +0000 Automatic date update in version.in commit cd85e51ad3921eabd7030974ce375123a0848cce Author: John David Anglin Date: Sun May 14 16:06:06 2017 -0400 Fix match and mask for 64-bit bb opcode. commit 097eb00398891370779bb6562965bcdf357a292f Author: GDB Administrator Date: Sun May 14 00:00:28 2017 +0000 Automatic date update in version.in commit 67f46fed806465c005b15c97d33947f4c0abb25c Author: James Clarke Date: Sat May 13 08:01:15 2017 -0700 Fix assertion failure relaxing TLS for position-independent executables. gold/ PR gold/21444 * gold.cc (Target_sparc::Relocate::relocate_tls): Local variables are final for position-independent executables. This has to be consistent with Target_sparc::Scan::local otherwise they will disagree as to whether local-exec is used. commit adf3dde510088ef8dc46d04df05baf36adb0ed1e Author: Eli Zaretskii Date: Sat May 13 11:10:00 2017 +0300 Avoid compiler warning in MinGW build gdb: 2017-05-13 Eli Zaretskii * tui/tui.c (tui_enable): Cast "unknown" to 'char *' to avoid a C++ compiler warning. commit c0c05aad81ef32899e809570c18932bcfb588009 Author: GDB Administrator Date: Sat May 13 00:00:51 2017 +0000 Automatic date update in version.in commit 6bf56e7482e220ff98655b5285736a37dd602c17 Author: Igor Kudrin Date: Fri May 12 15:24:32 2017 -0700 Fix misplacement of a relaxed section on AArch64. gold/ChangeLog PR gold/21430 * aarch64.cc (AArch64_relobj::convert_input_section_to_relaxed_section): Set the section offset to -1ULL. (Target_aarch64::relocate_section): Adjust the view in case of a relaxed input section. * testsuite/Makefile.am (pr21430): New test. * testsuite/Makefile.in: Regenerate * testsuite/pr21430.s: New test source file. * testsuite/pr21430.sh: New test script. commit 73caa85d4a97eb991e581ccba3ff4eccce5e2e1d Author: H.J. Lu Date: Fri May 12 08:07:21 2017 -0700 x86: Merge X86_ISA_1_USED/X86_ISA_1_NEEDED properties If there are more than GNU property note in an input, we should merge X86_ISA_1_USED and X86_ISA_1_NEEDED properties. bfd/ * elf32-i386.c (elf_i386_parse_gnu_properties): Merge GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_ISA_1_NEEDED properties. * elf64-x86-64.c (elf_x86_64_parse_gnu_properties): Likewise. ld/ * testsuite/ld-i386/i386.exp: Run property-x86-3. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-i386/property-x86-3.d: New file. * testsuite/ld-i386/property-x86-3.s: Likewise. * testsuite/ld-x86-64/property-x86-3.d: Likewise. * testsuite/ld-x86-64/property-x86-3.s: Likewise. commit 6830f270e7b6676e7a77c1b8080941e35003d918 Author: Tom Tromey Date: Thu May 11 22:22:36 2017 -0600 Avoid exponential behavior in rust_evaluate_subexp The STRUCTOP_STRUCT case in rust_evaluate_subexp would evaluate its LHS, and then, if it did not need Rust-specific treatment, it would back up and re-evaluate the entire STRUCTOP_STRUCT part of the expression using evaluate_subexp_standard. This yields exponential behavior and causes some expressions to evaluate extremely slowly. The fix is to simply do the needed work inline. This is PR rust/21483. ChangeLog 2017-05-12 Tom Tromey PR rust/21483: * rust-lang.c (rust_evaluate_subexp) : Don't recurse, just call value_struct_elt directly. commit 68f2f2e308a8585c39ddb2f391a9ae8d779c5029 Author: Tom Tromey Date: Thu May 11 19:50:47 2017 -0600 Fix rust_dump_subexp_body rust_dump_subexp_body was not correct in a couple of cases. While debugging the bug I was really interested in, this caused a crash. This patch fixes the problems. No test case because, IIRC there generally aren't tests for expression dumping. ChangeLog 2017-05-12 Tom Tromey * rust-lang.c (rust_dump_subexp_body) : Fix. commit 256afbc259c1e22fafba601a27cf3c8d7bdde417 Author: Tom Tromey Date: Thu May 11 19:44:43 2017 -0600 Replace "return" with "break" This replaces a "return" with a "break" in rust_print_subexp, for consistency. ChangeLog 2017-05-12 Tom Tromey * rust-lang.c (rust_print_subexp): Replace "return" with "break". commit be3f1006743f04f0b133de7fa8085a3e4c49b193 Author: Maciej W. Rozycki Date: Fri May 12 02:28:54 2017 +0100 MIPS/GAS: Unify GP-relative percent-ops For a reason that is unclear commit d6f165938798 ("Support for MIPS16 HI16/LO16 relocations"), , which has added support for the R_MIPS16_GPREL relocation, has spelled its corresponding MIPS16 percent-op as `%gprel', rather than `%gp_rel' which is how its regular MIPS counterpart is spelled. To make assembly code sharing easier between the regular MIPS and the MIPS16 ISA make both percent-op spellings acceptable in both kinds of code now. Parts of this change by Matthew Fortune. gas/ * config/tc-mips.c (mips_percent_op): Add "%gprel". (mips16_percent_op): Add "%gp_rel". * testsuite/gas/mips/elf-rel8.s:: Add `%gprel' forms. * testsuite/gas/mips/elf-rel8-mips16.s: Add `%gp_rel' forms. * testsuite/gas/mips/elf-rel8.d: Adjust accordingly. * testsuite/gas/mips/elf-rel8-mips16.d: Likewise. commit a4f89915135f6760917c01dc783de5b674234d84 Author: Maciej W. Rozycki Date: Fri May 12 01:09:36 2017 +0100 MIPS16/opcodes: Make the handling of BREAK and SDBBP consistent Disassemble the MIPS16 BREAK and SDBBP instruction's immediate operand in the hexadecimal rather than decimal numeral system and add respective operandless variants with an implicit 0 operand, making our handling of these instructions consistent with how we have processed their regular MIPS and microMIPS counterparts since forever. opcodes/ * mips16-opc.c (decode_mips16_operand) <'6'>: Switch the operand type to hexadecimal. (mips16_opcodes): Add operandless "break" and "sdbbp" entries. binutils/ * testsuite/binutils-all/mips/mips16-extend-insn.d: Adjust BREAK and SDBBP disassembly. gas/ * testsuite/gas/mips/mips16.d: Adjust BREAK disassembly. * testsuite/gas/mips/mips16-64@mips16.d: Likewise. * testsuite/gas/mips/mips16-64.d: Likewise. * testsuite/gas/mips/mips16-64@mips16-64.d: Likewise. * testsuite/gas/mips/mips16-macro.d: Likewise. * testsuite/gas/mips/mips16-64@mips16-macro.d: Likewise. * testsuite/gas/mips/mips16-sub.d: Likewise. * testsuite/gas/mips/mips16-32@mips16-sub.d: Likewise. commit de428bc53335d88c21eda38a823d5a4008468e52 Author: GDB Administrator Date: Fri May 12 00:00:43 2017 +0000 Automatic date update in version.in commit 99e2d67a0edd1a8feca82036feb93709fee488fa Author: Maciej W. Rozycki Date: Fri May 12 00:46:45 2017 +0100 MIPS/opcodes: Mark descriptive SYNC mnemonics as aliases Following the way how descriptive SYNC mnemonics have been defined in the architecture[1][2] mark them as aliases, so that the generic SYNC instruction can be alternatively disassembled along with its immediate operand, as noted in the documents referred. References: [1] "MIPS Architecture For Programmers, Volume II-A: The MIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00086, Revision 5.04, December 11, 2013, Table 4.7 "Encodings of the Bits[10:6] of the SYNC instruction; the SType Field", p. 305 [2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00582, Revision 5.04, January 15, 2014, Table 5.28 "Encodings of the Bits[10:6] of the SYNC instruction; the SType Field", p. 481 opcodes/ * mips-opc.c (mips_builtin_opcodes): Mark "synciobdma", "syncs", "syncw", "syncws", "sync_acquire", "sync_mb", "sync_release", "sync_rmb" and "sync_wmb" as aliases. * micromips-opc.c (micromips_opcodes): Mark "sync_acquire", "sync_mb", "sync_release", "sync_rmb" and "sync_wmb" as aliases. gas/ * testsuite/gas/mips/mips32r2-sync-1.d: New test. * testsuite/gas/mips/micromips@mips32r2-sync-1.d: New test. * testsuite/gas/mips/mips.exp: Run the new tests. commit f2c29a169242d0c564afb46ecaf160422b28bfbb Author: H.J. Lu Date: Thu May 11 11:26:26 2017 -0700 x86-64: Rename .plt.bnd to .plt.sec Rename .plt.bnd to .plt.sec to indicate that this is used as the second PLT section. There is no change in run-time behavior. We also scan the .plt.sec section to synthesize PLT symbols. bfd/ * elf64-x86-64.c (elf_x86_64_link_hash_entry): Rename plt_bnd to plt_second. (elf_x86_64_link_hash_table): Rename plt_bnd/plt_bnd_eh_frame to plt_second/plt_second_eh_frame. (elf_x86_64_link_hash_newfunc): Updated. (elf_x86_64_allocate_dynrelocs): Likewise. (elf_x86_64_size_dynamic_sections): Likewise. (elf_x86_64_relocate_section): Likewise. (elf_x86_64_finish_dynamic_symbol): Likewise. (elf_x86_64_finish_dynamic_sections): Likewise. (elf_x86_64_plt_type): Rename plt_bnd to plt_second. (elf_x86_64_get_synthetic_symtab): Updated. Also scan the .plt.sec section. (elf_backend_setup_gnu_properties): Updated. Create the .plt.sec section instead of the .plt.sec section. ld/ * emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): Replace .plt.bnd with .plt.sec. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. * testsuite/ld-x86-64/mpx3.dd: Likewise. * testsuite/ld-x86-64/mpx3n.dd: Likewise. * testsuite/ld-x86-64/mpx4.dd: Likewise. * testsuite/ld-x86-64/mpx4n.dd: Likewise. * testsuite/ld-x86-64/plt-main-bnd-now.rd: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038b.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise. commit dc2be3d2f6de530aac40983e79e29e050f40e759 Author: H.J. Lu Date: Thu May 11 07:42:30 2017 -0700 x86: Generate PLT relocations for -z now This patch partially reverses: commit 25070364b0ce33eed46aa5d78ebebbec6accec7e Author: H.J. Lu Date: Sat May 16 07:00:21 2015 -0700 Don't generate PLT relocations for now binding to support LD_AUDIT and LD_PROFILE with -z now. If there is an existing GOT relocation, it is still used to avoid PLT relocation against the same function symbol. bfd/ * elf32-i386.c (elf_i386_allocate_dynrelocs): Partially revert commit 25070364b0ce33eed46aa5d78ebebbec6accec7e. * elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewse. ld/ * testsuite/ld-i386/plt-pic2.dd: Updated. * testsuite/ld-i386/plt2.dd: Likewise. * testsuite/ld-i386/plt2.rd: Likewise. * testsuite/ld-i386/pr17689now.rd: Likewise. * testsuite/ld-ifunc/ifunc-16-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-16-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-i386-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/plt2.dd: Likewise. * testsuite/ld-x86-64/plt2.rd: Likewise. * testsuite/ld-x86-64/pr17689now.rd: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. commit f96f371cbb33454544a9f1827c239c4375f0b60e Author: GDB Administrator Date: Thu May 11 00:00:48 2017 +0000 Automatic date update in version.in commit 7f401e8417160ba5cdad60a38c8a3cbce395a5c5 Author: Maciej W. Rozycki Date: Wed May 10 20:14:11 2017 +0100 MIPS/GAS/testsuite: Convert ISA override list tests to dump tests And remove the zillion duplicate sources. Also `mips1@isa-override-2.l' is the same as `r3000@isa-override-2.l', so remove the latter too, now that `r3000@isa-override-2.d' can name a file to match stderr output against. gas/ * testsuite/gas/mips/isa-override-2.d: New test. * testsuite/gas/mips/mips1@isa-override-2.d: New test. * testsuite/gas/mips/r3000@isa-override-2.d: New test. * testsuite/gas/mips/r3900@isa-override-2.d: New test. * testsuite/gas/mips/mips2@isa-override-2.d: New test. * testsuite/gas/mips/mips32@isa-override-2.d: New test. * testsuite/gas/mips/mips32r2@isa-override-2.d: New test. * testsuite/gas/mips/mips32r3@isa-override-2.d: New test. * testsuite/gas/mips/mips32r5@isa-override-2.d: New test. * testsuite/gas/mips/mips32r6@isa-override-2.d: New test. * testsuite/gas/mips/octeon3@isa-override-2.d: New test. * testsuite/gas/mips/r3000@isa-override-2.l: Remove list test. * testsuite/gas/mips/mips1@isa-override-2.s: Remove test source. * testsuite/gas/mips/r3000@isa-override-2.s: Remove test source. * testsuite/gas/mips/r3900@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips2@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32r2@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32r3@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32r5@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32r6@isa-override-2.s: Remove test source. * testsuite/gas/mips/octeon3@isa-override-2.s: Remove test source. * gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests into the new tests. commit 40e5240e1f32b1cc36c45551eb3f59253c40f317 Author: Maciej W. Rozycki Date: Wed May 10 19:03:15 2017 +0100 MIPS/binutils/testsuite: Define names of temporary files Define `tempfile' and `copyfile' in `mips.exp' so that standalone script execution via `RUNTESTFLAGS=mips.exp' works rather than producing: Running .../binutils/testsuite/binutils-all/mips/mips.exp ... ERROR: tcl error sourcing .../binutils/testsuite/binutils-all/mips/mips.exp. ERROR: can't read "tempfile": no such variable while executing "binutils_assemble_flags ${srcfile} $tempfile $opts(as)" (procedure "run_dump_test" line 207) invoked from within "run_dump_test "mips-ase-1"" invoked from within "if [is_elf_format] { run_dump_test "mips-ase-1" run_dump_test "mips-ase-2" run_dump_test "mips-ase-3" run_dump_test "mixed-mips16" ..." (file ".../binutils/testsuite/binutils-all/mips/mips.exp" line 22) invoked from within "source .../binutils/testsuite/binutils-all/mips/mips.exp" ("uplevel" body line 1) invoked from within "uplevel #0 source .../binutils/testsuite/binutils-all/mips/mips.exp" invoked from within "catch "uplevel #0 source $test_file_name"" testcase .../binutils/testsuite/binutils-all/mips/mips.exp completed in 0 seconds binutils/ * testsuite/binutils-all/mips/mips.exp: Define `tempfile' and `copyfile' variables. commit 5d69120bfff3e532242083acd636dc68f23ea831 Author: H.J. Lu Date: Wed May 10 10:51:35 2017 -0700 i386: Set CHECK_RELOCS_AFTER_OPEN_INPUT to yes All linker targets based on elf32-i386 should check relocations after opening all inputs since this is how elf32-i386 works. * emulparams/i386lynx.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Set to yes. * emulparams/i386moss.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386nw.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. commit 9fc1813479e1518197949105c3f34da8c2e30984 Author: Maciej W. Rozycki Date: Wed May 10 18:19:56 2017 +0100 MIPS/GAS/testsuite: Correct swapped MIPS16e subset test names Correct the test names swapped between common and 64-bit MIPS16e subset tests. gas/ * testsuite/gas/mips/mips16e-sub.d: Correct test name. * testsuite/gas/mips/mips16-32@mips16e-sub.d: Likewise. * testsuite/gas/mips/mips16-64@mips16e-sub.d: Likewise. * testsuite/gas/mips/mips16e-64-sub.d: Likewise. * testsuite/gas/mips/mips16-32@mips16e-64-sub.d: Likewise. * testsuite/gas/mips/mips16-64@mips16e-64-sub.d: Likewise. * testsuite/gas/mips/mips16e-32@mips16e-64-sub.d: Likewise. commit db84b98a160d20f30dbdae3e3405cfb0fa680fbd Author: Jose E. Marchesi Date: Wed May 10 18:44:19 2017 +0200 bfd: fix the deletion of relocs in sparc64 This patch fixes the deletion of relocations in BFD sections in sparc64 targets. A specialized `_bfd_set_reloc' function is provided that updates the internal canon_reloc_count(sec) counter instead of sec->reloc_count. Additionally, the `write_relocs' callback in elf64-sparc is adapted to use the canon_reloc_count to traverse `sec->orelocation'. Tested in sparc64-linux-gnu targets. Fixes an existing failure in the merge-notes objcopy test. No regressions. bfd/ChangeLog: 2017-05-10 Jose E. Marchesi * elf64-sparc.c (elf64_sparc_set_reloc): New function. (bfd_elf64_set_reloc): Define. (elf64_sparc_write_relocs): Use `canon_reloc_count'. commit 2318686590bd252a47f494554dfc11bc18a3e58b Author: Jose E. Marchesi Date: Wed May 10 18:40:04 2017 +0200 bfd: new BFD target entry point _bfd_set_reloc. This patch adds a new entry point to the BFD_JUMP_TABLE_RELOCS. The previous common implementation `bfd_set_reloc', in bfd/bfd.c, has been moved to bfd/reloc.c with the name `_bfd_generic_set_reloc', and all BFD targets has been adapted to use it. This patch doesn't introduce any change on functionality, but prepares the ground for further work. bfd/ChangeLog: 2017-05-10 Jose E. Marchesi * targets.c (BFD_JUMP_TABLE_RELOCS): Add NAME##_set_reloc. (struct bfd_target): New field _bfd_set_reloc. * bfd.c (bfd_set_reloc): Call backend _set_bfd. * reloc.c (_bfd_generic_set_reloc): New function. * coffcode.h (coff_set_reloc): Define to _bfd_generic_set_reloc. * nlm-target.h (nlm_set_reloc): Likewise. * coff-rs6000.c (_bfd_xcoff_set_reloc): Likewise. * aout-tic30.c (MY_set_reloc): Likewise. * aout-target.h (MY_set_reloc): Likewise. * elfxx-target.h (bfd_elfNN_set_reloc): Likewise. * coff-alpha.c (_bfd_ecoff_set_reloc): Likewise. * mach-o-target.c (bfd_mach_o_set_reloc): Likewise. * vms-alpha.c (alpha_vms_set_reloc): Likewise. * aout-adobe.c (aout_32_set_reloc): Likewise. * bout.c (b_out_set_reloc): Likewise. * coff-mips.c (_bfd_ecoff_set_reloc): Likewise. * i386os9k.c (aout_32_set_reloc): Likewise. * ieee.c (ieee_set_reloc): Likewise. * oasys.c (oasys_set_reloc): Likewise. * som.c (som_set_reloc): Likewise. * versados.c (versados_set_reloc): Likewise. * coff64-rs6000.c (rs6000_xcoff64_vec): Add _bfd_generic_set_reloc. (rs6000_xcoff64_aix_vec): LIkewise. * libbfd.c (_bfd_norelocs_set_reloc): New function. * libbfd-in.h: Prototype for _bfd_norelocs_set_reloc. * i386msdos.c (msdos_set_reloc): Define to _bfd_norelocs_set_reloc. * elfcode.h (elf_set_reloc): Define. * bfd-in2.h: Regenerated. commit aab82f4c201a2612c0fb6d5b66d8e4ce2f036f1c Author: H.J. Lu Date: Wed May 10 09:28:00 2017 -0700 x86-64: Use .plt.bnd for IFUNC function address When -z bndplt is used, we must use the .plt.bnd entry for IFUNC function address. bfd/ PR ld/21481 * elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Use .plt.bnd for IFUNC function address. ld/ PR ld/21481 * testsuite/ld-x86-64/pr21481a.c: New file. * testsuite/ld-x86-64/pr21481b.S: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run PR ld/21481 tests. commit f78c0b915888ab388f9bdac826d7ac18dc944c28 Author: Maciej W. Rozycki Date: Wed May 10 14:37:21 2017 +0100 MIPS/GAS/testsuite: Remove stale `mips16-macro' list test output Complement commit c60aaac10f9a1 ("MIPS/GAS/testsuite: Extend MIPS16 testing over multiple ISAs") and remove a stale `mips16-macro' list test output replaced with the `mips16-32@mips16-macro' stderr output. gas/ * testsuite/gas/mips/mips16-macro.l: Remove list test. commit 58667758b1f907f8983d8a065333e3c38e311e88 Author: Maciej W. Rozycki Date: Wed May 10 14:17:19 2017 +0100 MIPS/GAS/testsuite: Remove last remnants of ECOFF support Complement commit 16e5e222b6ea ("Make gas/mips/mips.exp ELF-only"), , and commit fcedb9f3ca87 ("MIPS/GAS/testsuite: Remove remnants of a.out/ECOFF support"), and remove stale ECOFF test dumps previously missed. gas/ * testsuite/gas/mips/r3900@ecoff@ld.d: Remove test. * testsuite/gas/mips/mips2@ecoff@ld.d: Remove test. * testsuite/gas/mips/mips32@ecoff@ld.d: Remove test. * testsuite/gas/mips/mips32r2@ecoff@ld.d: Remove test. * testsuite/gas/mips/r3900@ecoff@ld-forward.d: Remove test. * testsuite/gas/mips/mips2@ecoff@ld-forward.d: Remove test. * testsuite/gas/mips/mips32@ecoff@ld-forward.d: Remove test. * testsuite/gas/mips/mips32r2@ecoff@ld-forward.d: Remove test. * testsuite/gas/mips/mips1@ecoff@sd.d: Remove test. * testsuite/gas/mips/r3000@ecoff@sd.d: Remove test. * testsuite/gas/mips/r3900@ecoff@sd.d: Remove test. * testsuite/gas/mips/mips2@ecoff@sd.d: Remove test. * testsuite/gas/mips/mips32@ecoff@sd.d: Remove test. * testsuite/gas/mips/mips32r2@ecoff@sd.d: Remove test. * testsuite/gas/mips/mips1@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/r3000@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/r3900@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/mips2@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/mips32@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/mips32r2@ecoff@sd-forward.d: Remove test. commit 53a346d8236aec06f1d3c767716d3340fb0aa013 Author: Claudiu Zissulescu Date: Wed May 10 14:42:22 2017 +0200 [ARC] Object attributes. gas/ 2017-05-10 Claudiu Zissulescu * testsuite/gas/arc/attr-arc600.d: New file. * testsuite/gas/arc/attr-arc600_mul32x16.d: Likewise. * testsuite/gas/arc/attr-arc600_norm.d: Likewise. * testsuite/gas/arc/attr-arc601.d: Likewise. * testsuite/gas/arc/attr-arc601_mul32x16.d: Likewise. * testsuite/gas/arc/attr-arc601_mul64.d: Likewise. * testsuite/gas/arc/attr-arc601_norm.d: Likewise. * testsuite/gas/arc/attr-arc700.d: Likewise. * testsuite/gas/arc/attr-arcem.d: Likewise. * testsuite/gas/arc/attr-archs.d: Likewise. * testsuite/gas/arc/attr-autodetect-1.d: Likewise. * testsuite/gas/arc/attr-autodetect-1.s: Likewise. * testsuite/gas/arc/attr-cpu-a601.d: Likewise. * testsuite/gas/arc/attr-cpu-a601.s: Likewise. * testsuite/gas/arc/attr-cpu-a700.d: Likewise. * testsuite/gas/arc/attr-cpu-a700.s: Likewise. * testsuite/gas/arc/attr-cpu-em.d: Likewise. * testsuite/gas/arc/attr-cpu-em.s: Likewise. * testsuite/gas/arc/attr-cpu-hs.d: Likewise. * testsuite/gas/arc/attr-cpu-hs.s: Likewise. * testsuite/gas/arc/attr-em.d: Likewise. * testsuite/gas/arc/attr-em4.d: Likewise. * testsuite/gas/arc/attr-em4_dmips.d: Likewise. * testsuite/gas/arc/attr-em4_fpuda.d: Likewise. * testsuite/gas/arc/attr-em4_fpus.d: Likewise. * testsuite/gas/arc/attr-hs.d: Likewise. * testsuite/gas/arc/attr-hs34.d: Likewise. * testsuite/gas/arc/attr-hs38.d: Likewise. * testsuite/gas/arc/attr-hs38_linux.d: Likewise. * testsuite/gas/arc/attr-mul64.d: Likewise. * testsuite/gas/arc/attr-name.d: Likewise. * testsuite/gas/arc/attr-name.s: Likewise. * testsuite/gas/arc/attr-nps400.d: Likewise. * testsuite/gas/arc/attr-override-mcpu.d: Likewise. * testsuite/gas/arc/attr-override-mcpu.s * testsuite/gas/arc/attr-quarkse_em.d: Likewise. * testsuite/gas/arc/blank.s: Likewise. * testsuite/gas/elf/section2.e-arc: Likewise. * testsuite/gas/arc/cpu-pseudop-1.d: Update test. * testsuite/gas/arc/cpu-pseudop-2.d: Likewise. * testsuite/gas/arc/nps400-0.d: Likewise. * testsuite/gas/elf/elf.exp: Set target_machine for ARC. * config/tc-arc.c (opcode/arc-attrs.h): Include. (ARC_GET_FLAG, ARC_SET_FLAG, streq): Define. (arc_attribute): Declare new function. (md_pseudo_table): Add arc_attribute. (cpu_types): Rename default cpu features. (selected_cpu): Set the default OSABI flag. (mpy_option): New variable. (pic_option): Likewise. (sda_option): Likewise. (tls_option): Likewise. (feature_type, feature_list): Remove. (arc_initial_eflag): Likewise. (attributes_set_explicitly): New variable. (arc_check_feature): Check also for the conflicting features. (arc_select_cpu): Refactor assignment of selected_cpu.eflags. (arc_option): Remove setting of private flags and architecture. (check_cpu_feature): Refactor feature names. (autodetect_attributes): New function. (assemble_tokens): Use above function. (md_parse_option): Refactor feature names. (arc_attribute): New function. (arc_set_attribute_int): Likewise. (arc_set_attribute_string): Likewise. (arc_stralloc): Likewise. (arc_set_public_attributes): Likewise. (arc_md_end): Likewise. (arc_copy_symbol_attributes): Likewise. (rc_convert_symbolic_attribute): Likewise. * config/tc-arc.h (md_end): Define. (CONVERT_SYMBOLIC_ATTRIBUTE): Likewise. (TC_COPY_SYMBOL_ATTRIBUTES): Likewise. * doc/c-arc.texi: Document ARC object attributes. binutils/ 2017-05-10 Claudiu Zissulescu * readelf.c (decode_ARC_machine_flags): Recognize OSABI v4. (get_arc_section_type_name): New function. (get_section_type_name): Use the above function. (display_arc_attribute): New function. (process_arc_specific): Likewise. (process_arch_specific): Handle ARC specific information. * testsuite/binutils-all/strip-3.d: Consider ARC.attributes section. include/ 2017-05-10 Claudiu Zissulescu * elf/arc.h (SHT_ARC_ATTRIBUTES): Define. (Tag_ARC_*): Define. (E_ARC_OSABI_V4): Define. (E_ARC_OSABI_CURRENT): Reassign it. (TAG_CPU_*): Define. * opcode/arc-attrs.h: New file. * opcode/arc.h (insn_subclass_t): Assign enum values. (insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64. (ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT) (ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP) (ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW) (ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC) (ARC_CRC): Delete. bfd/ 2017-05-10 Claudiu Zissulescu * elf32-arc.c (FEATURE_LIST_NAME): Define. (CONFLICT_LIST): Likewise. (opcode/arc-attrs.h): Include. (arc_elf_print_private_bfd_data): Print OSABI v4 flag. (arc_extract_features): New file. (arc_stralloc): Likewise. (arc_elf_merge_attributes): Likewise. (arc_elf_merge_private_bfd_data): Use object attributes. (bfd_arc_get_mach_from_attributes): New function. (arc_elf_object_p): Use object attributes. (arc_elf_final_write_processing): Likewise. (elf32_arc_obj_attrs_arg_type): New function. (elf32_arc_obj_attrs_handle_unknown): Likewise. (elf32_arc_section_from_shdr): Likewise. (elf_backend_obj_attrs_vendor): Define. (elf_backend_obj_attrs_section): Likewise. (elf_backend_obj_attrs_arg_type): Likewise. (elf_backend_obj_attrs_section_type): Likewise. (elf_backend_obj_attrs_handle_unknown): Likewise. (elf_backend_section_from_shdr): Likewise. ld/ 2017-05-10 Claudiu Zissulescu * testsuite/ld-arc/attr-merge-0.d: New file. * testsuite/ld-arc/attr-merge-0.s: Likewise. * testsuite/ld-arc/attr-merge-0e.s: Likewise. * testsuite/ld-arc/attr-merge-1.d: Likewise. * testsuite/ld-arc/attr-merge-1.s: Likewise. * testsuite/ld-arc/attr-merge-1e.s: Likewise. * testsuite/ld-arc/attr-merge-2.d: Likewise. * testsuite/ld-arc/attr-merge-2.s: Likewise. * testsuite/ld-arc/attr-merge-3.d: Likewise. * testsuite/ld-arc/attr-merge-3.s: Likewise. * testsuite/ld-arc/attr-merge-3e.s: Likewise. * testsuite/ld-arc/attr-merge-4.s: Likewise. * testsuite/ld-arc/attr-merge-5.d: Likewise. * testsuite/ld-arc/attr-merge-5a.s: Likewise. * testsuite/ld-arc/attr-merge-5b.s: Likewise. * testsuite/ld-arc/attr-merge-conflict-isa.d: Likewise. * testsuite/ld-arc/attr-merge-err-isa.d: Likewise. * testsuite/ld-arc/attr-merge-incompatible-cpu.d: Likewise. * testsuite/ld-arc/got-01.d: Update test. * testsuite/ld-arc/attr-merge-err-quarkse.d: New file. * testsuite/ld-arc/attr-quarkse.s: Likewise. * testsuite/ld-arc/attr-quarkse2.s: Likewise. opcodes/ 2017-05-10 Claudiu Zissulescu * arc-dis.c (parse_option): Update quarkse_em option.. * arc-ext-tbl.h (dsp_fp_flt2i, dsp_fp_i2flt): Change subclass to QUARKSE1. (dsp_fp_div, dsp_fp_cmp): Change subclass to QUARKSE2. commit 21d1fbeed4b7c4d006e399437445519e6505088f Author: Kaz Kojima Date: Wed May 10 09:15:19 2017 +0900 Remove Kaz Kojima as SH maintainer. commit 8010f3ed8d459f98b8ff8b8577a0ed422c836e0d Author: GDB Administrator Date: Wed May 10 00:00:42 2017 +0000 Automatic date update in version.in commit a6da46304894741d50a6f4ca2263b5cc158740e4 Author: Awson Date: Tue May 9 14:42:43 2017 +0100 Support pe-bigobj-x86-64 as an output format in 64-bit PE based linkers. PR ld/21471 * pe-dll.c (pe_detail_list): Add entry for pe-bigobj-x86-64. commit 94bb8dfe28219e4b747cb874aae401d18df91c9b Author: Yao Qi Date: Tue May 9 12:36:53 2017 +0100 Use std::forward_list for current_regcache gdb: 2017-05-09 Yao Qi * regcache.c: Include . (struct regcache_list): Remove. (current_regcache): Update. (get_thread_arch_aspace_regcache): Update for std::forward_list. (regcache_thread_ptid_changed): Likewise. (registers_changed_ptid): Likewise. (current_regcache_size): Likewise. commit 8248946cc5fd4522de630b9d86627af6e8fe0097 Author: Yao Qi Date: Tue May 9 12:36:53 2017 +0100 Add current_regcache unit test This patch adds a unit test to current_regcache, to make sure it is correctly updated by get_thread_arch_aspace_regcache and registers_changed_ptid. gdb: 2017-05-09 Yao Qi * regcache.c [GDB_SELF_TEST]: Include selftest.h. (current_regcache_size): New function. (current_regcache_test): New function. (_initialize_regcache) [GDB_SELF_TEST]: Register the unit test. commit e645cf40b111daef4518a58547de577eb9379ccb Author: Andrew Goedhart Date: Tue May 9 12:14:48 2017 +0100 Fix resolution of R_ARM_THM_ALU_PREL_11_0 relocation against Thumb symbols. PR ld/21458 * elf32-arm.c (elf32_arm_final_link_relocate): Set the bottom bit of the value when resolving a R_ARM_THM_ALU_PREL_11_0 relocation and the destination is a Thumb symbol. commit d2732b697fe56ff4274a4bc45add9386c17f8a07 Author: Alan Modra Date: Tue May 9 17:10:17 2017 +0930 ld.texinfo, use "affects" instead of "effects" * ld.texinfo (orphan sections): Grammar fix. commit 56eeb7f2cbdb16f513b825af426ee38d8f7efe3a Author: GDB Administrator Date: Tue May 9 00:00:40 2017 +0000 Automatic date update in version.in commit dd9e66ee9549c872fad36a21d521b68b14429f38 Author: H.J. Lu Date: Mon May 8 13:37:50 2017 -0700 Add missing initializer to silence GCC 4.2 Silence GCC 4.2: elf64-x86-64.c: In function ‘elf_x86_64_get_synthetic_symtab’: elf64-x86-64.c:6490: warning: missing initializer elf64-x86-64.c:6490: warning: (near initialization for ‘plts[3].sec’) * elf32-i386.c (elf_i386_get_synthetic_symtab): Add missing initializer for GCC 4.2. * lf64-x86-64.c (elf_x86_64_get_synthetic_symtab): Likewise. commit 38b123494b38ae09168387c0502acd1f23c1b601 Author: H.J. Lu Date: Mon May 8 12:24:11 2017 -0700 x86-64: Improve PLT generation and synthetic PLT symbols On x86-64, the procedure linkage table (PLT) is used to 1. Call external function. 2. Call internal IFUNC function. The best implementation is selected for the target processor at run-time. 3. Act as the canonical function address. 4. Support LD_AUDIT to audit external function calls. 5. Support LD_PROFILE to profile external function calls. PLT looks like: PLT0: push GOT[1] jmp *GOT[2] nop PLT1: jmp *GOT[name1_index] push name1_reloc_index jmp PLT0 GOT is an array of addresses. Initially the GOT entry of name1 is filled with the address of the "push name1_reloc_index" instruction. The function, name1, is called via "jmp *GOT[name1]" in the PLT entry. Even when lazy binding is disabled by "-z now", the PLT0 entry may still be used with LD_AUDIT or LD_PROFILE if PLT entry is used for canonical function address. When linker is invoked with "-z bndplt", a different PLT layout in .plt is used: PLT0: push GOT[1] bnd jmp *GOT[2] nop PLT1: push name1_reloc_index bnd jmp PLT0 nop together with a second PLT section, .pl.bnd: PLT1: bnd jmp *GOT[name1_index] nop where the GOT entry of name1 is filled with the address of the push instruction of the corresponding entry in .plt. 1. With lazy binding, when the external function, name1, is called the first time, dynamic linker is called via PLT0 to update GOT[name1_index] with the actual address of name1 and transfers control to name1 afterwards. 2. PLT is also used to call a local IFUNC function, name1, run-time loader updates GOT[name1_index] when loading the module. This patch 1. Remove PLT layout configurations from x86-64 backend_data. 2. Add generic, lay and non-lazy PLT layout configurations to x86-64 link_hash_table. Generic PLT layout includes the PLT entry templates, information how to update the first instruction in PLT and PLT eh_frame informaton, which are initialized in x86-64 setup_gnu_properties, based on "-z bndplt" and target selection. PLT section alignment is also set to PLT entry size for non-NaCl target. 3. Remove elf_x86_64_create_dynamic_sections. create_dynamic_sections isn't always called, but GOT relocations need GOT relocations. Instead, create all x86-64 specific dynamic sections with alignment to their entry size in x86-64 setup_gnu_properties, which initializes elf.dynobj, so that x86-64 check_relocs can be simplified. 4. Rewrite elf_x86_64_get_synthetic_symtab to check PLT sections against all dynamic relocations to support both lazy and non-lazy PLTs. There is no change in PLT. The only externally visible change is the improvement of synthetic PLT symbols for .plt.got. bfd/ * elf64-x86-64.c (PLT_ENTRY_SIZE): Renamed to ... (LAZY_PLT_ENTRY_SIZE): This. (NON_LAZY_PLT_ENTRY_SIZE): New. (elf_x86_64_plt0_entry): Renamed to ... (elf_x86_64_lazy_plt0_entry): This. (elf_x86_64_plt_entry): Renamed to ... (elf_x86_64_lazy_plt_entry): This. (elf_x86_64_bnd_plt0_entry): Renamed to ... (elf_x86_64_lazy_bnd_plt0_entry): This. (elf_x86_64_legacy_plt_entry): Removed. (elf_x86_64_bnd_plt_entry): Renamed to ... (elf_x86_64_lazy_bnd_plt_entry): This. (elf_x86_64_legacy_plt2_entry): Renamed to ... (elf_x86_64_non_lazy_plt_entry): This. (elf_x86_64_bnd_plt2_entry): Renamed to ... (elf_x86_64_non_lazy_bnd_plt_entry): This. (elf_x86_64_eh_frame_plt): Renamed to ... (elf_x86_64_eh_frame_lazy_plt): This. (elf_x86_64_eh_frame_bnd_plt): Renamed to ... (elf_x86_64_eh_frame_lazy_bnd_plt): This. (elf_x86_64_eh_frame_plt_got): Renamed to ... (elf_x86_64_eh_frame_non_lazy_plt): This. (elf_x86_64_lazy_plt_layout): New. (elf_x86_64_non_lazy_plt_layout): Likewise. (elf_x86_64_plt_layout): Likewise. (elf_x86_64_backend_data): Remove PLT layout information. Add os for target system. (GET_PLT_ENTRY_SIZE): Removed. (elf_x86_64_lazy_plt): New. (elf_x86_64_non_lazy_plt): Likewise. (elf_x86_64_lazy_bnd_plt): Likewise. (elf_x86_64_non_lazy_bnd_plt): Likewise. (elf_x86-64_arch_bed): Updated. (elf_x86_64_link_hash_table): Add plt, lazy_plt and non_lazy_plt. (elf_x86_64_create_dynamic_sections): Removed. (elf_x86_64_check_relocs): Don't check elf.dynobj. Don't call _bfd_elf_create_ifunc_sections nor _bfd_elf_create_got_section. (elf_x86-64_adjust_dynamic_symbol): Updated. (elf_x86_64_allocate_dynrelocs): Updated. Pass 0 as PLT header size to _bfd_elf_allocate_ifunc_dyn_relocs and don't allocate size for PLT0 if there is no PLT0. Get plt_entry_size from non_lazy_plt for non-lazy PLT entries. (elf_x86_64_size_dynamic_sections): Updated. Get plt_entry_size from non_lazy_plt for non-lazy PLT entries. (elf_x86-64_relocate_section): Updated. Properly get PLT index if there is no PLT0. (elf_x86_64_finish_dynamic_symbol): Updated. Fill the first slot in the PLT entry with generic PLT layout. Fill the non-lazy PLT entries with non-lazy PLT layout. Don't fill the second and third slots in the PLT entry if there is no PLT0. (elf_x86_64_finish_dynamic_sections): Updated. Don't fill PLT0 if there is no PLT0. Set sh_entsize on the .plt.got section. (compare_relocs): New. (elf_x86_64_plt_type): Likewise. (elf_x86_64_plt): Likewise. (elf_x86_64_nacl_plt): New. Forward declaration. (elf_x86_64_get_plt_sym_val): Removed. (elf_x86_64_get_synthetic_symtab): Rewrite to check PLT sections against all dynamic relocations. (elf_x86_64_link_setup_gnu_properties): New function. (elf_backend_create_dynamic_sections): Updated. (elf_backend_setup_gnu_properties): New. (elf_x86_64_nacl_plt): New. (elf_x86_64_nacl_arch_bed): Updated. ld/ * testsuite/ld-ifunc/ifunc-16-x86-64-now.d: New file. * testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/mpx3n.dd: Likewise. * testsuite/ld-x86-64/mpx4n.dd: Likewise. * testsuite/ld-x86-64/plt-main-bnd-now.rd: Likewise. * testsuite/ld-x86-64/plt2.dd: Likewise. * testsuite/ld-x86-64/plt2.rd: Likewise. * testsuite/ld-x86-64/plt2.s: Likewise. * testsuite/ld-x86-64/pr20830a-now.d: Likewise. * testsuite/ld-x86-64/pr20830b-now.d: Likewise. * testsuite/ld-x86-64/pr21038a-now.d: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/load1b-nacl.d: Updated. * testsuite/ld-x86-64/load1b.d: Likewise. * testsuite/ld-x86-64/plt-main-bnd.dd: Likewise. * testsuite/ld-x86-64/pr20253-1h.d: Likewise. * testsuite/ld-x86-64/pr20830a.d: Update the .plt.got section with func@plt. * testsuite/ld-x86-64/pr20830b.d: Likewise. * testsuite/ld-x86-64/pr21038a.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise. * testsuite/ld-x86-64/mpx.exp: Add some -z now tests. * testsuite/ld-x86-64/x86-64.exp: Likewise. commit d7ab4911f8aa3e1cd06ece40f74d0b4a532d6a10 Author: Andreas Krebbel Date: Mon May 8 19:10:42 2017 +0200 S/390: Fix ifunc missing runtime reloc This fixes a problem with a missing R_390_64 reloc against .data for a function pointer to an ifunc function. No regressions on s390x. Pushed to mainline. bfd/ChangeLog: 2017-05-08 Andreas Krebbel * elf-s390-common.c: Don't check non_got_ref flag. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. commit f604c2a2a54ebf88e4a51986c7cdedffe7b3313a Author: H.J. Lu Date: Mon May 8 10:10:22 2017 -0700 i386: Improve PLT generation and synthetic PLT symbols On i386, the procedure linkage table (PLT) is used to 1. Call external function. 2. Call internal IFUNC function. The best implementation is selected for the target processor at run-time. 3. Act as the canonical function address. 4. Support LD_AUDIT to audit external function calls. 5. Support LD_PROFILE to profile external function calls. PLT looks like: PLT0: push GOT[1] jmp *GOT[2] nop PLT1: jmp *GOT[name1_index] push name1_reloc_index jmp PLT0 GOT is an array of addresses. Initially the GOT entry of name1 is filled with the address of the "push name1_reloc_index" instruction. The function, name1, is called via "jmp *GOT[name1]" in the PLT entry. Even when lazy binding is disabled by "-z now", the PLT0 entry may still be used with LD_AUDIT or LD_PROFILE if PLT entry is used for canonical function address. 1. With lazy binding, when the external function, name1, is called the first time, dynamic linker is called via PLT0 to update GOT[name1_index] with the actual address of name1 and transfers control to name1 afterwards. 2. PLT is also used to call a local IFUNC function, name1, run-time loader updates GOT[name1_index] when loading the module. This patch 1. Remove PLT layout configurations from i386 backend_data. 2. Add generic, lay and non-lazy PLT layout configurations to i386 link_hash_table. Generic PLT layout includes the PLT entry templates, information how to update the first instruction in PLT and PLT eh_frame informaton, which are initialized in i386 setup_gnu_properties, based on PIC and target selection. PLT section alignment is also set to PLT entry size for non-NaCl/VxWorks target. 3. Remove elf_i386_create_dynamic_sections. create_dynamic_sections isn't always called, but GOT relocations need GOT relocations. Instead, create all i386 specific dynamic sections in i386 setup_gnu_properties, which initializes elf.dynobj, so that i386 check_relocs can be simplified. 4. Rewrite elf_i386_get_synthetic_symtab to check PLT sections against all dynamic relocations to support both lazy and non-lazy PLTs. bfd/ * elf32-i386.c (PLT_ENTRY_SIZE): Renamed to ... (LAZY_PLT_ENTRY_SIZE): This. (NON_LAZY_PLT_ENTRY_SIZE): New. (elf_i386_plt0_entry): Renamed to ... (elf_i386_lazy_plt0_entry): This. (elf_i386_plt_entry): Renamed to ... (elf_i386_lazy_plt_entry): This. (elf_i386_pic_plt0_entry): Renamed to ... (elf_i386_pic_lazy_plt0_entry): This. (elf_i386_pic_plt_entry): Renamed to ... (elf_i386_pic_lazy_plt_entry): This. (elf_i386_got_plt_entry): Renamed to ... (elf_i386_non_lazy_plt_entry): This. (elf_i386_pic_got_plt_entry): Renamed to ... (elf_i386_pic_non_lazy_plt_entry): This. (elf_i386_eh_frame_plt): Renamed to ... (elf_i386_eh_frame_lazy_plt): This. (elf_i386_eh_frame_plt_got): Renamed to ... (elf_i386_eh_frame_non_lazy_plt): This. (elf_i386_plt_layout): Renamed to ... (elf_i386_lazy_plt_layout): This. Remove eh_frame_plt_got and eh_frame_plt_got_size. (elf_i386_non_lazy_plt_layout): New. (elf_i386_plt_layout): Likewise. (elf_i386_non_lazy_plt): Likewise. (GET_PLT_ENTRY_SIZE): Removed. (elf_i386_plt): Renamed to ... (elf_i386_lazy_plt): This. (elf_i386_backend_data): Remove plt. Rename is_vxworks to os. (elf_i386_arch_bed): Updated. (elf_i386_link_hash_table): Add plt, lazy_plt and non_lazy_plt. (elf_i386_create_dynamic_sections): Removed. (elf_i386_check_relocs): Don't check elf.dynobj. Don't call _bfd_elf_create_ifunc_sections nor _bfd_elf_create_got_section. (elf_i386_adjust_dynamic_symbol): Updated. (elf_i386_allocate_dynrelocs): Updated. Pass 0 as PLT header size to _bfd_elf_allocate_ifunc_dyn_relocs and don't allocate size for PLT0 if there is no PLT0. (elf_i386_size_dynamic_sections): Updated. Check whether GOT output section is discarded only if GOT isn't empty. (elf_i386_relocate_section): Updated. Properly get PLT index if there is no PLT0. (elf_i386_finish_dynamic_symbol): Updated. Don't fill the second and third slots in the PLT entry if there is no PLT0. (elf_i386_finish_dynamic_sections): Updated. Don't fill PLT0 if there is no PLT0. Set sh_entsize on the .plt.got section. (elf_i386_nacl_plt): Forward declaration. (elf_i386_get_plt_sym_val): Removed. (elf_i386_get_synthetic_symtab): Rewrite to check PLT sections against all dynamic relocations. (elf_i386_link_setup_gnu_properties): New function. (elf_backend_create_dynamic_sections): Updated. (elf_backend_setup_gnu_properties): New. (elf_i386_nacl_plt): Updated. (elf_i386_nacl_arch_bed): Likewise. (elf_i386_vxworks_arch_bed): Likewise. ld/ * testsuite/ld-i386/i386.exp: Add some -z now tests. * testsuite/ld-i386/plt-pic2.dd: New file. * testsuite/ld-i386/plt2.dd: Likewise. * testsuite/ld-i386/plt2.rd: Likewise. * testsuite/ld-i386/plt2.s: Likewise. * testsuite/ld-ifunc/ifunc-16-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise. * testsuite/ld-ifunc/pr17154-i386-now.d: Likewise. * testsuite/ld-i386/pr20830.d: Update the .plt.got section with func@plt. commit 046734ff424bc5a4c1b6a69630d5bb31aa67165c Author: Thomas Preud'homme Date: Mon May 8 15:26:51 2017 +0100 Make import libraries relocatable objects For ELF targets --out-implib currently generates an executable file (e_type is ET_EXEC) despite the file being expected to be linked against some other object file to make an executable later. It seems therefore more sensible to make the import library a relocatable object file (e_type set to ET_REL). Incidentally, as dicted by requirement 8 of "ARM v8-M Security Extensions: Requirements on Development Tools" (document ARM-ECM-0359818) version 1.0, import libraries generated when using --cmse-implib *must* be relocatable object file so this commit also adds an assert there in case the type of ELF import library is changed again in the future. 2017-05-08 Thomas Preud'homme bfd/ * elflink.c (elf_output_implib): Remove executable flag from import library bfd. * elf32-arm.c (elf32_arm_filter_implib_symbols): Assert that the import library is a relocatable object file. ld/ * testsuite/ld-arm/arm-elf.exp (Secure gateway import library generation): Check e_type field of import library and executable produced. * testsuite/ld-arm/cmse-implib.type: Expectations for e_type field. commit 313c59612298b022a408ca390bd5f73f28708015 Author: Alan Hayward Date: Mon May 8 09:40:07 2017 +0100 Remove some uses of MAX_REGISTER_SIZE from mips-tdep.c gdb/ * mips-tdep.c (mips_o32_return_value): Remove unused buffer. (print_gp_register_row): Use get_frame_register_value. commit 27bfc1d1c2cbcafccddef51ef82b309ef147c4a8 Author: Alan Hayward Date: Mon May 8 09:37:26 2017 +0100 Remove some uses of MAX_REGISTER_SIZE from mips-linux-tdep.c gdb/ * mips-linux-tdep.c (mips_supply_gregset): Use raw_supply_zeroed. (mips_supply_fpregset): Likewise. (mips64_supply_gregset): Likewise. commit 146e6c5cc7b19ea56a033415511e38a2d0656e42 Author: Alan Hayward Date: Mon May 8 09:35:45 2017 +0100 Remove some uses of MAX_REGISTER_SIZE uses from mn10300-linux-tdep.c gdb/ * mn10300-linux-tdep.c (am33_supply_gregset_method): Use regcache->raw_supply_zeroed. commit b48e3ca69abef81d729d01d7c720fb23697c3590 Author: GDB Administrator Date: Mon May 8 00:00:41 2017 +0000 Automatic date update in version.in ----------------------------------------------------------------------- Summary of changes: bfd/ChangeLog | 249 +++ bfd/aout-adobe.c | 1 + bfd/aout-target.h | 3 + bfd/aout-tic30.c | 3 + bfd/bfd-in2.h | 5 + bfd/bfd.c | 12 +- bfd/bout.c | 1 + bfd/coff-alpha.c | 3 + bfd/coff-mips.c | 1 + bfd/coff-rs6000.c | 1 + bfd/coff64-rs6000.c | 2 + bfd/coffcode.h | 4 + bfd/elf-s390-common.c | 4 +- bfd/elf32-arc.c | 439 ++++++- bfd/elf32-arm.c | 8 + bfd/elf32-i386.c | 1240 ++++++++++----- bfd/elf32-s390.c | 2 +- bfd/elf64-s390.c | 7 +- bfd/elf64-sparc.c | 24 +- bfd/elf64-x86-64.c | 1575 ++++++++++++-------- bfd/elflink.c | 3 +- bfd/elfxx-mips.c | 2 + bfd/elfxx-target.h | 3 + bfd/i386msdos.c | 1 + bfd/i386os9k.c | 2 + bfd/ieee.c | 1 + bfd/libbfd-in.h | 2 + bfd/libbfd.c | 9 + bfd/libbfd.h | 8 + bfd/mach-o-target.c | 1 + bfd/nlm-target.h | 1 + bfd/oasys.c | 1 + bfd/reloc.c | 26 + bfd/som.c | 1 + bfd/targets.c | 3 + bfd/versados.c | 1 + bfd/version.h | 2 +- bfd/vms-alpha.c | 5 + binutils/ChangeLog | 38 + binutils/MAINTAINERS | 1 - binutils/NEWS | 2 + binutils/readelf.c | 202 +++ binutils/testsuite/binutils-all/mips/mips.exp | 10 + .../binutils-all/mips/mips16-extend-insn.d | 4 +- .../testsuite/binutils-all/mips/mips16-undecoded.d | 2 +- .../testsuite/binutils-all/mips/mips16-undecoded.s | 1 - .../binutils-all/mips/mips16e2-extend-insn.d | 355 +++++ .../binutils-all/mips/mips16e2-undecoded.d | 189 +++ binutils/testsuite/binutils-all/strip-3.d | 2 +- gas/ChangeLog | 509 +++++++ gas/config/tc-arc.c | 375 ++++- gas/config/tc-arc.h | 11 + gas/config/tc-arm.c | 19 +- gas/config/tc-mips.c | 202 ++- gas/doc/as.texinfo | 21 +- gas/doc/c-arc.texi | 16 + gas/doc/c-mips.texi | 26 +- gas/testsuite/gas/arc/attr-arc600.d | 10 + gas/testsuite/gas/arc/attr-arc600_mul32x16.d | 10 + gas/testsuite/gas/arc/attr-arc600_norm.d | 10 + gas/testsuite/gas/arc/attr-arc601.d | 10 + gas/testsuite/gas/arc/attr-arc601_mul32x16.d | 10 + gas/testsuite/gas/arc/attr-arc601_mul64.d | 10 + gas/testsuite/gas/arc/attr-arc601_norm.d | 10 + gas/testsuite/gas/arc/attr-arc700.d | 10 + gas/testsuite/gas/arc/attr-arcem.d | 10 + gas/testsuite/gas/arc/attr-archs.d | 11 + gas/testsuite/gas/arc/attr-autodetect-1.d | 11 + gas/testsuite/gas/arc/attr-autodetect-1.s | 4 + gas/testsuite/gas/arc/attr-cpu-a601.d | 8 + gas/testsuite/gas/arc/attr-cpu-a601.s | 1 + gas/testsuite/gas/arc/attr-cpu-a700.d | 8 + gas/testsuite/gas/arc/attr-cpu-a700.s | 1 + gas/testsuite/gas/arc/attr-cpu-em.d | 8 + gas/testsuite/gas/arc/attr-cpu-em.s | 1 + gas/testsuite/gas/arc/attr-cpu-hs.d | 9 + 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100644 ld/testsuite/ld-x86-64/pr21038b-now.d create mode 100644 ld/testsuite/ld-x86-64/pr21038c-now.d create mode 100644 ld/testsuite/ld-x86-64/pr21481a.c create mode 100644 ld/testsuite/ld-x86-64/pr21481b.S create mode 100644 ld/testsuite/ld-x86-64/property-x86-3.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-3.s First 500 lines of diff: diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 27ac8c3..52c192d 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,252 @@ +2017-05-15 Maciej W. Rozycki + + * elfxx-mips.c (print_mips_ases): Handle MIPS16e2 ASE. + +2017-05-12 H.J. Lu + + * elf32-i386.c (elf_i386_parse_gnu_properties): Merge + GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_ISA_1_NEEDED + properties. + * elf64-x86-64.c (elf_x86_64_parse_gnu_properties): Likewise. + +2017-05-11 H.J. Lu + + * elf64-x86-64.c (elf_x86_64_link_hash_entry): Rename plt_bnd + to plt_second. + (elf_x86_64_link_hash_table): Rename plt_bnd/plt_bnd_eh_frame + to plt_second/plt_second_eh_frame. + (elf_x86_64_link_hash_newfunc): Updated. + (elf_x86_64_allocate_dynrelocs): Likewise. + (elf_x86_64_size_dynamic_sections): Likewise. + (elf_x86_64_relocate_section): Likewise. + (elf_x86_64_finish_dynamic_symbol): Likewise. + (elf_x86_64_finish_dynamic_sections): Likewise. + (elf_x86_64_plt_type): Rename plt_bnd to plt_second. + (elf_x86_64_get_synthetic_symtab): Updated. Also scan the + .plt.sec section. + (elf_backend_setup_gnu_properties): Updated. Create the + .plt.sec section instead of the .plt.sec section. + +2017-05-11 H.J. Lu + + * elf32-i386.c (elf_i386_allocate_dynrelocs): Partially revert + commit 25070364b0ce33eed46aa5d78ebebbec6accec7e. + * elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewse. + +2017-05-10 Jose E. Marchesi + + * elf64-sparc.c (elf64_sparc_set_reloc): New function. + (bfd_elf64_set_reloc): Define. + (elf64_sparc_write_relocs): Use `canon_reloc_count'. + +2017-05-10 Jose E. Marchesi + + * targets.c (BFD_JUMP_TABLE_RELOCS): Add NAME##_set_reloc. + (struct bfd_target): New field _bfd_set_reloc. + * bfd.c (bfd_set_reloc): Call backend _set_bfd. + * reloc.c (_bfd_generic_set_reloc): New function. + * coffcode.h (coff_set_reloc): Define to _bfd_generic_set_reloc. + * nlm-target.h (nlm_set_reloc): Likewise. + * coff-rs6000.c (_bfd_xcoff_set_reloc): Likewise. + * aout-tic30.c (MY_set_reloc): Likewise. + * aout-target.h (MY_set_reloc): Likewise. + * elfxx-target.h (bfd_elfNN_set_reloc): Likewise. + * coff-alpha.c (_bfd_ecoff_set_reloc): Likewise. + * mach-o-target.c (bfd_mach_o_set_reloc): Likewise. + * vms-alpha.c (alpha_vms_set_reloc): Likewise. + * aout-adobe.c (aout_32_set_reloc): Likewise. + * bout.c (b_out_set_reloc): Likewise. + * coff-mips.c (_bfd_ecoff_set_reloc): Likewise. + * i386os9k.c (aout_32_set_reloc): Likewise. + * ieee.c (ieee_set_reloc): Likewise. + * oasys.c (oasys_set_reloc): Likewise. + * som.c (som_set_reloc): Likewise. + * versados.c (versados_set_reloc): Likewise. + * coff64-rs6000.c (rs6000_xcoff64_vec): Add + _bfd_generic_set_reloc. + (rs6000_xcoff64_aix_vec): LIkewise. + * libbfd.c (_bfd_norelocs_set_reloc): New function. + * libbfd-in.h: Prototype for _bfd_norelocs_set_reloc. + * i386msdos.c (msdos_set_reloc): Define to + _bfd_norelocs_set_reloc. + * elfcode.h (elf_set_reloc): Define. + * bfd-in2.h: Regenerated. + +2017-05-10 H.J. Lu + + PR ld/21481 + * elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Use .plt.bnd + for IFUNC function address. + +2017-05-10 Claudiu Zissulescu + + * elf32-arc.c (FEATURE_LIST_NAME): Define. + (CONFLICT_LIST): Likewise. + (opcode/arc-attrs.h): Include. + (arc_elf_print_private_bfd_data): Print OSABI v4 flag. + (arc_extract_features): New file. + (arc_stralloc): Likewise. + (arc_elf_merge_attributes): Likewise. + (arc_elf_merge_private_bfd_data): Use object attributes. + (bfd_arc_get_mach_from_attributes): New function. + (arc_elf_object_p): Use object attributes. + (arc_elf_final_write_processing): Likewise. + (elf32_arc_obj_attrs_arg_type): New function. + (elf32_arc_obj_attrs_handle_unknown): Likewise. + (elf32_arc_section_from_shdr): Likewise. + (elf_backend_obj_attrs_vendor): Define. + (elf_backend_obj_attrs_section): Likewise. + (elf_backend_obj_attrs_arg_type): Likewise. + (elf_backend_obj_attrs_section_type): Likewise. + (elf_backend_obj_attrs_handle_unknown): Likewise. + (elf_backend_section_from_shdr): Likewise. + +2017-05-09 Andrew Goedhart + + PR ld/21458 + * elf32-arm.c (elf32_arm_final_link_relocate): Set the bottom bit + of the value when resolving a R_ARM_THM_ALU_PREL_11_0 relocation + and the destination is a Thumb symbol. + +2017-05-08 H.J. Lu + + * elf32-i386.c (elf_i386_get_synthetic_symtab): Add missing + initializer to silence GCC 4.2. + * lf64-x86-64.c (elf_x86_64_get_synthetic_symtab): Likewise. + +2017-05-08 H.J. Lu + + * elf64-x86-64.c (PLT_ENTRY_SIZE): Renamed to ... + (LAZY_PLT_ENTRY_SIZE): This. + (NON_LAZY_PLT_ENTRY_SIZE): New. + (elf_x86_64_plt0_entry): Renamed to ... + (elf_x86_64_lazy_plt0_entry): This. + (elf_x86_64_plt_entry): Renamed to ... + (elf_x86_64_lazy_plt_entry): This. + (elf_x86_64_bnd_plt0_entry): Renamed to ... + (elf_x86_64_lazy_bnd_plt0_entry): This. + (elf_x86_64_legacy_plt_entry): Removed. + (elf_x86_64_bnd_plt_entry): Renamed to ... + (elf_x86_64_lazy_bnd_plt_entry): This. + (elf_x86_64_legacy_plt2_entry): Renamed to ... + (elf_x86_64_non_lazy_plt_entry): This. + (elf_x86_64_bnd_plt2_entry): Renamed to ... + (elf_x86_64_non_lazy_bnd_plt_entry): This. + (elf_x86_64_eh_frame_plt): Renamed to ... + (elf_x86_64_eh_frame_lazy_plt): This. + (elf_x86_64_eh_frame_bnd_plt): Renamed to ... + (elf_x86_64_eh_frame_lazy_bnd_plt): This. + (elf_x86_64_eh_frame_plt_got): Renamed to ... + (elf_x86_64_eh_frame_non_lazy_plt): This. + (elf_x86_64_lazy_plt_layout): New. + (elf_x86_64_non_lazy_plt_layout): Likewise. + (elf_x86_64_plt_layout): Likewise. + (elf_x86_64_backend_data): Remove PLT layout information. Add + os for target system. + (GET_PLT_ENTRY_SIZE): Removed. + (elf_x86_64_lazy_plt): New. + (elf_x86_64_non_lazy_plt): Likewise. + (elf_x86_64_lazy_bnd_plt): Likewise. + (elf_x86_64_non_lazy_bnd_plt): Likewise. + (elf_x86-64_arch_bed): Updated. + (elf_x86_64_link_hash_table): Add plt, lazy_plt and non_lazy_plt. + (elf_x86_64_create_dynamic_sections): Removed. + (elf_x86_64_check_relocs): Don't check elf.dynobj. Don't call + _bfd_elf_create_ifunc_sections nor _bfd_elf_create_got_section. + (elf_x86-64_adjust_dynamic_symbol): Updated. + (elf_x86_64_allocate_dynrelocs): Updated. Pass 0 as PLT header + size to _bfd_elf_allocate_ifunc_dyn_relocs and don't allocate + size for PLT0 if there is no PLT0. Get plt_entry_size from + non_lazy_plt for non-lazy PLT entries. + (elf_x86_64_size_dynamic_sections): Updated. Get plt_entry_size + from non_lazy_plt for non-lazy PLT entries. + (elf_x86-64_relocate_section): Updated. Properly get PLT index + if there is no PLT0. + (elf_x86_64_finish_dynamic_symbol): Updated. Fill the first slot + in the PLT entry with generic PLT layout. Fill the non-lazy PLT + entries with non-lazy PLT layout. Don't fill the second and third + slots in the PLT entry if there is no PLT0. + (elf_x86_64_finish_dynamic_sections): Updated. Don't fill PLT0 + if there is no PLT0. Set sh_entsize on the .plt.got section. + (compare_relocs): New. + (elf_x86_64_plt_type): Likewise. + (elf_x86_64_plt): Likewise. + (elf_x86_64_nacl_plt): New. Forward declaration. + (elf_x86_64_get_plt_sym_val): Removed. + (elf_x86_64_get_synthetic_symtab): Rewrite to check PLT sections + against all dynamic relocations. + (elf_x86_64_link_setup_gnu_properties): New function. + (elf_backend_create_dynamic_sections): Updated. + (elf_backend_setup_gnu_properties): New. + (elf_x86_64_nacl_plt): New. + (elf_x86_64_nacl_arch_bed): Updated. + +2017-05-08 H.J. Lu + + * elf32-i386.c (PLT_ENTRY_SIZE): Renamed to ... + (LAZY_PLT_ENTRY_SIZE): This. + (NON_LAZY_PLT_ENTRY_SIZE): New. + (elf_i386_plt0_entry): Renamed to ... + (elf_i386_lazy_plt0_entry): This. + (elf_i386_plt_entry): Renamed to ... + (elf_i386_lazy_plt_entry): This. + (elf_i386_pic_plt0_entry): Renamed to ... + (elf_i386_pic_lazy_plt0_entry): This. + (elf_i386_pic_plt_entry): Renamed to ... + (elf_i386_pic_lazy_plt_entry): This. + (elf_i386_got_plt_entry): Renamed to ... + (elf_i386_non_lazy_plt_entry): This. + (elf_i386_pic_got_plt_entry): Renamed to ... + (elf_i386_pic_non_lazy_plt_entry): This. + (elf_i386_eh_frame_plt): Renamed to ... + (elf_i386_eh_frame_lazy_plt): This. + (elf_i386_eh_frame_plt_got): Renamed to ... + (elf_i386_eh_frame_non_lazy_plt): This. + (elf_i386_plt_layout): Renamed to ... + (elf_i386_lazy_plt_layout): This. Remove eh_frame_plt_got and + eh_frame_plt_got_size. + (elf_i386_non_lazy_plt_layout): New. + (elf_i386_plt_layout): Likewise. + (elf_i386_non_lazy_plt): Likewise. + (GET_PLT_ENTRY_SIZE): Removed. + (elf_i386_plt): Renamed to ... + (elf_i386_lazy_plt): This. + (elf_i386_backend_data): Remove plt. Rename is_vxworks to os. + (elf_i386_arch_bed): Updated. + (elf_i386_link_hash_table): Add plt, lazy_plt and non_lazy_plt. + (elf_i386_create_dynamic_sections): Removed. + (elf_i386_check_relocs): Don't check elf.dynobj. Don't call + _bfd_elf_create_ifunc_sections nor _bfd_elf_create_got_section. + (elf_i386_adjust_dynamic_symbol): Updated. + (elf_i386_allocate_dynrelocs): Updated. Pass 0 as PLT header + size to _bfd_elf_allocate_ifunc_dyn_relocs and don't allocate + size for PLT0 if there is no PLT0. + (elf_i386_size_dynamic_sections): Updated. Check whether GOT + output section is discarded only if GOT isn't empty. + (elf_i386_relocate_section): Updated. Properly get PLT index + if there is no PLT0. + (elf_i386_finish_dynamic_symbol): Updated. Don't fill the + second and third slots in the PLT entry if there is no PLT0. + (elf_i386_finish_dynamic_sections): Updated. Don't fill PLT0 + if there is no PLT0. Set sh_entsize on the .plt.got section. + (elf_i386_nacl_plt): Forward declaration. + (elf_i386_get_plt_sym_val): Removed. + (elf_i386_get_synthetic_symtab): Rewrite to check PLT sections + against all dynamic relocations. + (elf_i386_link_setup_gnu_properties): New function. + (elf_backend_create_dynamic_sections): Updated. + (elf_backend_setup_gnu_properties): New. + (elf_i386_nacl_plt): Updated. + (elf_i386_nacl_arch_bed): Likewise. + (elf_i386_vxworks_arch_bed): Likewise. + +2017-05-08 Thomas Preud'homme + + * elflink.c (elf_output_implib): Remove executable flag from import + library bfd. + * elf32-arm.c (elf32_arm_filter_implib_symbols): Assert that the import + library is a relocatable object file. + 2017-05-01 Senthil Kumar Selvaraj PR ld/21404 diff --git a/bfd/aout-adobe.c b/bfd/aout-adobe.c index d47dd20..a2c927d 100644 --- a/bfd/aout-adobe.c +++ b/bfd/aout-adobe.c @@ -474,6 +474,7 @@ aout_adobe_sizeof_headers (bfd *ignore_abfd ATTRIBUTE_UNUSED, #define aout_32_bfd_final_link _bfd_generic_final_link #define aout_32_bfd_link_split_section _bfd_generic_link_split_section #define aout_32_bfd_link_check_relocs _bfd_generic_link_check_relocs +#define aout_32_set_reloc _bfd_generic_set_reloc const bfd_target aout_adobe_vec = { diff --git a/bfd/aout-target.h b/bfd/aout-target.h index 9f77c95..2e98c4d 100644 --- a/bfd/aout-target.h +++ b/bfd/aout-target.h @@ -450,6 +450,9 @@ MY_bfd_final_link (bfd *abfd, struct bfd_link_info *info) #ifndef MY_canonicalize_reloc #define MY_canonicalize_reloc NAME (aout, canonicalize_reloc) #endif +#ifndef MY_set_reloc +#define MY_set_reloc _bfd_generic_set_reloc +#endif #ifndef MY_make_empty_symbol #define MY_make_empty_symbol NAME (aout, make_empty_symbol) #endif diff --git a/bfd/aout-tic30.c b/bfd/aout-tic30.c index 29dad9f..5db3da7 100644 --- a/bfd/aout-tic30.c +++ b/bfd/aout-tic30.c @@ -905,6 +905,9 @@ tic30_aout_set_arch_mach (bfd *abfd, #ifndef MY_canonicalize_reloc #define MY_canonicalize_reloc NAME (aout, canonicalize_reloc) #endif +#ifndef MY_set_reloc +#define MY_set_reloc _bfd_generic_set_reloc +#endif #ifndef MY_make_empty_symbol #define MY_make_empty_symbol NAME (aout, make_empty_symbol) #endif diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 17a35c0..8617881 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -7075,6 +7075,8 @@ long bfd_canonicalize_reloc void bfd_set_reloc (bfd *abfd, asection *sec, arelent **rel, unsigned int count); +#define bfd_set_reloc(abfd, asect, location, count) \ + BFD_SEND (abfd, _bfd_set_reloc, (abfd, asect, location, count)) bfd_boolean bfd_set_file_flags (bfd *abfd, flagword flags); int bfd_get_arch_size (bfd *abfd); @@ -7542,12 +7544,15 @@ typedef struct bfd_target #define BFD_JUMP_TABLE_RELOCS(NAME) \ NAME##_get_reloc_upper_bound, \ NAME##_canonicalize_reloc, \ + NAME##_set_reloc, \ NAME##_bfd_reloc_type_lookup, \ NAME##_bfd_reloc_name_lookup long (*_get_reloc_upper_bound) (bfd *, sec_ptr); long (*_bfd_canonicalize_reloc) (bfd *, sec_ptr, arelent **, struct bfd_symbol **); + void (*_bfd_set_reloc) + (bfd *, sec_ptr, arelent **, unsigned int); /* See documentation on reloc types. */ reloc_howto_type * (*reloc_type_lookup) (bfd *, bfd_reloc_code_real_type); diff --git a/bfd/bfd.c b/bfd/bfd.c index 23a4350..c6fce45 100644 --- a/bfd/bfd.c +++ b/bfd/bfd.c @@ -1064,18 +1064,10 @@ DESCRIPTION section @var{sec} to the values @var{rel} and @var{count}. The argument @var{abfd} is ignored. +.#define bfd_set_reloc(abfd, asect, location, count) \ +. BFD_SEND (abfd, _bfd_set_reloc, (abfd, asect, location, count)) */ -void -bfd_set_reloc (bfd *ignore_abfd ATTRIBUTE_UNUSED, - sec_ptr asect, - arelent **location, - unsigned int count) -{ - asect->orelocation = location; - asect->reloc_count = count; -} - /* FUNCTION bfd_set_file_flags diff --git a/bfd/bout.c b/bfd/bout.c index 1d3bf66..0a6f8db 100644 --- a/bfd/bout.c +++ b/bfd/bout.c @@ -1392,6 +1392,7 @@ b_out_bfd_get_relocated_section_contents (bfd *output_bfd, #define b_out_bfd_define_common_symbol bfd_generic_define_common_symbol #define aout_32_get_section_contents_in_window _bfd_generic_get_section_contents_in_window #define b_out_bfd_link_check_relocs _bfd_generic_link_check_relocs +#define b_out_set_reloc _bfd_generic_set_reloc extern const bfd_target bout_le_vec; diff --git a/bfd/coff-alpha.c b/bfd/coff-alpha.c index 9ce1975..8ecba2f 100644 --- a/bfd/coff-alpha.c +++ b/bfd/coff-alpha.c @@ -2342,6 +2342,9 @@ static const struct ecoff_backend_data alpha_ecoff_backend_data = #define _bfd_ecoff_bfd_define_common_symbol bfd_generic_define_common_symbol #define _bfd_ecoff_bfd_link_check_relocs _bfd_generic_link_check_relocs +/* Installing internal relocations in a section is also generic. */ +#define _bfd_ecoff_set_reloc _bfd_generic_set_reloc + const bfd_target alpha_ecoff_le_vec = { "ecoff-littlealpha", /* name */ diff --git a/bfd/coff-mips.c b/bfd/coff-mips.c index f872ebe..45c65f8 100644 --- a/bfd/coff-mips.c +++ b/bfd/coff-mips.c @@ -1356,6 +1356,7 @@ static const struct ecoff_backend_data mips_ecoff_backend_data = #define _bfd_ecoff_section_already_linked \ _bfd_coff_section_already_linked #define _bfd_ecoff_bfd_define_common_symbol bfd_generic_define_common_symbol +#define _bfd_ecoff_set_reloc _bfd_generic_set_reloc extern const bfd_target mips_ecoff_be_vec; diff --git a/bfd/coff-rs6000.c b/bfd/coff-rs6000.c index e2b149b..b49e393 100644 --- a/bfd/coff-rs6000.c +++ b/bfd/coff-rs6000.c @@ -3993,6 +3993,7 @@ const struct xcoff_dwsect_name xcoff_dwsect_names[] = { /* For reloc entry points. */ #define _bfd_xcoff_get_reloc_upper_bound coff_get_reloc_upper_bound #define _bfd_xcoff_canonicalize_reloc coff_canonicalize_reloc +#define _bfd_xcoff_set_reloc _bfd_generic_set_reloc #define _bfd_xcoff_bfd_reloc_type_lookup _bfd_xcoff_reloc_type_lookup #define _bfd_xcoff_bfd_reloc_name_lookup _bfd_xcoff_reloc_name_lookup diff --git a/bfd/coff64-rs6000.c b/bfd/coff64-rs6000.c index e919dcb..56458e0 100644 --- a/bfd/coff64-rs6000.c +++ b/bfd/coff64-rs6000.c @@ -2720,6 +2720,7 @@ const bfd_target rs6000_xcoff64_vec = /* Reloc */ coff_get_reloc_upper_bound, coff_canonicalize_reloc, + _bfd_generic_set_reloc, xcoff64_reloc_type_lookup, xcoff64_reloc_name_lookup, @@ -2979,6 +2980,7 @@ const bfd_target rs6000_xcoff64_aix_vec = /* Reloc */ coff_get_reloc_upper_bound, coff_canonicalize_reloc, + _bfd_generic_set_reloc, xcoff64_reloc_type_lookup, xcoff64_reloc_name_lookup, diff --git a/bfd/coffcode.h b/bfd/coffcode.h index 96a7886..f9d3978 100644 --- a/bfd/coffcode.h +++ b/bfd/coffcode.h @@ -5439,6 +5439,10 @@ coff_canonicalize_reloc (bfd * abfd, return section->reloc_count; } +#ifndef coff_set_reloc +#define coff_set_reloc _bfd_generic_set_reloc +#endif + #ifndef coff_reloc16_estimate #define coff_reloc16_estimate dummy_reloc16_estimate diff --git a/bfd/elf-s390-common.c b/bfd/elf-s390-common.c index 1570365..8795fb9 100644 --- a/bfd/elf-s390-common.c +++ b/bfd/elf-s390-common.c @@ -161,9 +161,7 @@ keep: h->type = STT_FUNC; } - /* We need dynamic relocation for STT_GNU_IFUNC symbol only when - there is a non-GOT reference in a shared object. */ - if (!bfd_link_pic (info) || !h->non_got_ref) + if (!bfd_link_pic (info)) *head = NULL; /* Finally, allocate space. */ diff --git a/bfd/elf32-arc.c b/bfd/elf32-arc.c index 5f1505e..b00207e 100644 --- a/bfd/elf32-arc.c +++ b/bfd/elf32-arc.c @@ -29,6 +29,10 @@ #include "opcode/arc.h" #include "arc-plt.h" +#define FEATURE_LIST_NAME bfd_feature_list +#define CONFLICT_LIST bfd_conflict_list +#include "opcode/arc-attrs.h" + /* #define ARC_ENABLE_DEBUG 1 */ #ifdef ARC_ENABLE_DEBUG static const char * @@ -442,8 +446,9 @@ arc_elf_print_private_bfd_data (bfd *abfd, void * ptr) case E_ARC_OSABI_ORIG : fprintf (file, " (ABI:legacy)"); break; case E_ARC_OSABI_V2 : fprintf (file, " (ABI:v2)"); break; case E_ARC_OSABI_V3 : fprintf (file, " (ABI:v3)"); break; + case E_ARC_OSABI_V4 : fprintf (file, " (ABI:v4)"); break; default: - fprintf (file, "(ABI:unknown)"); + fprintf (file, " (ABI:unknown)"); break; } @@ -500,6 +505,301 @@ arc_info_to_howto_rel (bfd * abfd ATTRIBUTE_UNUSED, cache_ptr->howto = arc_elf_howto (r_type); } +/* Extract CPU features from an NTBS. */ + +static unsigned +arc_extract_features (const char *p) +{ + unsigned i, r = 0; + + if (!p) + return 0; + + for (i = 0; i < ARRAY_SIZE (bfd_feature_list); i++) + { + char *t = strstr (p, bfd_feature_list[i].attr); + unsigned l = strlen (bfd_feature_list[i].attr); + if ((t != NULL) + && (t[l] == ',' + || t[l] == '\0')) + r |= bfd_feature_list[i].feature; + } hooks/post-receive -- Repository for Project Archer.