From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7803) id 881133858D32; Thu, 7 Jul 2022 04:22:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 881133858D32 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Nelson Chu To: bfd-cvs@sourceware.org Subject: [binutils-gdb] RISC-V: Fix disassembling Zfinx with -M numeric X-Act-Checkin: binutils-gdb X-Git-Author: Tsukasa OI X-Git-Refname: refs/heads/master X-Git-Oldrev: 37cf60c6a6d36bbf5cf1523697906c4bdb4eb468 X-Git-Newrev: 3d5d6bd55433735c4fc620a47b543065582d06ae Message-Id: <20220707042256.881133858D32@sourceware.org> Date: Thu, 7 Jul 2022 04:22:56 +0000 (GMT) X-BeenThere: binutils-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Jul 2022 04:22:56 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D3d5d6bd55433= 735c4fc620a47b543065582d06ae commit 3d5d6bd55433735c4fc620a47b543065582d06ae Author: Tsukasa OI Date: Mon Jun 27 11:03:44 2022 +0900 RISC-V: Fix disassembling Zfinx with -M numeric =20 This commit fixes floating point operand register names from ABI ones to dynamically set ones. =20 gas/ChangeLog: =20 * testsuite/gas/riscv/zfinx-dis-numeric.s: Test new behavior of Zfinx extension and -M numeric disassembler option. * testsuite/gas/riscv/zfinx-dis-numeric.d: Likewise. =20 opcodes/ChangeLog: =20 * riscv-dis.c (riscv_disassemble_insn): Use dynamically set GPR names to disassemble Zfinx instructions. Diff: --- gas/testsuite/gas/riscv/zfinx-dis-numeric.d | 10 ++++++++++ gas/testsuite/gas/riscv/zfinx-dis-numeric.s | 2 ++ opcodes/riscv-dis.c | 2 +- 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/gas/testsuite/gas/riscv/zfinx-dis-numeric.d b/gas/testsuite/ga= s/riscv/zfinx-dis-numeric.d new file mode 100644 index 00000000000..ba3f62295eb --- /dev/null +++ b/gas/testsuite/gas/riscv/zfinx-dis-numeric.d @@ -0,0 +1,10 @@ +#as: -march=3Drv64ima_zfinx +#source: zfinx-dis-numeric.s +#objdump: -dr -Mnumeric + +.*:[ ]+file format .* + +Disassembly of section .text: + +0+000 : +[ ]+[0-9a-f]+:[ ]+a0c5a553[ ]+feq.s[ ]+x10,x11,x12 diff --git a/gas/testsuite/gas/riscv/zfinx-dis-numeric.s b/gas/testsuite/ga= s/riscv/zfinx-dis-numeric.s new file mode 100644 index 00000000000..b55cbd56b21 --- /dev/null +++ b/gas/testsuite/gas/riscv/zfinx-dis-numeric.s @@ -0,0 +1,2 @@ +target: + feq.s a0, a1, a2 diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c index 9ff31167775..164fd209dbd 100644 --- a/opcodes/riscv-dis.c +++ b/opcodes/riscv-dis.c @@ -639,7 +639,7 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, d= isassemble_info *info) =20 /* If arch has ZFINX flags, use gpr for disassemble. */ if(riscv_subset_supports (&riscv_rps_dis, "zfinx")) - riscv_fpr_names =3D riscv_gpr_names_abi; + riscv_fpr_names =3D riscv_gpr_names; =20 for (; op->name; op++) {