[binutils-gdb] x86: replace wrong attributes on VCVTDQ2PH{X,Y}

[binutils-gdb] x86: replace wrong attributes on VCVTDQ2PH{X,Y}

[Jan Beulich]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=ea09fe92596fbb2a5da4595459bfe8b23789ec8d

commit ea09fe92596fbb2a5da4595459bfe8b23789ec8d
Author: Jan Beulich <jbeulich@suse.com>
Date:   Thu Jul 21 12:32:25 2022 +0200

    x86: replace wrong attributes on VCVTDQ2PH{X,Y}
    
    A standalone (without SAE) StaticRounding attribute is meaningless, and
    indeed all other similar insns have ATTSyntax there instead. I can only
    assume this was some strange copy-and-paste mistake.

Diff:
---
 opcodes/i386-opc.tbl | 4 ++--
 opcodes/i386-tbl.h   | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 3165552b479..b76febd147e 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3560,8 +3560,8 @@ vucomish, 0x2e, None, CpuAVX512_FP16, Modrm|EVexLIG|EVexMap5|VexW0|Disp8MemShift
 
 vcvtdq2ph, 0x5b, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3|EVexMap5|VexW0|Broadcast|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { RegZMM|Dword|Unspecified|BaseIndex, RegYMM }
 vcvtdq2ph, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM|Dword|BaseIndex, RegXMM }
-vcvtdq2phx, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW0|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding, { RegXMM|Unspecified|BaseIndex, RegXMM }
-vcvtdq2phy, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW0|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding, { RegYMM|Unspecified|BaseIndex, RegXMM }
+vcvtdq2phx, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW0|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Unspecified|BaseIndex, RegXMM }
+vcvtdq2phy, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW0|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Unspecified|BaseIndex, RegXMM }
 
 vcvtudq2ph, 0xf27a, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3|EVexMap5|VexW0|Broadcast|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { RegZMM|Dword|Unspecified|BaseIndex, RegYMM }
 vcvtudq2ph, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM|Dword|BaseIndex, RegXMM }
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index e0bd4e6037f..6f3a7579fe7 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -56755,7 +56755,7 @@ const insn_template i386_optab[] =
   { "vcvtdq2phx", 0x5b, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 5, 0, 0, 0,
-      0, 2, 3, 0, 1, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0 },
+      0, 2, 3, 0, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -56770,7 +56770,7 @@ const insn_template i386_optab[] =
   { "vcvtdq2phy", 0x5b, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 5, 0, 0, 0,
-      0, 3, 3, 0, 1, 0, 5, 0, 0, 0, 0, 0, 0, 0, 0 },
+      0, 3, 3, 0, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,