From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1386) id 3F9203851157; Wed, 3 Aug 2022 07:01:30 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3F9203851157 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Jan Beulich To: bfd-cvs@sourceware.org Subject: [binutils-gdb] x86: improve/shorten vector zeroing-idiom optimization conditional X-Act-Checkin: binutils-gdb X-Git-Author: Jan Beulich X-Git-Refname: refs/heads/master X-Git-Oldrev: 0aea480cd8e1656c2cc09ea9fa0318941bafba24 X-Git-Newrev: 5844ccaac7d7e628b8c3feea725d87fd4bafbdf6 Message-Id: <20220803070130.3F9203851157@sourceware.org> Date: Wed, 3 Aug 2022 07:01:30 +0000 (GMT) X-BeenThere: binutils-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Aug 2022 07:01:30 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D5844ccaac7d7= e628b8c3feea725d87fd4bafbdf6 commit 5844ccaac7d7e628b8c3feea725d87fd4bafbdf6 Author: Jan Beulich Date: Wed Aug 3 09:01:10 2022 +0200 x86: improve/shorten vector zeroing-idiom optimization conditional =20 - Drop the rounding type check: We're past template matching, and none of the involved insns support embedded rounding. - Drop the extension opcode check: None of the involved opcodes have variants with it being other than None. - Instead check opcode space, even if just to be on the safe side going forward. - Reduce the number of comparisons by folding two groups. Diff: --- gas/config/tc-i386.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 78dad4ebdf1..62d583be47c 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -4329,24 +4329,19 @@ optimize_encoding (void) && !i.types[2].bitfield.xmmword && (i.tm.opcode_modifier.vex || ((!i.mask.reg || i.mask.zeroing) - && i.rounding.type =3D=3D rc_none && is_evex_encoding (&i.tm) && (i.vec_encoding !=3D vex_encoding_evex || cpu_arch_isa_flags.bitfield.cpuavx512vl || i.tm.cpu_flags.bitfield.cpuavx512vl || (i.tm.operand_types[2].bitfield.zmmword && i.types[2].bitfield.ymmword)))) - && ((i.tm.base_opcode =3D=3D 0x55 - || i.tm.base_opcode =3D=3D 0x57 - || i.tm.base_opcode =3D=3D 0xdf - || i.tm.base_opcode =3D=3D 0xef - || i.tm.base_opcode =3D=3D 0xf8 - || i.tm.base_opcode =3D=3D 0xf9 - || i.tm.base_opcode =3D=3D 0xfa - || i.tm.base_opcode =3D=3D 0xfb - || i.tm.base_opcode =3D=3D 0x42 - || i.tm.base_opcode =3D=3D 0x47) - && i.tm.extension_opcode =3D=3D None)) + && i.tm.opcode_modifier.opcodespace =3D=3D SPACE_0F + && ((i.tm.base_opcode | 2) =3D=3D 0x57 + || i.tm.base_opcode =3D=3D 0xdf + || i.tm.base_opcode =3D=3D 0xef + || (i.tm.base_opcode | 3) =3D=3D 0xfb + || i.tm.base_opcode =3D=3D 0x42 + || i.tm.base_opcode =3D=3D 0x47)) { /* Optimize: -O1: VOP, one of vandnps, vandnpd, vxorps, vxorpd, vpsubb, vpsubd,