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From: Jan Beulich <jbeulich@sourceware.org>
To: bfd-cvs@sourceware.org
Subject: [binutils-gdb] x86: allow use of broadcast with X/Y/Z-suffixed
 AVX512-FP16 insns
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https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D3fbe5a01086c=
a3e68475b111e9a274b1df6fc4a7

commit 3fbe5a01086ca3e68475b111e9a274b1df6fc4a7
Author: Jan Beulich <jbeulich@suse.com>
Date:   Tue Aug 9 09:18:35 2022 +0200

    x86: allow use of broadcast with X/Y/Z-suffixed AVX512-FP16 insns
   =20
    While the x/y/z suffix isn't necessary to use in this case, it is still
    odd that these forms don't support broadcast (unlike their AVX512F /
    AVX512DQ counterparts). The lack thereof can e.g. make macro-ized
    programming more difficult.

Diff:
---
 gas/testsuite/gas/i386/avx512_fp16-intel.d    |  1 +
 gas/testsuite/gas/i386/avx512_fp16.d          |  1 +
 gas/testsuite/gas/i386/avx512_fp16.s          |  1 +
 gas/testsuite/gas/i386/avx512_fp16_vl-intel.d |  2 +
 gas/testsuite/gas/i386/avx512_fp16_vl.d       |  2 +
 gas/testsuite/gas/i386/avx512_fp16_vl.s       |  2 +
 opcodes/i386-opc.tbl                          | 36 +++++++-------
 opcodes/i386-tbl.h                            | 72 +++++++++++++----------=
----
 8 files changed, 63 insertions(+), 54 deletions(-)

diff --git a/gas/testsuite/gas/i386/avx512_fp16-intel.d b/gas/testsuite/gas=
/i386/avx512_fp16-intel.d
index ffa09ac084a..7dd1b97cf2c 100644
--- a/gas/testsuite/gas/i386/avx512_fp16-intel.d
+++ b/gas/testsuite/gas/i386/avx512_fp16-intel.d
@@ -546,6 +546,7 @@ Disassembly of section \.text:
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 58 66 29 7b[ 	 ]*vfpclassph k5,WORD BCST \[ec=
x\]\{1to32\},0x7b
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 48 66 69 7f 7b[ 	 ]*vfpclassph k5,ZMMWORD PTR=
 \[ecx\+0x1fc0\],0x7b
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 5f 66 6a 80 7b[ 	 ]*vfpclassph k5\{k7\},WORD =
BCST \[edx-0x100\]\{1to32\},0x7b
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 58 66 69 01 7b[ 	 ]*vfpclassph k5,WORD BCST \=
[ecx\+0x2\]\{1to32\},0x7b
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 08 67 ee 7b[ 	 ]*vfpclasssh k5,xmm6,0x7b
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 0f 67 ee 7b[ 	 ]*vfpclasssh k5\{k7\},xmm6,0x7b
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 0f 67 ac f4 00 00 00 10 7b[ 	 ]*vfpclasssh k5=
\{k7\},WORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
diff --git a/gas/testsuite/gas/i386/avx512_fp16.d b/gas/testsuite/gas/i386/=
avx512_fp16.d
index 19860d5349a..027d47fbd91 100644
--- a/gas/testsuite/gas/i386/avx512_fp16.d
+++ b/gas/testsuite/gas/i386/avx512_fp16.d
@@ -546,6 +546,7 @@ Disassembly of section \.text:
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 58 66 29 7b[ 	]*vfpclassph \$0x7b,\(%ecx\)\{1=
to32\},%k5
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 48 66 69 7f 7b[ 	]*vfpclassphz \$0x7b,0x1fc0\=
(%ecx\),%k5
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 5f 66 6a 80 7b[ 	]*vfpclassph \$0x7b,-0x100\(=
%edx\)\{1to32\},%k5\{%k7\}
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 58 66 69 01 7b[ 	]*vfpclassph \$0x7b,0x2\(%ec=
x\)\{1to32\},%k5
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 08 67 ee 7b[ 	]*vfpclasssh \$0x7b,%xmm6,%k5
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 0f 67 ee 7b[ 	]*vfpclasssh \$0x7b,%xmm6,%k5\{=
%k7\}
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 0f 67 ac f4 00 00 00 10 7b[ 	]*vfpclasssh \$0=
x7b,0x10000000\(%esp,%esi,8\),%k5\{%k7\}
diff --git a/gas/testsuite/gas/i386/avx512_fp16.s b/gas/testsuite/gas/i386/=
avx512_fp16.s
index e9fa46c6661..1e8f6dc4618 100644
--- a/gas/testsuite/gas/i386/avx512_fp16.s
+++ b/gas/testsuite/gas/i386/avx512_fp16.s
@@ -541,6 +541,7 @@ _start:
 	vfpclassph	$123, (%ecx){1to32}, %k5	 #AVX512-FP16 BROADCAST_EN
 	vfpclassphz	$123, 8128(%ecx), %k5	 #AVX512-FP16 Disp8(7f)
 	vfpclassph	$123, -256(%edx){1to32}, %k5{%k7}	 #AVX512-FP16 BROADCAST_EN D=
isp8(80) MASK_ENABLING
+	vfpclassphz	$123, 2(%ecx){1to32}, %k5	 #AVX512-FP16 BROADCAST_EN
 	vfpclasssh	$123, %xmm6, %k5	 #AVX512-FP16
 	vfpclasssh	$123, %xmm6, %k5{%k7}	 #AVX512-FP16 MASK_ENABLING
 	vfpclasssh	$123, 0x10000000(%esp, %esi, 8), %k5{%k7}	 #AVX512-FP16 MASK_E=
NABLING
diff --git a/gas/testsuite/gas/i386/avx512_fp16_vl-intel.d b/gas/testsuite/=
gas/i386/avx512_fp16_vl-intel.d
index 76a29525d48..b1f7502188c 100755
--- a/gas/testsuite/gas/i386/avx512_fp16_vl-intel.d
+++ b/gas/testsuite/gas/i386/avx512_fp16_vl-intel.d
@@ -574,9 +574,11 @@ Disassembly of section \.text:
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 18 66 29 7b[ 	 ]*vfpclassph k5,WORD BCST \[ec=
x\]\{1to8\},0x7b
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 08 66 69 7f 7b[ 	 ]*vfpclassph k5,XMMWORD PTR=
 \[ecx\+0x7f0\],0x7b
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 1f 66 6a 80 7b[ 	 ]*vfpclassph k5\{k7\},WORD =
BCST \[edx-0x100\]\{1to8\},0x7b
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 18 66 69 01 7b[ 	 ]*vfpclassph k5,WORD BCST \=
[ecx\+0x2\]\{1to8\},0x7b
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 38 66 29 7b[ 	 ]*vfpclassph k5,WORD BCST \[ec=
x\]\{1to16\},0x7b
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 28 66 69 7f 7b[ 	 ]*vfpclassph k5,YMMWORD PTR=
 \[ecx\+0xfe0\],0x7b
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 3f 66 6a 80 7b[ 	 ]*vfpclassph k5\{k7\},WORD =
BCST \[edx-0x100\]\{1to16\},0x7b
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 38 66 69 01 7b[ 	 ]*vfpclassph k5,WORD BCST \=
[ecx\+0x2\]\{1to16\},0x7b
 [ 	]*[a-f0-9]+:[ 	]*62 f6 7d 08 42 f5[ 	 ]*vgetexpph xmm6,xmm5
 [ 	]*[a-f0-9]+:[ 	]*62 f6 7d 8f 42 f5[ 	 ]*vgetexpph xmm6\{k7\}\{z\},xmm5
 [ 	]*[a-f0-9]+:[ 	]*62 f6 7d 28 42 f5[ 	 ]*vgetexpph ymm6,ymm5
diff --git a/gas/testsuite/gas/i386/avx512_fp16_vl.d b/gas/testsuite/gas/i3=
86/avx512_fp16_vl.d
index ee8353c1387..f923c545af1 100755
--- a/gas/testsuite/gas/i386/avx512_fp16_vl.d
+++ b/gas/testsuite/gas/i386/avx512_fp16_vl.d
@@ -574,9 +574,11 @@ Disassembly of section \.text:
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 18 66 29 7b[ 	]*vfpclassph \$0x7b,\(%ecx\)\{1=
to8\},%k5
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 08 66 69 7f 7b[ 	]*vfpclassphx \$0x7b,0x7f0\(=
%ecx\),%k5
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 1f 66 6a 80 7b[ 	]*vfpclassph \$0x7b,-0x100\(=
%edx\)\{1to8\},%k5\{%k7\}
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 18 66 69 01 7b[ 	]*vfpclassph \$0x7b,0x2\(%ec=
x\)\{1to8\},%k5
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 38 66 29 7b[ 	]*vfpclassph \$0x7b,\(%ecx\)\{1=
to16\},%k5
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 28 66 69 7f 7b[ 	]*vfpclassphy \$0x7b,0xfe0\(=
%ecx\),%k5
 [ 	]*[a-f0-9]+:[ 	]*62 f3 7c 3f 66 6a 80 7b[ 	]*vfpclassph \$0x7b,-0x100\(=
%edx\)\{1to16\},%k5\{%k7\}
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 38 66 69 01 7b[ 	]*vfpclassph \$0x7b,0x2\(%ec=
x\)\{1to16\},%k5
 [ 	]*[a-f0-9]+:[ 	]*62 f6 7d 08 42 f5[ 	]*vgetexpph %xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*62 f6 7d 8f 42 f5[ 	]*vgetexpph %xmm5,%xmm6\{%k7\}\{z\}
 [ 	]*[a-f0-9]+:[ 	]*62 f6 7d 28 42 f5[ 	]*vgetexpph %ymm5,%ymm6
diff --git a/gas/testsuite/gas/i386/avx512_fp16_vl.s b/gas/testsuite/gas/i3=
86/avx512_fp16_vl.s
index 6818727aeda..b00739c233d 100644
--- a/gas/testsuite/gas/i386/avx512_fp16_vl.s
+++ b/gas/testsuite/gas/i386/avx512_fp16_vl.s
@@ -569,9 +569,11 @@ _start:
 	vfpclassph	$123, (%ecx){1to8}, %k5	 #AVX512-FP16,AVX512VL BROADCAST_EN
 	vfpclassphx	$123, 2032(%ecx), %k5	 #AVX512-FP16,AVX512VL Disp8(7f)
 	vfpclassph	$123, -256(%edx){1to8}, %k5{%k7}	 #AVX512-FP16,AVX512VL BROADC=
AST_EN Disp8(80) MASK_ENABLING
+	vfpclassphx	$123, 2(%ecx){1to8}, %k5	 #AVX512-FP16,AVX512VL BROADCAST_EN
 	vfpclassph	$123, (%ecx){1to16}, %k5	 #AVX512-FP16,AVX512VL BROADCAST_EN
 	vfpclassphy	$123, 4064(%ecx), %k5	 #AVX512-FP16,AVX512VL Disp8(7f)
 	vfpclassph	$123, -256(%edx){1to16}, %k5{%k7}	 #AVX512-FP16,AVX512VL BROAD=
CAST_EN Disp8(80) MASK_ENABLING
+	vfpclassphy	$123, 2(%ecx){1to16}, %k5	 #AVX512-FP16,AVX512VL BROADCAST_EN
 	vgetexpph	%xmm5, %xmm6	 #AVX512-FP16,AVX512VL
 	vgetexpph	%xmm5, %xmm6{%k7}{z}	 #AVX512-FP16,AVX512VL MASK_ENABLING ZEROC=
TL
 	vgetexpph	%ymm5, %ymm6	 #AVX512-FP16,AVX512VL
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index e292970029b..d3b53661955 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3560,38 +3560,38 @@ vucomish, 0x2e, None, CpuAVX512_FP16, Modrm|EVexLIG=
|EVexMap5|VexW0|Disp8MemShift
 vcvtdq2ph, 0x5b, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3D3|EVexMap5|=
VexW0|Broadcast|Disp8MemShift=3D6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|N=
o_ldSuf|StaticRounding|SAE, { RegZMM|Dword|Unspecified|BaseIndex, RegYMM }
 vcvtdq2ph, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3D3|EVexM=
ap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No=
_ldSuf|IntelSyntax, { RegXMM|RegYMM|Dword|Unspecified|BaseIndex, RegXMM }
 vcvtdq2ph, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3D3|EVexM=
ap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No=
_ldSuf|ATTSyntax, { RegXMM|RegYMM|Dword|BaseIndex, RegXMM }
-vcvtdq2phx, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=
=3D3|EVexMap5|VexW0|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qS=
uf|No_ldSuf|ATTSyntax, { RegXMM|Unspecified|BaseIndex, RegXMM }
-vcvtdq2phy, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=
=3D3|EVexMap5|VexW0|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qS=
uf|No_ldSuf|ATTSyntax, { RegYMM|Unspecified|BaseIndex, RegXMM }
+vcvtdq2phx, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=
=3D3|EVexMap5|VexW0|Broadcast|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|No_=
sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Dword|Unspecified|BaseIndex, RegX=
MM }
+vcvtdq2phy, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=
=3D3|EVexMap5|VexW0|Broadcast|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|No_=
sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Dword|Unspecified|BaseIndex, RegX=
MM }
=20
 vcvtudq2ph, 0xf27a, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3D3|EVexMa=
p5|VexW0|Broadcast|Disp8MemShift=3D6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSu=
f|No_ldSuf|StaticRounding|SAE, { RegZMM|Dword|Unspecified|BaseIndex, RegYMM=
 }
 vcvtudq2ph, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3D3|EV=
exMap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf=
|No_ldSuf|IntelSyntax, { RegXMM|RegYMM|Dword|Unspecified|BaseIndex, RegXMM }
 vcvtudq2ph, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3D3|EV=
exMap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf=
|No_ldSuf|ATTSyntax, { RegXMM|RegYMM|Dword|BaseIndex, RegXMM }
-vcvtudq2phx, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Maski=
ng=3D3|EVexMap5|VexW0|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_=
qSuf|No_ldSuf|ATTSyntax, { RegXMM|Unspecified|BaseIndex, RegXMM }
-vcvtudq2phy, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Maski=
ng=3D3|EVexMap5|VexW0|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_=
qSuf|No_ldSuf|ATTSyntax, { RegYMM|Unspecified|BaseIndex, RegXMM }
+vcvtudq2phx, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Maski=
ng=3D3|EVexMap5|VexW0|Broadcast|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|N=
o_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Dword|Unspecified|BaseIndex, Re=
gXMM }
+vcvtudq2phy, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Maski=
ng=3D3|EVexMap5|VexW0|Broadcast|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|N=
o_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Dword|Unspecified|BaseIndex, Re=
gXMM }
=20
 vcvtqq2ph, 0x5b, None, CpuAVX512_FP16, Modrm|Masking=3D3|EVexMap5|VexW1|Br=
oadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Stati=
cRounding|SAE|IntelSyntax, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseInd=
ex, RegXMM }
 vcvtqq2ph, 0x5b, None, CpuAVX512_FP16, Modrm|Masking=3D3|EVexMap5|VexW1|Br=
oadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Stati=
cRounding|SAE|ATTSyntax, { RegXMM|RegYMM|RegZMM|Qword|BaseIndex, RegXMM }
-vcvtqq2phz, 0x5b, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3D3|EVexMap5=
|VexW1|Disp8MemShift=3D6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|S=
taticRounding|SAE|ATTSyntax, { RegZMM|Unspecified|BaseIndex, RegXMM }
-vcvtqq2phx, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=
=3D3|EVexMap5|VexW1|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qS=
uf|No_ldSuf|ATTSyntax, { RegXMM|Unspecified|BaseIndex, RegXMM }
-vcvtqq2phy, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=
=3D3|EVexMap5|VexW1|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qS=
uf|No_ldSuf|ATTSyntax, { RegYMM|Unspecified|BaseIndex, RegXMM }
+vcvtqq2phz, 0x5b, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3D3|EVexMap5=
|VexW1|Broadcast|Disp8MemShift=3D6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|=
No_ldSuf|StaticRounding|SAE|ATTSyntax, { RegZMM|Qword|Unspecified|BaseIndex=
, RegXMM }
+vcvtqq2phx, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=
=3D3|EVexMap5|VexW1|Broadcast|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|No_=
sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Qword|Unspecified|BaseIndex, RegX=
MM }
+vcvtqq2phy, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=
=3D3|EVexMap5|VexW1|Broadcast|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|No_=
sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Qword|Unspecified|BaseIndex, RegX=
MM }
=20
 vcvtuqq2ph, 0xf27a, None, CpuAVX512_FP16, Modrm|Masking=3D3|EVexMap5|VexW1=
|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|St=
aticRounding|SAE|IntelSyntax, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|Base=
Index, RegXMM }
 vcvtuqq2ph, 0xf27a, None, CpuAVX512_FP16, Modrm|Masking=3D3|EVexMap5|VexW1=
|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|St=
aticRounding|SAE|ATTSyntax, { RegXMM|RegYMM|RegZMM|Qword|BaseIndex, RegXMM }
-vcvtuqq2phz, 0xf27a, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3D3|EVexM=
ap5|VexW1|Disp8MemShift=3D6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSu=
f|StaticRounding|SAE|ATTSyntax, { RegZMM|Unspecified|BaseIndex, RegXMM }
-vcvtuqq2phx, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Maski=
ng=3D3|EVexMap5|VexW1|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_=
qSuf|No_ldSuf|ATTSyntax, { RegXMM|Unspecified|BaseIndex, RegXMM }
-vcvtuqq2phy, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Maski=
ng=3D3|EVexMap5|VexW1|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_=
qSuf|No_ldSuf|ATTSyntax, { RegYMM|Unspecified|BaseIndex, RegXMM }
+vcvtuqq2phz, 0xf27a, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3D3|EVexM=
ap5|VexW1|Broadcast|Disp8MemShift=3D6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qS=
uf|No_ldSuf|StaticRounding|SAE|ATTSyntax, { RegZMM|Qword|Unspecified|BaseIn=
dex, RegXMM }
+vcvtuqq2phx, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Maski=
ng=3D3|EVexMap5|VexW1|Broadcast|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|N=
o_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Qword|Unspecified|BaseIndex, Re=
gXMM }
+vcvtuqq2phy, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Maski=
ng=3D3|EVexMap5|VexW1|Broadcast|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|N=
o_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Qword|Unspecified|BaseIndex, Re=
gXMM }
=20
 vcvtpd2ph, 0x665a, None, CpuAVX512_FP16, Modrm|Masking=3D3|EVexMap5|VexW1|=
Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Sta=
ticRounding|SAE|IntelSyntax, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseI=
ndex, RegXMM }
 vcvtpd2ph, 0x665a, None, CpuAVX512_FP16, Modrm|Masking=3D3|EVexMap5|VexW1|=
Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Sta=
ticRounding|SAE|ATTSyntax, { RegXMM|RegYMM|RegZMM|Qword|BaseIndex, RegXMM }
-vcvtpd2phx, 0x665a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Maskin=
g=3D3|EVexMap5|VexW1|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_q=
Suf|No_ldSuf|ATTSyntax, { RegXMM|Unspecified|BaseIndex, RegXMM }
-vcvtpd2phy, 0x665a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Maskin=
g=3D3|EVexMap5|VexW1|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_q=
Suf|No_ldSuf|ATTSyntax, { RegYMM|Unspecified|BaseIndex, RegXMM }
-vcvtpd2phz, 0x665a, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3D3|EVexMa=
p5|VexW1|Disp8MemShift=3D6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf=
|StaticRounding|SAE|ATTSyntax, { RegZMM|Unspecified|BaseIndex, RegXMM }
+vcvtpd2phx, 0x665a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Maskin=
g=3D3|EVexMap5|VexW1|Broadcast|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|No=
_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Qword|Unspecified|BaseIndex, Reg=
XMM }
+vcvtpd2phy, 0x665a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Maskin=
g=3D3|EVexMap5|VexW1|Broadcast|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|No=
_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Qword|Unspecified|BaseIndex, Reg=
XMM }
+vcvtpd2phz, 0x665a, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3D3|EVexMa=
p5|VexW1|Broadcast|Disp8MemShift=3D6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSu=
f|No_ldSuf|StaticRounding|SAE|ATTSyntax, { RegZMM|Qword|Unspecified|BaseInd=
ex, RegXMM }
=20
 vcvtps2phx, 0x661d, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3D3|EVexMa=
p5|VexW0|Broadcast|Disp8MemShift=3D6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSu=
f|No_ldSuf|StaticRounding|SAE, { RegZMM|Dword|Unspecified|BaseIndex, RegYMM=
 }
 vcvtps2phx, 0x661d, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3D3|EV=
exMap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf=
|No_ldSuf|IntelSyntax, { RegXMM|RegYMM|Dword|Unspecified|BaseIndex, RegXMM }
 vcvtps2phx, 0x661d, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3D3|EV=
exMap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf=
|No_ldSuf|ATTSyntax, { RegXMM|RegYMM|Dword|BaseIndex, RegXMM }
-vcvtps2phxx, 0x661d, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Maski=
ng=3D3|EVexMap5|VexW0|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_=
qSuf|No_ldSuf|ATTSyntax, { RegXMM|Unspecified|BaseIndex, RegXMM }
-vcvtps2phxy, 0x661d, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Maski=
ng=3D3|EVexMap5|VexW0|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_=
qSuf|No_ldSuf|ATTSyntax, { RegYMM|Unspecified|BaseIndex, RegXMM }
+vcvtps2phxx, 0x661d, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Maski=
ng=3D3|EVexMap5|VexW0|Broadcast|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|N=
o_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Dword|Unspecified|BaseIndex, Re=
gXMM }
+vcvtps2phxy, 0x661d, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Maski=
ng=3D3|EVexMap5|VexW0|Broadcast|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|N=
o_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Dword|Unspecified|BaseIndex, Re=
gXMM }
=20
 vcvtw2ph, 0xf37d, None, CpuAVX512_FP16, Modrm|Masking=3D3|EVexMap5|VexW0|B=
roadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|=
No_ldSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIn=
dex, RegXMM|RegYMM|RegZMM }
 vcvtuw2ph, 0xf27d, None, CpuAVX512_FP16, Modrm|Masking=3D3|EVexMap5|VexW0|=
Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf=
|No_ldSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseI=
ndex, RegXMM|RegYMM|RegZMM }
@@ -3675,9 +3675,9 @@ vfnmsub<fma>ph, 0x668e | 0x<fma:opc>, None, CpuAVX512=
_FP16, Modrm|VexVVVV|Maskin
 vfnmsub<fma>sh, 0x668f | 0x<fma:opc>, None, CpuAVX512_FP16, Modrm|EVexLIG|=
VexVVVV|Masking=3D3|EVexMap6|VexW0|Disp8MemShift=3D1|No_bSuf|No_wSuf|No_lSu=
f|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { RegXMM|Word|Unspecified|Ba=
seIndex, RegXMM, RegXMM }
=20
 vfpclassph, 0x66, None, CpuAVX512_FP16, Modrm|Masking=3D2|Space0F3A|VexW0|=
Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { =
Imm8, RegXMM|RegYMM|RegZMM|Word|BaseIndex, RegMask }
-vfpclassphz, 0x66, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3D2|Space0F=
3A|VexW0|Disp8MemShift=3D6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf=
|ATTSyntax, { Imm8, RegZMM|Unspecified|BaseIndex, RegMask }
-vfpclassphx, 0x66, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=
=3D2|Space0F3A|VexW0|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_q=
Suf|No_ldSuf|ATTSyntax, { Imm8, RegXMM|Unspecified|BaseIndex, RegMask }
-vfpclassphy, 0x66, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=
=3D2|Space0F3A|VexW0|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_q=
Suf|No_ldSuf|ATTSyntax, { Imm8, RegYMM|Unspecified|BaseIndex, RegMask }
+vfpclassphz, 0x66, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3D2|Space0F=
3A|VexW0|Broadcast|Disp8MemShift=3D6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSu=
f|No_ldSuf|ATTSyntax, { Imm8, RegZMM|Word|Unspecified|BaseIndex, RegMask }
+vfpclassphx, 0x66, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=
=3D2|Space0F3A|VexW0|Broadcast|Disp8MemShift=3D4|No_bSuf|No_wSuf|No_lSuf|No=
_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegXMM|Word|Unspecified|BaseIndex=
, RegMask }
+vfpclassphy, 0x66, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=
=3D2|Space0F3A|VexW0|Broadcast|Disp8MemShift=3D5|No_bSuf|No_wSuf|No_lSuf|No=
_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegYMM|Word|Unspecified|BaseIndex=
, RegMask }
 vfpclasssh, 0x67, None, CpuAVX512_FP16, Modrm|EVexLIG|Masking=3D2|Space0F3=
A|VexW0|Disp8MemShift=3D1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf,=
 { Imm8, RegXMM|Word|Unspecified|BaseIndex, RegMask }
=20
 vgetmantph, 0x26, None, CpuAVX512_FP16, Modrm|Masking=3D3|Space0F3A|VexW0|=
Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf=
|No_ldSuf|SAE, { Imm8, RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, Reg=
XMM|RegYMM|RegZMM }
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 03c8dbf0ea2..31fa20842dd 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -56755,7 +56755,7 @@ const insn_template i386_optab[] =3D
   { "vcvtdq2phx", 0x5b, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 5, 0, 0, 0,
-      0, 2, 3, 0, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 2, 3, 3, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -56763,14 +56763,14 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
   { "vcvtdq2phy", 0x5b, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 5, 0, 0, 0,
-      0, 3, 3, 0, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 3, 3, 3, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -56778,7 +56778,7 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  0, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
@@ -56830,7 +56830,7 @@ const insn_template i386_optab[] =3D
   { "vcvtudq2phx", 0x7a, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 5, 3, 0, 0,
-      0, 2, 3, 0, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 2, 3, 3, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -56838,14 +56838,14 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
   { "vcvtudq2phy", 0x7a, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 5, 3, 0, 0,
-      0, 3, 3, 0, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 3, 3, 3, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -56853,7 +56853,7 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  0, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
@@ -56890,7 +56890,7 @@ const insn_template i386_optab[] =3D
   { "vcvtqq2phz", 0x5b, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 5, 0, 0, 0,
-      0, 1, 3, 0, 1, 1, 6, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 1, 3, 4, 1, 1, 6, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -56898,14 +56898,14 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  0, 0, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
   { "vcvtqq2phx", 0x5b, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 5, 0, 0, 0,
-      0, 2, 3, 0, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 2, 3, 4, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -56913,14 +56913,14 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
   { "vcvtqq2phy", 0x5b, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 5, 0, 0, 0,
-      0, 3, 3, 0, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 3, 3, 4, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -56928,7 +56928,7 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  0, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
@@ -56965,7 +56965,7 @@ const insn_template i386_optab[] =3D
   { "vcvtuqq2phz", 0x7a, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 5, 3, 0, 0,
-      0, 1, 3, 0, 1, 1, 6, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 1, 3, 4, 1, 1, 6, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -56973,14 +56973,14 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  0, 0, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
   { "vcvtuqq2phx", 0x7a, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 5, 3, 0, 0,
-      0, 2, 3, 0, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 2, 3, 4, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -56988,14 +56988,14 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
   { "vcvtuqq2phy", 0x7a, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 5, 3, 0, 0,
-      0, 3, 3, 0, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 3, 3, 4, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -57003,7 +57003,7 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  0, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
@@ -57040,7 +57040,7 @@ const insn_template i386_optab[] =3D
   { "vcvtpd2phx", 0x5a, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 5, 1, 0, 0,
-      0, 2, 3, 0, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 2, 3, 4, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -57048,14 +57048,14 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
   { "vcvtpd2phy", 0x5a, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 5, 1, 0, 0,
-      0, 3, 3, 0, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 3, 3, 4, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -57063,14 +57063,14 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  0, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
   { "vcvtpd2phz", 0x5a, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 5, 1, 0, 0,
-      0, 1, 3, 0, 1, 1, 6, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 1, 3, 4, 1, 1, 6, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -57078,7 +57078,7 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  0, 0, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
@@ -57130,7 +57130,7 @@ const insn_template i386_optab[] =3D
   { "vcvtps2phxx", 0x1d, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 5, 1, 0, 0,
-      0, 2, 3, 0, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 2, 3, 3, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -57138,14 +57138,14 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
   { "vcvtps2phxy", 0x1d, 2, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 5, 1, 0, 0,
-      0, 3, 3, 0, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 3, 3, 3, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -57153,7 +57153,7 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  0, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
@@ -58457,7 +58457,7 @@ const insn_template i386_optab[] =3D
   { "vfpclassphz", 0x66, 3, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 3, 0, 0, 0,
-      0, 1, 2, 0, 0, 0, 6, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 1, 2, 2, 0, 0, 6, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -58467,14 +58467,14 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
 	  0, 0, 1, 0, 1, 0 } },
       { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { "vfpclassphx", 0x66, 3, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 3, 0, 0, 0,
-      0, 2, 2, 0, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 2, 2, 2, 0, 0, 4, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -58484,14 +58484,14 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { "vfpclassphy", 0x66, 3, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 3, 0, 0, 0,
-      0, 3, 2, 0, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
+      0, 3, 2, 2, 0, 0, 5, 0, 0, 0, 0, 0, 1, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -58501,7 +58501,7 @@ const insn_template i386_optab[] =3D
         0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
 	  0, 1, 0, 0, 1, 0 } },
       { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },