From: Nelson Chu <nelsonc1225@sourceware.org>
To: bfd-cvs@sourceware.org
Subject: [binutils-gdb] RISC-V: Make g imply zmmul extension.
Date: Fri, 16 Sep 2022 01:36:14 +0000 (GMT) [thread overview]
Message-ID: <20220916013614.0C8813895FE3@sourceware.org> (raw)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=8838766ad6cbfbb41e254f008f6536957e54740b
commit 8838766ad6cbfbb41e254f008f6536957e54740b
Author: Nelson Chu <nelson@rivosinc.com>
Date: Fri Sep 16 09:11:52 2022 +0800
RISC-V: Make g imply zmmul extension.
bfd/
* elfxx-riscv.c (riscv_implicit_subset): Moved entry of m after g,
so that g can imply zmmul.
gas/
* testsuite/gas/riscv/attribute-01.d: Updated.
* testsuite/gas/riscv/attribute-02.d: Likewise.
* testsuite/gas/riscv/attribute-03.d: Likewise.
* testsuite/gas/riscv/attribute-04.d: Likewise.
* testsuite/gas/riscv/attribute-05.d: Likewise.
* testsuite/gas/riscv/attribute-10.d: Likewise.
* testsuite/gas/riscv/march-imply-g.d: Likewise.
* testsuite/gas/riscv/march-imply-unsupported.d: Likewise.
Diff:
---
bfd/elfxx-riscv.c | 2 +-
gas/testsuite/gas/riscv/attribute-01.d | 2 +-
gas/testsuite/gas/riscv/attribute-02.d | 2 +-
gas/testsuite/gas/riscv/attribute-03.d | 2 +-
gas/testsuite/gas/riscv/attribute-04.d | 2 +-
gas/testsuite/gas/riscv/attribute-05.d | 2 +-
gas/testsuite/gas/riscv/attribute-10.d | 2 +-
gas/testsuite/gas/riscv/march-imply-g.d | 2 +-
gas/testsuite/gas/riscv/march-imply-unsupported.d | 2 +-
9 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 8cb3c8d4930..e03b312a381 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1039,7 +1039,6 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
{"e", "i", check_implicit_always},
{"i", "zicsr", check_implicit_for_i},
{"i", "zifencei", check_implicit_for_i},
- {"m", "zmmul", check_implicit_always},
{"g", "i", check_implicit_always},
{"g", "m", check_implicit_always},
{"g", "a", check_implicit_always},
@@ -1047,6 +1046,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
{"g", "d", check_implicit_always},
{"g", "zicsr", check_implicit_always},
{"g", "zifencei", check_implicit_always},
+ {"m", "zmmul", check_implicit_always},
{"q", "d", check_implicit_always},
{"v", "d", check_implicit_always},
{"v", "zve64d", check_implicit_always},
diff --git a/gas/testsuite/gas/riscv/attribute-01.d b/gas/testsuite/gas/riscv/attribute-01.d
index 2e19e09abf2..612305765ab 100644
--- a/gas/testsuite/gas/riscv/attribute-01.d
+++ b/gas/testsuite/gas/riscv/attribute-01.d
@@ -3,4 +3,4 @@
#source: empty.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+ Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0"
diff --git a/gas/testsuite/gas/riscv/attribute-02.d b/gas/testsuite/gas/riscv/attribute-02.d
index 45b89f2d62d..324fd9f2171 100644
--- a/gas/testsuite/gas/riscv/attribute-02.d
+++ b/gas/testsuite/gas/riscv/attribute-02.d
@@ -3,4 +3,4 @@
#source: empty.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle2p0"
+ Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0_xargle2p0"
diff --git a/gas/testsuite/gas/riscv/attribute-03.d b/gas/testsuite/gas/riscv/attribute-03.d
index 11416d63d25..6e1c2fbc592 100644
--- a/gas/testsuite/gas/riscv/attribute-03.d
+++ b/gas/testsuite/gas/riscv/attribute-03.d
@@ -3,4 +3,4 @@
#source: empty.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle2p0_xfoo3p0"
+ Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0_xargle2p0_xfoo3p0"
diff --git a/gas/testsuite/gas/riscv/attribute-04.d b/gas/testsuite/gas/riscv/attribute-04.d
index 408464d01ce..f64494a798d 100644
--- a/gas/testsuite/gas/riscv/attribute-04.d
+++ b/gas/testsuite/gas/riscv/attribute-04.d
@@ -3,4 +3,4 @@
#source: attribute-04.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+ Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0"
diff --git a/gas/testsuite/gas/riscv/attribute-05.d b/gas/testsuite/gas/riscv/attribute-05.d
index 247f52e0ed8..9507b43976d 100644
--- a/gas/testsuite/gas/riscv/attribute-05.d
+++ b/gas/testsuite/gas/riscv/attribute-05.d
@@ -4,7 +4,7 @@
Attribute Section: riscv
File Attributes
Tag_RISCV_stack_align: 16-bytes
- Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+ Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0"
Tag_RISCV_unaligned_access: Unaligned access
Tag_RISCV_priv_spec: 1
Tag_RISCV_priv_spec_minor: 9
diff --git a/gas/testsuite/gas/riscv/attribute-10.d b/gas/testsuite/gas/riscv/attribute-10.d
index 30b82d72073..f46692275f1 100644
--- a/gas/testsuite/gas/riscv/attribute-10.d
+++ b/gas/testsuite/gas/riscv/attribute-10.d
@@ -3,4 +3,4 @@
#source: empty.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0"
+ Tag_RISCV_arch: "rv32i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0_zmmul1p0"
diff --git a/gas/testsuite/gas/riscv/march-imply-g.d b/gas/testsuite/gas/riscv/march-imply-g.d
index 33a243d78d7..239b717fd7f 100644
--- a/gas/testsuite/gas/riscv/march-imply-g.d
+++ b/gas/testsuite/gas/riscv/march-imply-g.d
@@ -3,4 +3,4 @@
#source: empty.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p1_m2p0_a2p1_f2p2_d2p2_zicsr2p0_zifencei2p0"
+ Tag_RISCV_arch: "rv32i2p1_m2p0_a2p1_f2p2_d2p2_zicsr2p0_zifencei2p0_zmmul1p0"
diff --git a/gas/testsuite/gas/riscv/march-imply-unsupported.d b/gas/testsuite/gas/riscv/march-imply-unsupported.d
index 2e19e09abf2..612305765ab 100644
--- a/gas/testsuite/gas/riscv/march-imply-unsupported.d
+++ b/gas/testsuite/gas/riscv/march-imply-unsupported.d
@@ -3,4 +3,4 @@
#source: empty.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+ Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0"
reply other threads:[~2022-09-16 1:36 UTC|newest]
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