From: Jan Beulich <jbeulich@sourceware.org>
To: bfd-cvs@sourceware.org
Subject: [binutils-gdb] x86: fold AVX512-VNNI disassembler entries with AVX-VNNI ones
Date: Mon, 17 Oct 2022 06:27:43 +0000 (GMT) [thread overview]
Message-ID: <20221017062743.9D625385800E@sourceware.org> (raw)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=995bca23f1240fa0cf0431550be581898a664037
commit 995bca23f1240fa0cf0431550be581898a664037
Author: Jan Beulich <jbeulich@suse.com>
Date: Mon Oct 17 08:27:03 2022 +0200
x86: fold AVX512-VNNI disassembler entries with AVX-VNNI ones
Make %XV also print the separating blank in the VEX case, while making
it do nothing for EVEX-encoded insns. This way the AVX-VNNI entries
can be re-used for AVX512-VNNI, at the same time fixing the lack of
EVEX.W decoding.
For the AVX-VNNI ones further make sure only VEX.66 forms are actually
decoded.
Diff:
---
opcodes/i386-dis-evex-prefix.h | 4 ++--
opcodes/i386-dis-evex.h | 4 ++--
opcodes/i386-dis.c | 29 ++++++++++++++++++-----------
3 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 7c2fb484f95..91471723cdc 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -233,14 +233,14 @@
{
{ Bad_Opcode },
{ "vdpbf16p%XS", { XM, Vex, EXx }, 0 },
- { "vpdpwssd", { XM, Vex, EXx }, 0 },
+ { VEX_W_TABLE (VEX_W_0F3852) },
{ "vp4dpwssd", { XM, Vex, EXxmm }, 0 },
},
/* PREFIX_EVEX_0F3853 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpdpwssds", { XM, Vex, EXx }, 0 },
+ { VEX_W_TABLE (VEX_W_0F3853) },
{ "vp4dpwssds", { XM, Vex, EXxmm }, 0 },
},
/* PREFIX_EVEX_0F3868 */
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 176529a475c..9353c9c3125 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -383,8 +383,8 @@ static const struct dis386 evex_table[][256] = {
{ "vrsqrt14p%XW", { XM, EXx }, 0 },
{ "vrsqrt14s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
/* 50 */
- { "vpdpbusd", { XM, Vex, EXx }, PREFIX_DATA },
- { "vpdpbusds", { XM, Vex, EXx }, PREFIX_DATA },
+ { VEX_W_TABLE (VEX_W_0F3850) },
+ { VEX_W_TABLE (VEX_W_0F3851) },
{ PREFIX_TABLE (PREFIX_EVEX_0F3852) },
{ PREFIX_TABLE (PREFIX_EVEX_0F3853) },
{ "vpopcnt%BW", { XM, EXx }, PREFIX_DATA },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 98d3ecd9f05..83290700c65 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1755,7 +1755,7 @@ struct dis386 {
"XD" => print 'd' if !EVEX or EVEX.W=1, EVEX.W=0 is not a valid encoding
"XH" => print 'h' if EVEX.W=0, EVEX.W=1 is not a valid encoding (for FP16)
"XS" => print 's' if !EVEX or EVEX.W=0, EVEX.W=1 is not a valid encoding
- "XV" => print "{vex3}" pseudo prefix
+ "XV" => print "{vex} " pseudo prefix
"LQ" => print 'l' ('d' in Intel mode) or 'q' for memory operand, cond
being false, or no operand at all in 64bit mode, or if suffix_always
is true.
@@ -7545,19 +7545,19 @@ static const struct dis386 vex_w_table[][2] = {
},
{
/* VEX_W_0F3850 */
- { "%XV vpdpbusd", { XM, Vex, EXx }, 0 },
+ { "%XVvpdpbusd", { XM, Vex, EXx }, PREFIX_DATA },
},
{
/* VEX_W_0F3851 */
- { "%XV vpdpbusds", { XM, Vex, EXx }, 0 },
+ { "%XVvpdpbusds", { XM, Vex, EXx }, PREFIX_DATA },
},
{
/* VEX_W_0F3852 */
- { "%XV vpdpwssd", { XM, Vex, EXx }, 0 },
+ { "%XVvpdpwssd", { XM, Vex, EXx }, PREFIX_DATA },
},
{
/* VEX_W_0F3853 */
- { "%XV vpdpwssds", { XM, Vex, EXx }, 0 },
+ { "%XVvpdpwssds", { XM, Vex, EXx }, PREFIX_DATA },
},
{
/* VEX_W_0F3858 */
@@ -10711,22 +10711,29 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
case 'V':
if (l == 0)
abort ();
- else if (l == 1
- && (last[0] == 'L' || last[0] == 'X'))
+ else if (l == 1)
{
- if (last[0] == 'X')
+ switch (last[0])
{
+ case 'X':
+ if (ins->vex.evex)
+ break;
*ins->obufp++ = '{';
*ins->obufp++ = 'v';
*ins->obufp++ = 'e';
*ins->obufp++ = 'x';
*ins->obufp++ = '}';
- }
- else if (ins->rex & REX_W)
- {
+ *ins->obufp++ = ' ';
+ break;
+ case 'L':
+ if (!(ins->rex & REX_W))
+ break;
*ins->obufp++ = 'a';
*ins->obufp++ = 'b';
*ins->obufp++ = 's';
+ break;
+ default:
+ abort ();
}
}
else
reply other threads:[~2022-10-17 6:27 UTC|newest]
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