From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7904) id AFBAC3858C52; Tue, 10 Jan 2023 23:32:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AFBAC3858C52 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Mark Harmstone To: bfd-cvs@sourceware.org Subject: [binutils-gdb] Add .secrel32 for pe-aarch64 X-Act-Checkin: binutils-gdb X-Git-Author: Mark Harmstone X-Git-Refname: refs/heads/master X-Git-Oldrev: b152649d51b52e4e82176fb835b8b91a9ca08ad4 X-Git-Newrev: 528e4f463f511b11ad414bc91bcf89c4fb53c352 Message-Id: <20230110233246.AFBAC3858C52@sourceware.org> Date: Tue, 10 Jan 2023 23:32:46 +0000 (GMT) X-BeenThere: binutils-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 Jan 2023 23:32:46 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D528e4f463f51= 1b11ad414bc91bcf89c4fb53c352 commit 528e4f463f511b11ad414bc91bcf89c4fb53c352 Author: Mark Harmstone Date: Thu Dec 15 23:24:09 2022 +0000 Add .secrel32 for pe-aarch64 =20 Adds the .secrel32 pseudo-directive and its corresponding relocation. Diff: --- bfd/coff-aarch64.c | 47 ++++++++++++++++++++++++++++- gas/config/tc-aarch64.c | 75 +++++++++++++++++++++++++++++++++++--------= ---- gas/config/tc-aarch64.h | 4 +++ ld/testsuite/ld-pe/pe.exp | 2 ++ 4 files changed, 108 insertions(+), 20 deletions(-) diff --git a/bfd/coff-aarch64.c b/bfd/coff-aarch64.c index d6c48eba63b..8e9081a0e74 100644 --- a/bfd/coff-aarch64.c +++ b/bfd/coff-aarch64.c @@ -267,6 +267,20 @@ coff_aarch64_addr32nb_reloc (bfd *abfd ATTRIBUTE_UNUSE= D, return bfd_reloc_ok; } =20 +static bfd_reloc_status_type +coff_aarch64_secrel_reloc (bfd *abfd ATTRIBUTE_UNUSED, + arelent *reloc_entry, + asymbol *symbol ATTRIBUTE_UNUSED, + void *data, + asection *input_section ATTRIBUTE_UNUSED, + bfd *output_bfd ATTRIBUTE_UNUSED, + char **error_message ATTRIBUTE_UNUSED) +{ + bfd_putl32 (reloc_entry->addend, data + reloc_entry->address); + + return bfd_reloc_ok; +} + /* In case we're on a 32-bit machine, construct a 64-bit "-1" value. */ #define MINUS_ONE (~ (bfd_vma) 0) =20 @@ -330,6 +344,11 @@ static const reloc_howto_type arm64_reloc_howto_32nb = =3D HOWTO (IMAGE_REL_ARM64_AD coff_aarch64_addr32nb_reloc, "IMAGE_REL_ARM64_ADDR32NB", false, 0xffffffff, 0xffffffff, false); =20 +static const reloc_howto_type arm64_reloc_howto_secrel =3D HOWTO (IMAGE_RE= L_ARM64_SECREL, 0, 4, 32, false, 0, + complain_overflow_bitfield, + coff_aarch64_secrel_reloc, "IMAGE_REL_ARM64_SECREL", + false, 0xffffffff, 0xffffffff, false); + static const reloc_howto_type* const arm64_howto_table[] =3D { &arm64_reloc_howto_abs, &arm64_reloc_howto_64, @@ -342,7 +361,8 @@ static const reloc_howto_type* const arm64_howto_table[= ] =3D { &arm64_reloc_howto_branch19, &arm64_reloc_howto_branch14, &arm64_reloc_howto_pgoff12a, - &arm64_reloc_howto_32nb + &arm64_reloc_howto_32nb, + &arm64_reloc_howto_secrel }; =20 #ifndef NUM_ELEM @@ -387,6 +407,8 @@ coff_aarch64_reloc_type_lookup (bfd * abfd ATTRIBUTE_UN= USED, bfd_reloc_code_real return &arm64_reloc_howto_branch19; case BFD_RELOC_RVA: return &arm64_reloc_howto_32nb; + case BFD_RELOC_32_SECREL: + return &arm64_reloc_howto_secrel; default: BFD_FAIL (); return NULL; @@ -441,6 +463,8 @@ coff_aarch64_rtype_lookup (unsigned int code) return &arm64_reloc_howto_pgoff12a; case IMAGE_REL_ARM64_ADDR32NB: return &arm64_reloc_howto_32nb; + case IMAGE_REL_ARM64_SECREL: + return &arm64_reloc_howto_secrel; default: BFD_FAIL (); return NULL; @@ -811,6 +835,27 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd, break; } =20 + case IMAGE_REL_ARM64_SECREL: + { + uint64_t val; + int32_t addend; + + addend =3D bfd_getl32 (contents + rel->r_vaddr); + + val =3D sec->output_offset + sym_value + addend; + + if (val > 0xffffffff) + (*info->callbacks->reloc_overflow) + (info, h ? &h->root : NULL, syms[symndx]._n._n_name, + "IMAGE_REL_ARM64_SECREL", addend, input_bfd, + input_section, rel->r_vaddr - input_section->vma); + + bfd_putl32 (val, contents + rel->r_vaddr); + rel->r_type =3D IMAGE_REL_ARM64_ABSOLUTE; + + break; + } + default: info->callbacks->einfo (_("%F%P: Unhandled relocation type %u\n"), rel->r_type); diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 25e79431046..ad070cd0618 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -2097,6 +2097,27 @@ s_tlsdescldr (int ignored ATTRIBUTE_UNUSED) } #endif /* OBJ_ELF */ =20 +#ifdef TE_PE +static void +s_secrel (int dummy ATTRIBUTE_UNUSED) +{ + expressionS exp; + + do + { + expression (&exp); + if (exp.X_op =3D=3D O_symbol) + exp.X_op =3D O_secrel; + + emit_expr (&exp, 4); + } + while (*input_line_pointer++ =3D=3D ','); + + input_line_pointer--; + demand_empty_rest_of_line (); +} +#endif /* TE_PE */ + static void s_aarch64_arch (int); static void s_aarch64_cpu (int); static void s_aarch64_arch_extension (int); @@ -2131,6 +2152,9 @@ const pseudo_typeS md_pseudo_table[] =3D { {"long", s_aarch64_cons, 4}, {"xword", s_aarch64_cons, 8}, {"dword", s_aarch64_cons, 8}, +#endif +#ifdef TE_PE + {"secrel32", s_secrel, 0}, #endif {"float16", float_cons, 'h'}, {"bfloat16", float_cons, 'b'}, @@ -9268,6 +9292,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg) break; =20 case BFD_RELOC_RVA: + case BFD_RELOC_32_SECREL: break; =20 default: @@ -9353,27 +9378,39 @@ cons_fix_new_aarch64 (fragS * frag, int where, int = size, expressionS * exp) bfd_reloc_code_real_type type; int pcrel =3D 0; =20 - /* Pick a reloc. - FIXME: @@ Should look at CPU word size. */ - switch (size) +#ifdef TE_PE + if (exp->X_op =3D=3D O_secrel) { - case 1: - type =3D BFD_RELOC_8; - break; - case 2: - type =3D BFD_RELOC_16; - break; - case 4: - type =3D BFD_RELOC_32; - break; - case 8: - type =3D BFD_RELOC_64; - break; - default: - as_bad (_("cannot do %u-byte relocation"), size); - type =3D BFD_RELOC_UNUSED; - break; + exp->X_op =3D O_symbol; + type =3D BFD_RELOC_32_SECREL; } + else + { +#endif + /* Pick a reloc. + FIXME: @@ Should look at CPU word size. */ + switch (size) + { + case 1: + type =3D BFD_RELOC_8; + break; + case 2: + type =3D BFD_RELOC_16; + break; + case 4: + type =3D BFD_RELOC_32; + break; + case 8: + type =3D BFD_RELOC_64; + break; + default: + as_bad (_("cannot do %u-byte relocation"), size); + type =3D BFD_RELOC_UNUSED; + break; + } +#ifdef TE_PE + } +#endif =20 fix_new_exp (frag, where, (int) size, exp, pcrel, type); } diff --git a/gas/config/tc-aarch64.h b/gas/config/tc-aarch64.h index d7d782ca29e..fa4b3ac577e 100644 --- a/gas/config/tc-aarch64.h +++ b/gas/config/tc-aarch64.h @@ -314,4 +314,8 @@ extern void aarch64_handle_align (struct frag *); extern int tc_aarch64_regname_to_dw2regnum (char *regname); extern void tc_aarch64_frame_initial_instructions (void); =20 +#ifdef TE_PE +#define O_secrel O_md1 +#endif /* TE_PE */ + #endif /* TC_AARCH64 */ diff --git a/ld/testsuite/ld-pe/pe.exp b/ld/testsuite/ld-pe/pe.exp index c22c6d449f9..dae8c34066b 100644 --- a/ld/testsuite/ld-pe/pe.exp +++ b/ld/testsuite/ld-pe/pe.exp @@ -84,6 +84,8 @@ if {[istarget "aarch64-*-pe*"]} { set pe_tests { {"aarch64" "--image-base 0x1000" "" "" {aarch64a.s aarch64b.s} {{objdump -dr aarch64.d}} "aarch64.x"} + {".secrel32" "--disable-reloc-section" "" "" {secrel1.s secrel2.s} + {{objdump -s secrel_64.d}} "secrel.x"} } =20 run_ld_link_tests $pe_tests