From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1386) id 9E2953858C3A; Fri, 10 Feb 2023 07:15:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9E2953858C3A Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Jan Beulich To: bfd-cvs@sourceware.org Subject: [binutils-gdb] x86: drop use of XOP2SOURCES X-Act-Checkin: binutils-gdb X-Git-Author: Jan Beulich X-Git-Refname: refs/heads/master X-Git-Oldrev: ba3ffa6de0510892bf8020188d834f24ea8b7f75 X-Git-Newrev: 5dab1799d7079765845cfbe6b523bda3add93acb Message-Id: <20230210071524.9E2953858C3A@sourceware.org> Date: Fri, 10 Feb 2023 07:15:24 +0000 (GMT) X-BeenThere: binutils-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Feb 2023 07:15:24 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D5dab1799d707= 9765845cfbe6b523bda3add93acb commit 5dab1799d7079765845cfbe6b523bda3add93acb Author: Jan Beulich Date: Fri Feb 10 08:14:46 2023 +0100 x86: drop use of XOP2SOURCES =20 The few XOP insns which used it wrongly didn't have VexVVVV specified. With that added, the only further missing piece to use more generic code elsewhere is SwapSources - see e.g. the BMI2 insns for similar operand patterns. =20 With the only users gone, drop the #define as well as the special case code. Diff: --- gas/config/tc-i386.c | 40 +++++++--------------------------------- opcodes/i386-opc.h | 2 -- opcodes/i386-opc.tbl | 6 +++--- opcodes/i386-tbl.h | 48 ++++++++++++++++++++++++------------------------ 4 files changed, 34 insertions(+), 62 deletions(-) diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 01b10c1f190..c1338d2e11a 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -2142,9 +2142,9 @@ operand_size_match (const insn_template *t) { unsigned int given =3D i.operands - j - 1; =20 - /* For 4- and 5-operand insns VEX.W controls just the first two + /* For 4-operand and XOP insns VEX.W controls just the first two register operands. */ - if (t->opcode_modifier.vexsources) + if (t->opcode_modifier.vexsources || t->cpu_flags.bitfield.cpuxop) given =3D j < 2 ? 1 - j : j; =20 if (t->operand_types[j].bitfield.class =3D=3D Reg @@ -6933,7 +6933,8 @@ match_template (char mnem_suffix) if (!(size_match & MATCH_REVERSE)) continue; /* Try reversing direction of operands. */ - j =3D t->opcode_modifier.vexsources ? 1 : i.operands - 1; + j =3D t->opcode_modifier.vexsources + || t->cpu_flags.bitfield.cpuxop ? 1 : i.operands - 1; overlap0 =3D operand_type_and (i.types[0], operand_types[j]); overlap1 =3D operand_type_and (i.types[j], operand_types[0]); overlap2 =3D operand_type_and (i.types[1], operand_types[1]); @@ -6967,7 +6968,8 @@ match_template (char mnem_suffix) && (intel_syntax || intel_mnemonic)) found_reverse_match |=3D Opcode_FloatR; } - else if (t->opcode_modifier.vexsources) + else if (t->opcode_modifier.vexsources + || t->cpu_flags.bitfield.cpuxop) { found_reverse_match =3D Opcode_VexW; goto check_operands_345; @@ -8618,35 +8620,7 @@ build_modrm_byte (void) else mem =3D ~0; =20 - if (i.tm.opcode_modifier.vexsources =3D=3D XOP2SOURCES) - { - /* VEX.vvvv encodes one of the sources. */ - if (i.tm.opcode_modifier.vexw =3D=3D VEXW0) - i.vex.register_specifier =3D i.op[0].regs; - else - i.vex.register_specifier =3D i.op[1].regs; - - /* Destination is a XMM register encoded in the ModRM.reg - and VEX.R bit. */ - i.rm.reg =3D i.op[2].regs->reg_num; - if ((i.op[2].regs->reg_flags & RegRex) !=3D 0) - i.rex |=3D REX_R; - - /* ModRM.rm and VEX.B encodes the other source. */ - if (!i.mem_operands) - { - i.rm.mode =3D 3; - - if (i.tm.opcode_modifier.vexw =3D=3D VEXW0) - i.rm.regmem =3D i.op[1].regs->reg_num; - else - i.rm.regmem =3D i.op[0].regs->reg_num; - - if ((i.op[1].regs->reg_flags & RegRex) !=3D 0) - i.rex |=3D REX_B; - } - } - else if (i.tm.opcode_modifier.vexvvvv =3D=3D VEXLWP) + if (i.tm.opcode_modifier.vexvvvv =3D=3D VEXLWP) { i.vex.register_specifier =3D i.op[2].regs; if (!i.mem_operands) diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 1bb6106b37b..fd76ce5e3ce 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -619,10 +619,8 @@ enum OpcodePrefix, /* number of VEX source operands: 0: <=3D 2 source operands. - 1: 2 XOP source operands. 2: 3 source operands. */ -#define XOP2SOURCES 1 #define VEX3SOURCES 2 VexSources, /* Instruction with a mandatory SIB byte: diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 48ccca05882..6a98f33ce7b 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -1876,10 +1876,10 @@ vpmacsww, 0x95, XOP, Modrm|SpaceXOP08|VexSources=3D= 2|VexVVVV=3D1|VexW=3D1|NoSuf|Vex, { vpmadcsswd, 0xa6, XOP, Modrm|SpaceXOP08|VexSources=3D2|VexVVVV=3D1|VexW=3D= 1|NoSuf|Vex, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM } vpmadcswd, 0xb6, XOP, Modrm|SpaceXOP08|VexSources=3D2|VexVVVV=3D1|VexW=3D1= |NoSuf|Vex, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM } vpperm, 0xa3, XOP, D|Modrm|SpaceXOP08|VexSources=3D2|VexVVVV|VexW0|NoSuf|V= ex, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM } -vprot, 0x90 | , XOP, D|Modrm|Vex128|SpaceXOP09|VexW0|VexSour= ces=3D1|NoSuf, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM } +vprot, 0x90 | , XOP, D|Modrm|Vex128|SpaceXOP09|VexVVVV|SwapS= ources|VexW0|NoSuf, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM } vprot, 0xc0 | , XOP, Modrm|Vex128|SpaceXOP08|VexW0|NoSuf, { = Imm8, RegXMM|Unspecified|BaseIndex, RegXMM } -vpsha, 0x98 | , XOP, D|Modrm|Vex128|SpaceXOP09|VexW0|VexSour= ces=3D1|NoSuf, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM } -vpshl, 0x94 | , XOP, D|Modrm|Vex128|SpaceXOP09|VexW0|VexSour= ces=3D1|NoSuf, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM } +vpsha, 0x98 | , XOP, D|Modrm|Vex128|SpaceXOP09|VexVVVV|SwapS= ources|VexW0|NoSuf, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM } +vpshl, 0x94 | , XOP, D|Modrm|Vex128|SpaceXOP09|VexVVVV|SwapS= ources|VexW0|NoSuf, { RegXMM, RegXMM|Unspecified|BaseIndex, RegXMM } =20 diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index b6823f8eb59..b02d52aa2bb 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -43439,8 +43439,8 @@ static const insn_template i386_optab[] =3D { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } } }, { MN_vprotb, 0x90 | 0, 3, SPACE_XOP09, None, - { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -43473,8 +43473,8 @@ static const insn_template i386_optab[] =3D { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } } }, { MN_vprotw, 0x90 | 1, 3, SPACE_XOP09, None, - { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -43507,8 +43507,8 @@ static const insn_template i386_optab[] =3D { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } } }, { MN_vprotd, 0x90 | 2, 3, SPACE_XOP09, None, - { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -43541,8 +43541,8 @@ static const insn_template i386_optab[] =3D { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } } }, { MN_vprotq, 0x90 | 3, 3, SPACE_XOP09, None, - { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -43575,8 +43575,8 @@ static const insn_template i386_optab[] =3D { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } } }, { MN_vpshab, 0x98 | 0, 3, SPACE_XOP09, None, - { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -43592,8 +43592,8 @@ static const insn_template i386_optab[] =3D { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } } }, { MN_vpshaw, 0x98 | 1, 3, SPACE_XOP09, None, - { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -43609,8 +43609,8 @@ static const insn_template i386_optab[] =3D { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } } }, { MN_vpshad, 0x98 | 2, 3, SPACE_XOP09, None, - { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -43626,8 +43626,8 @@ static const insn_template i386_optab[] =3D { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } } }, { MN_vpshaq, 0x98 | 3, 3, SPACE_XOP09, None, - { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -43643,8 +43643,8 @@ static const insn_template i386_optab[] =3D { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } } }, { MN_vpshlb, 0x94 | 0, 3, SPACE_XOP09, None, - { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -43660,8 +43660,8 @@ static const insn_template i386_optab[] =3D { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } } }, { MN_vpshlw, 0x94 | 1, 3, SPACE_XOP09, None, - { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -43677,8 +43677,8 @@ static const insn_template i386_optab[] =3D { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } } }, { MN_vpshld, 0x94 | 2, 3, SPACE_XOP09, None, - { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -43694,8 +43694,8 @@ static const insn_template i386_optab[] =3D { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } } }, { MN_vpshlq, 0x94 | 3, 3, SPACE_XOP09, None, - { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { 1, 0, 0, 1, 0, 0, 0, 0, 6, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,