From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1386) id 5A21E3858D35; Tue, 4 Jul 2023 15:02:29 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5A21E3858D35 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Jan Beulich To: bfd-cvs@sourceware.org Subject: [binutils-gdb] x86: re-work EVEX-z-without-masking check X-Act-Checkin: binutils-gdb X-Git-Author: Jan Beulich X-Git-Refname: refs/heads/master X-Git-Oldrev: bb2bd584f31a25ba1cfe5bdac4d07d8cffe87c3d X-Git-Newrev: 07d618b91f50816f198abac7df116e83d47ca1be Message-Id: <20230704150229.5A21E3858D35@sourceware.org> Date: Tue, 4 Jul 2023 15:02:29 +0000 (GMT) X-BeenThere: binutils-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Jul 2023 15:02:29 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D07d618b91f50= 816f198abac7df116e83d47ca1be commit 07d618b91f50816f198abac7df116e83d47ca1be Author: Jan Beulich Date: Tue Jul 4 17:00:15 2023 +0200 x86: re-work EVEX-z-without-masking check =20 Rather than corrupting disassmbly altogether, flag EVEX.z set as bad when masking isn't in effect in the first place at the time the destination operand is actually processed. Diff: --- gas/testsuite/gas/i386/avx512f-nondef.d | 3 +-- opcodes/i386-dis.c | 18 ++++++++---------- 2 files changed, 9 insertions(+), 12 deletions(-) diff --git a/gas/testsuite/gas/i386/avx512f-nondef.d b/gas/testsuite/gas/i3= 86/avx512f-nondef.d index a062fe335bc..8defd6972e5 100644 --- a/gas/testsuite/gas/i386/avx512f-nondef.d +++ b/gas/testsuite/gas/i386/avx512f-nondef.d @@ -15,8 +15,7 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 f2 55 1f 3b f4 vpminud \{rn-bad\},%zmm4,%zmm5,%zmm6= \{%k7\} [ ]*[a-f0-9]+: 62 f2 7e 48 31 72 7f vpmovdb %zmm6,0x7f0\(%edx\) [ ]*[a-f0-9]+: 62 f2 7e 58 31 72 7f vpmovdb %zmm6,0x7f0\(%edx\)\{bad\} -[ ]*[a-f0-9]+: 62 f1 7c 88 58 \(bad\) -[ ]*[a-f0-9]+: c3 ret +[ ]*[a-f0-9]+: 62 f1 7c 88 58 c3 (\{evex\} )?vaddps %xmm3,%xmm0,%xmm0= \{bad\} [ ]*[a-f0-9]+: 62 f2 7d 4f 92 01 vgatherdps \(bad\),%zmm0\{%k7\} [ ]*[a-f0-9]+: 67 62 f2 7d 4f 92 01 addr16 vgatherdps \(bad\),%zmm0\{%k7= \} [ ]*[a-f0-9]+: 62 f2 7d cf 92 04 08 vgatherdps \(%eax,%zmm1(,1)?\),%zmm0= \{%k7\}\{z\}/\(bad\) diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 15a0e1b1080..690e336c6bc 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -9905,9 +9905,15 @@ print_insn (bfd_vma pc, disassemble_info *info, int = intel_syntax) oappend (&ins, "{"); oappend_register (&ins, reg_name); oappend (&ins, "}"); + + if (ins.vex.zeroing) + oappend (&ins, "{z}"); + } + else if (ins.vex.zeroing) + { + oappend (&ins, "{bad}"); + continue; } - if (ins.vex.zeroing) - oappend (&ins, "{z}"); =20 /* S/G insns require a mask and don't allow zeroing-masking. */ @@ -9985,14 +9991,6 @@ print_insn (bfd_vma pc, disassemble_info *info, int = intel_syntax) goto out; } =20 - /* If EVEX.z is set, there must be an actual mask register in use. */ - if (ins.vex.zeroing && ins.vex.mask_register_specifier =3D=3D 0) - { - i386_dis_printf (info, dis_style_text, "(bad)"); - ret =3D ins.end_codep - priv.the_buffer; - goto out; - } - switch (dp->prefix_requirement) { case PREFIX_DATA: