From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1957) id D33AC3858C2A; Fri, 7 Jul 2023 10:10:14 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D33AC3858C2A Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Claudiu Zissulescu To: bfd-cvs@sourceware.org Subject: [binutils-gdb] arc: Update/Add ARCv3 support. X-Act-Checkin: binutils-gdb X-Git-Author: Claudiu Zissulescu X-Git-Refname: refs/heads/master X-Git-Oldrev: 7c632c2a696fb68e5575db1e2c934788a831e578 X-Git-Newrev: 13aa307c9a9086d34b555cecf5f9388fa9b062f1 Message-Id: <20230707101014.D33AC3858C2A@sourceware.org> Date: Fri, 7 Jul 2023 10:10:14 +0000 (GMT) X-BeenThere: binutils-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 07 Jul 2023 10:10:14 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D13aa307c9a90= 86d34b555cecf5f9388fa9b062f1 commit 13aa307c9a9086d34b555cecf5f9388fa9b062f1 Author: Claudiu Zissulescu Date: Fri Jul 7 12:58:34 2023 +0300 arc: Update/Add ARCv3 support. =20 The ARC HS5x and ARC HS6x processors are based on the new ARCv3 ISA that implements a full range of 32-bit and 64-bit instructions. These processors feature a high-speed 10-stage, dual-issue pipeline that offers increased utilization of functional units with a limited increase in power and area. The HS5x processors feature a 32-bit pipeline that can execute all ARCv3 32-bit instructions, while the HS6x processors feature a full 64-bit pipeline and register file that can execute both 32-bit and 64-bit instructions. In addition, the ARC HS6x supports 64-bit virtual and 52-bit physical address spaces to enable direct addressing of current and future large memories, as well as 128-bit loads and stores for efficient data movement. =20 This readelf patch updates/adds Synopsys ARCv3 machine name fileds and supported relocations. =20 Signed-off-by: Claudiu Zissulescu Diff: --- binutils/readelf.c | 30 ++++++++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/binutils/readelf.c b/binutils/readelf.c index 97d72d0b95f..bb488ef2a5e 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c @@ -1061,6 +1061,8 @@ guess_is_rela (unsigned int e_machine) case EM_ARC: case EM_ARC_COMPACT: case EM_ARC_COMPACT2: + case EM_ARC_COMPACT3: + case EM_ARC_COMPACT3_64: case EM_AVR: case EM_AVR_OLD: case EM_BLACKFIN: @@ -1738,6 +1740,8 @@ dump_relocations (Filedata *filedata, case EM_ARC: case EM_ARC_COMPACT: case EM_ARC_COMPACT2: + case EM_ARC_COMPACT3: + case EM_ARC_COMPACT3_64: rtype =3D elf_arc_reloc_type (type); break; =20 @@ -2968,9 +2972,9 @@ get_machine_name (unsigned e_machine) case EM_NFP: return "Netronome Flow Processor"; case EM_VE: return "NEC Vector Engine"; case EM_CSKY: return "C-SKY"; - case EM_ARC_COMPACT3_64: return "Synopsys ARCv2.3 64-bit"; + case EM_ARC_COMPACT3_64: return "Synopsys ARCv3 64-bit processor"; case EM_MCS6502: return "MOS Technology MCS 6502 processor"; - case EM_ARC_COMPACT3: return "Synopsys ARCv2.3 32-bit"; + case EM_ARC_COMPACT3: return "Synopsys ARCv3 32-bit processor"; case EM_KVX: return "Kalray VLIW core of the MPPA processor family"; case EM_65816: return "WDC 65816/65C816"; case EM_LOONGARCH: return "LoongArch"; @@ -3715,6 +3719,14 @@ get_machine_flags (Filedata * filedata, unsigned e_f= lags, unsigned e_machine) default: break; =20 + case EM_ARC_COMPACT3: + strcat (buf, ", HS5x"); + break; + + case EM_ARC_COMPACT3_64: + strcat (buf, ", HS6x"); + break; + case EM_ARC_COMPACT2: case EM_ARC_COMPACT: decode_ARC_machine_flags (e_flags, e_machine, buf); @@ -4983,6 +4995,8 @@ get_section_type_name (Filedata * filedata, unsigned = int sh_type) case EM_ARC: case EM_ARC_COMPACT: case EM_ARC_COMPACT2: + case EM_ARC_COMPACT3: + case EM_ARC_COMPACT3_64: result =3D get_arc_section_type_name (sh_type); break; case EM_MIPS: @@ -14324,6 +14338,8 @@ is_32bit_abs_reloc (Filedata * filedata, unsigned i= nt reloc_type) return reloc_type =3D=3D 1; /* R_ARC_32. */ case EM_ARC_COMPACT: case EM_ARC_COMPACT2: + case EM_ARC_COMPACT3: + case EM_ARC_COMPACT3_64: return reloc_type =3D=3D 4; /* R_ARC_32. */ case EM_ARM: return reloc_type =3D=3D 2; /* R_ARM_ABS32 */ @@ -14518,6 +14534,8 @@ is_32bit_pcrel_reloc (Filedata * filedata, unsigned= int reloc_type) return reloc_type =3D=3D 10; /* R_ALPHA_SREL32. */ case EM_ARC_COMPACT: case EM_ARC_COMPACT2: + case EM_ARC_COMPACT3: + case EM_ARC_COMPACT3_64: return reloc_type =3D=3D 49; /* R_ARC_32_PCREL. */ case EM_ARM: return reloc_type =3D=3D 3; /* R_ARM_REL32 */ @@ -14584,6 +14602,8 @@ is_64bit_abs_reloc (Filedata * filedata, unsigned i= nt reloc_type) { case EM_AARCH64: return reloc_type =3D=3D 257; /* R_AARCH64_ABS64. */ + case EM_ARC_COMPACT3_64: + return reloc_type =3D=3D 5; /* R_ARC_64. */ case EM_ALPHA: return reloc_type =3D=3D 2; /* R_ALPHA_REFQUAD. */ case EM_IA_64: @@ -14687,6 +14707,8 @@ is_16bit_abs_reloc (Filedata * filedata, unsigned i= nt reloc_type) case EM_ARC: case EM_ARC_COMPACT: case EM_ARC_COMPACT2: + case EM_ARC_COMPACT3: + case EM_ARC_COMPACT3_64: return reloc_type =3D=3D 2; /* R_ARC_16. */ case EM_ADAPTEVA_EPIPHANY: return reloc_type =3D=3D 5; @@ -14969,6 +14991,8 @@ is_none_reloc (Filedata * filedata, unsigned int re= loc_type) case EM_ARC: /* R_ARC_NONE. */ case EM_ARC_COMPACT2: /* R_ARC_NONE. */ case EM_ARC_COMPACT: /* R_ARC_NONE. */ + case EM_ARC_COMPACT3: /* R_ARC_NONE. */ + case EM_ARC_COMPACT3_64: /* R_ARC_NONE. */ case EM_ARM: /* R_ARM_NONE. */ case EM_CRIS: /* R_CRIS_NONE. */ case EM_FT32: /* R_FT32_NONE. */ @@ -22302,6 +22326,8 @@ process_arch_specific (Filedata * filedata) case EM_ARC: case EM_ARC_COMPACT: case EM_ARC_COMPACT2: + case EM_ARC_COMPACT3: + case EM_ARC_COMPACT3_64: return process_attributes (filedata, "ARC", SHT_ARC_ATTRIBUTES, display_arc_attribute, display_generic_attribute);