[binutils-gdb] RISC-V: Imply 'Zicsr' from 'Zve32x'

[binutils-gdb] RISC-V: Imply 'Zicsr' from 'Zve32x'

[Tsukasa OI]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=92f46037a0f672d1480f754f76a9bfa0334d099c

commit 92f46037a0f672d1480f754f76a9bfa0334d099c
Author: Tsukasa OI <research_trasio@irq.a4lg.com>
Date:   Wed Aug 2 23:50:27 2023 +0000

    RISC-V: Imply 'Zicsr' from 'Zve32x'
    
    Further clarification is made so that 'Zve32x' implies 'Zicsr' (the same
    implication is already implemented in LLVM).
    
    See related issue (the author raised) on the vector specification:
    <https://github.com/riscv/riscv-v-spec/issues/908>
    and its resolution:
    <https://github.com/riscv/riscv-v-spec/issues/909>
    
    bfd/ChangeLog:
    
            * elfxx-riscv.c (riscv_implicit_subsets): Add 'Zve32x' -> 'Zicsr'.

Diff:
---
 bfd/elfxx-riscv.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index ba5165766b2..2ce95d90df5 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1121,6 +1121,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"zve64x", "zve32x",	check_implicit_always},
   {"zve64x", "zvl64b",	check_implicit_always},
   {"zve32x", "zvl32b",	check_implicit_always},
+  {"zve32x", "zicsr",	check_implicit_always},
   {"zvl65536b", "zvl32768b",	check_implicit_always},
   {"zvl32768b", "zvl16384b",	check_implicit_always},
   {"zvl16384b", "zvl8192b",	check_implicit_always},