[binutils-gdb] opcodes: microblaze: Add hibernate and suspend instructions

[binutils-gdb] opcodes: microblaze: Add hibernate and suspend instructions

[Nick Clifton]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=6487710babec2e7dcae997f79e03b9ec7d78e1c3

commit 6487710babec2e7dcae997f79e03b9ec7d78e1c3
Author: Neal frager <neal.frager@amd.com>
Date:   Wed Oct 4 16:35:44 2023 +0100

    opcodes: microblaze: Add hibernate and suspend instructions

Diff:
---
 opcodes/ChangeLog         | 7 +++++++
 opcodes/microblaze-opc.h  | 2 ++
 opcodes/microblaze-opcm.h | 5 ++++-
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 47c23e05c4f..02809153859 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2023-10-04  Neal frager  <neal.frager@amd.com>
+
+	* opcodes/microblaze-opc.h (struct op_code_struct): Add hiberante
+	and suspend entries.
+	* microblaze-opcm.h (enum microblaze_instr): Add microblaze_sleep,
+	hibernate, suspend entries.
+
 2023-08-24  Tom Tromey  <tom@tromey.com>
 
 	* cgen.sh: Don't pass "-s" to cgen.
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
index 7c70c80a27b..6b9701bb67c 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -405,6 +405,8 @@ const struct op_code_struct
   {"clz",       INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34,  clz,       special_inst },
   {"mbar",      INST_TYPE_IMM5,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN,   mbar,      special_inst },
   {"sleep",     INST_TYPE_NONE,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBA020004, OPCODE_MASK_HN,   invalid_inst, special_inst }, /* translates to mbar 16.  */
+  {"hibernate", INST_TYPE_NONE,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB9020004, OPCODE_MASK_HN,   invalid_inst, special_inst }, /* translates to mbar 8.   */
+  {"suspend",   INST_TYPE_NONE,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBB020004, OPCODE_MASK_HN,   invalid_inst, special_inst }, /* translates to mbar 24.  */
   {"swapb",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4,   swapb,     arithmetic_inst },
   {"swaph",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4,   swaph,     arithmetic_inst },
   {"", 0, 0, 0, 0, 0, 0, 0, 0},
diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
index 92c245dc0fd..9d1df0814d9 100644
--- a/opcodes/microblaze-opcm.h
+++ b/opcodes/microblaze-opcm.h
@@ -27,7 +27,7 @@ enum microblaze_instr
 {
   add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, clz, cmp, cmpu,
   addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul,
-  mulh, mulhu, mulhsu,swapb,swaph,
+  mulh, mulhu, mulhsu, swapb, swaph,
   idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput,
   ncget, ncput, muli, bslli, bsrai, bsrli, mului,
   /* 'or/and/xor' are C++ keywords.  */
@@ -59,6 +59,9 @@ enum microblaze_instr
   aputd, taputd, caputd, tcaputd, naputd, tnaputd, ncaputd, tncaputd,
   eagetd, teagetd, ecagetd, tecagetd, neagetd, tneagetd, necagetd, tnecagetd,
   eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd,
+  /* 'sleep' is a Posix symbol.  */
+  microblaze_sleep,
+  hibernate, suspend,
   invalid_inst
 };