[binutils-gdb] RISC-V: Add T-Head VECTOR vendor extension.

[binutils-gdb] RISC-V: Add T-Head VECTOR vendor extension.

[Nelson Chu]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=86fbfedd715df8a89d73374d70b1f068f95b450e

commit 86fbfedd715df8a89d73374d70b1f068f95b450e
Author: Jin Ma <jinma@linux.alibaba.com>
Date:   Sat Nov 18 14:53:08 2023 +0800

    RISC-V: Add T-Head VECTOR vendor extension.
    
    T-Head has a range of vendor-specific instructions ([2]).
    Therefore it makes sense to group them into smaller chunks
    in form of vendor extensions.
    
    This patch adds the "XTheadVector" extension, a collection of
    T-Head-specific vector instructions. The 'th' prefix and the
    "XTheadVector" extension are documented in a PR for the RISC-V
    toolchain conventions ([1]).
    
    Here are some things that need to be explained:
    The "XTheadVector" extension is not a custom-extension, but
    a non-standard non-conforming extension. The encoding space
    of the "TheadVector" instructions overlaps with those of
    the 'V' extension. This encoding space conflict is not on
    purpose, but the result of issues in the past that have
    been resolved since. Therefore, the "XTheadVector" extension
    and the 'V' extension are in conflict.
    
    [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19
    [2] https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.3.0/xthead-2023-11-10-2.3.0.pdf
    
    Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com>
    Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu>
    
    bfd/ChangeLog:
    
            * elfxx-riscv.c (riscv_parse_check_conflicts): The
            "XTheadVector" extension and the 'V' extension are in conflict.
            (riscv_multi_subset_supports): Likewise..
            (riscv_multi_subset_supports_ext): Likewise.
    
    gas/ChangeLog:
    
            * doc/c-riscv.texi:
            * testsuite/gas/riscv/x-thead-vector-fail.d: New test.
            * testsuite/gas/riscv/x-thead-vector-fail.l: New test.
            * testsuite/gas/riscv/x-thead-vector.s: New test.
    
    include/ChangeLog:
    
            * opcode/riscv.h (enum riscv_insn_class):

Diff:
---
 bfd/elfxx-riscv.c                             | 12 ++++++++++++
 gas/NEWS                                      |  3 +++
 gas/doc/c-riscv.texi                          |  5 +++++
 gas/testsuite/gas/riscv/x-thead-vector-fail.d |  3 +++
 gas/testsuite/gas/riscv/x-thead-vector-fail.l |  2 ++
 gas/testsuite/gas/riscv/x-thead-vector.s      |  0
 include/opcode/riscv.h                        |  1 +
 7 files changed, 26 insertions(+)

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index c9acf124626..e2c3ffe4b4f 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1373,6 +1373,7 @@ static struct riscv_supported_ext riscv_supported_vendor_x_ext[] =
   {"xtheadmemidx",	ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
   {"xtheadmempair",	ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
   {"xtheadsync",	ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
+  {"xtheadvector",	ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
   {"xventanacondops",	ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
   {NULL, 0, 0, 0, 0}
 };
@@ -1984,6 +1985,13 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps)
 	(_("`zfinx' is conflict with the `f/d/q/zfh/zfhmin' extension"));
       no_conflict = false;
     }
+  if (riscv_lookup_subset (rps->subset_list, "xtheadvector", &subset)
+      && riscv_lookup_subset (rps->subset_list, "v", &subset))
+    {
+      rps->error_handler
+	(_("`xtheadvector' is conflict with the `v' extension"));
+      no_conflict = false;
+    }
 
   bool support_zve = false;
   bool support_zvl = false;
@@ -2580,6 +2588,8 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps,
       return riscv_subset_supports (rps, "xtheadmempair");
     case INSN_CLASS_XTHEADSYNC:
       return riscv_subset_supports (rps, "xtheadsync");
+    case INSN_CLASS_XTHEADVECTOR:
+      return riscv_subset_supports (rps, "xtheadvector");
     case INSN_CLASS_XVENTANACONDOPS:
       return riscv_subset_supports (rps, "xventanacondops");
     default:
@@ -2824,6 +2834,8 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps,
       return "xtheadmempair";
     case INSN_CLASS_XTHEADSYNC:
       return "xtheadsync";
+    case INSN_CLASS_XTHEADVECTOR:
+      return "xtheadvector";
     default:
       rps->error_handler
         (_("internal: unreachable INSN_CLASS_*"));
diff --git a/gas/NEWS b/gas/NEWS
index 9d0fb3b63d0..53b87593f71 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -31,6 +31,9 @@
 
 * Add support for Cortex-X4 for AArch64.
 
+* Add support for various T-Head extensions (XTheadVector, XTheadZvlsseg
+  and XTheadZvamo) from version 2.3.0 of the T-Head ISA manual.
+
 Changes in 2.41:
 
 * Add support for the KVX instruction set.
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
index b23504648bd..a7c9420bd86 100644
--- a/gas/doc/c-riscv.texi
+++ b/gas/doc/c-riscv.texi
@@ -814,6 +814,11 @@ The XTheadSync extension provides instructions for multi-processor synchronizati
 
 It is documented in @url{https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.0.0/xthead-2022-09-05-2.0.0.pdf}.
 
+@item XTheadVector
+The XTheadVector extension provides instructions for thead vector.
+
+It is documented in @url{https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.3.0/xthead-2023-11-10-2.3.0.pdf}.
+
 @item XVentanaCondOps
 XVentanaCondOps extension provides instructions for branchless
 sequences that perform conditional arithmetic, conditional
diff --git a/gas/testsuite/gas/riscv/x-thead-vector-fail.d b/gas/testsuite/gas/riscv/x-thead-vector-fail.d
new file mode 100644
index 00000000000..ac99c3f5398
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-thead-vector-fail.d
@@ -0,0 +1,3 @@
+#as: -march=rv64gcv_xtheadvector
+#source: x-thead-vector.s
+#error_output: x-thead-vector-fail.l
diff --git a/gas/testsuite/gas/riscv/x-thead-vector-fail.l b/gas/testsuite/gas/riscv/x-thead-vector-fail.l
new file mode 100644
index 00000000000..7dd88e317ce
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-thead-vector-fail.l
@@ -0,0 +1,2 @@
+Assembler messages:
+Error: `xtheadvector' is conflict with the `v' extension
\ No newline at end of file
diff --git a/gas/testsuite/gas/riscv/x-thead-vector.s b/gas/testsuite/gas/riscv/x-thead-vector.s
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index 710a9b73189..a26ef8abf12 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -467,6 +467,7 @@ enum riscv_insn_class
   INSN_CLASS_XTHEADMEMIDX,
   INSN_CLASS_XTHEADMEMPAIR,
   INSN_CLASS_XTHEADSYNC,
+  INSN_CLASS_XTHEADVECTOR,
   INSN_CLASS_XVENTANACONDOPS,
 };