From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1386) id 74D953858D33; Fri, 22 Dec 2023 08:37:41 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 74D953858D33 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Jan Beulich To: bfd-cvs@sourceware.org Subject: [binutils-gdb] x86-64: refuse "high" 8-bit regs with .insn and VEX/XOP/EVEX encodings X-Act-Checkin: binutils-gdb X-Git-Author: Jan Beulich X-Git-Refname: refs/heads/master X-Git-Oldrev: ce7056886a6e52a4fc91b5e3b28da2c0735d0b19 X-Git-Newrev: 3e4a511bee874d73f9f749cc8cf3bc748b4d47b5 Message-Id: <20231222083741.74D953858D33@sourceware.org> Date: Fri, 22 Dec 2023 08:37:41 +0000 (GMT) X-BeenThere: binutils-cvs@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 22 Dec 2023 08:37:41 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D3e4a511bee87= 4d73f9f749cc8cf3bc748b4d47b5 commit 3e4a511bee874d73f9f749cc8cf3bc748b4d47b5 Author: Jan Beulich Date: Fri Dec 22 09:34:10 2023 +0100 x86-64: refuse "high" 8-bit regs with .insn and VEX/XOP/EVEX encodings =20 Much like REX, those encodings - if permitting 8-bit regs at all, i.e. only starting with APX - permit use of "new" 8-bit registers only. %ah, %ch, %dh, and %bh cannot be encoded and hence should be rejected. =20 Permit their use outside of 64-bit code though, as "new" registers simply don't exist there. Diff: --- gas/config/tc-i386.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 6e2f6e51457..cdd3b55c655 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -11485,6 +11485,16 @@ s_insn (int dummy ATTRIBUTE_UNUSED) =20 for (j =3D i.imm_operands; j < i.operands; ++j) { + /* Look for 8-bit operands that use old registers. */ + if (i.vec_encoding !=3D vex_encoding_default + && flag_code =3D=3D CODE_64BIT + && i.types[j].bitfield.class =3D=3D Reg + && i.types[j].bitfield.byte + && !(i.op[j].regs->reg_flags & RegRex64) + && i.op[j].regs->reg_num > 3) + as_bad (_("can't encode register '%s%s' with VEX/XOP/EVEX"), + register_prefix, i.op[j].regs->reg_name); + i.types[j].bitfield.instance =3D InstanceNone; =20 if (operand_type_check (i.types[j], disp))