From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1386) id 08DE23858D3C; Thu, 28 Mar 2024 10:50:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 08DE23858D3C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1711623046; bh=E4uut7lVyWk5QRGEDGWzkEXQC4KlMA0uxpXjLkEqJiA=; h=From:To:Subject:Date:From; b=xsdfiRJVDYgZokYSb+xGlHY/FT/axWL+gGWj70dqr9YysMb130oq7L30FlYudOxz4 Aqexqp0XQnWbPwfBL07fqGtWY9LnPSJhenW3fH7S79yBhYuIUQRQEEJKdzbdf4QTKz lQUOVuAAlHMbYKeU65ZHpYbQKMqiTvqjxKnH7ll0= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Jan Beulich To: binutils-cvs@sourceware.org Subject: [binutils-gdb] x86: templatize unary ALU insns X-Act-Checkin: binutils-gdb X-Git-Author: Jan Beulich X-Git-Refname: refs/heads/master X-Git-Oldrev: cd9ca24dd21821f203279d48d8ae1b67cc4aa5fe X-Git-Newrev: 568473a4376dc1d37d18a4a015739d60e72b7db4 Message-Id: <20240328105046.08DE23858D3C@sourceware.org> Date: Thu, 28 Mar 2024 10:50:46 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D568473a4376d= c1d37d18a4a015739d60e72b7db4 commit 568473a4376dc1d37d18a4a015739d60e72b7db4 Author: Jan Beulich Date: Thu Mar 28 11:48:47 2024 +0100 x86: templatize unary ALU insns =20 With the multitude of new APX templates, it finally becomes desirable to further remove redundancy by also templatizing basic arithmetic insns. Continue with a few simple unary (single source) cases. Diff: --- opcodes/i386-opc.tbl | 26 ++++++++++++++++---------- opcodes/i386-tbl.h | 12 ++++++------ 2 files changed, 22 insertions(+), 16 deletions(-) diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index eed55f9c804..dbf33ff400e 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -385,11 +385,12 @@ adc, 0x80/2, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Imm8= |Imm16|Imm32|Imm32S, Reg8|R =20 =20 -neg, 0xf6/3, APX_F, W|Modrm|CheckOperandSize|No_sSuf|DstVVVV|EVexMap4|NF, = { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 } -neg, 0xf6/3, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64|Un= specified|BaseIndex } + =20 -not, 0xf6/2, APX_F, W|Modrm|CheckOperandSize|No_sSuf|DstVVVV|EVexMap4, { R= eg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 } -not, 0xf6/2, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64|Un= specified|BaseIndex } +, 0xf6/, APX_F, W|Modrm|CheckOperandSize|No_sSuf|DstVVVV|E= VexMap4|, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg= 16|Reg32|Reg64 } +, 0xf6/, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Re= g32|Reg64|Unspecified|BaseIndex } + + =20 aaa, 0x37, No64, NoSuf, {} aas, 0x3f, No64, NoSuf, {} @@ -420,8 +421,9 @@ cqto, 0x99, x64, Size64|NoSuf, {} // expanding 64-bit multiplies, and *cannot* be selected to accomplish // 'imul %ebx, %eax' (opcode 0x0faf must be used in this case) // These multiplies can only be selected with single operand forms. -mul, 0xf6/4, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Unspecified|Base= Index } -imul, 0xf6/5, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Unspecified|Bas= eIndex } + + +, 0xf6/, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Unspec= ified|BaseIndex } imul, 0xaf, APX_F, C|Modrm|CheckOperandSize|No_bSuf|No_sSuf|DstVVVV|EVexMa= p4|NF, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64, Reg16|= Reg32|Reg64 } imul, 0xfaf, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|R= eg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } imul, 0x6b, i186, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Imm8S, Reg16|R= eg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } @@ -432,10 +434,14 @@ imul, 0x69, i186, Modrm|CheckOperandSize|No_bSuf|No_s= Suf, { Imm16|Imm32|Imm32S, imul, 0x6b, i186, Modrm|No_bSuf|No_sSuf|RegKludge, { Imm8S, Reg16|Reg32|Re= g64 } imul, 0x69, i186, Modrm|No_bSuf|No_sSuf|RegKludge, { Imm16|Imm32|Imm32S, R= eg16|Reg32|Reg64 } =20 -div, 0xf6/6, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Unspecified|Base= Index } -div, 0xf6/6, 0, W|CheckOperandSize|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64= |Unspecified|BaseIndex, Acc|Byte|Word|Dword|Qword } -idiv, 0xf6/7, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Unspecified|Bas= eIndex } -idiv, 0xf6/7, 0, W|CheckOperandSize|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg6= 4|Unspecified|BaseIndex, Acc|Byte|Word|Dword|Qword } + + + + +
, 0xf6/, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Unspec= ified|BaseIndex } +
, 0xf6/, 0, W|CheckOperandSize|Modrm|No_sSuf, { Reg8|Reg16|R= eg32|Reg64|Unspecified|BaseIndex, Acc|Byte|Word|Dword|Qword } + +
=20 rol, 0xd0/0, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|NF, = { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg6= 4 } rol, 0xd0/0, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecifie= d|BaseIndex } diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 1b10f13cbda..0d78437b448 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -1464,9 +1464,9 @@ static const insn_template i386_optab[] =3D { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 1, 0 } } } }, - { MN_neg, 0xf6, 2, SPACE_EVEXMAP4, 3, + { MN_not, 0xf6, 2, SPACE_EVEXMAP4, 2, { 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 0, 0, 0, 0, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1474,7 +1474,7 @@ static const insn_template i386_optab[] =3D 0, 0, 0, 0, 1, 0 } }, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0 } } } }, - { MN_neg, 0xf6, 1, SPACE_BASE, 3, + { MN_not, 0xf6, 1, SPACE_BASE, 2, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, @@ -1482,9 +1482,9 @@ static const insn_template i386_optab[] =3D { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 1, 0 } } } }, - { MN_not, 0xf6, 2, SPACE_EVEXMAP4, 2, + { MN_neg, 0xf6, 2, SPACE_EVEXMAP4, 3, { 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -1492,7 +1492,7 @@ static const insn_template i386_optab[] =3D 0, 0, 0, 0, 1, 0 } }, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0 } } } }, - { MN_not, 0xf6, 1, SPACE_BASE, 2, + { MN_neg, 0xf6, 1, SPACE_BASE, 3, { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },