From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7810) id 586C43858CDB; Tue, 9 Apr 2024 10:00:49 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 586C43858CDB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1712656849; bh=SAVqACmgHDiyY31QsYj+yVFG8GeEdhx8T4BH0cAdcNI=; h=From:To:Subject:Date:From; b=AWszyU3ukxo1zMrBMTJIv1x0iQji+tjjWf/uSUfxWOp4AvRvMf2uwf9i7IhIxk4Dk R9hVc4KPeYjdScQZ33KlfXsj5w6Mcf3a+gsKPIi+cWhfxxlcsheQaHnjXWmLaj6Z7G WPIiaL4GqyAY1FxdTD3gA8sQvu5yRB2BJW8NpIyc= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Alex Coplan To: binutils-cvs@sourceware.org Subject: [binutils-gdb] arm: Refactor condition for print_mve_shift_n X-Act-Checkin: binutils-gdb X-Git-Author: Alex Coplan X-Git-Refname: refs/heads/master X-Git-Oldrev: 9132c8152b899a1683bc886f8ba76bedadb48aa1 X-Git-Newrev: f9d6cf2e9f885a1504b459cf437dd9d1931b1168 Message-Id: <20240409100049.586C43858CDB@sourceware.org> Date: Tue, 9 Apr 2024 10:00:49 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3Df9d6cf2e9f88= 5a1504b459cf437dd9d1931b1168 commit f9d6cf2e9f885a1504b459cf437dd9d1931b1168 Author: Alex Coplan Date: Tue Apr 2 14:03:38 2024 +0100 arm: Refactor condition for print_mve_shift_n =20 This is intended to have no functional change, but refactors the condition guarding the call to print_mve_shift_n in arm-dis.c ahead of a later patch which adds additional insns to the set of those whose shift immediate is disassembled using print_mve_shift_n. Diff: --- opcodes/arm-dis.c | 35 +++++++++++++++++++++++++---------- 1 file changed, 25 insertions(+), 10 deletions(-) diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 40f7fb3d780..ac5fb921d23 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -7965,6 +7965,30 @@ print_mve_size (struct disassemble_info *info, } } =20 +/* Return true if INSN is a shift insn with an immediate shift amount + which needs decoding as per print_mve_shift_n. */ + +static bool +mve_shift_insn_p (enum mve_instructions insn) +{ + switch (insn) + { + case MVE_VQSHL_T2: + case MVE_VQSHLU_T3: + case MVE_VRSHR: + case MVE_VRSHRN: + case MVE_VSHL_T1: + case MVE_VSHLL_T1: + case MVE_VSHR: + case MVE_VSHRN: + case MVE_VSLI: + case MVE_VSRI: + return true; + default: + return false; + } +} + static void print_mve_shift_n (struct disassemble_info *info, long given, enum mve_instructions matched_insn) @@ -10225,16 +10249,7 @@ print_insn_mve (struct disassemble_info *info, lon= g given) arm_regnames[value]); break; case 'd': - if (insn->mve_op =3D=3D MVE_VQSHL_T2 - || insn->mve_op =3D=3D MVE_VQSHLU_T3 - || insn->mve_op =3D=3D MVE_VRSHR - || insn->mve_op =3D=3D MVE_VRSHRN - || insn->mve_op =3D=3D MVE_VSHL_T1 - || insn->mve_op =3D=3D MVE_VSHLL_T1 - || insn->mve_op =3D=3D MVE_VSHR - || insn->mve_op =3D=3D MVE_VSHRN - || insn->mve_op =3D=3D MVE_VSLI - || insn->mve_op =3D=3D MVE_VSRI) + if (mve_shift_insn_p (insn->mve_op)) print_mve_shift_n (info, given, insn->mve_op); else if (insn->mve_op =3D=3D MVE_VSHLL_T2) {