From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1386) id 184EF3858CDA; Mon, 10 Jun 2024 08:46:36 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 184EF3858CDA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1718009196; bh=pB3QUSTav5P0RD2HPhOV1R/rf9N8Usn8ruCU7GM2KMc=; h=From:To:Subject:Date:From; b=jvm3kC0MioqQ2GNvNRX6WnQHaBDGYmNVxWN9HZx+3y4pWW1D3+fZ2kUaBxOuRRTJv tLGZIBYktbg0nPatT4ZCMruqMq/JmGkCOlHZvT0r2cyVtEj1EiV49EyTivKoOLGKHG 6PBi/VQ/0Jqk62sa59Gv7KwYEgj76RQ1HYEig22w= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Jan Beulich To: binutils-cvs@sourceware.org Subject: [binutils-gdb] x86: disassembler macro for condition code X-Act-Checkin: binutils-gdb X-Git-Author: Jan Beulich X-Git-Refname: refs/heads/master X-Git-Oldrev: f3f71a5ca0b65c0aaf079e2b23ddfacb6fdc7d92 X-Git-Newrev: cf037c0de24990ed2a0d9fabe8994dbd3c0e303e Message-Id: <20240610084636.184EF3858CDA@sourceware.org> Date: Mon, 10 Jun 2024 08:46:36 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3Dcf037c0de249= 90ed2a0d9fabe8994dbd3c0e303e commit cf037c0de24990ed2a0d9fabe8994dbd3c0e303e Author: Jan Beulich Date: Mon Jun 10 10:45:56 2024 +0200 x86: disassembler macro for condition code =20 Both CMPccXADD and APX'es {,CF}CMOVcc have almost identical entries replicated 16 times each. Fold those to just one each by introducing a %CC macro. (Note that the recording of ->condition_code in print_insn() is merely for completeness for now; it's not used as long as only VEX/EVEX encodings would consume it.) =20 This then also renders condition codes printed consistent across all respective insns; CMPxxXADD had a number of outliers so far. Diff: --- .../gas/i386/x86-64-apx-evex-promoted-intel.d | 48 +++--- .../gas/i386/x86-64-apx-evex-promoted-wig.d | 48 +++--- gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d | 48 +++--- gas/testsuite/gas/i386/x86-64-apx_f-evex.d | 24 +-- gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d | 192 ++++++++++-------= ---- gas/testsuite/gas/i386/x86-64-cmpccxadd.d | 192 ++++++++++-------= ---- opcodes/i386-dis-evex-prefix.h | 113 +----------- opcodes/i386-dis-evex.h | 64 +++---- opcodes/i386-dis.c | 175 ++++-------------= -- 9 files changed, 347 insertions(+), 557 deletions(-) diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d b/gas/= testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d index 5e7b695df01..76664548d80 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d @@ -42,30 +42,30 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e2 bc 87 23 01 00 00[ ]+cmpbxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 ec 94 87 23 01 00 00[ ]+cmplxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 ec bc 87 23 01 00 00[ ]+cmplxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpnbexadd[ ]+DW= ORD PTR \[r31\+rax\*4\+0x123\],edx,r25d -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpnbexadd[ ]+QW= ORD PTR \[r31\+rax\*4\+0x123\],r15,r31 -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpnbxadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpnbxadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 -[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpnlexadd[ ]+DW= ORD PTR \[r31\+rax\*4\+0x123\],edx,r25d -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpnlexadd[ ]+QW= ORD PTR \[r31\+rax\*4\+0x123\],r15,r31 -[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpnlxadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpnlxadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpaxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpaxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpaexadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpaexadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpgxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpgxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpgexadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpgexadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 e1 94 87 23 01 00 00[ ]+cmpnoxadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e1 bc 87 23 01 00 00[ ]+cmpnoxadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 eb 94 87 23 01 00 00[ ]+cmpnpxadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 eb bc 87 23 01 00 00[ ]+cmpnpxadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 e9 94 87 23 01 00 00[ ]+cmpnsxadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e9 bc 87 23 01 00 00[ ]+cmpnsxadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnzxadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnzxadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnexadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnexadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 e0 94 87 23 01 00 00[ ]+cmpoxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e0 bc 87 23 01 00 00[ ]+cmpoxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 ea 94 87 23 01 00 00[ ]+cmppxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 ea bc 87 23 01 00 00[ ]+cmppxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 e8 94 87 23 01 00 00[ ]+cmpsxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e8 bc 87 23 01 00 00[ ]+cmpsxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpzxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpzxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpexadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpexadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 f7[ ]+crc32[ ]+r22,r31 [ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 37[ ]+crc32[ ]+r22,QWORD PTR \[r31\] [ ]*[a-f0-9]+:[ ]*62 ec fc 08 f0 cb[ ]+crc32[ ]+r17,r19b @@ -186,30 +186,30 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e2 bc 87 23 01 00 00[ ]+cmpbxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 ec 94 87 23 01 00 00[ ]+cmplxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 ec bc 87 23 01 00 00[ ]+cmplxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpnbexadd[ ]+DW= ORD PTR \[r31\+rax\*4\+0x123\],edx,r25d -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpnbexadd[ ]+QW= ORD PTR \[r31\+rax\*4\+0x123\],r15,r31 -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpnbxadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpnbxadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 -[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpnlexadd[ ]+DW= ORD PTR \[r31\+rax\*4\+0x123\],edx,r25d -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpnlexadd[ ]+QW= ORD PTR \[r31\+rax\*4\+0x123\],r15,r31 -[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpnlxadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpnlxadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpaxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpaxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpaexadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpaexadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpgxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpgxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpgexadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpgexadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 e1 94 87 23 01 00 00[ ]+cmpnoxadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e1 bc 87 23 01 00 00[ ]+cmpnoxadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 eb 94 87 23 01 00 00[ ]+cmpnpxadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 eb bc 87 23 01 00 00[ ]+cmpnpxadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 e9 94 87 23 01 00 00[ ]+cmpnsxadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e9 bc 87 23 01 00 00[ ]+cmpnsxadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnzxadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnzxadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnexadd[ ]+DWO= RD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnexadd[ ]+QWO= RD PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 e0 94 87 23 01 00 00[ ]+cmpoxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e0 bc 87 23 01 00 00[ ]+cmpoxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 ea 94 87 23 01 00 00[ ]+cmppxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 ea bc 87 23 01 00 00[ ]+cmppxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 35 00 e8 94 87 23 01 00 00[ ]+cmpsxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e8 bc 87 23 01 00 00[ ]+cmpsxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpzxadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpzxadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpexadd[ ]+DWOR= D PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpexadd[ ]+QWOR= D PTR \[r31\+rax\*4\+0x123\],r15,r31 [ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 f7[ ]+crc32[ ]+r22,r31 [ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 37[ ]+crc32[ ]+r22,QWORD PTR \[r31\] [ ]*[a-f0-9]+:[ ]*62 ec fc 08 f0 cb[ ]+crc32[ ]+r17,r19b diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d b/gas/te= stsuite/gas/i386/x86-64-apx-evex-promoted-wig.d index 88840a1c96f..e800205c0e3 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d @@ -42,30 +42,30 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e2 bc 87 23 01 00 00[ ]+cmpbxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 ec 94 87 23 01 00 00[ ]+cmplxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 ec bc 87 23 01 00 00[ ]+cmplxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpnbexadd[ ]+%r= 25d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpnbexadd[ ]+%r= 31,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpnbxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpnbxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpnlexadd[ ]+%r= 25d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpnlexadd[ ]+%r= 31,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpnlxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpnlxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpaxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpaxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpaexadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpaexadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpgxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpgxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpgexadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpgexadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e1 94 87 23 01 00 00[ ]+cmpnoxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e1 bc 87 23 01 00 00[ ]+cmpnoxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 eb 94 87 23 01 00 00[ ]+cmpnpxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 eb bc 87 23 01 00 00[ ]+cmpnpxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e9 94 87 23 01 00 00[ ]+cmpnsxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e9 bc 87 23 01 00 00[ ]+cmpnsxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnzxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnzxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnexadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnexadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e0 94 87 23 01 00 00[ ]+cmpoxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e0 bc 87 23 01 00 00[ ]+cmpoxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 ea 94 87 23 01 00 00[ ]+cmppxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 ea bc 87 23 01 00 00[ ]+cmppxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e8 94 87 23 01 00 00[ ]+cmpsxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e8 bc 87 23 01 00 00[ ]+cmpsxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpzxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpzxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpexadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpexadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 f7[ ]+crc32 %r31,%r22 [ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 37[ ]+crc32q \(%r31\),%r22 [ ]*[a-f0-9]+:[ ]*62 ec fc 08 f0 cb[ ]+crc32 %r19b,%r17 @@ -186,30 +186,30 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e2 bc 87 23 01 00 00[ ]+cmpbxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 ec 94 87 23 01 00 00[ ]+cmplxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 ec bc 87 23 01 00 00[ ]+cmplxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpnbexadd[ ]+%r= 25d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpnbexadd[ ]+%r= 31,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpnbxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpnbxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpnlexadd[ ]+%r= 25d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpnlexadd[ ]+%r= 31,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpnlxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpnlxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpaxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpaxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpaexadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpaexadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpgxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpgxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpgexadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpgexadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e1 94 87 23 01 00 00[ ]+cmpnoxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e1 bc 87 23 01 00 00[ ]+cmpnoxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 eb 94 87 23 01 00 00[ ]+cmpnpxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 eb bc 87 23 01 00 00[ ]+cmpnpxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e9 94 87 23 01 00 00[ ]+cmpnsxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e9 bc 87 23 01 00 00[ ]+cmpnsxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnzxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnzxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnexadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnexadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e0 94 87 23 01 00 00[ ]+cmpoxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e0 bc 87 23 01 00 00[ ]+cmpoxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 ea 94 87 23 01 00 00[ ]+cmppxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 ea bc 87 23 01 00 00[ ]+cmppxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e8 94 87 23 01 00 00[ ]+cmpsxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e8 bc 87 23 01 00 00[ ]+cmpsxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpzxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpzxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpexadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpexadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 f7[ ]+crc32 %r31,%r22 [ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 37[ ]+crc32q \(%r31\),%r22 [ ]*[a-f0-9]+:[ ]*62 ec fc 08 f0 cb[ ]+crc32 %r19b,%r17 diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d b/gas/testsu= ite/gas/i386/x86-64-apx-evex-promoted.d index bdffa305040..a8f9231b5b0 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d @@ -42,30 +42,30 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e2 bc 87 23 01 00 00[ ]+cmpbxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 ec 94 87 23 01 00 00[ ]+cmplxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 ec bc 87 23 01 00 00[ ]+cmplxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpnbexadd[ ]+%r= 25d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpnbexadd[ ]+%r= 31,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpnbxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpnbxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpnlexadd[ ]+%r= 25d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpnlexadd[ ]+%r= 31,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpnlxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpnlxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpaxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpaxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpaexadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpaexadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpgxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpgxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpgexadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpgexadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e1 94 87 23 01 00 00[ ]+cmpnoxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e1 bc 87 23 01 00 00[ ]+cmpnoxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 eb 94 87 23 01 00 00[ ]+cmpnpxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 eb bc 87 23 01 00 00[ ]+cmpnpxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e9 94 87 23 01 00 00[ ]+cmpnsxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e9 bc 87 23 01 00 00[ ]+cmpnsxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnzxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnzxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnexadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnexadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e0 94 87 23 01 00 00[ ]+cmpoxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e0 bc 87 23 01 00 00[ ]+cmpoxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 ea 94 87 23 01 00 00[ ]+cmppxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 ea bc 87 23 01 00 00[ ]+cmppxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e8 94 87 23 01 00 00[ ]+cmpsxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e8 bc 87 23 01 00 00[ ]+cmpsxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpzxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpzxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpexadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpexadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 f7[ ]+crc32 %r31,%r22 [ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 37[ ]+crc32q \(%r31\),%r22 [ ]*[a-f0-9]+:[ ]*62 ec fc 08 f0 cb[ ]+crc32 %r19b,%r17 @@ -186,30 +186,30 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e2 bc 87 23 01 00 00[ ]+cmpbxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 ec 94 87 23 01 00 00[ ]+cmplxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 ec bc 87 23 01 00 00[ ]+cmplxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpnbexadd[ ]+%r= 25d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpnbexadd[ ]+%r= 31,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpnbxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpnbxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpnlexadd[ ]+%r= 25d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpnlexadd[ ]+%r= 31,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpnlxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpnlxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpaxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpaxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpaexadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpaexadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpgxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpgxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpgexadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpgexadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e1 94 87 23 01 00 00[ ]+cmpnoxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e1 bc 87 23 01 00 00[ ]+cmpnoxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 eb 94 87 23 01 00 00[ ]+cmpnpxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 eb bc 87 23 01 00 00[ ]+cmpnpxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e9 94 87 23 01 00 00[ ]+cmpnsxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e9 bc 87 23 01 00 00[ ]+cmpnsxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnzxadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnzxadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnexadd[ ]+%r2= 5d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnexadd[ ]+%r3= 1,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e0 94 87 23 01 00 00[ ]+cmpoxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e0 bc 87 23 01 00 00[ ]+cmpoxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 ea 94 87 23 01 00 00[ ]+cmppxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 ea bc 87 23 01 00 00[ ]+cmppxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 da 35 00 e8 94 87 23 01 00 00[ ]+cmpsxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 5a 85 00 e8 bc 87 23 01 00 00[ ]+cmpsxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpzxadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpzxadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpexadd[ ]+%r25= d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpexadd[ ]+%r31= ,%r15,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 f7[ ]+crc32 %r31,%r22 [ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 37[ ]+crc32q \(%r31\),%r22 [ ]*[a-f0-9]+:[ ]*62 ec fc 08 f0 cb[ ]+crc32 %r19b,%r17 diff --git a/gas/testsuite/gas/i386/x86-64-apx_f-evex.d b/gas/testsuite/gas= /i386/x86-64-apx_f-evex.d index 12326f568ed..8253d3470d6 100644 --- a/gas/testsuite/gas/i386/x86-64-apx_f-evex.d +++ b/gas/testsuite/gas/i386/x86-64-apx_f-evex.d @@ -116,30 +116,30 @@ Disassembly of section \.text: \s*[a-f0-9]+:\s*62 d2 05 08 ee 94 80 23 01 00 00\s+\{evex\} cmplexadd\s+%r= 15d,%edx,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 52 85 08 ec bc 80 23 01 00 00\s+\{evex\} cmplxadd\s+%r1= 5,%r15,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 d2 05 08 ec 94 80 23 01 00 00\s+\{evex\} cmplxadd\s+%r1= 5d,%edx,0x123\(%r8,%rax,4\) -\s*[a-f0-9]+:\s*62 52 85 08 e7 bc 80 23 01 00 00\s+\{evex\} cmpnbexadd\s+%= r15,%r15,0x123\(%r8,%rax,4\) -\s*[a-f0-9]+:\s*62 d2 05 08 e7 94 80 23 01 00 00\s+\{evex\} cmpnbexadd\s+%= r15d,%edx,0x123\(%r8,%rax,4\) -\s*[a-f0-9]+:\s*62 52 85 08 e3 bc 80 23 01 00 00\s+\{evex\} cmpnbxadd\s+%r= 15,%r15,0x123\(%r8,%rax,4\) -\s*[a-f0-9]+:\s*62 d2 05 08 e3 94 80 23 01 00 00\s+\{evex\} cmpnbxadd\s+%r= 15d,%edx,0x123\(%r8,%rax,4\) -\s*[a-f0-9]+:\s*62 52 85 08 ef bc 80 23 01 00 00\s+\{evex\} cmpnlexadd\s+%= r15,%r15,0x123\(%r8,%rax,4\) -\s*[a-f0-9]+:\s*62 d2 05 08 ef 94 80 23 01 00 00\s+\{evex\} cmpnlexadd\s+%= r15d,%edx,0x123\(%r8,%rax,4\) -\s*[a-f0-9]+:\s*62 52 85 08 ed bc 80 23 01 00 00\s+\{evex\} cmpnlxadd\s+%r= 15,%r15,0x123\(%r8,%rax,4\) -\s*[a-f0-9]+:\s*62 d2 05 08 ed 94 80 23 01 00 00\s+\{evex\} cmpnlxadd\s+%r= 15d,%edx,0x123\(%r8,%rax,4\) +\s*[a-f0-9]+:\s*62 52 85 08 e7 bc 80 23 01 00 00\s+\{evex\} cmpaxadd\s+%r1= 5,%r15,0x123\(%r8,%rax,4\) +\s*[a-f0-9]+:\s*62 d2 05 08 e7 94 80 23 01 00 00\s+\{evex\} cmpaxadd\s+%r1= 5d,%edx,0x123\(%r8,%rax,4\) +\s*[a-f0-9]+:\s*62 52 85 08 e3 bc 80 23 01 00 00\s+\{evex\} cmpaexadd\s+%r= 15,%r15,0x123\(%r8,%rax,4\) +\s*[a-f0-9]+:\s*62 d2 05 08 e3 94 80 23 01 00 00\s+\{evex\} cmpaexadd\s+%r= 15d,%edx,0x123\(%r8,%rax,4\) +\s*[a-f0-9]+:\s*62 52 85 08 ef bc 80 23 01 00 00\s+\{evex\} cmpgxadd\s+%r1= 5,%r15,0x123\(%r8,%rax,4\) +\s*[a-f0-9]+:\s*62 d2 05 08 ef 94 80 23 01 00 00\s+\{evex\} cmpgxadd\s+%r1= 5d,%edx,0x123\(%r8,%rax,4\) +\s*[a-f0-9]+:\s*62 52 85 08 ed bc 80 23 01 00 00\s+\{evex\} cmpgexadd\s+%r= 15,%r15,0x123\(%r8,%rax,4\) +\s*[a-f0-9]+:\s*62 d2 05 08 ed 94 80 23 01 00 00\s+\{evex\} cmpgexadd\s+%r= 15d,%edx,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 52 85 08 e1 bc 80 23 01 00 00\s+\{evex\} cmpnoxadd\s+%r= 15,%r15,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 d2 05 08 e1 94 80 23 01 00 00\s+\{evex\} cmpnoxadd\s+%r= 15d,%edx,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 52 85 08 eb bc 80 23 01 00 00\s+\{evex\} cmpnpxadd\s+%r= 15,%r15,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 d2 05 08 eb 94 80 23 01 00 00\s+\{evex\} cmpnpxadd\s+%r= 15d,%edx,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 52 85 08 e9 bc 80 23 01 00 00\s+\{evex\} cmpnsxadd\s+%r= 15,%r15,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 d2 05 08 e9 94 80 23 01 00 00\s+\{evex\} cmpnsxadd\s+%r= 15d,%edx,0x123\(%r8,%rax,4\) -\s*[a-f0-9]+:\s*62 52 85 08 e5 bc 80 23 01 00 00\s+\{evex\} cmpnzxadd\s+%r= 15,%r15,0x123\(%r8,%rax,4\) -\s*[a-f0-9]+:\s*62 d2 05 08 e5 94 80 23 01 00 00\s+\{evex\} cmpnzxadd\s+%r= 15d,%edx,0x123\(%r8,%rax,4\) +\s*[a-f0-9]+:\s*62 52 85 08 e5 bc 80 23 01 00 00\s+\{evex\} cmpnexadd\s+%r= 15,%r15,0x123\(%r8,%rax,4\) +\s*[a-f0-9]+:\s*62 d2 05 08 e5 94 80 23 01 00 00\s+\{evex\} cmpnexadd\s+%r= 15d,%edx,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 52 85 08 e0 bc 80 23 01 00 00\s+\{evex\} cmpoxadd\s+%r1= 5,%r15,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 d2 05 08 e0 94 80 23 01 00 00\s+\{evex\} cmpoxadd\s+%r1= 5d,%edx,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 52 85 08 ea bc 80 23 01 00 00\s+\{evex\} cmppxadd\s+%r1= 5,%r15,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 d2 05 08 ea 94 80 23 01 00 00\s+\{evex\} cmppxadd\s+%r1= 5d,%edx,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 52 85 08 e8 bc 80 23 01 00 00\s+\{evex\} cmpsxadd\s+%r1= 5,%r15,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 d2 05 08 e8 94 80 23 01 00 00\s+\{evex\} cmpsxadd\s+%r1= 5d,%edx,0x123\(%r8,%rax,4\) -\s*[a-f0-9]+:\s*62 52 85 08 e4 bc 80 23 01 00 00\s+\{evex\} cmpzxadd\s+%r1= 5,%r15,0x123\(%r8,%rax,4\) -\s*[a-f0-9]+:\s*62 d2 05 08 e4 94 80 23 01 00 00\s+\{evex\} cmpzxadd\s+%r1= 5d,%edx,0x123\(%r8,%rax,4\) +\s*[a-f0-9]+:\s*62 52 85 08 e4 bc 80 23 01 00 00\s+\{evex\} cmpexadd\s+%r1= 5,%r15,0x123\(%r8,%rax,4\) +\s*[a-f0-9]+:\s*62 d2 05 08 e4 94 80 23 01 00 00\s+\{evex\} cmpexadd\s+%r1= 5d,%edx,0x123\(%r8,%rax,4\) \s*[a-f0-9]+:\s*62 d4 fc 08 ff cf\s+\{evex\} dec\s+%r15 \s*[a-f0-9]+:\s*62 d4 7c 08 ff cf\s+\{evex\} dec\s+%r15d \s*[a-f0-9]+:\s*62 d4 7d 08 ff cf\s+\{evex\} dec\s+%r15w diff --git a/gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d b/gas/testsuit= e/gas/i386/x86-64-cmpccxadd-intel.d index bb810c9584f..0bc0f54baa6 100644 --- a/gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d +++ b/gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d @@ -39,38 +39,38 @@ Disassembly of section \.text: \s*[a-f0-9]+:\s*c4 c2 e1 ec 09\s+cmplxadd QWORD PTR \[r9\],rcx,rbx \s*[a-f0-9]+:\s*c4 e2 f9 ec 89 f8 03 00 00\s+cmplxadd QWORD PTR \[rcx\+0x3= f8\],rcx,rax \s*[a-f0-9]+:\s*c4 e2 e1 ec 8a 00 fc ff ff\s+cmplxadd QWORD PTR \[rdx-0x40= 0\],rcx,rbx -\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpnbexadd DWORD PTR \[rbp= \+r14\*8\+0x10000000\],ecx,eax -\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpnbexadd DWORD PTR \[r9\],ecx,ebx -\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpnbexadd DWORD PTR \[rcx\+0= x1fc\],ecx,eax -\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpnbexadd DWORD PTR \[rdx-0x= 200\],ecx,ebx -\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpnbexadd QWORD PTR \[rbp= \+r14\*8\+0x10000000\],rcx,rax -\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpnbexadd QWORD PTR \[r9\],rcx,rbx -\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpnbexadd QWORD PTR \[rcx\+0= x3f8\],rcx,rax -\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpnbexadd QWORD PTR \[rdx-0x= 400\],rcx,rbx -\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpnbxadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax -\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpnbxadd DWORD PTR \[r9\],ecx,ebx -\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpnbxadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax -\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpnbxadd DWORD PTR \[rdx-0x2= 00\],ecx,ebx -\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpnbxadd QWORD PTR \[rbp\= +r14\*8\+0x10000000\],rcx,rax -\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpnbxadd QWORD PTR \[r9\],rcx,rbx -\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpnbxadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax -\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpnbxadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx -\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpnlexadd DWORD PTR \[rbp= \+r14\*8\+0x10000000\],ecx,eax -\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpnlexadd DWORD PTR \[r9\],ecx,ebx -\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpnlexadd DWORD PTR \[rcx\+0= x1fc\],ecx,eax -\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpnlexadd DWORD PTR \[rdx-0x= 200\],ecx,ebx -\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpnlexadd QWORD PTR \[rbp= \+r14\*8\+0x10000000\],rcx,rax -\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpnlexadd QWORD PTR \[r9\],rcx,rbx -\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpnlexadd QWORD PTR \[rcx\+0= x3f8\],rcx,rax -\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpnlexadd QWORD PTR \[rdx-0x= 400\],rcx,rbx -\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpnlxadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax -\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpnlxadd DWORD PTR \[r9\],ecx,ebx -\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpnlxadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax -\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpnlxadd DWORD PTR \[rdx-0x2= 00\],ecx,ebx -\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpnlxadd QWORD PTR \[rbp\= +r14\*8\+0x10000000\],rcx,rax -\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpnlxadd QWORD PTR \[r9\],rcx,rbx -\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpnlxadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax -\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpnlxadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx +\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpaxadd DWORD PTR \[rbp\+= r14\*8\+0x10000000\],ecx,eax +\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpaxadd DWORD PTR \[r9\],ecx,ebx +\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpaxadd DWORD PTR \[rcx\+0x1= fc\],ecx,eax +\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpaxadd DWORD PTR \[rdx-0x20= 0\],ecx,ebx +\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpaxadd QWORD PTR \[rbp\+= r14\*8\+0x10000000\],rcx,rax +\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpaxadd QWORD PTR \[r9\],rcx,rbx +\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpaxadd QWORD PTR \[rcx\+0x3= f8\],rcx,rax +\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpaxadd QWORD PTR \[rdx-0x40= 0\],rcx,rbx +\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpaexadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax +\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpaexadd DWORD PTR \[r9\],ecx,ebx +\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpaexadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax +\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpaexadd DWORD PTR \[rdx-0x2= 00\],ecx,ebx +\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpaexadd QWORD PTR \[rbp\= +r14\*8\+0x10000000\],rcx,rax +\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpaexadd QWORD PTR \[r9\],rcx,rbx +\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpaexadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax +\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpaexadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx +\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpgxadd DWORD PTR \[rbp\+= r14\*8\+0x10000000\],ecx,eax +\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpgxadd DWORD PTR \[r9\],ecx,ebx +\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpgxadd DWORD PTR \[rcx\+0x1= fc\],ecx,eax +\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpgxadd DWORD PTR \[rdx-0x20= 0\],ecx,ebx +\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpgxadd QWORD PTR \[rbp\+= r14\*8\+0x10000000\],rcx,rax +\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpgxadd QWORD PTR \[r9\],rcx,rbx +\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpgxadd QWORD PTR \[rcx\+0x3= f8\],rcx,rax +\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpgxadd QWORD PTR \[rdx-0x40= 0\],rcx,rbx +\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpgexadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax +\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpgexadd DWORD PTR \[r9\],ecx,ebx +\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpgexadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax +\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpgexadd DWORD PTR \[rdx-0x2= 00\],ecx,ebx +\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpgexadd QWORD PTR \[rbp\= +r14\*8\+0x10000000\],rcx,rax +\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpgexadd QWORD PTR \[r9\],rcx,rbx +\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpgexadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax +\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpgexadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx \s*[a-f0-9]+:\s*c4 a2 79 e1 8c f5 00 00 00 10\s+cmpnoxadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax \s*[a-f0-9]+:\s*c4 c2 61 e1 09\s+cmpnoxadd DWORD PTR \[r9\],ecx,ebx \s*[a-f0-9]+:\s*c4 e2 79 e1 89 fc 01 00 00\s+cmpnoxadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax @@ -95,14 +95,14 @@ Disassembly of section \.text: \s*[a-f0-9]+:\s*c4 c2 e1 e9 09\s+cmpnsxadd QWORD PTR \[r9\],rcx,rbx \s*[a-f0-9]+:\s*c4 e2 f9 e9 89 f8 03 00 00\s+cmpnsxadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax \s*[a-f0-9]+:\s*c4 e2 e1 e9 8a 00 fc ff ff\s+cmpnsxadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx -\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnzxadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax -\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnzxadd DWORD PTR \[r9\],ecx,ebx -\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnzxadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax -\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnzxadd DWORD PTR \[rdx-0x2= 00\],ecx,ebx -\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnzxadd QWORD PTR \[rbp\= +r14\*8\+0x10000000\],rcx,rax -\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnzxadd QWORD PTR \[r9\],rcx,rbx -\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnzxadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax -\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnzxadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx +\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnexadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax +\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnexadd DWORD PTR \[r9\],ecx,ebx +\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnexadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax +\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnexadd DWORD PTR \[rdx-0x2= 00\],ecx,ebx +\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnexadd QWORD PTR \[rbp\= +r14\*8\+0x10000000\],rcx,rax +\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnexadd QWORD PTR \[r9\],rcx,rbx +\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnexadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax +\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnexadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx \s*[a-f0-9]+:\s*c4 a2 79 e0 8c f5 00 00 00 10\s+cmpoxadd DWORD PTR \[rbp\+= r14\*8\+0x10000000\],ecx,eax \s*[a-f0-9]+:\s*c4 c2 61 e0 09\s+cmpoxadd DWORD PTR \[r9\],ecx,ebx \s*[a-f0-9]+:\s*c4 e2 79 e0 89 fc 01 00 00\s+cmpoxadd DWORD PTR \[rcx\+0x1= fc\],ecx,eax @@ -127,14 +127,14 @@ Disassembly of section \.text: \s*[a-f0-9]+:\s*c4 c2 e1 e8 09\s+cmpsxadd QWORD PTR \[r9\],rcx,rbx \s*[a-f0-9]+:\s*c4 e2 f9 e8 89 f8 03 00 00\s+cmpsxadd QWORD PTR \[rcx\+0x3= f8\],rcx,rax \s*[a-f0-9]+:\s*c4 e2 e1 e8 8a 00 fc ff ff\s+cmpsxadd QWORD PTR \[rdx-0x40= 0\],rcx,rbx -\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpzxadd DWORD PTR \[rbp\+= r14\*8\+0x10000000\],ecx,eax -\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpzxadd DWORD PTR \[r9\],ecx,ebx -\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpzxadd DWORD PTR \[rcx\+0x1= fc\],ecx,eax -\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpzxadd DWORD PTR \[rdx-0x20= 0\],ecx,ebx -\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpzxadd QWORD PTR \[rbp\+= r14\*8\+0x10000000\],rcx,rax -\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd QWORD PTR \[r9\],rcx,rbx -\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd QWORD PTR \[rcx\+0x3= f8\],rcx,rax -\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd QWORD PTR \[rdx-0x40= 0\],rcx,rbx +\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpexadd DWORD PTR \[rbp\+= r14\*8\+0x10000000\],ecx,eax +\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpexadd DWORD PTR \[r9\],ecx,ebx +\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpexadd DWORD PTR \[rcx\+0x1= fc\],ecx,eax +\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpexadd DWORD PTR \[rdx-0x20= 0\],ecx,ebx +\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpexadd QWORD PTR \[rbp\+= r14\*8\+0x10000000\],rcx,rax +\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpexadd QWORD PTR \[r9\],rcx,rbx +\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpexadd QWORD PTR \[rcx\+0x3= f8\],rcx,rax +\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpexadd QWORD PTR \[rdx-0x40= 0\],rcx,rbx \s*[a-f0-9]+:\s*c4 a2 79 e6 8c f5 00 00 00 10\s+cmpbexadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax \s*[a-f0-9]+:\s*c4 c2 61 e6 09\s+cmpbexadd DWORD PTR \[r9\],ecx,ebx \s*[a-f0-9]+:\s*c4 e2 79 e6 89 fc 01 00 00\s+cmpbexadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax @@ -167,38 +167,38 @@ Disassembly of section \.text: \s*[a-f0-9]+:\s*c4 c2 e1 ec 09\s+cmplxadd QWORD PTR \[r9\],rcx,rbx \s*[a-f0-9]+:\s*c4 e2 f9 ec 89 f8 03 00 00\s+cmplxadd QWORD PTR \[rcx\+0x3= f8\],rcx,rax \s*[a-f0-9]+:\s*c4 e2 e1 ec 8a 00 fc ff ff\s+cmplxadd QWORD PTR \[rdx-0x40= 0\],rcx,rbx -\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpnbexadd DWORD PTR \[rbp= \+r14\*8\+0x10000000\],ecx,eax -\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpnbexadd DWORD PTR \[r9\],ecx,ebx -\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpnbexadd DWORD PTR \[rcx\+0= x1fc\],ecx,eax -\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpnbexadd DWORD PTR \[rdx-0x= 200\],ecx,ebx -\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpnbexadd QWORD PTR \[rbp= \+r14\*8\+0x10000000\],rcx,rax -\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpnbexadd QWORD PTR \[r9\],rcx,rbx -\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpnbexadd QWORD PTR \[rcx\+0= x3f8\],rcx,rax -\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpnbexadd QWORD PTR \[rdx-0x= 400\],rcx,rbx -\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpnbxadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax -\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpnbxadd DWORD PTR \[r9\],ecx,ebx -\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpnbxadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax -\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpnbxadd DWORD PTR \[rdx-0x2= 00\],ecx,ebx -\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpnbxadd QWORD PTR \[rbp\= +r14\*8\+0x10000000\],rcx,rax -\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpnbxadd QWORD PTR \[r9\],rcx,rbx -\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpnbxadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax -\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpnbxadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx -\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpnlexadd DWORD PTR \[rbp= \+r14\*8\+0x10000000\],ecx,eax -\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpnlexadd DWORD PTR \[r9\],ecx,ebx -\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpnlexadd DWORD PTR \[rcx\+0= x1fc\],ecx,eax -\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpnlexadd DWORD PTR \[rdx-0x= 200\],ecx,ebx -\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpnlexadd QWORD PTR \[rbp= \+r14\*8\+0x10000000\],rcx,rax -\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpnlexadd QWORD PTR \[r9\],rcx,rbx -\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpnlexadd QWORD PTR \[rcx\+0= x3f8\],rcx,rax -\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpnlexadd QWORD PTR \[rdx-0x= 400\],rcx,rbx -\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpnlxadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax -\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpnlxadd DWORD PTR \[r9\],ecx,ebx -\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpnlxadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax -\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpnlxadd DWORD PTR \[rdx-0x2= 00\],ecx,ebx -\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpnlxadd QWORD PTR \[rbp\= +r14\*8\+0x10000000\],rcx,rax -\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpnlxadd QWORD PTR \[r9\],rcx,rbx -\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpnlxadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax -\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpnlxadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx +\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpaxadd DWORD PTR \[rbp\+= r14\*8\+0x10000000\],ecx,eax +\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpaxadd DWORD PTR \[r9\],ecx,ebx +\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpaxadd DWORD PTR \[rcx\+0x1= fc\],ecx,eax +\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpaxadd DWORD PTR \[rdx-0x20= 0\],ecx,ebx +\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpaxadd QWORD PTR \[rbp\+= r14\*8\+0x10000000\],rcx,rax +\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpaxadd QWORD PTR \[r9\],rcx,rbx +\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpaxadd QWORD PTR \[rcx\+0x3= f8\],rcx,rax +\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpaxadd QWORD PTR \[rdx-0x40= 0\],rcx,rbx +\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpaexadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax +\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpaexadd DWORD PTR \[r9\],ecx,ebx +\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpaexadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax +\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpaexadd DWORD PTR \[rdx-0x2= 00\],ecx,ebx +\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpaexadd QWORD PTR \[rbp\= +r14\*8\+0x10000000\],rcx,rax +\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpaexadd QWORD PTR \[r9\],rcx,rbx +\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpaexadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax +\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpaexadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx +\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpgxadd DWORD PTR \[rbp\+= r14\*8\+0x10000000\],ecx,eax +\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpgxadd DWORD PTR \[r9\],ecx,ebx +\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpgxadd DWORD PTR \[rcx\+0x1= fc\],ecx,eax +\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpgxadd DWORD PTR \[rdx-0x20= 0\],ecx,ebx +\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpgxadd QWORD PTR \[rbp\+= r14\*8\+0x10000000\],rcx,rax +\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpgxadd QWORD PTR \[r9\],rcx,rbx +\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpgxadd QWORD PTR \[rcx\+0x3= f8\],rcx,rax +\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpgxadd QWORD PTR \[rdx-0x40= 0\],rcx,rbx +\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpgexadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax +\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpgexadd DWORD PTR \[r9\],ecx,ebx +\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpgexadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax +\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpgexadd DWORD PTR \[rdx-0x2= 00\],ecx,ebx +\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpgexadd QWORD PTR \[rbp\= +r14\*8\+0x10000000\],rcx,rax +\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpgexadd QWORD PTR \[r9\],rcx,rbx +\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpgexadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax +\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpgexadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx \s*[a-f0-9]+:\s*c4 a2 79 e1 8c f5 00 00 00 10\s+cmpnoxadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax \s*[a-f0-9]+:\s*c4 c2 61 e1 09\s+cmpnoxadd DWORD PTR \[r9\],ecx,ebx \s*[a-f0-9]+:\s*c4 e2 79 e1 89 fc 01 00 00\s+cmpnoxadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax @@ -223,14 +223,14 @@ Disassembly of section \.text: \s*[a-f0-9]+:\s*c4 c2 e1 e9 09\s+cmpnsxadd QWORD PTR \[r9\],rcx,rbx \s*[a-f0-9]+:\s*c4 e2 f9 e9 89 f8 03 00 00\s+cmpnsxadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax \s*[a-f0-9]+:\s*c4 e2 e1 e9 8a 00 fc ff ff\s+cmpnsxadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx -\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnzxadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax -\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnzxadd DWORD PTR \[r9\],ecx,ebx -\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnzxadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax -\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnzxadd DWORD PTR \[rdx-0x2= 00\],ecx,ebx -\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnzxadd QWORD PTR \[rbp\= +r14\*8\+0x10000000\],rcx,rax -\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnzxadd QWORD PTR \[r9\],rcx,rbx -\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnzxadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax -\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnzxadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx +\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnexadd DWORD PTR \[rbp\= +r14\*8\+0x10000000\],ecx,eax +\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnexadd DWORD PTR \[r9\],ecx,ebx +\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnexadd DWORD PTR \[rcx\+0x= 1fc\],ecx,eax +\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnexadd DWORD PTR \[rdx-0x2= 00\],ecx,ebx +\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnexadd QWORD PTR \[rbp\= +r14\*8\+0x10000000\],rcx,rax +\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnexadd QWORD PTR \[r9\],rcx,rbx +\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnexadd QWORD PTR \[rcx\+0x= 3f8\],rcx,rax +\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnexadd QWORD PTR \[rdx-0x4= 00\],rcx,rbx \s*[a-f0-9]+:\s*c4 a2 79 e0 8c f5 00 00 00 10\s+cmpoxadd DWORD PTR \[rbp\+= r14\*8\+0x10000000\],ecx,eax \s*[a-f0-9]+:\s*c4 c2 61 e0 09\s+cmpoxadd DWORD PTR \[r9\],ecx,ebx \s*[a-f0-9]+:\s*c4 e2 79 e0 89 fc 01 00 00\s+cmpoxadd DWORD PTR \[rcx\+0x1= fc\],ecx,eax @@ -255,12 +255,12 @@ Disassembly of section \.text: \s*[a-f0-9]+:\s*c4 c2 e1 e8 09\s+cmpsxadd QWORD PTR \[r9\],rcx,rbx \s*[a-f0-9]+:\s*c4 e2 f9 e8 89 f8 03 00 00\s+cmpsxadd QWORD PTR \[rcx\+0x3= f8\],rcx,rax \s*[a-f0-9]+:\s*c4 e2 e1 e8 8a 00 fc ff ff\s+cmpsxadd QWORD PTR \[rdx-0x40= 0\],rcx,rbx -\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpzxadd DWORD PTR \[rbp\+= r14\*8\+0x10000000\],ecx,eax -\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpzxadd DWORD PTR \[r9\],ecx,ebx -\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpzxadd DWORD PTR \[rcx\+0x1= fc\],ecx,eax -\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpzxadd DWORD PTR \[rdx-0x20= 0\],ecx,ebx -\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpzxadd QWORD PTR \[rbp\+= r14\*8\+0x10000000\],rcx,rax -\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd QWORD PTR \[r9\],rcx,rbx -\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd QWORD PTR \[rcx\+0x3= f8\],rcx,rax -\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd QWORD PTR \[rdx-0x40= 0\],rcx,rbx +\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpexadd DWORD PTR \[rbp\+= r14\*8\+0x10000000\],ecx,eax +\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpexadd DWORD PTR \[r9\],ecx,ebx +\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpexadd DWORD PTR \[rcx\+0x1= fc\],ecx,eax +\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpexadd DWORD PTR \[rdx-0x20= 0\],ecx,ebx +\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpexadd QWORD PTR \[rbp\+= r14\*8\+0x10000000\],rcx,rax +\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpexadd QWORD PTR \[r9\],rcx,rbx +\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpexadd QWORD PTR \[rcx\+0x3= f8\],rcx,rax +\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpexadd QWORD PTR \[rdx-0x40= 0\],rcx,rbx #pass diff --git a/gas/testsuite/gas/i386/x86-64-cmpccxadd.d b/gas/testsuite/gas/= i386/x86-64-cmpccxadd.d index 793ad1aca3a..f8d29a746cd 100644 --- a/gas/testsuite/gas/i386/x86-64-cmpccxadd.d +++ b/gas/testsuite/gas/i386/x86-64-cmpccxadd.d @@ -39,38 +39,38 @@ Disassembly of section \.text: \s*[a-f0-9]+:\s*c4 c2 e1 ec 09\s+cmplxadd %rbx,%rcx,\(%r9\) \s*[a-f0-9]+:\s*c4 e2 f9 ec 89 f8 03 00 00\s+cmplxadd %rax,%rcx,0x3f8\(%rc= x\) \s*[a-f0-9]+:\s*c4 e2 e1 ec 8a 00 fc ff ff\s+cmplxadd %rbx,%rcx,-0x400\(%r= dx\) -\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpnbexadd %eax,%ecx,0x100= 00000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpnbexadd %ebx,%ecx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpnbexadd %eax,%ecx,0x1fc\(%= rcx\) -\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpnbexadd %ebx,%ecx,-0x200\(= %rdx\) -\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpnbexadd %rax,%rcx,0x100= 00000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpnbexadd %rbx,%rcx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpnbexadd %rax,%rcx,0x3f8\(%= rcx\) -\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpnbexadd %rbx,%rcx,-0x400\(= %rdx\) -\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpnbxadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpnbxadd %ebx,%ecx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpnbxadd %eax,%ecx,0x1fc\(%r= cx\) -\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpnbxadd %ebx,%ecx,-0x200\(%= rdx\) -\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpnbxadd %rax,%rcx,0x1000= 0000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpnbxadd %rbx,%rcx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpnbxadd %rax,%rcx,0x3f8\(%r= cx\) -\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpnbxadd %rbx,%rcx,-0x400\(%= rdx\) -\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpnlexadd %eax,%ecx,0x100= 00000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpnlexadd %ebx,%ecx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpnlexadd %eax,%ecx,0x1fc\(%= rcx\) -\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpnlexadd %ebx,%ecx,-0x200\(= %rdx\) -\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpnlexadd %rax,%rcx,0x100= 00000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpnlexadd %rbx,%rcx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpnlexadd %rax,%rcx,0x3f8\(%= rcx\) -\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpnlexadd %rbx,%rcx,-0x400\(= %rdx\) -\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpnlxadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpnlxadd %ebx,%ecx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpnlxadd %eax,%ecx,0x1fc\(%r= cx\) -\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpnlxadd %ebx,%ecx,-0x200\(%= rdx\) -\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpnlxadd %rax,%rcx,0x1000= 0000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpnlxadd %rbx,%rcx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpnlxadd %rax,%rcx,0x3f8\(%r= cx\) -\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpnlxadd %rbx,%rcx,-0x400\(%= rdx\) +\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpaxadd %eax,%ecx,0x10000= 000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpaxadd %ebx,%ecx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpaxadd %eax,%ecx,0x1fc\(%rc= x\) +\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpaxadd %ebx,%ecx,-0x200\(%r= dx\) +\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpaxadd %rax,%rcx,0x10000= 000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpaxadd %rbx,%rcx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpaxadd %rax,%rcx,0x3f8\(%rc= x\) +\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpaxadd %rbx,%rcx,-0x400\(%r= dx\) +\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpaexadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpaexadd %ebx,%ecx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpaexadd %eax,%ecx,0x1fc\(%r= cx\) +\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpaexadd %ebx,%ecx,-0x200\(%= rdx\) +\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpaexadd %rax,%rcx,0x1000= 0000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpaexadd %rbx,%rcx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpaexadd %rax,%rcx,0x3f8\(%r= cx\) +\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpaexadd %rbx,%rcx,-0x400\(%= rdx\) +\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpgxadd %eax,%ecx,0x10000= 000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpgxadd %ebx,%ecx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpgxadd %eax,%ecx,0x1fc\(%rc= x\) +\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpgxadd %ebx,%ecx,-0x200\(%r= dx\) +\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpgxadd %rax,%rcx,0x10000= 000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpgxadd %rbx,%rcx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpgxadd %rax,%rcx,0x3f8\(%rc= x\) +\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpgxadd %rbx,%rcx,-0x400\(%r= dx\) +\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpgexadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpgexadd %ebx,%ecx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpgexadd %eax,%ecx,0x1fc\(%r= cx\) +\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpgexadd %ebx,%ecx,-0x200\(%= rdx\) +\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpgexadd %rax,%rcx,0x1000= 0000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpgexadd %rbx,%rcx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpgexadd %rax,%rcx,0x3f8\(%r= cx\) +\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpgexadd %rbx,%rcx,-0x400\(%= rdx\) \s*[a-f0-9]+:\s*c4 a2 79 e1 8c f5 00 00 00 10\s+cmpnoxadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) \s*[a-f0-9]+:\s*c4 c2 61 e1 09\s+cmpnoxadd %ebx,%ecx,\(%r9\) \s*[a-f0-9]+:\s*c4 e2 79 e1 89 fc 01 00 00\s+cmpnoxadd %eax,%ecx,0x1fc\(%r= cx\) @@ -95,14 +95,14 @@ Disassembly of section \.text: \s*[a-f0-9]+:\s*c4 c2 e1 e9 09\s+cmpnsxadd %rbx,%rcx,\(%r9\) \s*[a-f0-9]+:\s*c4 e2 f9 e9 89 f8 03 00 00\s+cmpnsxadd %rax,%rcx,0x3f8\(%r= cx\) \s*[a-f0-9]+:\s*c4 e2 e1 e9 8a 00 fc ff ff\s+cmpnsxadd %rbx,%rcx,-0x400\(%= rdx\) -\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnzxadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnzxadd %ebx,%ecx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnzxadd %eax,%ecx,0x1fc\(%r= cx\) -\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnzxadd %ebx,%ecx,-0x200\(%= rdx\) -\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnzxadd %rax,%rcx,0x1000= 0000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnzxadd %rbx,%rcx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnzxadd %rax,%rcx,0x3f8\(%r= cx\) -\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnzxadd %rbx,%rcx,-0x400\(%= rdx\) +\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnexadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnexadd %ebx,%ecx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnexadd %eax,%ecx,0x1fc\(%r= cx\) +\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnexadd %ebx,%ecx,-0x200\(%= rdx\) +\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnexadd %rax,%rcx,0x1000= 0000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnexadd %rbx,%rcx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnexadd %rax,%rcx,0x3f8\(%r= cx\) +\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnexadd %rbx,%rcx,-0x400\(%= rdx\) \s*[a-f0-9]+:\s*c4 a2 79 e0 8c f5 00 00 00 10\s+cmpoxadd %eax,%ecx,0x10000= 000\(%rbp,%r14,8\) \s*[a-f0-9]+:\s*c4 c2 61 e0 09\s+cmpoxadd %ebx,%ecx,\(%r9\) \s*[a-f0-9]+:\s*c4 e2 79 e0 89 fc 01 00 00\s+cmpoxadd %eax,%ecx,0x1fc\(%rc= x\) @@ -127,14 +127,14 @@ Disassembly of section \.text: \s*[a-f0-9]+:\s*c4 c2 e1 e8 09\s+cmpsxadd %rbx,%rcx,\(%r9\) \s*[a-f0-9]+:\s*c4 e2 f9 e8 89 f8 03 00 00\s+cmpsxadd %rax,%rcx,0x3f8\(%rc= x\) \s*[a-f0-9]+:\s*c4 e2 e1 e8 8a 00 fc ff ff\s+cmpsxadd %rbx,%rcx,-0x400\(%r= dx\) -\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpzxadd %eax,%ecx,0x10000= 000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpzxadd %ebx,%ecx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpzxadd %eax,%ecx,0x1fc\(%rc= x\) -\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpzxadd %ebx,%ecx,-0x200\(%r= dx\) -\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpzxadd %rax,%rcx,0x10000= 000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd %rbx,%rcx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd %rax,%rcx,0x3f8\(%rc= x\) -\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd %rbx,%rcx,-0x400\(%r= dx\) +\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpexadd %eax,%ecx,0x10000= 000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpexadd %ebx,%ecx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpexadd %eax,%ecx,0x1fc\(%rc= x\) +\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpexadd %ebx,%ecx,-0x200\(%r= dx\) +\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpexadd %rax,%rcx,0x10000= 000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpexadd %rbx,%rcx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpexadd %rax,%rcx,0x3f8\(%rc= x\) +\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpexadd %rbx,%rcx,-0x400\(%r= dx\) \s*[a-f0-9]+:\s*c4 a2 79 e6 8c f5 00 00 00 10\s+cmpbexadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) \s*[a-f0-9]+:\s*c4 c2 61 e6 09\s+cmpbexadd %ebx,%ecx,\(%r9\) \s*[a-f0-9]+:\s*c4 e2 79 e6 89 fc 01 00 00\s+cmpbexadd %eax,%ecx,0x1fc\(%r= cx\) @@ -167,38 +167,38 @@ Disassembly of section \.text: \s*[a-f0-9]+:\s*c4 c2 e1 ec 09\s+cmplxadd %rbx,%rcx,\(%r9\) \s*[a-f0-9]+:\s*c4 e2 f9 ec 89 f8 03 00 00\s+cmplxadd %rax,%rcx,0x3f8\(%rc= x\) \s*[a-f0-9]+:\s*c4 e2 e1 ec 8a 00 fc ff ff\s+cmplxadd %rbx,%rcx,-0x400\(%r= dx\) -\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpnbexadd %eax,%ecx,0x100= 00000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpnbexadd %ebx,%ecx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpnbexadd %eax,%ecx,0x1fc\(%= rcx\) -\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpnbexadd %ebx,%ecx,-0x200\(= %rdx\) -\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpnbexadd %rax,%rcx,0x100= 00000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpnbexadd %rbx,%rcx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpnbexadd %rax,%rcx,0x3f8\(%= rcx\) -\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpnbexadd %rbx,%rcx,-0x400\(= %rdx\) -\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpnbxadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpnbxadd %ebx,%ecx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpnbxadd %eax,%ecx,0x1fc\(%r= cx\) -\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpnbxadd %ebx,%ecx,-0x200\(%= rdx\) -\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpnbxadd %rax,%rcx,0x1000= 0000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpnbxadd %rbx,%rcx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpnbxadd %rax,%rcx,0x3f8\(%r= cx\) -\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpnbxadd %rbx,%rcx,-0x400\(%= rdx\) -\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpnlexadd %eax,%ecx,0x100= 00000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpnlexadd %ebx,%ecx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpnlexadd %eax,%ecx,0x1fc\(%= rcx\) -\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpnlexadd %ebx,%ecx,-0x200\(= %rdx\) -\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpnlexadd %rax,%rcx,0x100= 00000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpnlexadd %rbx,%rcx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpnlexadd %rax,%rcx,0x3f8\(%= rcx\) -\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpnlexadd %rbx,%rcx,-0x400\(= %rdx\) -\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpnlxadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpnlxadd %ebx,%ecx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpnlxadd %eax,%ecx,0x1fc\(%r= cx\) -\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpnlxadd %ebx,%ecx,-0x200\(%= rdx\) -\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpnlxadd %rax,%rcx,0x1000= 0000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpnlxadd %rbx,%rcx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpnlxadd %rax,%rcx,0x3f8\(%r= cx\) -\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpnlxadd %rbx,%rcx,-0x400\(%= rdx\) +\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpaxadd %eax,%ecx,0x10000= 000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpaxadd %ebx,%ecx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpaxadd %eax,%ecx,0x1fc\(%rc= x\) +\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpaxadd %ebx,%ecx,-0x200\(%r= dx\) +\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpaxadd %rax,%rcx,0x10000= 000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpaxadd %rbx,%rcx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpaxadd %rax,%rcx,0x3f8\(%rc= x\) +\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpaxadd %rbx,%rcx,-0x400\(%r= dx\) +\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpaexadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpaexadd %ebx,%ecx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpaexadd %eax,%ecx,0x1fc\(%r= cx\) +\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpaexadd %ebx,%ecx,-0x200\(%= rdx\) +\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpaexadd %rax,%rcx,0x1000= 0000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpaexadd %rbx,%rcx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpaexadd %rax,%rcx,0x3f8\(%r= cx\) +\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpaexadd %rbx,%rcx,-0x400\(%= rdx\) +\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpgxadd %eax,%ecx,0x10000= 000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpgxadd %ebx,%ecx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpgxadd %eax,%ecx,0x1fc\(%rc= x\) +\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpgxadd %ebx,%ecx,-0x200\(%r= dx\) +\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpgxadd %rax,%rcx,0x10000= 000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpgxadd %rbx,%rcx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpgxadd %rax,%rcx,0x3f8\(%rc= x\) +\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpgxadd %rbx,%rcx,-0x400\(%r= dx\) +\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpgexadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpgexadd %ebx,%ecx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpgexadd %eax,%ecx,0x1fc\(%r= cx\) +\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpgexadd %ebx,%ecx,-0x200\(%= rdx\) +\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpgexadd %rax,%rcx,0x1000= 0000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpgexadd %rbx,%rcx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpgexadd %rax,%rcx,0x3f8\(%r= cx\) +\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpgexadd %rbx,%rcx,-0x400\(%= rdx\) \s*[a-f0-9]+:\s*c4 a2 79 e1 8c f5 00 00 00 10\s+cmpnoxadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) \s*[a-f0-9]+:\s*c4 c2 61 e1 09\s+cmpnoxadd %ebx,%ecx,\(%r9\) \s*[a-f0-9]+:\s*c4 e2 79 e1 89 fc 01 00 00\s+cmpnoxadd %eax,%ecx,0x1fc\(%r= cx\) @@ -223,14 +223,14 @@ Disassembly of section \.text: \s*[a-f0-9]+:\s*c4 c2 e1 e9 09\s+cmpnsxadd %rbx,%rcx,\(%r9\) \s*[a-f0-9]+:\s*c4 e2 f9 e9 89 f8 03 00 00\s+cmpnsxadd %rax,%rcx,0x3f8\(%r= cx\) \s*[a-f0-9]+:\s*c4 e2 e1 e9 8a 00 fc ff ff\s+cmpnsxadd %rbx,%rcx,-0x400\(%= rdx\) -\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnzxadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnzxadd %ebx,%ecx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnzxadd %eax,%ecx,0x1fc\(%r= cx\) -\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnzxadd %ebx,%ecx,-0x200\(%= rdx\) -\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnzxadd %rax,%rcx,0x1000= 0000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnzxadd %rbx,%rcx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnzxadd %rax,%rcx,0x3f8\(%r= cx\) -\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnzxadd %rbx,%rcx,-0x400\(%= rdx\) +\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnexadd %eax,%ecx,0x1000= 0000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnexadd %ebx,%ecx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnexadd %eax,%ecx,0x1fc\(%r= cx\) +\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnexadd %ebx,%ecx,-0x200\(%= rdx\) +\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnexadd %rax,%rcx,0x1000= 0000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnexadd %rbx,%rcx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnexadd %rax,%rcx,0x3f8\(%r= cx\) +\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnexadd %rbx,%rcx,-0x400\(%= rdx\) \s*[a-f0-9]+:\s*c4 a2 79 e0 8c f5 00 00 00 10\s+cmpoxadd %eax,%ecx,0x10000= 000\(%rbp,%r14,8\) \s*[a-f0-9]+:\s*c4 c2 61 e0 09\s+cmpoxadd %ebx,%ecx,\(%r9\) \s*[a-f0-9]+:\s*c4 e2 79 e0 89 fc 01 00 00\s+cmpoxadd %eax,%ecx,0x1fc\(%rc= x\) @@ -255,12 +255,12 @@ Disassembly of section \.text: \s*[a-f0-9]+:\s*c4 c2 e1 e8 09\s+cmpsxadd %rbx,%rcx,\(%r9\) \s*[a-f0-9]+:\s*c4 e2 f9 e8 89 f8 03 00 00\s+cmpsxadd %rax,%rcx,0x3f8\(%rc= x\) \s*[a-f0-9]+:\s*c4 e2 e1 e8 8a 00 fc ff ff\s+cmpsxadd %rbx,%rcx,-0x400\(%r= dx\) -\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpzxadd %eax,%ecx,0x10000= 000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpzxadd %ebx,%ecx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpzxadd %eax,%ecx,0x1fc\(%rc= x\) -\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpzxadd %ebx,%ecx,-0x200\(%r= dx\) -\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpzxadd %rax,%rcx,0x10000= 000\(%rbp,%r14,8\) -\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd %rbx,%rcx,\(%r9\) -\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd %rax,%rcx,0x3f8\(%rc= x\) -\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd %rbx,%rcx,-0x400\(%r= dx\) +\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpexadd %eax,%ecx,0x10000= 000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpexadd %ebx,%ecx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpexadd %eax,%ecx,0x1fc\(%rc= x\) +\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpexadd %ebx,%ecx,-0x200\(%r= dx\) +\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpexadd %rax,%rcx,0x10000= 000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpexadd %rbx,%rcx,\(%r9\) +\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpexadd %rax,%rcx,0x3f8\(%rc= x\) +\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpexadd %rbx,%rcx,-0x400\(%r= dx\) #pass diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h index 947fd868dd6..0eba11d87de 100644 --- a/opcodes/i386-dis-evex-prefix.h +++ b/opcodes/i386-dis-evex-prefix.h @@ -338,117 +338,12 @@ { "vcmpp%XH", { MaskG, Vex, EXxh, EXxEVexS, CMP }, 0 }, { "vcmps%XH", { MaskG, VexScalar, EXw, EXxEVexS, CMP }, 0 }, }, - /* PREFIX_EVEX_MAP4_40 */ + /* PREFIX_EVEX_MAP4_4x */ { - { "%CFcmovoS", { VexGv, Gv, Ev }, 0 }, + { "%CFcmov%CCS", { VexGv, Gv, Ev }, 0 }, { Bad_Opcode }, - { "%CFcmovoS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUo", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_41 */ - { - { "%CFcmovnoS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovnoS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUno", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_42 */ - { - { "%CFcmovbS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovbS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUb", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_43 */ - { - { "%CFcmovaeS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovaeS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUae", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_44 */ - { - { "%CFcmoveS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmoveS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUe", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_45 */ - { - { "%CFcmovneS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovneS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUne", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_46 */ - { - { "%CFcmovbeS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovbeS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUbe", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_47 */ - { - { "%CFcmovaS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovaS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUa", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_48 */ - { - { "%CFcmovsS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovsS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUs", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_49 */ - { - { "%CFcmovnsS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovnsS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUns", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_4A */ - { - { "%CFcmovpS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovpS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUp", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_4B */ - { - { "%CFcmovnpS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovnpS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUnp", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_4C */ - { - { "%CFcmovlS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovlS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUl", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_4D */ - { - { "%CFcmovgeS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovgeS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUge", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_4E */ - { - { "%CFcmovleS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovleS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUle", { Eb }, 0 }, - }, - /* PREFIX_EVEX_MAP4_4F */ - { - { "%CFcmovgS", { VexGv, Gv, Ev }, 0 }, - { Bad_Opcode }, - { "%CFcmovgS", { VexGv, Gv, Ev }, 0 }, - { "set%ZUg", { Eb }, 0 }, + { "%CFcmov%CCS", { VexGv, Gv, Ev }, 0 }, + { "set%ZU%CC", { Eb }, 0 }, }, /* PREFIX_EVEX_MAP4_F0 */ { diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h index ebb3cc20aea..a3d3fbe204d 100644 --- a/opcodes/i386-dis-evex.h +++ b/opcodes/i386-dis-evex.h @@ -545,23 +545,23 @@ static const struct dis386 evex_table[][256] =3D { { "%XEvaesdecY", { XM, Vex, EXx }, PREFIX_DATA }, { "%XEvaesdeclastY", { XM, Vex, EXx }, PREFIX_DATA }, /* E0 */ - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E0) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E1) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E2) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E3) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E4) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E5) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E6) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E7) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, /* E8 */ - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E8) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E9) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38EA) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38EB) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38EC) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38ED) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38EE) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38EF) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38Ex) }, /* F0 */ { Bad_Opcode }, { Bad_Opcode }, @@ -947,23 +947,23 @@ static const struct dis386 evex_table[][256] =3D { { Bad_Opcode }, { Bad_Opcode }, /* 40 */ - { PREFIX_TABLE (PREFIX_EVEX_MAP4_40) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_41) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_42) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_43) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_44) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_45) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_46) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_47) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, /* 48 */ - { PREFIX_TABLE (PREFIX_EVEX_MAP4_48) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_49) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_4A) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_4B) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_4C) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_4D) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_4E) }, - { PREFIX_TABLE (PREFIX_EVEX_MAP4_4F) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_4x) }, /* 50 */ { Bad_Opcode }, { Bad_Opcode }, diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 46441974bb8..5e9e53c4939 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -160,6 +160,7 @@ struct instr_info unsigned char rex2_payload; =20 bool need_modrm; + unsigned char condition_code; unsigned char need_vex; bool has_sib; =20 @@ -1199,22 +1200,7 @@ enum PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3AC2, =20 - PREFIX_EVEX_MAP4_40, - PREFIX_EVEX_MAP4_41, - PREFIX_EVEX_MAP4_42, - PREFIX_EVEX_MAP4_43, - PREFIX_EVEX_MAP4_44, - PREFIX_EVEX_MAP4_45, - PREFIX_EVEX_MAP4_46, - PREFIX_EVEX_MAP4_47, - PREFIX_EVEX_MAP4_48, - PREFIX_EVEX_MAP4_49, - PREFIX_EVEX_MAP4_4A, - PREFIX_EVEX_MAP4_4B, - PREFIX_EVEX_MAP4_4C, - PREFIX_EVEX_MAP4_4D, - PREFIX_EVEX_MAP4_4E, - PREFIX_EVEX_MAP4_4F, + PREFIX_EVEX_MAP4_4x, PREFIX_EVEX_MAP4_F0, PREFIX_EVEX_MAP4_F1, PREFIX_EVEX_MAP4_F2, @@ -1315,22 +1301,7 @@ enum X86_64_VEX_0F385C, X86_64_VEX_0F385E, X86_64_VEX_0F386C, - X86_64_VEX_0F38E0, - X86_64_VEX_0F38E1, - X86_64_VEX_0F38E2, - X86_64_VEX_0F38E3, - X86_64_VEX_0F38E4, - X86_64_VEX_0F38E5, - X86_64_VEX_0F38E6, - X86_64_VEX_0F38E7, - X86_64_VEX_0F38E8, - X86_64_VEX_0F38E9, - X86_64_VEX_0F38EA, - X86_64_VEX_0F38EB, - X86_64_VEX_0F38EC, - X86_64_VEX_0F38ED, - X86_64_VEX_0F38EE, - X86_64_VEX_0F38EF, + X86_64_VEX_0F38Ex, =20 X86_64_VEX_MAP7_F8_L_0_W_0_R_0, }; @@ -1816,6 +1787,7 @@ struct dis386 { nothing otherwise; behave as 'P' in all other cases =20 2 upper case letter macros: + "CC" =3D> print condition code "XY" =3D> print 'x' or 'y' if suffix_always is true or no register operands and no broadcast. "XZ" =3D> print 'x', 'y', or 'z' if suffix_always is true or no @@ -4512,100 +4484,10 @@ static const struct dis386 x86_64_table[][2] =3D { { VEX_LEN_TABLE (VEX_LEN_0F386C_X86_64) }, }, =20 - /* X86_64_VEX_0F38E0 */ + /* X86_64_VEX_0F38Ex */ { { Bad_Opcode }, - { "%XEcmpoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38E1 */ - { - { Bad_Opcode }, - { "%XEcmpnoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38E2 */ - { - { Bad_Opcode }, - { "%XEcmpbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38E3 */ - { - { Bad_Opcode }, - { "%XEcmpnbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38E4 */ - { - { Bad_Opcode }, - { "%XEcmpzxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38E5 */ - { - { Bad_Opcode }, - { "%XEcmpnzxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38E6 */ - { - { Bad_Opcode }, - { "%XEcmpbexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38E7 */ - { - { Bad_Opcode }, - { "%XEcmpnbexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38E8 */ - { - { Bad_Opcode }, - { "%XEcmpsxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38E9 */ - { - { Bad_Opcode }, - { "%XEcmpnsxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38EA */ - { - { Bad_Opcode }, - { "%XEcmppxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38EB */ - { - { Bad_Opcode }, - { "%XEcmpnpxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38EC */ - { - { Bad_Opcode }, - { "%XEcmplxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38ED */ - { - { Bad_Opcode }, - { "%XEcmpnlxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38EE */ - { - { Bad_Opcode }, - { "%XEcmplexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, - }, - - /* X86_64_VEX_0F38EF */ - { - { Bad_Opcode }, - { "%XEcmpnlexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + { "%XEcmp%CCxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, }, =20 /* X86_64_VEX_MAP7_F8_L_0_W_0_R_0 */ @@ -6624,23 +6506,23 @@ static const struct dis386 vex_table[][256] =3D { { "vaesdec", { XM, Vex, EXx }, PREFIX_DATA }, { "vaesdeclast", { XM, Vex, EXx }, PREFIX_DATA }, /* e0 */ - { X86_64_TABLE (X86_64_VEX_0F38E0) }, - { X86_64_TABLE (X86_64_VEX_0F38E1) }, - { X86_64_TABLE (X86_64_VEX_0F38E2) }, - { X86_64_TABLE (X86_64_VEX_0F38E3) }, - { X86_64_TABLE (X86_64_VEX_0F38E4) }, - { X86_64_TABLE (X86_64_VEX_0F38E5) }, - { X86_64_TABLE (X86_64_VEX_0F38E6) }, - { X86_64_TABLE (X86_64_VEX_0F38E7) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, /* e8 */ - { X86_64_TABLE (X86_64_VEX_0F38E8) }, - { X86_64_TABLE (X86_64_VEX_0F38E9) }, - { X86_64_TABLE (X86_64_VEX_0F38EA) }, - { X86_64_TABLE (X86_64_VEX_0F38EB) }, - { X86_64_TABLE (X86_64_VEX_0F38EC) }, - { X86_64_TABLE (X86_64_VEX_0F38ED) }, - { X86_64_TABLE (X86_64_VEX_0F38EE) }, - { X86_64_TABLE (X86_64_VEX_0F38EF) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, + { X86_64_TABLE (X86_64_VEX_0F38Ex) }, /* f0 */ { Bad_Opcode }, { Bad_Opcode }, @@ -9031,6 +8913,7 @@ get_valid_dis386 (const struct dis386 *dp, instr_info= *ins) ins->need_vex =3D 3; ins->codep++; vindex =3D *ins->codep++; + ins->condition_code =3D vindex & 0xf; if (vex_table_index !=3D VEX_MAP7) dp =3D &vex_table[vex_table_index][vindex]; else if (vindex =3D=3D 0xf8) @@ -9199,6 +9082,7 @@ get_valid_dis386 (const struct dis386 *dp, instr_info= *ins) =20 ins->codep++; vindex =3D *ins->codep++; + ins->condition_code =3D vindex & 0xf; if (vex_table_index !=3D EVEX_MAP7) dp =3D &evex_table[vex_table_index][vindex]; else if (vindex =3D=3D 0xf8) @@ -9591,6 +9475,7 @@ print_insn (bfd_vma pc, disassemble_info *info, int i= ntel_syntax) dp =3D &dis386[*ins.codep]; ins.need_modrm =3D onebyte_has_modrm[*ins.codep]; } + ins.condition_code =3D *ins.codep & 0xf; ins.codep++; =20 /* Save sizeflag for printing the extra ins.prefixes later before updati= ng @@ -10505,6 +10390,16 @@ putop (instr_info *ins, const char *in_template, i= nt sizeflag) abort (); break; case 'C': + if (l =3D=3D 1 && last[0] =3D=3D 'C') + { + /* Condition code (taken from the map-0 Jcc entries). */ + for (const char *q =3D dis386[0x70 | ins->condition_code].name + 1; + ISLOWER(*q); ++q) + *ins->obufp++ =3D *q; + break; + } + if (l) + abort (); if (ins->intel_syntax && !alt) break; if ((ins->prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))