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* [Patch RX] Added warnings of RX variants that does not have hardware FPU support
@ 2013-08-23 13:14 Sandeep Kumar Singh
  2013-08-23 21:30 ` DJ Delorie
  0 siblings, 1 reply; 5+ messages in thread
From: Sandeep Kumar Singh @ 2013-08-23 13:14 UTC (permalink / raw)
  To: binutils, DJ Delorie; +Cc: nickc, Kaushik Phatak

[-- Attachment #1: Type: text/plain, Size: 3817 bytes --]

Hi DJ,

Thanks for providing your inputs. I have done changes as per your suggestions.
Please review attached patch "binutils_rx_macros_3.patch". Assembler is now 
issuing errors as below,

Test Case:
==========
_main:
        fadd    #0x3f800, r10
        fsub    r6, r10
        fadd    [r6], r10
        rts

Generated errors:
=================
rx-elf-as -mcpu=rx100 test.s

test_1.s: Assembler messages:
test_1.s:2: Error: fadd #0x3f800,r10
test_1.s:2: Error:      ^ target CPU type does not support floating point instructions
test_1.s:3: Error: fsub r6,r10
test_1.s:3: Error:      ^ target CPU type does not support floating point instructions
test_1.s:4: Error: fadd [r6],r10
test_1.s:4: Error:      ^ target CPU type does not support floating point instructions

No regression found with this patch. 

gas/config: 
2013-08-07  Sandeep Kumar Singh  <Sandeep.Singh2@kpitcummins.com> 

        * rx-parse.y: Rearrange the components of a bison grammar to issue 
		assembler errors at correct position.

		
Thanks & Regards,
Sandeep Kumar Singh,
KPIT Cummins InfoSystems Ltd.
Pune, India

 
> Hi DJ,
> 
> Thanks for providing your inputs. I have done changes as per your
> suggestions.
> Please review attached patch "binutils_rx_macros_3.patch". Assembler is
> now issuing errors as below,
> 
> Test Case:
> ==========
> _main:
>         fadd    #0x3f800, r10
>         fsub    r6, r10
>         fadd    [r6], r10
>         rts
> 
> Generated errors:
> =================
> rx-elf-as -mcpu=rx100 test.s
> 
> test_1.s: Assembler messages:
> test_1.s:2: Error: fadd #0x3f800,r10
> test_1.s:2: Error:      ^ target CPU type does not support floating point
> instructions
> test_1.s:3: Error: fsub r6,r10
> test_1.s:3: Error:      ^ target CPU type does not support floating point
> instructions
> test_1.s:4: Error: fadd [r6],r10
> test_1.s:4: Error:      ^ target CPU type does not support floating point
> instructions
> 
> No regression found with this patch.
> 
> gas/config:
> 2013-08-07  Sandeep Kumar Singh  <Sandeep.Singh2@kpitcummins.com>
> 
>         * rx-parse.y: Rearrange the components of a bison grammar to issue
> 		assembler errors at correct position.
> 
> 
> Thanks & Regards,
> Sandeep Kumar Singh,
> KPIT Cummins InfoSystems Ltd.
> Pune, India
> 
> ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> ++++++++++++++++++++++++
> 
> Thanks,
> Sandeep
> 
> 
> 
> > -----Original Message-----
> > From: DJ Delorie [mailto:dj@redhat.com]
> > Sent: Friday, July 19, 2013 10:23 PM
> > To: Sandeep Kumar Singh
> > Cc: binutils@sourceware.org; Kaushik Phatak; nickc@redhat.com
> > Subject: Re: [PING] [Patch RX] Added warnings of RX variants that does
> > not have hardware FPU support
> >
> >
> > > I tried to implement your suggestions, but it is issued below build
> > > error,
> > >
> > > ../src/binutils-2.23.1/gas/config/rx-parse.y:896.45-46: $4 of
> > > `float2_op' has no declared type
> > > ../src/binutils-2.23.1/gas/config/rx-parse.y:896.61-62: $2 of
> > > `float2_op' has no declared type
> > >
> > > Please suggest as I am not familiar with this syntax.
> >
> > If you rearrange the components of a bison grammar, it renumbers all
> > the $N etc values.  So, since a new "term" has been introduced, you
> > need to increase all the numbers by one.
> >
> > > float2_op
> > >         : { rx_check_float_support (); }
> > > 	  '#' EXPR ',' REG
> > >           { id24 (2, 0x72, sub_op << 4); F ($4, 20, 4); O4 ($2); }
> >
> > In this example, $1 is the first {...}, #2 is '#', $3 is the EXPR, etc.
> > So the resulting code would be:
> >
> > >           { id24 (2, 0x72, sub_op << 4); F ($5, 20, 4); O4 ($3); }
> >
> > (BTW, that {...} would be $6 ;)
> 
> 

[-- Attachment #2: binutils_rx_macros_3.patch --]
[-- Type: application/octet-stream, Size: 1199 bytes --]

--- gas/config/rx-parse.y.orig	2013-08-06 16:06:29.000000000 +0530
+++ gas/config/rx-parse.y	2013-08-06 16:06:52.000000000 +0530
@@ -884,18 +884,20 @@
 	;
 
 float2_op
-        : '#' EXPR ',' REG
-          { rx_check_float_support (); id24 (2, 0x72, sub_op << 4); F ($4, 20, 4); O4 ($2); }
-        | float2_op_ni
-        ;
-
-float2_op_ni
-	: REG ',' REG
-	  { rx_check_float_support (); id24 (1, 0x83 + (sub_op << 2), 0); F ($1, 16, 4); F ($3, 20, 4); }
-	| disp '[' REG ']' opt_l ',' REG
-	  { rx_check_float_support (); id24 (1, 0x80 + (sub_op << 2), 0); F ($3, 16, 4); F ($7, 20, 4); DSP ($1, 14, LSIZE); }
+	: { rx_check_float_support (); }
+          '#' EXPR ',' REG
+	  { id24 (2, 0x72, sub_op << 4); F ($5, 20, 4); O4 ($3); }
+	| float2_op_ni
 	;
 
+float2_op_ni
+        : { rx_check_float_support (); } 
+          REG ',' REG
+          { id24 (1, 0x83 + (sub_op << 2), 0); F ($2, 16, 4); F ($4, 20, 4); }
+        | { rx_check_float_support (); }
+          disp '[' REG ']' opt_l ',' REG
+          { id24 (1, 0x80 + (sub_op << 2), 0); F ($4, 16, 4); F ($8, 20, 4); DSP ($2, 14, LSIZE); }
+        ;
 
 /* ====================================================================== */
 

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [Patch RX] Added warnings of RX variants that does not have hardware FPU support
  2013-08-23 13:14 [Patch RX] Added warnings of RX variants that does not have hardware FPU support Sandeep Kumar Singh
@ 2013-08-23 21:30 ` DJ Delorie
  2013-08-26  7:02   ` Sandeep Kumar Singh
  0 siblings, 1 reply; 5+ messages in thread
From: DJ Delorie @ 2013-08-23 21:30 UTC (permalink / raw)
  To: Sandeep Kumar Singh; +Cc: binutils, nickc, Kaushik.Phatak


I've applied your patch.  However, I had to do it manually, as the
whitespace didn't match the source.  Please make sure you do "cvs
update" just before "cvs diff > some/file" to generate your patch.
Try to avoid using cut/paste to copy patches, as some terminal
emulators will do a tab-space conversion when you do that.

Thanks!

^ permalink raw reply	[flat|nested] 5+ messages in thread

* RE: [Patch RX] Added warnings of RX variants that does not have hardware FPU support
  2013-08-23 21:30 ` DJ Delorie
@ 2013-08-26  7:02   ` Sandeep Kumar Singh
  0 siblings, 0 replies; 5+ messages in thread
From: Sandeep Kumar Singh @ 2013-08-26  7:02 UTC (permalink / raw)
  To: DJ Delorie; +Cc: binutils, nickc, Kaushik Phatak

Hi DJ,

Thanks for taking out time to review and commit my patch.
I will take care of the points related to cvs diff and patch formatting in future.

Regards,
Sandeep Kumar Singh,
KPIT Cummins InfoSystems Ltd.
Pune, India


> -----Original Message-----
> From: DJ Delorie [mailto:dj@redhat.com]
> Sent: Saturday, August 24, 2013 3:01 AM
> To: Sandeep Kumar Singh
> Cc: binutils@sourceware.org; nickc@redhat.com; Kaushik Phatak
> Subject: Re: [Patch RX] Added warnings of RX variants that does not have
> hardware FPU support
> 
> 
> I've applied your patch.  However, I had to do it manually, as the
> whitespace didn't match the source.  Please make sure you do "cvs
> update" just before "cvs diff > some/file" to generate your patch.
> Try to avoid using cut/paste to copy patches, as some terminal
> emulators will do a tab-space conversion when you do that.
> 
> Thanks!


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [Patch RX] Added warnings of RX variants that does not have hardware FPU support
  2013-07-09 13:04 Sandeep Kumar Singh
@ 2013-07-18 12:17 ` nick clifton
  0 siblings, 0 replies; 5+ messages in thread
From: nick clifton @ 2013-07-18 12:17 UTC (permalink / raw)
  To: Sandeep Kumar Singh, binutils; +Cc: Kaushik Phatak

Hi Sandeep,

> Please find the attached patch "binutils_rx_macros_2.patch" which compliments
> the initially provided patch "binutils_rx_macros_1.patch", provided by Renesas.
> The initial patch (_1.patch) was added to generate assembler error messages
> when target not supporting hardware FPU were seeing FPU code, namely RX200.

I have applied both of these patches, with one exception - the change to 
gcc/config/rx/rx.h - this needs to be submitted separately to the gcc 
patches mailing list.

Cheers
   Nick


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [Patch RX] Added warnings of RX variants that does not have hardware FPU support
@ 2013-07-09 13:04 Sandeep Kumar Singh
  2013-07-18 12:17 ` nick clifton
  0 siblings, 1 reply; 5+ messages in thread
From: Sandeep Kumar Singh @ 2013-07-09 13:04 UTC (permalink / raw)
  To: binutils; +Cc: Kaushik Phatak, nickc

[-- Attachment #1: Type: text/plain, Size: 1878 bytes --]

Hi,

Please find the attached patch "binutils_rx_macros_2.patch" which compliments
the initially provided patch "binutils_rx_macros_1.patch", provided by Renesas.
The initial patch (_1.patch) was added to generate assembler error messages 
when target not supporting hardware FPU were seeing FPU code, namely RX200.

KPIT has recently submitted a patch to add RX100 target macros in GCC which has
been committed,
http://comments.gmane.org/gmane.comp.gcc.patches/286749

We are extending this patch for the assembler to generate these warnings for 
the RX100 targets as well, as this also does not have hardware FPU support.

Test case: test.s
*********** test.s **********
_main:
        mov.L [r6], r10
        fadd #0x3f800000, r10
        mov.L r10, [r6]
        rts 
*********** End ***********

$rx-elf-as test.s -mcpu=rx100
test.s: Assembler messages:
test.s:14: Error: fmul 4[r6],r10
test.s:14: Error:            ^ target CPU type does not support floating point
instructions

$rx-elf-as test.s -mcpu=rx200
test.s: Assembler messages:
test.s:14: Error: fmul 4[r6],r10
test.s:14: Error:            ^ target CPU type does not support floating point
instructions


No regression found with this patch.

Please review the patch and let me know if there should be any modifications
in it?


Regards,
Sandeep Kumar Singh,
KPIT Cummins InfoSystems Ltd.
Pune, India

gas/config:
2013-07-09  Sandeep Kumar Singh  <Sandeep.Singh2@kpitcummins.com>

        * rx-defs.h: Add macros for RX100, RX200, RX600, and RX610.
        * rx-parse.y: (rx_check_float_support): Add function to check
        floating point operation support for target RX100 and RX200.
        * tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
        * c-rx.texi: Add -mcpu option to recognize macros for RX100,
        RX200, RX600, and RX610


[-- Attachment #2: binutils_rx_macros_1.patch --]
[-- Type: application/octet-stream, Size: 5110 bytes --]

Index: gas/config/rx-defs.h
===================================================================
RCS file: /cvs/cvsfiles/devo/gas/config/rx-defs.h,v
retrieving revision 1.12
diff -u -3 -p -r1.12 rx-defs.h
--- gas/config/rx-defs.h	20 Nov 2011 20:27:29 -0000	1.12
+++ gas/config/rx-defs.h	23 Jan 2013 11:37:43 -0000
@@ -34,8 +34,16 @@
 #define RX_RELAX_IMM	2
 #define RX_RELAX_DISP	3
 
+enum rx_cpu_types
+{
+  RX600,
+  RX610,
+  RX200
+};
+
 extern int rx_pid_register;
 extern int rx_gp_register;
+extern enum rx_cpu_types rx_cpu;
 
 extern int    rx_error (const char *);
 extern void   rx_lex_init (char *, char *);
Index: gas/config/rx-parse.y
===================================================================
RCS file: /cvs/cvsfiles/devo/gas/config/rx-parse.y,v
retrieving revision 1.34
diff -u -3 -p -r1.34 rx-parse.y
--- gas/config/rx-parse.y	20 May 2012 16:36:13 -0000	1.34
+++ gas/config/rx-parse.y	23 Jan 2013 11:37:43 -0000
@@ -104,6 +104,7 @@ static int sizemap[] = { BSIZE, WSIZE, L
 
 #define id24(a,b2,b3)	   B3 (0xfb+a, b2, b3)
 
+static void	   rx_check_float_support (void);
 static int         rx_intop (expressionS, int, int);
 static int         rx_uintop (expressionS, int);
 static int         rx_disp3op (expressionS);
@@ -884,14 +885,14 @@ op_shift
 
 float2_op
 	: '#' EXPR ',' REG
-	  { id24 (2, 0x72, sub_op << 4); F ($4, 20, 4); O4 ($2); }
+	{ rx_check_float_support (); id24 (2, 0x72, sub_op << 4); F ($4, 20, 4); O4 ($2); }
 	| float2_op_ni
 	;
 float2_op_ni
 	: REG ',' REG
-	  { id24 (1, 0x83 + (sub_op << 2), 0); F ($1, 16, 4); F ($3, 20, 4); }
+	  { rx_check_float_support (); id24 (1, 0x83 + (sub_op << 2), 0); F ($1, 16, 4); F ($3, 20, 4); }
 	| disp '[' REG ']' opt_l ',' REG
-	  { id24 (1, 0x80 + (sub_op << 2), 0); F ($3, 16, 4); F ($7, 20, 4); DSP ($1, 14, LSIZE); }
+	  { rx_check_float_support (); id24 (1, 0x80 + (sub_op << 2), 0); F ($3, 16, 4); F ($7, 20, 4); DSP ($1, 14, LSIZE); }
 	;
 
 /* ====================================================================== */
@@ -1629,3 +1630,10 @@ rx_range (expressionS exp, int minv, int
   if (val < minv || val > maxv)
     as_warn (_("Value %d out of range %d..%d"), val, minv, maxv);
 }
+
+static void
+rx_check_float_support (void)
+{
+  if (rx_cpu == RX200)
+    rx_error (_("target CPU type does not support floating point instructions"));
+}
Index: gas/config/tc-rx.c
===================================================================
RCS file: /cvs/cvsfiles/devo/gas/config/tc-rx.c,v
retrieving revision 1.54
diff -u -3 -p -r1.54 tc-rx.c
--- gas/config/tc-rx.c	18 Nov 2012 19:46:09 -0000	1.54
+++ gas/config/tc-rx.c	23 Jan 2013 11:37:44 -0000
@@ -56,6 +56,8 @@ static int rx_num_int_regs = 0;
 int rx_pid_register;
 int rx_gp_register;
 
+enum rx_cpu_types rx_cpu = RX600;
+
 static void rx_fetchalign (int ignore ATTRIBUTE_UNUSED);
 
 enum options
@@ -72,6 +74,7 @@ enum options
   OPTION_INT_REGS,
   OPTION_USES_GCC_ABI,
   OPTION_USES_RX_ABI,
+  OPTION_CPU,
 };
 
 #define RX_SHORTOPTS ""
@@ -98,6 +101,7 @@ struct option md_longopts[] =
   {"mint-register", required_argument, NULL, OPTION_INT_REGS},
   {"mgcc-abi", no_argument, NULL, OPTION_USES_GCC_ABI},
   {"mrx-abi", no_argument, NULL, OPTION_USES_RX_ABI},
+  {"mcpu",required_argument,NULL,OPTION_CPU},
   {NULL, no_argument, NULL, 0}
 };
 size_t md_longopts_size = sizeof (md_longopts);
@@ -155,6 +159,20 @@ md_parse_option (int c ATTRIBUTE_UNUSED,
     case OPTION_USES_RX_ABI:
       elf_flags |= E_FLAG_RX_ABI;
       return 1;
+
+    case OPTION_CPU:
+      if (strcasecmp (arg, "rx200") == 0)
+	rx_cpu = RX200;
+      else if (strcasecmp (arg, "rx600") == 0)
+	rx_cpu = RX600;
+      else if (strcasecmp (arg, "rx610") == 0)
+	rx_cpu = RX610;
+      else
+	{
+	  as_warn (_("unrecognised RX CPU type %s"), arg);
+	  break;
+	}
+      return 1;
     }
   return 0;
 }
Index: gas/doc/c-rx.texi
===================================================================
RCS file: /cvs/cvsfiles/devo/gas/doc/c-rx.texi,v
retrieving revision 1.10
diff -u -3 -p -r1.10 c-rx.texi
--- gas/doc/c-rx.texi	13 Nov 2012 12:33:54 -0000	1.10
+++ gas/doc/c-rx.texi	23 Jan 2013 11:37:44 -0000
@@ -106,6 +106,13 @@ by the assembled code.  With this versio
 arguments that are passed on the stack are aligned to their natural
 alignments.  This option is the default.
 
+@cindex @samp{-mcpu=}
+@item -mcpu=@var{name}
+This option tells the assembler the target CPU type.  Currently the
+@code{rx200}, @code{rx600} and @code{rx610} are recognised as valid
+cpu names.  Attempting to assemble an instruction not supported by the
+indicated cpu type will result in an error message being generated.
+
 @end table
 
 @node RX-Modifiers
Index: gcc/config/rx/rx.h
===================================================================
RCS file: /cvs/cvsfiles/devo/gcc/config/rx/rx.h,v
retrieving revision 1.99
diff -u -3 -p -r1.99 rx.h
--- gcc/config/rx/rx.h	18 Nov 2012 22:25:46 -0000	1.99
+++ gcc/config/rx/rx.h	23 Jan 2013 11:37:47 -0000
@@ -85,7 +85,8 @@
 %{mpid} \
 %{mint-register=*} \
 %{mgcc-abi:-mgcc-abi} %{!mgcc-abi:-mrx-abi} \
+%{mcpu=*} \
 "
 
 #undef  LIB_SPEC
 


[-- Attachment #3: binutils_rx_macros_2.patch --]
[-- Type: application/octet-stream, Size: 1009 bytes --]

--- gas/config/rx-defs.h.orig	2013-07-08 15:25:40.000000000 +0530
+++ gas/config/rx-defs.h	2013-07-08 15:28:43.000000000 +0530
@@ -38,7 +38,8 @@
 {
   RX600,
   RX610,
-  RX200
+  RX200,
+  RX100
 };
 
 extern int rx_pid_register;
--- gas/config/rx-parse.y.orig	2013-07-08 15:26:04.000000000 +0530
+++ gas/config/rx-parse.y	2013-07-08 15:29:49.000000000 +0530
@@ -1634,6 +1634,6 @@
 static void
 rx_check_float_support (void)
 {
-  if (rx_cpu == RX200)
+  if (rx_cpu == RX100 || rx_cpu == RX200)
     rx_error (_("target CPU type does not support floating point instructions"));
 }
--- gas/config/tc-rx.c.orig	2013-07-08 15:26:19.000000000 +0530
+++ gas/config/tc-rx.c	2013-07-08 15:30:57.000000000 +0530
@@ -161,7 +161,9 @@
       return 1;
 
     case OPTION_CPU:
-      if (strcasecmp (arg, "rx200") == 0)
+      if (strcasecmp (arg, "rx100") == 0)
+        rx_cpu = RX100;
+      else if (strcasecmp (arg, "rx200") == 0)
 	rx_cpu = RX200;
       else if (strcasecmp (arg, "rx600") == 0)
 	rx_cpu = RX600;

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2013-08-26  7:02 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-08-23 13:14 [Patch RX] Added warnings of RX variants that does not have hardware FPU support Sandeep Kumar Singh
2013-08-23 21:30 ` DJ Delorie
2013-08-26  7:02   ` Sandeep Kumar Singh
  -- strict thread matches above, loose matches on Subject: below --
2013-07-09 13:04 Sandeep Kumar Singh
2013-07-18 12:17 ` nick clifton

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