From: "Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com>
To: binutils@sourceware.org
Subject: [PATCH 32/57][Arm][GAS] Add support for MVE instructions: vrintn, vrintx, vrinta, vrintz, vrintm and vrintp
Date: Wed, 01 May 2019 17:33:00 -0000 [thread overview]
Message-ID: <09042178-750e-4f51-bb34-79ecbc914b2c@arm.com> (raw)
In-Reply-To: <19569550-4d2e-0bb3-592a-d91050d490f6@arm.com>
[-- Attachment #1: Type: text/plain, Size: 435 bytes --]
Hi,
This patch adds support for MVE instructions VRINTN, VRINTX, VRINTA,
VRINTZ, VRINTM, and VRINTP.
gas/ChangeLog:
2019-05-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (do_vrint_1): Accept MVE variants.
(insns): Change entries to accept MVE variants.
* testsuite/gas/arm/mve-vrint-bad.d: New test.
* testsuite/gas/arm/mve-vrint-bad.l: New test.
* testsuite/gas/arm/mve-vrint-bad.s: New test.
[-- Attachment #2: 32.patch --]
[-- Type: text/x-patch, Size: 8473 bytes --]
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index af7723f8ba5577156544166a392a3a94b26bcdb5..7ee168120e14abb025483e2e8c4bfd2384d85d34 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -20419,12 +20419,11 @@ do_vrint_1 (enum neon_cvt_mode mode)
if (et.type == NT_invtype)
return;
- set_pred_insn_type (OUTSIDE_PRED_INSN);
- NEON_ENCODE (FLOAT, inst);
-
- if (vfp_or_neon_is_neon (NEON_CHECK_CC | NEON_CHECK_ARCH8) == FAIL)
+ if (check_simd_pred_availability (1, NEON_CHECK_CC | NEON_CHECK_ARCH8))
return;
+ NEON_ENCODE (FLOAT, inst);
+
inst.instruction |= LOW4 (inst.operands[0].reg) << 12;
inst.instruction |= HI1 (inst.operands[0].reg) << 22;
inst.instruction |= LOW4 (inst.operands[1].reg);
@@ -23559,12 +23558,12 @@ static const struct asm_opcode insns[] =
nUF(vselge, _vselge, 3, (RVSD, RVSD, RVSD), vsel),
nUF(vselgt, _vselgt, 3, (RVSD, RVSD, RVSD), vsel),
nCE(vrintr, _vrintr, 2, (RNSDQ, oRNSDQ), vrintr),
- nCE(vrintz, _vrintr, 2, (RNSDQ, oRNSDQ), vrintz),
- nCE(vrintx, _vrintr, 2, (RNSDQ, oRNSDQ), vrintx),
- nUF(vrinta, _vrinta, 2, (RNSDQ, oRNSDQ), vrinta),
- nUF(vrintn, _vrinta, 2, (RNSDQ, oRNSDQ), vrintn),
- nUF(vrintp, _vrinta, 2, (RNSDQ, oRNSDQ), vrintp),
- nUF(vrintm, _vrinta, 2, (RNSDQ, oRNSDQ), vrintm),
+ mnCE(vrintz, _vrintr, 2, (RNSDQMQ, oRNSDQMQ), vrintz),
+ mnCE(vrintx, _vrintr, 2, (RNSDQMQ, oRNSDQMQ), vrintx),
+ mnUF(vrinta, _vrinta, 2, (RNSDQMQ, oRNSDQMQ), vrinta),
+ mnUF(vrintn, _vrinta, 2, (RNSDQMQ, oRNSDQMQ), vrintn),
+ mnUF(vrintp, _vrinta, 2, (RNSDQMQ, oRNSDQMQ), vrintp),
+ mnUF(vrintm, _vrinta, 2, (RNSDQMQ, oRNSDQMQ), vrintm),
/* Crypto v1 extensions. */
#undef ARM_VARIANT
diff --git a/gas/testsuite/gas/arm/mve-vrint-bad.d b/gas/testsuite/gas/arm/mve-vrint-bad.d
new file mode 100644
index 0000000000000000000000000000000000000000..081a00880eb27107f9435ee0a41d2cae7e3f5953
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vrint-bad.d
@@ -0,0 +1,5 @@
+#name: bad MVE VRINT instructions
+#as: -march=armv8.1-m.main+mve.fp
+#error_output: mve-vrint-bad.l
+
+.*: +file format .*arm.*
diff --git a/gas/testsuite/gas/arm/mve-vrint-bad.l b/gas/testsuite/gas/arm/mve-vrint-bad.l
new file mode 100644
index 0000000000000000000000000000000000000000..1d68a82badabae2a56559f476b356fdec9713c48
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vrint-bad.l
@@ -0,0 +1,80 @@
+[^:]*: Assembler messages:
+[^:]*:13: Error: bad type in SIMD instruction -- `vrintn.i16 q0,q1'
+[^:]*:13: Error: bad type in SIMD instruction -- `vrintn.f64 q0,q1'
+[^:]*:13: Error: bad type in SIMD instruction -- `vrintx.i16 q0,q1'
+[^:]*:13: Error: bad type in SIMD instruction -- `vrintx.f64 q0,q1'
+[^:]*:13: Error: bad type in SIMD instruction -- `vrinta.i16 q0,q1'
+[^:]*:13: Error: bad type in SIMD instruction -- `vrinta.f64 q0,q1'
+[^:]*:13: Error: bad type in SIMD instruction -- `vrintz.i16 q0,q1'
+[^:]*:13: Error: bad type in SIMD instruction -- `vrintz.f64 q0,q1'
+[^:]*:13: Error: bad type in SIMD instruction -- `vrintm.i16 q0,q1'
+[^:]*:13: Error: bad type in SIMD instruction -- `vrintm.f64 q0,q1'
+[^:]*:13: Error: bad type in SIMD instruction -- `vrintp.i16 q0,q1'
+[^:]*:13: Error: bad type in SIMD instruction -- `vrintp.f64 q0,q1'
+[^:]*:14: Error: invalid rounding mode -- `vrintr.f16 q0,q1'
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Error: syntax error -- `vrintneq.f16 q0,q1'
+[^:]*:25: Error: syntax error -- `vrintneq.f16 q0,q1'
+[^:]*:25: Error: syntax error -- `vrintneq.f16 q0,q1'
+[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vrintnt.f16 q0,q1'
+[^:]*:25: Error: instruction missing MVE vector predication code -- `vrintn.f16 q0,q1'
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Error: syntax error -- `vrintxeq.f16 q0,q1'
+[^:]*:25: Error: syntax error -- `vrintxeq.f16 q0,q1'
+[^:]*:25: Error: syntax error -- `vrintxeq.f16 q0,q1'
+[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vrintxt.f16 q0,q1'
+[^:]*:25: Error: instruction missing MVE vector predication code -- `vrintx.f16 q0,q1'
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Error: syntax error -- `vrintaeq.f16 q0,q1'
+[^:]*:25: Error: syntax error -- `vrintaeq.f16 q0,q1'
+[^:]*:25: Error: syntax error -- `vrintaeq.f16 q0,q1'
+[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vrintat.f16 q0,q1'
+[^:]*:25: Error: instruction missing MVE vector predication code -- `vrinta.f16 q0,q1'
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Error: syntax error -- `vrintzeq.f16 q0,q1'
+[^:]*:25: Error: syntax error -- `vrintzeq.f16 q0,q1'
+[^:]*:25: Error: syntax error -- `vrintzeq.f16 q0,q1'
+[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vrintzt.f16 q0,q1'
+[^:]*:25: Error: instruction missing MVE vector predication code -- `vrintz.f16 q0,q1'
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Error: syntax error -- `vrintmeq.f16 q0,q1'
+[^:]*:25: Error: syntax error -- `vrintmeq.f16 q0,q1'
+[^:]*:25: Error: syntax error -- `vrintmeq.f16 q0,q1'
+[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vrintmt.f16 q0,q1'
+[^:]*:25: Error: instruction missing MVE vector predication code -- `vrintm.f16 q0,q1'
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:25: Error: syntax error -- `vrintpeq.f16 q0,q1'
+[^:]*:25: Error: syntax error -- `vrintpeq.f16 q0,q1'
+[^:]*:25: Error: syntax error -- `vrintpeq.f16 q0,q1'
+[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vrintpt.f16 q0,q1'
+[^:]*:25: Error: instruction missing MVE vector predication code -- `vrintp.f16 q0,q1'
diff --git a/gas/testsuite/gas/arm/mve-vrint-bad.s b/gas/testsuite/gas/arm/mve-vrint-bad.s
new file mode 100644
index 0000000000000000000000000000000000000000..7e9a531a2b1f3374bd3dfe41370d4ea43f5b2038
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vrint-bad.s
@@ -0,0 +1,25 @@
+.macro cond, mode
+.irp cond, eq, ne, gt, ge, lt, le
+it \cond
+vrint\mode\().f16 q0, q1
+.endr
+.endm
+
+.syntax unified
+.thumb
+.irp mode, n, x, a, z, m, p
+vrint\mode\().i16 q0, q1
+vrint\mode\().f64 q0, q1
+.endr
+vrintr.f16 q0, q1
+.irp mode, n, x, a, z, m, p
+cond \mode
+it eq
+vrint\mode\()eq.f16 q0, q1
+vrint\mode\()eq.f16 q0, q1
+vpst
+vrint\mode\()eq.f16 q0, q1
+vrint\mode\()t.f16 q0, q1
+vpst
+vrint\mode\().f16 q0, q1
+.endr
next prev parent reply other threads:[~2019-05-01 17:33 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-01 16:51 [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Andre Vieira (lists)
2019-05-01 16:53 ` [PATCH 1/57][Arm][GAS]: Add support for +mve and +mve.fp Andre Vieira (lists)
2019-05-01 16:55 ` [PATCH 2/57][Arm][GAS] Add support for MVE instructions: vpst, vadd, vsub and vabd Andre Vieira (lists)
2019-05-02 10:56 ` Nick Clifton
2019-05-13 13:42 ` Andre Vieira (lists)
[not found] ` <98e50dc4-7b0e-d727-0c20-34711be86533@redhat.com>
[not found] ` <4e56a5f3-bcde-f4cd-21d4-35cc3f11b5e8@arm.com>
2019-05-14 16:53 ` Nick Clifton
2019-05-14 16:54 ` Nick Clifton
2019-05-01 16:56 ` [PATCH 3/57][Arm][GAS] Add support for MVE instructions: vabs and vneg Andre Vieira (lists)
2019-05-01 16:57 ` [PATCH 4/57][Arm][GAS] Add support for MVE instructions: vabav, vmladav and vmlsdav Andre Vieira (lists)
2019-05-01 16:59 ` [PATCH 5/57][Arm][GAS] Add support for MVE instructions: vmull{b,t} Andre Vieira (lists)
2019-05-01 17:00 ` [PATCH 6/57][Arm][GAS] Add support for MVE instructions: vst/vld{2,4} Andre Vieira (lists)
2019-05-01 17:01 ` [PATCH 7/57][Arm][GAS] Add support for MVE instructions: vstr/vldr Andre Vieira (lists)
2019-05-01 17:02 ` [PATCH 8/57][Arm][GAS] Add support for MVE instructions: vcvt Andre Vieira (lists)
2019-05-01 17:03 ` [PATCH 9/57][Arm][GAS] Add support for MVE instructions: vmov Andre Vieira (lists)
2019-05-01 17:03 ` [PATCH 10/57][Arm][GAS] Add support for MVE instructions: vcmp and vpt Andre Vieira (lists)
2019-05-01 17:05 ` [PATCH 11/57][Arm][GAS] Add support for MVE instructions: vadc, vsbc and vbrsr Andre Vieira (lists)
2019-05-01 17:06 ` [PATCH 12/57][Arm][GAS] Add support for MVE instructions: vaddlv and vaddv Andre Vieira (lists)
2019-05-01 17:07 ` [PATCH 13/57][Arm][GAS] Add support for MVE instructions: vand, vbic, vorr, vorn and veor Andre Vieira (lists)
2019-05-01 17:08 ` [PATCH 14/57][Arm][GAS] Add support for MVE instructions: vcadd, vcmla and vcmul Andre Vieira (lists)
2019-05-01 17:09 ` [PATCH 16/57][Arm][GAS] Add support for MVE instructions: vdup, vddup, vdwdup, vidup and viwdup Andre Vieira (lists)
2019-05-01 17:09 ` [PATCH 15/57][Arm][GAS] Add support for MVE instructions: vcls, vclz and vfmas Andre Vieira (lists)
2019-05-01 17:11 ` [PATCH 17/57][Arm][GAS] Add support for MVE instructions: vfma and vfms Andre Vieira (lists)
2019-05-01 17:12 ` [PATCH 18/57][Arm][GAS] Add support for MVE instructions: vhcadd, vhadd, vhsub and vrhadd Andre Vieira (lists)
2019-05-01 17:12 ` [PATCH 19/57][Arm][GAS] Add support for MVE instructions: vmax[nm][a] and vmin[nm][a] Andre Vieira (lists)
2019-05-01 17:13 ` [PATCH 20/57][Arm][GAS] Add support for MVE instructions: vmaxnmv, vmaxnmav, vminnmv and vminnmav Andre Vieira (lists)
2019-05-01 17:13 ` [PATCH 21/57][Arm][GAS] Add support for MVE instructions: vmaxv, vmaxav, vminv and vminav Andre Vieira (lists)
2019-05-01 17:15 ` [PATCH 23/57][Arm][GAS] Add support for MVE instructions: vmla, vmul, vqadd and vqsub Andre Vieira (lists)
2019-05-01 17:15 ` [PATCH 22/57][Arm][GAS] Add support for MVE instructions: vmlaldav, vmlalv, vmlsldav, vrmlaldavh, vrmlalvh and vrmlsldavh Andre Vieira (lists)
2019-05-01 17:16 ` [PATCH 24/57][Arm][GAS] Add support for MVE instructions: vmlas, vmulh and vrmulh Andre Vieira (lists)
2019-05-01 17:17 ` [PATCH 26/57][Arm][GAS] Add support for MVE instructions: vpnot and vpsel Andre Vieira (lists)
2019-05-01 17:17 ` [PATCH 25/57][Arm][GAS] Add support for MVE instruction: vmvn, vqabs and vqneg Andre Vieira (lists)
2019-05-01 17:18 ` [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Andre Vieira (lists)
2019-05-01 17:19 ` [PATCH 28/57][Arm][GAS] Add support for MVE instructions: vqdmlah, vqrdmlah, vqdmlash, vqrdmlash, vqdmulh and vqrdmulh Andre Vieira (lists)
2019-05-01 17:30 ` [PATCH 27/57][Arm][GAS] Add support for MVE instructions: vqdmladh, vqrdmladh, vqdmlsdh and vqrdmlsdh Andre Vieira (lists)
2019-05-01 17:31 ` [PATCH 29/57][Arm][GAS] Add support for MVE instructions: vqdmullt and vqdmullb Andre Vieira (lists)
2019-05-01 17:32 ` [PATCH 30/57][Arm][GAS] Add support for MVE instructions: vqmovnt, vqmovnb, vqmovunt, vqmovunb, vqrshl and vrshl Andre Vieira (lists)
2019-05-01 17:32 ` [PATCH 31/57][Arm][GAS] Add support for MVE instructions: vshrn[tb], vrshrn[tb], vqshrn[tb], vqshrun[tb], vqrshrn[tb] and vqrshrun[tb] Andre Vieira (lists)
2019-05-01 17:33 ` Andre Vieira (lists) [this message]
2019-05-01 17:34 ` [PATCH 34/57][Arm][GAS] Add support for MVE instructions: vshl and vqshl Andre Vieira (lists)
2019-05-01 17:34 ` [PATCH 33/57][Arm][GAS] Add support for MVE instructions: vshr, vrshr, vsli, vsri, vrev16, vrev32 and vrev64 Andre Vieira (lists)
2019-05-01 17:36 ` [PATCH 35/57][Arm][GAS] Add support for MVE instructions: vshlc and vshll Andre Vieira (lists)
2019-05-01 17:36 ` [PATCH 36/57][Arm][GAS] Add support for MVE instructions: wlstp, dlstp, letp and lctp Andre Vieira (lists)
2019-05-01 17:38 ` [PATCH 37/57][Arm][OBJDUMP] Add framework for MVE instructions Andre Vieira (lists)
2019-05-01 17:38 ` [PATCH 38/57][Arm][OBJDUMP] Disable the use of MVE reserved coproc numbers in coprocessor instructions Andre Vieira (lists)
2019-05-01 17:39 ` [PATCH 39/57][Arm][OBJDUMP] Add support for MVE instructions: vpt, vpst and vcmp Andre Vieira (lists)
2019-05-01 17:40 ` [PATCH 40/57][Arm][OBJDUMP] Add support for MVE instructions: vdup, veor, vfma, vfms, vhadd, vhsub and vrhadd Andre Vieira (lists)
2019-05-01 17:40 ` [PATCH 41/57][Arm][OBJDUMP] Add support for MVE instructions: vld[24] and vst[24] Andre Vieira (lists)
2019-05-01 17:41 ` [PATCH 42/57][Arm][OBJDUMP] Add support for MVE instructions: vldr[bhw] and vstr[bhw] Andre Vieira (lists)
2019-05-01 17:42 ` [PATCH 43/57][Arm][OBJDUMP] Add support for MVE instructions: scatter stores and gather loads Andre Vieira (lists)
2019-05-01 17:43 ` [PATCH 44/57][Arm][OBJDUMP] Add support for MVE instructions: vcvt and vrint Andre Vieira (lists)
2019-05-02 9:54 ` Nick Clifton
2019-05-13 13:38 ` Andre Vieira (lists)
2019-05-01 17:44 ` [PATCH 46/57][Arm][OBJDUMP] Add support for MVE instructions: vmovl, vmull, vqdmull, vqmovn, vqmovun and vmovn Andre Vieira (lists)
2019-05-01 17:44 ` [PATCH 45/57][Arm][OBJDUMP] Add support for MVE instructions: vmov, vmvn, vorr, vorn, vmovx and vbic Andre Vieira (lists)
2019-05-01 17:45 ` [PATCH 47/57][Arm][OBJDUMP] Add support for MVE instructions: vaddv, vmlaldav, vmladav, vmlas, vrmlsldavh, vmlsldav, vmlsdav, vrmlaldavh, vqdmlah, vqrdmlash, vqrdmlash, vqdmlsdh, vqrdmlsdh, vqdmulh and vqrdmulh Andre Vieira (lists)
2019-05-01 17:46 ` [PATCH 49/57][Arm][OBJDUMP] Add support for MVE complex number instructions Andre Vieira (lists)
2019-05-01 17:46 ` [PATCH 48/57][Arm][OBJDUMP] Add support for MVE instructions: vddup, vdwdup, vidup and viwdup Andre Vieira (lists)
2019-05-01 17:47 ` [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Andre Vieira (lists)
2019-05-01 17:48 ` [PATCH 51/57][Arm][OBJDUMP] Add support for MVE instructions: lctp, letp, wlstp and dlstp Andre Vieira (lists)
2019-05-01 17:48 ` [PATCH 52/57][Arm][OBJDUMP] Add support for MVE instructions: vadc, vabav, vabd, vabs, vadd, vsbc and vsub Andre Vieira (lists)
2019-05-01 17:49 ` [PATCH 53/57][Arm][OBJDUMP] Add support for MVE instructions: vand, vbrsr, vcls, vclz and vctp Andre Vieira (lists)
2019-05-01 17:50 ` [PATCH 54/57][Arm][OBJDUMP] Add support for MVE instructions: vmax(a), vmax(a)v, vmaxnm(a), vmaxnm(a)v, vmin(a), vmin(a)v, vminnm(a), vminnm(a)v and vmla Andre Vieira (lists)
2019-05-01 17:50 ` [PATCH 55/57][Arm][OBJDUMP] Add support for MVE instructions: vmul, vmulh, vrmulh and vneg Andre Vieira (lists)
2019-05-01 17:51 ` [PATCH 56/57][Arm][OBJDUMP] Add support for MVE instructions: vpnot, vpsel, vqabs, vqadd, vqsub, vqneg and vrev Andre Vieira (lists)
2019-05-01 18:23 ` [PATCH 57/57][Arm][GAS] MVE Tests Andre Vieira (lists)
2019-05-01 18:24 ` Andre Vieira (lists)
2019-05-01 18:25 ` Andre Vieira (lists)
2019-05-01 18:25 ` Andre Vieira (lists)
2019-05-02 10:03 ` [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Nick Clifton
2019-05-02 10:18 ` Nick Clifton
2019-05-13 13:39 ` [PATCH, binutils, Arm] Add Armv8.1-M Mainline and MVE enablement to NEWS Andre Vieira (lists)
2019-05-02 13:39 ` [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Nick Clifton
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