Fix some of the ARM GAS failures

[Zack Weinberg <zack@codesourcery.com>]

This patch should improve the ARM-GAS situation somewhat.  md_apply_fix3
needs to truncate the relocation to 32 signed bits manually; if the host
is 64-bit, fx_addnumber and fx_offset are 64-bit, and may generate
spurious overflows.  Also, we need a double cast on both sides of the
hack to pass an integer around in tc_fix_data.

zw
	* config/tc-arm.c (fix_new_arm): Cast thumb_mode to size_t
	before casting it to PTR.
	(md_apply_fix3): Truncate value, *valP, fixP->fx_addnumber,
	and fixP->fx_offset to 32 signed bits.

===================================================================
Index: config/tc-arm.c
--- config/tc-arm.c     18 May 2005 05:40:07 -0000      1.204
+++ config/tc-arm.c     24 May 2005 20:08:45 -0000
@@ -7296,8 +7296,9 @@ fix_new_arm (fragS *         frag,
     }

   /* Mark whether the fix is to a THUMB instruction, or an ARM
-     instruction.  */
-  new_fix->tc_fix_data = (PTR) thumb_mode;
+     instruction.  The double cast prevents warnings about
+     creating a pointer from an integer of different size.  */
+  new_fix->tc_fix_data = (PTR) (size_t) thumb_mode;
 }

 static void
@@ -10098,9 +10099,21 @@ md_apply_fix3 (fixS *  fixP,
        value += md_pcrel_from (fixP);
     }

-  /* Remember value for emit_reloc.  */
+  /* On a 64-bit host, silently truncate 'value' to 32 bits for
+     consistency with the behavior on 32-bit hosts.  Remember value
+     for emit_reloc.  */
+  value &= 0xffffffff;
+  value ^= 0x80000000;
+  value -= 0x80000000;
+
+  *valP = value;
   fixP->fx_addnumber = value;

+  /* Same treatment for fixP->fx_offset.  */
+  fixP->fx_offset &= 0xffffffff;
+  fixP->fx_offset ^= 0x80000000;
+  fixP->fx_offset -= 0x80000000;
+
   switch (fixP->fx_r_type)
     {
     case BFD_RELOC_NONE: