[patch] Enforce Arm SWP operand constraints

[patch] Enforce Arm SWP operand constraints

[Paul Brook]

[-- Attachment #1: Type: text/plain, Size: 460 bytes --]

The attached patch enforces the operand constraints on the Arm SWP 
instruction.  The address register may not overlap the other registers.

Tested with cross to arm-none-eabi.
Ok?

Paul

2005-09-02  Paul Brook  <paul@codesourcery.com>

gas/
	* config/tc-arm.c (do_rn_rd): Enforce SWP operand constraints.
gas/testsuite/
	* gas/arm/arm3-bad.s: New test.
	* gas/arm/arm3-bad.d: New test.
	* gas/arm/arm3.s: Avoid illegal instructions.
	* gas/arm/arm3.d: Ditto.

[-- Attachment #2: patch.swp_bad --]
[-- Type: text/x-diff, Size: 3259 bytes --]

Index: gas/config/tc-arm.c
===================================================================
RCS file: /var/cvsroot/src-cvs/src/gas/config/tc-arm.c,v
retrieving revision 1.222
diff -u -p -r1.222 tc-arm.c
--- gas/config/tc-arm.c	2 Sep 2005 13:12:39 -0000	1.222
+++ gas/config/tc-arm.c	2 Sep 2005 16:25:54 -0000
@@ -4339,9 +4339,14 @@ do_rn_rd (void)
 static void
 do_rd_rm_rn (void)
 {
+  unsigned Rn = inst.operands[2].reg;
+  /* Enforce resutrictions on SWP instruction.  */
+  if ((inst.instruction & 0x0fbfffff) == 0x01000090)
+    constraint (Rn == inst.operands[0].reg || Rn == inst.operands[1].reg,
+		_("Rn must not overlap other operands"));
   inst.instruction |= inst.operands[0].reg << 12;
   inst.instruction |= inst.operands[1].reg;
-  inst.instruction |= inst.operands[2].reg << 16;
+  inst.instruction |= Rn << 16;
 }
 
 static void
Index: gas/testsuite/gas/arm/arm3-bad.d
===================================================================
RCS file: gas/testsuite/gas/arm/arm3-bad.d
diff -N gas/testsuite/gas/arm/arm3-bad.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/arm3-bad.d	2 Sep 2005 16:34:40 -0000
@@ -0,0 +1,3 @@
+# name: ARM 3 errors
+# as: -mcpu=arm3
+# error-output: arm3-bad.l
Index: gas/testsuite/gas/arm/arm3-bad.l
===================================================================
RCS file: gas/testsuite/gas/arm/arm3-bad.l
diff -N gas/testsuite/gas/arm/arm3-bad.l
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/arm3-bad.l	2 Sep 2005 16:38:03 -0000
@@ -0,0 +1,3 @@
+.*arm3-bad.s: Assembler messages:
+.*arm3-bad.s:4: Error: Rn must not overlap other operands -- `swp r0,r1,\[r0\]'
+.*arm3-bad.s:5: Error: Rn must not overlap other operands -- `swp r1,r0,\[r0\]'
Index: gas/testsuite/gas/arm/arm3-bad.s
===================================================================
RCS file: gas/testsuite/gas/arm/arm3-bad.s
diff -N gas/testsuite/gas/arm/arm3-bad.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/arm3-bad.s	2 Sep 2005 16:35:33 -0000
@@ -0,0 +1,7 @@
+	.text
+	.align 0
+l:
+	swp	r0, r1, [r0]
+	swp	r1, r0, [r0]
+	nop
+	nop
Index: gas/testsuite/gas/arm/arm3.d
===================================================================
RCS file: /var/cvsroot/src-cvs/src/gas/testsuite/gas/arm/arm3.d,v
retrieving revision 1.2
diff -u -p -r1.2 arm3.d
--- gas/testsuite/gas/arm/arm3.d	18 May 2005 05:40:09 -0000	1.2
+++ gas/testsuite/gas/arm/arm3.d	2 Sep 2005 16:33:20 -0000
@@ -6,6 +6,6 @@
 
 Disassembly of section .text:
 0+0 <[^>]*> e1080091 ?	swp	r0, r1, \[r8\]
-0+4 <[^>]*> e1432093 ?	swpb	r2, r3, \[r3\]
-0+8 <[^>]*> a1444091 ?	swpgeb	r4, r1, \[r4\]
+0+4 <[^>]*> e1423093 ?	swpb	r3, r3, \[r2\]
+0+8 <[^>]*> a1454091 ?	swpgeb	r4, r1, \[r5\]
 0+c <[^>]*> e1a00000 ?	nop			\(mov r0,r0\)
Index: gas/testsuite/gas/arm/arm3.s
===================================================================
RCS file: /var/cvsroot/src-cvs/src/gas/testsuite/gas/arm/arm3.s,v
retrieving revision 1.2
diff -u -p -r1.2 arm3.s
--- gas/testsuite/gas/arm/arm3.s	18 May 2005 05:40:09 -0000	1.2
+++ gas/testsuite/gas/arm/arm3.s	2 Sep 2005 16:30:26 -0000
@@ -2,6 +2,6 @@
 	.align 0
 l:
 	swp	r0, r1, [r8]
-	swpb	r2, r3, [r3]
-	swpgeb	r4, r1, [r4]
+	swpb	r3, r3, [r2]
+	swpgeb	r4, r1, [r5]
 	nop

Re: [patch] Enforce Arm SWP operand constraints

[Richard Earnshaw]

On Fri, 2005-09-02 at 17:51, Paul Brook wrote:
> The attached patch enforces the operand constraints on the Arm SWP 
> instruction.  The address register may not overlap the other registers.
> 
> Tested with cross to arm-none-eabi.
> Ok?
> 
> Paul
> 
> 2005-09-02  Paul Brook  <paul@codesourcery.com>
> 
> gas/
> 	* config/tc-arm.c (do_rn_rd): Enforce SWP operand constraints.
> gas/testsuite/
> 	* gas/arm/arm3-bad.s: New test.
> 	* gas/arm/arm3-bad.d: New test.
> 	* gas/arm/arm3.s: Avoid illegal instructions.
> 	* gas/arm/arm3.d: Ditto.

OK.

R.