diff --git a/gas/NEWS b/gas/NEWS index ddf48fca37bbc87b78a78d4162ba71e4391a3cff..9d0fb3b63d03b730ef8b33fea84d038aa0d3d15a 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,8 @@ -*- text -*- +* Add support for Reliability, Availability and Serviceability extension v2 + (RASv2) for AArch64. + * Add support for 128-bit Atomic Instructions (LSE128) for AArch64. * Add support for Guarded Control Stack (GCS) for AArch64. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 70c0ed652a551ada46755a3ce96a704d050a9b44..5646de781d4502c0aa434368f0603c11ee456966 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -10292,6 +10292,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = { {"chk", AARCH64_FEATURE (CHK), AARCH64_NO_FEATURES}, {"gcs", AARCH64_FEATURE (GCS), AARCH64_NO_FEATURES}, {"the", AARCH64_FEATURE (THE), AARCH64_NO_FEATURES}, + {"rasv2", AARCH64_FEATURE (RASv2), AARCH64_FEATURE (RAS)}, {NULL, AARCH64_NO_FEATURES, AARCH64_NO_FEATURES}, }; diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 81c18181831a530f8596b8838a6b1751d5852305..cbf06bf3ec6d1680c74aad3a1a9364721ae7ca34 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -267,7 +267,8 @@ automatically cause those extensions to be disabled. @tab Enable Translation Hardening extension. @item @code{lse128} @tab Armv9.4-A @tab No @tab Enable the 128-bit Atomic Instructions extension. This implies @code{lse}. - +@item @code{rasv2} @tab N/A @tab Armv9.4-A or later + @tab Enable the Reliability, Availability and Serviceability extension v2. @end multitable @node AArch64 Syntax diff --git a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l index 48c55680aa07618cd1f0c165435533fe4dd31e41..63397bcb162747c9fe77ebcf6f0066c286c6c620 100644 --- a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l +++ b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l @@ -1,3 +1,26 @@ .*: Assembler messages: .*: Error: selected processor does not support system register name 'pmsdsfr_el1' .*: Error: selected processor does not support system register name 'pmsdsfr_el1' +.*: Error: selected processor does not support system register name 'erxgsr_el1' +.*: Error: selected processor does not support system register name 'sctlr2_el1' +.*: Error: selected processor does not support system register name 'sctlr2_el12' +.*: Error: selected processor does not support system register name 'sctlr2_el2' +.*: Error: selected processor does not support system register name 'sctlr2_el3' +.*: Error: selected processor does not support system register name 'sctlr2_el1' +.*: Error: selected processor does not support system register name 'sctlr2_el12' +.*: Error: selected processor does not support system register name 'sctlr2_el2' +.*: Error: selected processor does not support system register name 'sctlr2_el3' +.*: Error: selected processor does not support system register name 'hdfgrtr2_el2' +.*: Error: selected processor does not support system register name 'hdfgwtr2_el2' +.*: Error: selected processor does not support system register name 'hfgrtr2_el2' +.*: Error: selected processor does not support system register name 'hfgwtr2_el2' +.*: Error: selected processor does not support system register name 'hdfgrtr2_el2' +.*: Error: selected processor does not support system register name 'hdfgwtr2_el2' +.*: Error: selected processor does not support system register name 'hfgrtr2_el2' +.*: Error: selected processor does not support system register name 'hfgwtr2_el2' +.*: Error: selected processor does not support system register name 'pfar_el1' +.*: Error: selected processor does not support system register name 'pfar_el2' +.*: Error: selected processor does not support system register name 'pfar_el12' +.*: Error: selected processor does not support system register name 'pfar_el1' +.*: Error: selected processor does not support system register name 'pfar_el2' +.*: Error: selected processor does not support system register name 'pfar_el12' diff --git a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d index d4cb769fdf63aaa89ac4c410982cd20ac12bbd4d..3b66e2bc57c1be243737679e2b85758bfe2af871 100644 --- a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d +++ b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d @@ -8,3 +8,26 @@ Disassembly of section \.text: 0+ <.*>: .*: d53c9a83 mrs x3, pmsdsfr_el1 .*: d51c9a83 msr pmsdsfr_el1, x3 +.*: d5385340 mrs x0, erxgsr_el1 +.*: d5181063 msr sctlr2_el1, x3 +.*: d51d1063 msr sctlr2_el12, x3 +.*: d51c1063 msr sctlr2_el2, x3 +.*: d51e1063 msr sctlr2_el3, x3 +.*: d5381063 mrs x3, sctlr2_el1 +.*: d53d1063 mrs x3, sctlr2_el12 +.*: d53c1063 mrs x3, sctlr2_el2 +.*: d53e1063 mrs x3, sctlr2_el3 +.*: d53c3103 mrs x3, hdfgrtr2_el2 +.*: d53c3123 mrs x3, hdfgwtr2_el2 +.*: d53c3143 mrs x3, hfgrtr2_el2 +.*: d53c3163 mrs x3, hfgwtr2_el2 +.*: d51c3103 msr hdfgrtr2_el2, x3 +.*: d51c3123 msr hdfgwtr2_el2, x3 +.*: d51c3143 msr hfgrtr2_el2, x3 +.*: d51c3163 msr hfgwtr2_el2, x3 +.*: d53860a0 mrs x0, pfar_el1 +.*: d53c60a0 mrs x0, pfar_el2 +.*: d53d60a0 mrs x0, pfar_el12 +.*: d51860a0 msr pfar_el1, x0 +.*: d51c60a0 msr pfar_el2, x0 +.*: d51d60a0 msr pfar_el12, x0 diff --git a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s index 4200d7ce60ed21822731a836214bb44aeeea57ac..9ad0a532acc1bd8714f89b193d1b41f57ffb80d2 100644 --- a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s +++ b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s @@ -1,2 +1,29 @@ mrs x3, PMSDSFR_EL1 msr PMSDSFR_EL1, x3 + + mrs x0, ERXGSR_EL1 + + msr SCTLR2_EL1, x3 + msr SCTLR2_EL12, x3 + msr SCTLR2_EL2, x3 + msr SCTLR2_EL3, x3 + mrs x3, SCTLR2_EL1 + mrs x3, SCTLR2_EL12 + mrs x3, SCTLR2_EL2 + mrs x3, SCTLR2_EL3 + + mrs x3, HDFGRTR2_EL2 + mrs x3, HDFGWTR2_EL2 + mrs x3, HFGRTR2_EL2 + mrs x3, HFGWTR2_EL2 + msr HDFGRTR2_EL2, x3 + msr HDFGWTR2_EL2, x3 + msr HFGRTR2_EL2, x3 + msr HFGWTR2_EL2, x3 + + mrs x0, PFAR_EL1 + mrs x0, PFAR_EL2 + mrs x0, PFAR_EL12 + msr PFAR_EL1, x0 + msr PFAR_EL2, x0 + msr PFAR_EL12, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg-2.d b/gas/testsuite/gas/aarch64/sysreg-2.d index 097f27292739b810e7b6840d096e3fad9901f1cd..ac0a8621bfa88a21a2e0f7be69117357c9e16b06 100644 --- a/gas/testsuite/gas/aarch64/sysreg-2.d +++ b/gas/testsuite/gas/aarch64/sysreg-2.d @@ -7,10 +7,12 @@ Disassembly of section .text: 0+ <.*>: - [0-9a-f]+: d5380725 mrs x5, id_aa64mmfr1_el1 - [0-9a-f]+: d5380747 mrs x7, id_aa64mmfr2_el1 - [0-9a-f]+: d5385305 mrs x5, erridr_el1 - [0-9a-f]+: d5185327 msr errselr_el1, x7 +.*: d5380725 mrs x5, id_aa64mmfr1_el1 +.*: d5380747 mrs x7, id_aa64mmfr2_el1 +.*: d5380769 mrs x9, id_aa64mmfr3_el1 +.*: d538078b mrs x11, id_aa64mmfr4_el1 + [0-9a-f]+: d5385305 mrs x5, erridr_el1 + [0-9a-f]+: d5185327 msr errselr_el1, x7 [0-9a-f]+: d5385327 mrs x7, errselr_el1 [0-9a-f]+: d5385405 mrs x5, erxfr_el1 [0-9a-f]+: d5185425 msr erxctlr_el1, x5 diff --git a/gas/testsuite/gas/aarch64/sysreg-2.s b/gas/testsuite/gas/aarch64/sysreg-2.s index 57eb08f33521076314260b68f3e322280d9ff93b..ae2bb145e72a0786078fe60b0082dd09a618ce4d 100644 --- a/gas/testsuite/gas/aarch64/sysreg-2.s +++ b/gas/testsuite/gas/aarch64/sysreg-2.s @@ -13,6 +13,8 @@ rw_sys_reg sys_reg=id_aa64mmfr1_el1 xreg=x5 r=1 w=0 rw_sys_reg sys_reg=id_aa64mmfr2_el1 xreg=x7 r=1 w=0 + rw_sys_reg sys_reg=id_aa64mmfr3_el1 xreg=x9 r=1 w=0 + rw_sys_reg sys_reg=id_aa64mmfr4_el1 xreg=x11 r=1 w=0 /* RAS extension. */ diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 881a4211eabfad2cc4442efc78eb37c06d26973d..03ef907cac1c574516f1e1cc4d0537b33c803986 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -175,6 +175,14 @@ enum aarch64_feature_bit { AARCH64_FEATURE_THE, /* LSE128. */ AARCH64_FEATURE_LSE128, + /* ARMv8.9-A RAS Extensions. */ + AARCH64_FEATURE_RASv2, + /* System Control Register2. */ + AARCH64_FEATURE_SCTLR2, + /* Fine Grained Traps. */ + AARCH64_FEATURE_FGT2, + /* Physical Fault Address. */ + AARCH64_FEATURE_PFAR, AARCH64_NUM_FEATURES }; @@ -233,7 +241,11 @@ enum aarch64_feature_bit { #define AARCH64_ARCH_V8_9A_FEATURES(X) (AARCH64_FEATBIT (X, V8_9A) \ | AARCH64_FEATBIT (X, SPEv1p4) \ | AARCH64_FEATBIT (X, SPE_CRR) \ - | AARCH64_FEATBIT (X, SPE_FDS)) + | AARCH64_FEATBIT (X, SPE_FDS) \ + | AARCH64_FEATBIT (X, RASv2) \ + | AARCH64_FEATBIT (X, SCTLR2) \ + | AARCH64_FEATBIT (X, FGT2) \ + | AARCH64_FEATBIT (X, PFAR)) #define AARCH64_ARCH_V9A_FEATURES(X) (AARCH64_FEATBIT (X, V9A) \ | AARCH64_FEATBIT (X, F16) \ diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def index aab2c7264cab0b4ca34ab8135194abd0126b7430..b51c5aa14598abe8628d6a1363b43d6604dc8fda 100644 --- a/opcodes/aarch64-sys-regs.def +++ b/opcodes/aarch64-sys-regs.def @@ -400,6 +400,7 @@ SYSREG ("erxaddr_el1", CPENC (3,0,5,4,3), F_ARCHEXT, AARCH64_FEATURE (RAS)) SYSREG ("erxctlr_el1", CPENC (3,0,5,4,1), F_ARCHEXT, AARCH64_FEATURE (RAS)) SYSREG ("erxfr_el1", CPENC (3,0,5,4,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (RAS)) + SYSREG ("erxgsr_el1", CPENC (3,0,5,3,2), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (RASv2)) SYSREG ("erxmisc0_el1", CPENC (3,0,5,5,0), F_ARCHEXT, AARCH64_FEATURE (RAS)) SYSREG ("erxmisc1_el1", CPENC (3,0,5,5,1), F_ARCHEXT, AARCH64_FEATURE (RAS)) SYSREG ("erxmisc2_el1", CPENC (3,0,5,5,2), F_ARCHEXT, AARCH64_FEATURE (RAS)) @@ -438,10 +439,14 @@ SYSREG ("hcr_el2", CPENC (3,4,1,1,0), 0, AARCH64_NO_FEATURES) SYSREG ("hcrx_el2", CPENC (3,4,1,2,2), F_ARCHEXT, AARCH64_FEATURE (V8_7A)) SYSREG ("hdfgrtr_el2", CPENC (3,4,3,1,4), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) + SYSREG ("hdfgrtr2_el2", CPENC (3,4,3,1,0), F_ARCHEXT, AARCH64_FEATURE (FGT2)) SYSREG ("hdfgwtr_el2", CPENC (3,4,3,1,5), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) + SYSREG ("hdfgwtr2_el2", CPENC (3,4,3,1,1), F_ARCHEXT, AARCH64_FEATURE (FGT2)) SYSREG ("hfgitr_el2", CPENC (3,4,1,1,6), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) SYSREG ("hfgrtr_el2", CPENC (3,4,1,1,4), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) + SYSREG ("hfgrtr2_el2", CPENC (3,4,3,1,2), F_ARCHEXT, AARCH64_FEATURE (FGT2)) SYSREG ("hfgwtr_el2", CPENC (3,4,1,1,5), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) + SYSREG ("hfgwtr2_el2", CPENC (3,4,3,1,3), F_ARCHEXT, AARCH64_FEATURE (FGT2)) SYSREG ("hpfar_el2", CPENC (3,4,6,0,4), 0, AARCH64_NO_FEATURES) SYSREG ("hstr_el2", CPENC (3,4,1,1,3), 0, AARCH64_NO_FEATURES) SYSREG ("icc_ap0r0_el1", CPENC (3,0,12,8,4), 0, AARCH64_NO_FEATURES) @@ -515,6 +520,8 @@ SYSREG ("id_aa64mmfr0_el1", CPENC (3,0,0,7,0), F_REG_READ, AARCH64_NO_FEATURES) SYSREG ("id_aa64mmfr1_el1", CPENC (3,0,0,7,1), F_REG_READ, AARCH64_NO_FEATURES) SYSREG ("id_aa64mmfr2_el1", CPENC (3,0,0,7,2), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64mmfr3_el1", CPENC (3,0,0,7,3), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64mmfr4_el1", CPENC (3,0,0,7,4), F_REG_READ, AARCH64_NO_FEATURES) SYSREG ("id_aa64pfr0_el1", CPENC (3,0,0,4,0), F_REG_READ, AARCH64_NO_FEATURES) SYSREG ("id_aa64pfr1_el1", CPENC (3,0,0,4,1), F_REG_READ, AARCH64_NO_FEATURES) SYSREG ("id_aa64smfr0_el1", CPENC (3,0,0,4,5), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (SME)) @@ -595,6 +602,9 @@ SYSREG ("oslsr_el1", CPENC (2,0,1,1,4), F_REG_READ, AARCH64_NO_FEATURES) SYSREG ("pan", CPENC (3,0,4,2,3), F_ARCHEXT, AARCH64_FEATURE (PAN)) SYSREG ("par_el1", CPENC (3,0,7,4,0), F_REG_128, AARCH64_NO_FEATURES) + SYSREG ("pfar_el1", CPENC (3,0,6,0,5), F_ARCHEXT, AARCH64_FEATURE (PFAR)) + SYSREG ("pfar_el12", CPENC (3,5,6,0,5), F_ARCHEXT, AARCH64_FEATURE (PFAR)) + SYSREG ("pfar_el2", CPENC (3,4,6,0,5), F_ARCHEXT, AARCH64_FEATURE (PFAR)) SYSREG ("pmbidr_el1", CPENC (3,0,9,10,7), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PROFILE)) SYSREG ("pmblimitr_el1", CPENC (3,0,9,10,0), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) SYSREG ("pmbptr_el1", CPENC (3,0,9,10,1), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) @@ -774,6 +784,10 @@ SYSREG ("sctlr_el12", CPENC (3,5,1,0,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) SYSREG ("sctlr_el2", CPENC (3,4,1,0,0), 0, AARCH64_NO_FEATURES) SYSREG ("sctlr_el3", CPENC (3,6,1,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("sctlr2_el1", CPENC (3,0,1,0,3), F_ARCHEXT, AARCH64_FEATURE (SCTLR2)) + SYSREG ("sctlr2_el12", CPENC (3,5,1,0,3), F_ARCHEXT, AARCH64_FEATURE (SCTLR2)) + SYSREG ("sctlr2_el2", CPENC (3,4,1,0,3), F_ARCHEXT, AARCH64_FEATURE (SCTLR2)) + SYSREG ("sctlr2_el3", CPENC (3,6,1,0,3), F_ARCHEXT, AARCH64_FEATURE (SCTLR2)) SYSREG ("scxtnum_el0", CPENC (3,3,13,0,7), F_ARCHEXT, AARCH64_FEATURE (SCXTNUM)) SYSREG ("scxtnum_el1", CPENC (3,0,13,0,7), F_ARCHEXT, AARCH64_FEATURE (SCXTNUM)) SYSREG ("scxtnum_el12", CPENC (3,5,13,0,7), F_ARCHEXT, AARCH64_FEATURE (SCXTNUM))