From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 25731 invoked by alias); 13 Feb 2011 08:07:43 -0000 Received: (qmail 25721 invoked by uid 22791); 13 Feb 2011 08:07:38 -0000 X-SWARE-Spam-Status: No, hits=-2.0 required=5.0 tests=AWL,BAYES_00,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from smtp.gentoo.org (HELO smtp.gentoo.org) (140.211.166.183) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sun, 13 Feb 2011 08:07:34 +0000 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.gentoo.org (Postfix) with ESMTP id E5AA51B4011; Sun, 13 Feb 2011 08:07:24 +0000 (UTC) From: Mike Frysinger To: binutils@sourceware.org Cc: toolchain-devel@blackfin.uclinux.org Subject: [PATCH] opcodes: blackfin: fix decoding of ABS Date: Sun, 13 Feb 2011 08:07:00 -0000 Message-Id: <1297584446-5910-1-git-send-email-vapier@gentoo.org> X-IsSubscribed: yes Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2011-02/txt/msg00125.txt.bz2 The single cycle dual mac ABS insn was incorrectly decoding the mac1 part of the insn. Once we fix the decode, update the gas tests to have the correct output. Signed-off-by: Mike Frysinger opcodes/: 2011-02-13 Mike Frysinger * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg. gas/testsuite/: 2011-02-13 Mike Frysinger * gas/bfin/arithmetic.d, gas/bfin/parallel.d: Change A0 to A1. --- gas/testsuite/gas/bfin/arithmetic.d | 2 +- gas/testsuite/gas/bfin/parallel.d | 2 +- opcodes/bfin-dis.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/gas/testsuite/gas/bfin/arithmetic.d b/gas/testsuite/gas/bfin/arithmetic.d index 0f145e0..2cbdb71 100644 --- a/gas/testsuite/gas/bfin/arithmetic.d +++ b/gas/testsuite/gas/bfin/arithmetic.d @@ -10,7 +10,7 @@ Disassembly of section .text: 4: 10 c4 [0-3][[:xdigit:]] 40 A0 = ABS A1; 8: 30 c4 [0-3][[:xdigit:]] 00 A1 = ABS A0; c: 30 c4 [0-3][[:xdigit:]] 40 A1 = ABS A1; - 10: 10 c4 [0-3][[:xdigit:]] c0 A1 = ABS A0, A0 = ABS A0; + 10: 10 c4 [0-3][[:xdigit:]] c0 A1 = ABS A1, A0 = ABS A0; 14: 07 c4 10 80 R0 = ABS R2; 00000018 : diff --git a/gas/testsuite/gas/bfin/parallel.d b/gas/testsuite/gas/bfin/parallel.d index db4c8fe..bd4269c 100644 --- a/gas/testsuite/gas/bfin/parallel.d +++ b/gas/testsuite/gas/bfin/parallel.d @@ -37,7 +37,7 @@ Disassembly of section .text: 74: fc b9 0a 9c 78: 30 cc 00 40 A1 = ABS A1 \|\| FP = \[SP\] \|\| R3 = \[I2--\]; 7c: 77 91 93 9c - 80: 10 cc 00 c0 A1 = ABS A0, A0 = ABS A0 \|\| R4 = \[P5 \+ 0x38\] \|\| R0.H = W\[I0\]; + 80: 10 cc 00 c0 A1 = ABS A1, A0 = ABS A0 \|\| R4 = \[P5 \+ 0x38\] \|\| R0.H = W\[I0\]; 84: ac a3 40 9d 88: 07 cc 10 80 R0 = ABS R2 \|\| B\[SP\] = R0 \|\| R1.H = W\[I1\+\+\]; 8c: 30 9b 49 9c diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c index d45296a..66b03bc 100644 --- a/opcodes/bfin-dis.c +++ b/opcodes/bfin-dis.c @@ -3476,7 +3476,7 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, " = (A0 += A1)"); } else if (aop == 3 && HL == 0 && aopcde == 16) - OUTS (outf, "A1 = ABS A0, A0 = ABS A0"); + OUTS (outf, "A1 = ABS A1, A0 = ABS A0"); else if (aop == 0 && aopcde == 23 && HL == 1) { -- 1.7.4