From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 19553 invoked by alias); 11 May 2011 16:29:53 -0000 Received: (qmail 19541 invoked by uid 22791); 11 May 2011 16:29:51 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW,TW_BF,TW_XB,TW_XF X-Spam-Check-By: sourceware.org Received: from service87.mimecast.com (HELO service87.mimecast.com) (94.185.240.25) by sourceware.org (qpsmtpd/0.43rc1) with SMTP; Wed, 11 May 2011 16:29:36 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Wed, 11 May 2011 17:29:33 +0100 Received: from [10.1.77.49] ([10.1.255.212]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 11 May 2011 17:29:31 +0100 Subject: RFA: Patch for PR gas/12715 incorrect encoding of 64-bit immediates for ARM targets From: Matthew Gretton-Dann To: binutils@sourceware.org Cc: gingold@adacore.com Date: Wed, 11 May 2011 16:29:00 -0000 Message-ID: <1305131372.20157.3.camel@e102319-lin.cambridge.arm.com> Mime-Version: 1.0 X-MC-Unique: 111051117293301801 Content-Type: multipart/mixed; boundary="=-O2UVYz4uEx/Hgl8vgjaG" X-IsSubscribed: yes Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2011-05/txt/msg00156.txt.bz2 --=-O2UVYz4uEx/Hgl8vgjaG Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Content-length: 1893 All, PR gas/12715 shows a bug in gas when assembling 64-bit immediates on an ARM target when gas has been configured for a 32-bit host, and with support multiple targets at least one of which is a 64-bit target. The issue is here in gas/config/tc-arm.c, parse_big_immediate: /* If we're on a 64-bit host, then a 64-bit number can be returned using O_constant. We have to be careful not to break compilation for 32-bit X_add_number, though. */ if ((exp.X_add_number & ~0xffffffffl) !=3D 0) ... On a 32-bit host with a 64-bit target exp.X_add_number is (ultimately) of type BFD_HOST_64_BIT. In this parser has stored the whole 64-bit immediate in exp.X_add_number - not (as in the case when on a 32-bit host with a 32-bit target) as a bignum. In this case the if test above always fails, as 0xffffffffl is treated as a 32-bit integer, so the bitwise inverse is 0, and so the test can never be true. And so the 64-bit immediate gets its top 32-bits set to zero. The fix is to make sure the constant is of the correct type before doing the bitwise inverse. I have tested this on an x86-64 host with the following configuration=20 options: * --target=3Darm-none-eabi * --target=3Darm-none-eabi --enable-targets=3Dall * --target=3Darm-none-eabi CFLAGS=3D-m32 * --target=3Darm-none-eabi --enable-targets=3Dall CFLAGS=3D-m32 Is this okay for trunk and the 2.21 branch? Thanks, Matt gas/ChangeLog: 2011-05-11 Matthew Gretton-Dann PR gas/12715 * config/tc-arm.c (parse_big_immediate): Fix parsing of 64-bit immediates on 32-bit hosts. gas/testsuite/ChangeLog: 2011-05-11 Matthew Gretton-Dann PR gas/12715 * gas/arm/neon-const.s: Add testcase for 64-bit Neon constants. * gas/arm/neon-const.d: Likewise. --=20 Matthew Gretton-Dann Principal Engineer - PDSW Tools ARM Ltd= --=-O2UVYz4uEx/Hgl8vgjaG Content-Type: text/x-patch; name=1105-vmov-immediate.patch; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="1105-vmov-immediate.patch" Content-length: 1524 diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index af8c4aa..33c5deb 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -4450,7 +4450,7 @@ parse_big_immediate (char **str, int i) /* If we're on a 64-bit host, then a 64-bit number can be returned u= sing O_constant. We have to be careful not to break compilation for 32-bit X_add_number, though. */ - if ((exp.X_add_number & ~0xffffffffl) !=3D 0) + if ((exp.X_add_number & ~(offsetT)(0xffffffffU)) !=3D 0) { /* X >> 32 is illegal if sizeof (exp.X_add_number) =3D=3D 4. */ inst.operands[i].reg =3D ((exp.X_add_number >> 16) >> 16) & 0xffffffff; diff --git a/gas/testsuite/gas/arm/neon-const.d b/gas/testsuite/gas/arm/neo= n-const.d index a1bc97c..6c46930 100644 --- a/gas/testsuite/gas/arm/neon-const.d +++ b/gas/testsuite/gas/arm/neon-const.d @@ -263,3 +263,4 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> f3850f5f vmov\.f32 q0, #-0\.484375 ; 0xbef80000 0[0-9a-f]+ <[^>]+> f3860f5f vmov\.f32 q0, #-0\.96875 ; 0xbf780000 0[0-9a-f]+ <[^>]+> f3870f5f vmov\.f32 q0, #-1\.9375 ; 0xbff80000 +0[0-9a-f]+ <[^>]+> f3879e3f vmov\.i64 d9, #0xffffffffffffffff diff --git a/gas/testsuite/gas/arm/neon-const.s b/gas/testsuite/gas/arm/neo= n-const.s index a6fb550..aaaf144 100644 --- a/gas/testsuite/gas/arm/neon-const.s +++ b/gas/testsuite/gas/arm/neon-const.s @@ -295,3 +295,5 @@ vmov.f32 q0, -0.484375 vmov.f32 q0, -0.96875 vmov.f32 q0, -1.9375 + + vmov.i64 d9, #0xffffffffffffffff= --=-O2UVYz4uEx/Hgl8vgjaG--