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* MIPS opcodes patch: change move from andu to or
@ 1999-10-25  8:21 Gavin Romig-Koch
  1999-10-25 10:31 ` Ian Lance Taylor
  0 siblings, 1 reply; 4+ messages in thread
From: Gavin Romig-Koch @ 1999-10-25  8:21 UTC (permalink / raw)
  To: binutils

OK to commit?

                                          -gavin...

For opcodes:
	* mips-opc.c (move): Use "or" rather than "addu" or "daddu".

Index: mips-opc.c
===================================================================
RCS file: /cvs/binutils/binutils/opcodes/mips-opc.c,v
retrieving revision 1.1.1.1
diff -c -p -r1.1.1.1 mips-opc.c
*** mips-opc.c	1999/05/03 07:28:59	1.1.1.1
--- mips-opc.c	1999/10/25 15:15:16
*************** const struct mips_opcode mips_builtin_op
*** 109,117 ****
  {"li",      "t,j",      0x24000000, 0xffe00000, WR_t,		I1	}, /* addiu */
  {"li",	    "t,i",	0x34000000, 0xffe00000, WR_t,		I1	}, /* ori */
  {"li",      "t,I",	0,    (int) M_LI,	INSN_MACRO,	I1	},
  {"move",    "d,s",	0x0000002d, 0xfc1f07ff, WR_d|RD_s,	I3	},/* daddu */
  {"move",    "d,s",	0x00000021, 0xfc1f07ff, WR_d|RD_s,	I1	},/* addu */
! {"move",    "d,s",	0x00000025, 0xfc1f07ff,	WR_d|RD_s,	I1	},/* or */
  {"b",       "p",	0x10000000, 0xffff0000,	UBD,		I1	},/* beq 0,0 */
  {"b",       "p",	0x04010000, 0xffff0000,	UBD,		I1	},/* bgez 0 */
  {"bal",     "p",	0x04110000, 0xffff0000,	UBD|WR_31,	I1	},/* bgezal 0*/
--- 109,122 ----
  {"li",      "t,j",      0x24000000, 0xffe00000, WR_t,		I1	}, /* addiu */
  {"li",	    "t,i",	0x34000000, 0xffe00000, WR_t,		I1	}, /* ori */
  {"li",      "t,I",	0,    (int) M_LI,	INSN_MACRO,	I1	},
+ 
+   /* Using 'or' for 'move' rather than 'addu' or 'daddu' brings gas inline
+      with the Irix4-Irix6 assemblers, and works around some of 
+      gcc's -mips3 -gp32 problems. */
+ {"move",    "d,s",	0x00000025, 0xfc1f07ff,	WR_d|RD_s,	I1	},/* or */
  {"move",    "d,s",	0x0000002d, 0xfc1f07ff, WR_d|RD_s,	I3	},/* daddu */
  {"move",    "d,s",	0x00000021, 0xfc1f07ff, WR_d|RD_s,	I1	},/* addu */
! 
  {"b",       "p",	0x10000000, 0xffff0000,	UBD,		I1	},/* beq 0,0 */
  {"b",       "p",	0x04010000, 0xffff0000,	UBD,		I1	},/* bgez 0 */
  {"bal",     "p",	0x04110000, 0xffff0000,	UBD|WR_31,	I1	},/* bgezal 0*/


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: MIPS opcodes patch: change move from andu to or
  1999-10-25  8:21 MIPS opcodes patch: change move from andu to or Gavin Romig-Koch
@ 1999-10-25 10:31 ` Ian Lance Taylor
  1999-10-25 10:39   ` Andrew Haley
  0 siblings, 1 reply; 4+ messages in thread
From: Ian Lance Taylor @ 1999-10-25 10:31 UTC (permalink / raw)
  To: gavin; +Cc: binutils

   Date: Mon, 25 Oct 1999 11:19:28 -0400 (EDT)
   From: Gavin Romig-Koch <gavin@cygnus.com>

   OK to commit?

   For opcodes:
	   * mips-opc.c (move): Use "or" rather than "addu" or "daddu".

We deliberately chose ``addu'' and ``daddu'' rather than ``or''
because several MIPS chips have two pipelined addition units but only
one pipelined logical unit.  Those chips can move two pairs of
registers around at once if we use ``addu'', but they can only move
one pair if we use ``or''.

Is there any reason we should use ``or''?  Your comment mentions
something about ``gcc -mips3 -gp32''; can't we fix gcc?

Ian

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: MIPS opcodes patch: change move from andu to or
  1999-10-25 10:31 ` Ian Lance Taylor
@ 1999-10-25 10:39   ` Andrew Haley
  1999-10-25 12:50     ` Gavin Romig-Koch
  0 siblings, 1 reply; 4+ messages in thread
From: Andrew Haley @ 1999-10-25 10:39 UTC (permalink / raw)
  To: ian; +Cc: gavin, binutils

> Date: 25 Oct 1999 13:31:12 -0400
> From: Ian Lance Taylor <ian@zembu.com>
> 
>    Date: Mon, 25 Oct 1999 11:19:28 -0400 (EDT)
>    From: Gavin Romig-Koch <gavin@cygnus.com>
> 
>    OK to commit?
> 
>    For opcodes:
> 	   * mips-opc.c (move): Use "or" rather than "addu" or "daddu".
> 
> We deliberately chose ``addu'' and ``daddu'' rather than ``or''
> because several MIPS chips have two pipelined addition units but only
> one pipelined logical unit.  Those chips can move two pairs of
> registers around at once if we use ``addu'', but they can only move
> one pair if we use ``or''.

Aha!  That's a *very* good reason.  I'll add a comment, if that's OK
with you.

> Is there any reason we should use ``or''?  Your comment mentions
> something about ``gcc -mips3 -gp32''; can't we fix gcc?

Yeah.  The problem is that -mgp32 is supposed to generate 32-bit code,
but any move insns get converted into "dadd".  I don't really think
that this is important, since the insns will have the same effect, but
it looks rather odd.

I suppose that we could change gcc to ouput "or" insns for 32-bit
moves, but that would degrade performance in the case that you
describe.

Andrew.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: MIPS opcodes patch: change move from andu to or
  1999-10-25 10:39   ` Andrew Haley
@ 1999-10-25 12:50     ` Gavin Romig-Koch
  0 siblings, 0 replies; 4+ messages in thread
From: Gavin Romig-Koch @ 1999-10-25 12:50 UTC (permalink / raw)
  To: Andrew Haley, ian; +Cc: binutils

Andrew Haley writes:
 > >    OK to commit?
 > > 
 > >    For opcodes:
 > > 	   * mips-opc.c (move): Use "or" rather than "addu" or "daddu".
 > > 
 > > We deliberately chose ``addu'' and ``daddu'' rather than ``or''
 > > because several MIPS chips have two pipelined addition units but only
 > > one pipelined logical unit.  Those chips can move two pairs of
 > > registers around at once if we use ``addu'', but they can only move
 > > one pair if we use ``or''.
 > 
 > Aha!  That's a *very* good reason.  I'll add a comment, if that's OK
 > with you.
 > 
 > > Is there any reason we should use ``or''?  Your comment mentions
 > > something about ``gcc -mips3 -gp32''; can't we fix gcc?
 > 
 > Yeah.  The problem is that -mgp32 is supposed to generate 32-bit code,
 > but any move insns get converted into "dadd".  I don't really think
 > that this is important, since the insns will have the same effect, but
 > it looks rather odd.

The overall problem is that the -mgp32 flag was never fully implemented
(I don't know why), and no-one's ever had time to get it working.  One
of the problems with it is that gas neither recieves nor handles the
-mgp32 flag.  It only sees the -mips3 flag (or gets -mips3 it by default),
and produces a "daddu" for "move" (and perhaps other related problems).

I thought that the "move" -> "or" patch would be a low cost fix to part
of the -mgp32 problems, but I didn't think of the pipeline issue.

 > I suppose that we could change gcc to ouput "or" insns for 32-bit
 > moves, but that would degrade performance in the case that you
 > describe.

Getting -mgp32 working in mips gas is on my list of things to do; I'll
see about moving it up.

                                                -gavin...

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~1999-10-25 12:50 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
1999-10-25  8:21 MIPS opcodes patch: change move from andu to or Gavin Romig-Koch
1999-10-25 10:31 ` Ian Lance Taylor
1999-10-25 10:39   ` Andrew Haley
1999-10-25 12:50     ` Gavin Romig-Koch

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