From: Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com>
To: <binutils@sourceware.org>
Cc: <Claudiu.Zissulescu@synopsys.com>, <Francois.Bedard@synopsys.com>
Subject: [PATCH] [ARC] Add XY registers, update neg instruction.
Date: Thu, 19 May 2016 12:16:00 -0000 [thread overview]
Message-ID: <1463660186-29789-1-git-send-email-claziss@synopsys.com> (raw)
In-Reply-To: <1463654412-14132-3-git-send-email-claziss@synopsys.com>
Forgot to add the patch for ARC EM default code-density option availability.
Sorry for messing it up,
Claudiu
gas/
2016-05-19 Claudiu Zissulescu <claziss@synopsys.com>
* config/tc-arc.c (md_begin): Add XY registers.
(cpu_types): Code density is default off for ARC EM.
opcodes/
2016-05-19 Claudiu Zissulescu <claziss@synopsys.com>
* arc-tbl.h (neg): New instruction variant.
---
gas/config/tc-arc.c | 28 +++++++++++++++++++++++++++-
opcodes/arc-tbl.h | 3 +++
2 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index c9d772f..518a963 100644
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -428,7 +428,7 @@ static const struct cpu_type
{ "nps400", ARC_OPCODE_ARC700 | ARC_OPCODE_NPS400, bfd_mach_arc_nps400,
E_ARC_MACH_NPS400, 0x00},
{ "arcem", ARC_OPCODE_ARCv2EM, bfd_mach_arc_arcv2,
- EF_ARC_CPU_ARCV2EM, ARC_CD},
+ EF_ARC_CPU_ARCV2EM, 0x00},
{ "archs", ARC_OPCODE_ARCv2HS, bfd_mach_arc_arcv2,
EF_ARC_CPU_ARCV2HS, ARC_CD},
{ 0, 0, 0, 0, 0 }
@@ -2381,6 +2381,32 @@ md_begin (void)
declare_register ("ilink2", 30);
declare_register ("blink", 31);
+ /* XY memory registers. */
+ declare_register ("x0_u0", 32);
+ declare_register ("x0_u1", 33);
+ declare_register ("x1_u0", 34);
+ declare_register ("x1_u1", 35);
+ declare_register ("x2_u0", 36);
+ declare_register ("x2_u1", 37);
+ declare_register ("x3_u0", 38);
+ declare_register ("x3_u1", 39);
+ declare_register ("y0_u0", 40);
+ declare_register ("y0_u1", 41);
+ declare_register ("y1_u0", 42);
+ declare_register ("y1_u1", 43);
+ declare_register ("y2_u0", 44);
+ declare_register ("y2_u1", 45);
+ declare_register ("y3_u0", 46);
+ declare_register ("y3_u1", 47);
+ declare_register ("x0_nu", 48);
+ declare_register ("x1_nu", 49);
+ declare_register ("x2_nu", 50);
+ declare_register ("x3_nu", 51);
+ declare_register ("y0_nu", 52);
+ declare_register ("y1_nu", 53);
+ declare_register ("y2_nu", 54);
+ declare_register ("y3_nu", 55);
+
declare_register ("mlo", 57);
declare_register ("mmid", 58);
declare_register ("mhi", 59);
diff --git a/opcodes/arc-tbl.h b/opcodes/arc-tbl.h
index b0d56df..7bda40a 100644
--- a/opcodes/arc-tbl.h
+++ b/opcodes/arc-tbl.h
@@ -12723,6 +12723,9 @@
/* neg<.f> a,b 00100bbb01001110FBBB000000AAAAAA. */
{ "neg", 0x204E0000, 0xF8FF0FC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { RA, RB }, { C_F }},
+/* neg<.f> 0,b 00100bbb01001110FBBB000000111110. */
+{ "neg", 0x204E0000, 0xF8FF0FFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { ZA, RB }, { C_F }},
+
/* neg<.f><.cc> b,b 00100bbb11001110FBBB0000001QQQQQ. */
{ "neg", 0x20CE0020, 0xF8FF0FE0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { RB, RBdup }, { C_F, C_CC }},
--
1.9.1
next prev parent reply other threads:[~2016-05-19 12:16 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-19 10:40 [PATCH 0/2] [ARC] Miscellaneous patches Claudiu Zissulescu
2016-05-19 10:40 ` [PATCH 2/2] [ARC] Add XY registers, update neg instruction Claudiu Zissulescu
2016-05-19 12:16 ` Claudiu Zissulescu [this message]
2016-05-23 10:23 ` [PATCH] " Nick Clifton
2016-05-19 10:41 ` [PATCH 1/2] [ARC] Update instruction type and delay slot info Claudiu Zissulescu
2016-05-23 10:22 ` Nick Clifton
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