Release 2.22: branch created

Release 2.22: branch created

[Tristan Gingold]

I have just created the 2_22 branch for binutils, and built a snapshot (which is ok for i686-pc-linux-gnu).

You can download it from:
ftp://sourceware.org/pub/binutils/snapshots/binutils-2.21.53.tar.bz2

The branch is open to fix regressions/bugs, do not hesitate to ask before committing on the branch.

Tristan.

Re: Release 2.22: branch created

[H.J. Lu]

On Thu, Sep 22, 2011 at 2:16 AM, Tristan Gingold <gingold@adacore.com> wrote:
> I have just created the 2_22 branch for binutils, and built a snapshot (which is ok for i686-pc-linux-gnu).
>
> You can download it from:
> ftp://sourceware.org/pub/binutils/snapshots/binutils-2.21.53.tar.bz2
>
> The branch is open to fix regressions/bugs, do not hesitate to ask before committing on the branch.
>

There is one regression:

http://www.sourceware.org/bugzilla/show_bug.cgi?id=13195

-- 
H.J.

Re: Release 2.22: branch created

[Andreas Schwab]

The daily update should probably be switched to this branch.

Andreas.

-- 
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."

Re: Release 2.22: branch created

[Dave Korn]

On 22/09/2011 10:16, Tristan Gingold wrote:
> I have just created the 2_22 branch for binutils, and built a snapshot
> (which is ok for i686-pc-linux-gnu).
> 
> You can download it from: 
> ftp://sourceware.org/pub/binutils/snapshots/binutils-2.21.53.tar.bz2
> 
> The branch is open to fix regressions/bugs, do not hesitate to ask before
> committing on the branch.
> 
> Tristan.
> 

  I'm planning to commit

    http://sourceware.org/ml/binutils/2011-09/msg00174.html

to mainline within the next 48 hours, it fixes a serious bug in linking
PE-COFF DLLs.  Ok for the branch too please?

    cheers,
      DaveK

Re: Release 2.22: branch created

[Tristan Gingold]

On Sep 25, 2011, at 8:07 PM, Dave Korn wrote:

> On 22/09/2011 10:16, Tristan Gingold wrote:
>> I have just created the 2_22 branch for binutils, and built a snapshot
>> (which is ok for i686-pc-linux-gnu).
>> 
>> You can download it from: 
>> ftp://sourceware.org/pub/binutils/snapshots/binutils-2.21.53.tar.bz2
>> 
>> The branch is open to fix regressions/bugs, do not hesitate to ask before
>> committing on the branch.
>> 
>> Tristan.
>> 
> 
>  I'm planning to commit
> 
>    http://sourceware.org/ml/binutils/2011-09/msg00174.html
> 
> to mainline within the next 48 hours, it fixes a serious bug in linking
> PE-COFF DLLs.  Ok for the branch too please?

Sure.

Tristan.

Re: Release 2.22: branch created

[Christopher Faylor]

On Mon, Sep 26, 2011 at 11:42:51AM +0200, Tristan Gingold wrote:
>
>On Sep 25, 2011, at 8:07 PM, Dave Korn wrote:
>
>> On 22/09/2011 10:16, Tristan Gingold wrote:
>>> I have just created the 2_22 branch for binutils, and built a snapshot
>>> (which is ok for i686-pc-linux-gnu).
>>> 
>>> You can download it from: 
>>> ftp://sourceware.org/pub/binutils/snapshots/binutils-2.21.53.tar.bz2
>>> 
>>> The branch is open to fix regressions/bugs, do not hesitate to ask before
>>> committing on the branch.
>>> 
>>> Tristan.
>>> 
>> 
>>  I'm planning to commit
>> 
>>    http://sourceware.org/ml/binutils/2011-09/msg00174.html
>> 
>> to mainline within the next 48 hours, it fixes a serious bug in linking
>> PE-COFF DLLs.  Ok for the branch too please?
>
>Sure.

I was hoping to roll a new version of binutils for Cygwin soon but I
don't see this patch in either trunk or branch.  Are there plans to
incorporate it anytime soon?

cgf

Re: Release 2.22: branch created

[Dave Korn]

[-- Attachment #1: Type: text/plain, Size: 1899 bytes --]

On 09/10/2011 14:17, Christopher Faylor wrote:
> On Mon, Sep 26, 2011 at 11:42:51AM +0200, Tristan Gingold wrote:
>> On Sep 25, 2011, at 8:07 PM, Dave Korn wrote:
>>
>>> On 22/09/2011 10:16, Tristan Gingold wrote:
>>>> I have just created the 2_22 branch for binutils, and built a snapshot
>>>> (which is ok for i686-pc-linux-gnu).
>>>>
>>>> You can download it from: 
>>>> ftp://sourceware.org/pub/binutils/snapshots/binutils-2.21.53.tar.bz2
>>>>
>>>> The branch is open to fix regressions/bugs, do not hesitate to ask before
>>>> committing on the branch.
>>>>
>>>> Tristan.
>>>>
>>>  I'm planning to commit
>>>
>>>    http://sourceware.org/ml/binutils/2011-09/msg00174.html
>>>
>>> to mainline within the next 48 hours, it fixes a serious bug in linking
>>> PE-COFF DLLs.  Ok for the branch too please?
>> Sure.
> 
> I was hoping to roll a new version of binutils for Cygwin soon but I
> don't see this patch in either trunk or branch.  Are there plans to
> incorporate it anytime soon?

  Sorry for the delay, there turned out to be hidden gotchas.  After building
GCC and running the testsuite both before and after rebasing the DLLs, I
determined that the original patch wasn't quite conservative enough.
Generating base relocs needs to follow what the static final link does with
the underlying BFD relocs, and what it turns out is that relocs in .eh_frame
sections against discarded COMDAT sections are discarded (linked to *ABS*
zero), but relocs in .gcc_except_data section get resolved as usual (i.e.
against the kept section), so the original patch wasn't conservative enough.
I just got through running the C++ testsuite with DLLs built against the
attached slight variant of the original patch and I'll look to commit it
tomorrow after a little more testing.  (I'll also post it to the list with a
proper changelog when I do so, this is just advance notice.)

    cheers,
      DaveK


[-- Attachment #2: diff3.diff --]
[-- Type: text/x-c, Size: 3140 bytes --]

? ld/testsuite/ld-plugin/dummy.c
? ld/testsuite/ld-plugin/dummy.s
? ld/testsuite/ld-plugin/func1p.c
? ld/testsuite/ld-plugin/func2.c
? ld/testsuite/ld-plugin/func2i.c
? ld/testsuite/ld-plugin/func3h.c
? ld/testsuite/ld-plugin/lto-10.out
? ld/testsuite/ld-plugin/lto-10a.c
? ld/testsuite/ld-plugin/lto-10b.c
? ld/testsuite/ld-plugin/lto-10r.d
? ld/testsuite/ld-plugin/lto-11.out
? ld/testsuite/ld-plugin/lto-11a.c
? ld/testsuite/ld-plugin/lto-11b.c
? ld/testsuite/ld-plugin/lto-11c.c
? ld/testsuite/ld-plugin/lto-12.out
? ld/testsuite/ld-plugin/lto-12a.c
? ld/testsuite/ld-plugin/lto-12b.c
? ld/testsuite/ld-plugin/lto-12c.c
? ld/testsuite/ld-plugin/lto-13.out
? ld/testsuite/ld-plugin/lto-13a.c
? ld/testsuite/ld-plugin/lto-13b.c
? ld/testsuite/ld-plugin/lto-13c.c
? ld/testsuite/ld-plugin/lto-14.out
? ld/testsuite/ld-plugin/lto-14a.c
? ld/testsuite/ld-plugin/lto-14b.c
? ld/testsuite/ld-plugin/lto-14c.c
? ld/testsuite/ld-plugin/lto-15.out
? ld/testsuite/ld-plugin/lto-15a.c
? ld/testsuite/ld-plugin/lto-15b.c
? ld/testsuite/ld-plugin/lto-1a.c
? ld/testsuite/ld-plugin/lto-1b.c
? ld/testsuite/ld-plugin/lto-2.c
? ld/testsuite/ld-plugin/lto-3.d
? ld/testsuite/ld-plugin/lto-3.out
? ld/testsuite/ld-plugin/lto-3a.c
? ld/testsuite/ld-plugin/lto-3b.c
? ld/testsuite/ld-plugin/lto-3c.c
? ld/testsuite/ld-plugin/lto-3r.d
? ld/testsuite/ld-plugin/lto-4.out
? ld/testsuite/ld-plugin/lto-4a.c
? ld/testsuite/ld-plugin/lto-4b.c
? ld/testsuite/ld-plugin/lto-4c.c
? ld/testsuite/ld-plugin/lto-4r-a.d
? ld/testsuite/ld-plugin/lto-4r-b.d
? ld/testsuite/ld-plugin/lto-4r-c.d
? ld/testsuite/ld-plugin/lto-4r-d.d
? ld/testsuite/ld-plugin/lto-5.d
? ld/testsuite/ld-plugin/lto-5.out
? ld/testsuite/ld-plugin/lto-5a.c
? ld/testsuite/ld-plugin/lto-5b.c
? ld/testsuite/ld-plugin/lto-5r.d
? ld/testsuite/ld-plugin/lto-6.c
? ld/testsuite/ld-plugin/lto-7.out
? ld/testsuite/ld-plugin/lto-7a.c
? ld/testsuite/ld-plugin/lto-7b.c
? ld/testsuite/ld-plugin/lto-7c.c
? ld/testsuite/ld-plugin/lto-7d.c
? ld/testsuite/ld-plugin/lto-8.out
? ld/testsuite/ld-plugin/lto-8a.c
? ld/testsuite/ld-plugin/lto-8b.c
? ld/testsuite/ld-plugin/lto-9.cc
? ld/testsuite/ld-plugin/lto-9.d
? ld/testsuite/ld-plugin/lto.exp
? ld/testsuite/ld-plugin/pr12365a.c
? ld/testsuite/ld-plugin/pr12365b.c
? ld/testsuite/ld-plugin/pr12365c.c
Index: ld/pe-dll.c
===================================================================
RCS file: /cvs/src/src/ld/pe-dll.c,v
retrieving revision 1.138
diff -p -u -r1.138 pe-dll.c
--- ld/pe-dll.c	16 Sep 2011 01:15:19 -0000	1.138
+++ ld/pe-dll.c	11 Oct 2011 01:58:46 -0000
@@ -1395,6 +1395,15 @@ generate_reloc (bfd *abfd, struct bfd_li
 		      else if (!blhe || blhe->type != bfd_link_hash_defined)
 			continue;
 		    }
+		  /* Nor for Dwarf FDE references to discarded sections.  */
+		  else if (bfd_is_abs_section (sym->section->output_section))
+		    {
+		      /* We only ignore relocs from .eh_frame sections, as
+			 they are discarded by the final link rather than
+			 resolved against the kept section.  */
+		      if (!strcmp (s->name, ".eh_frame"))
+			continue;
+		    }
 
 		  reloc_data[total_relocs].vma = sec_vma + relocs[i]->address;
 

Re: Release 2.22: branch created

[Eric Botcazou]

> The branch is open to fix regressions/bugs, do not hesitate to ask before
> committing on the branch.

An annoying bug has been identified on the SPARC (PR 13301), whose fix is very 
likely trivial, so it would be nice if it could make it into the release.

-- 
Eric Botcazou

Re: Release 2.22: branch created

[David Miller]

From: Eric Botcazou <ebotcazou@adacore.com>
Date: Sun, 16 Oct 2011 16:44:22 +0200

>> The branch is open to fix regressions/bugs, do not hesitate to ask before
>> committing on the branch.
> 
> An annoying bug has been identified on the SPARC (PR 13301), whose fix is very 
> likely trivial, so it would be nice if it could make it into the release.

I'll take a look at this soon, thanks Eric.

Re: Release 2.22: branch created

[David Miller]

From: Eric Botcazou <ebotcazou@adacore.com>
Date: Sun, 16 Oct 2011 16:44:22 +0200

>> The branch is open to fix regressions/bugs, do not hesitate to ask before
>> committing on the branch.
> 
> An annoying bug has been identified on the SPARC (PR 13301), whose fix is very 
> likely trivial, so it would be nice if it could make it into the release.

Eric, could you please test this patch?  GOLD had the same exact bug so I fixed
it there too.

bfd/

	PR binutils/13301
	* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Always move the
	__tls_get_addr call delay slot instruction forward 4 bytes when
	performing relaxation.

gold/

	PR binutils/13301
	* sparc.cc (Target_sparc::Relocate::relocate_tls): Always move the
	__tls_get_addr call delay slot instruction forward 4 bytes when
	performing relaxation.

ld/testsuite/

	* ld-sparc/tlssunbin32.dd: Update for TLS call relaxation fix
	for PR 13301.
	* ld-sparc/tlssunbin64.dd: Likewise.
	* ld-sparc/tlssunpic32.dd: Likewise.
	* ld-sparc/tlssunpic64.dd: Likewise.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 13242ba..0890fb9 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,10 @@
+2011-10-16  David S. Miller  <davem@davemloft.net>
+
+	PR binutils/13301
+	* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Always move the
+	__tls_get_addr call delay slot instruction forward 4 bytes when
+	performing relaxation.
+
 2011-10-14  Hans-Peter Nilsson  <hp@axis.com>
 
 	* elf32-cris.c (cris_elf_gc_sweep_hook) <R_CRIS_16_GOTPLT>
diff --git a/bfd/elfxx-sparc.c b/bfd/elfxx-sparc.c
index 438b7f5..747c924 100644
--- a/bfd/elfxx-sparc.c
+++ b/bfd/elfxx-sparc.c
@@ -3711,7 +3711,15 @@ _bfd_sparc_elf_relocate_section (bfd *output_bfd,
 		  continue;
 		}
 
-	      bfd_put_32 (output_bfd, 0x9001c008, contents + rel->r_offset);
+	      /* We cannot just overwrite the delay slot instruction,
+		 as it might be what puts the %o0 argument to
+		 __tls_get_addr into place.  So we have to transpose
+		 the delay slot with the add we patch in.  */
+	      insn = bfd_get_32 (input_bfd, contents + rel->r_offset + 4);
+	      bfd_put_32 (output_bfd, insn,
+			  contents + rel->r_offset);
+	      bfd_put_32 (output_bfd, 0x9001c008,
+			  contents + rel->r_offset + 4);
 	      continue;
 	    }
 
diff --git a/gold/ChangeLog b/gold/ChangeLog
index e6e8a9b..f2aea4b 100644
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,3 +1,10 @@
+2011-10-16  David S. Miller  <davem@davemloft.net>
+
+	PR binutils/13301
+	* sparc.cc (Target_sparc::Relocate::relocate_tls): Always move the
+	__tls_get_addr call delay slot instruction forward 4 bytes when
+	performing relaxation.
+
 2011-10-12  Cary Coutant  <ccoutant@google.com>
 
 	* gold/output.cc (Output_file::open_base_file): Handle case where
diff --git a/gold/sparc.cc b/gold/sparc.cc
index 1d2cbad..a28df7e 100644
--- a/gold/sparc.cc
+++ b/gold/sparc.cc
@@ -3101,7 +3101,14 @@ Target_sparc<size, big_endian>::Relocate::relocate_tls(
 		      wv += 1;
 		      this->ignore_gd_add_ = true;
 		    }
-
+		  else
+		    {
+		      // Even if the delay slot isn't the TLS_GD_ADD
+		      // instruction, we still have to handle the case
+		      // where it sets up %o0 in some other way.
+		      elfcpp::Swap<32, true>::writeval(wv, val);
+		      wv += 1;
+		    }
 		  // call __tls_get_addr --> add %g7, %o0, %o0
 		  elfcpp::Swap<32, true>::writeval(wv, 0x9001c008);
 		  break;
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 69df1ad..a4f79ae 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2011-10-16  David S. Miller  <davem@davemloft.net>
+
+	* ld-sparc/tlssunbin32.dd: Update for TLS call relaxation fix
+	for PR 13301.
+	* ld-sparc/tlssunbin64.dd: Likewise.
+	* ld-sparc/tlssunpic32.dd: Likewise.
+	* ld-sparc/tlssunpic64.dd: Likewise.
+
 2011-10-14  Hans-Peter Nilsson  <hp@axis.com>
 
 	* ld-cris/pic-gc-72.d: Adjust for dropping unused undefined
diff --git a/ld/testsuite/ld-sparc/tlssunbin32.dd b/ld/testsuite/ld-sparc/tlssunbin32.dd
index 37c1d04..c31d190 100644
--- a/ld/testsuite/ld-sparc/tlssunbin32.dd
+++ b/ld/testsuite/ld-sparc/tlssunbin32.dd
@@ -27,8 +27,8 @@ Disassembly of section .text:
  +11034:	01 00 00 00 	nop *
  +11038:	d0 05 c0 12 	ld  \[ %l7 \+ %l2 \], %o0
  +1103c:	01 00 00 00 	nop *
- +11040:	90 01 c0 08 	add  %g7, %o0, %o0
- +11044:	01 00 00 00 	nop *
+ +11040:	01 00 00 00 	nop *
+ +11044:	90 01 c0 08 	add  %g7, %o0, %o0
  +11048:	01 00 00 00 	nop *
  +1104c:	01 00 00 00 	nop *
  +11050:	01 00 00 00 	nop *
@@ -36,8 +36,8 @@ Disassembly of section .text:
  +11058:	11 00 00 00 	sethi  %hi\(0\), %o0
  +1105c:	92 02 20 08 	add  %o0, 8, %o1	! 8 <.*>
  +11060:	d0 05 c0 09 	ld  \[ %l7 \+ %o1 \], %o0
- +11064:	90 01 c0 08 	add  %g7, %o0, %o0
- +11068:	01 00 00 00 	nop *
+ +11064:	01 00 00 00 	nop *
+ +11068:	90 01 c0 08 	add  %g7, %o0, %o0
  +1106c:	01 00 00 00 	nop *
  +11070:	01 00 00 00 	nop *
  +11074:	01 00 00 00 	nop *
diff --git a/ld/testsuite/ld-sparc/tlssunbin64.dd b/ld/testsuite/ld-sparc/tlssunbin64.dd
index 0585ae6..cd7db1c 100644
--- a/ld/testsuite/ld-sparc/tlssunbin64.dd
+++ b/ld/testsuite/ld-sparc/tlssunbin64.dd
@@ -27,8 +27,8 @@ Disassembly of section .text:
  +101034:	01 00 00 00 	nop *
  +101038:	d0 5d c0 12 	ldx  \[ %l7 \+ %l2 \], %o0
  +10103c:	01 00 00 00 	nop *
- +101040:	90 01 c0 08 	add  %g7, %o0, %o0
- +101044:	01 00 00 00 	nop *
+ +101040:	01 00 00 00 	nop *
+ +101044:	90 01 c0 08 	add  %g7, %o0, %o0
  +101048:	01 00 00 00 	nop *
  +10104c:	01 00 00 00 	nop *
  +101050:	01 00 00 00 	nop *
@@ -36,8 +36,8 @@ Disassembly of section .text:
  +101058:	11 00 00 00 	sethi  %hi\(0\), %o0
  +10105c:	92 02 20 10 	add  %o0, 0x10, %o1	! 10 <.*>
  +101060:	d0 5d c0 09 	ldx  \[ %l7 \+ %o1 \], %o0
- +101064:	90 01 c0 08 	add  %g7, %o0, %o0
- +101068:	01 00 00 00 	nop *
+ +101064:	01 00 00 00 	nop *
+ +101068:	90 01 c0 08 	add  %g7, %o0, %o0
  +10106c:	01 00 00 00 	nop *
  +101070:	01 00 00 00 	nop *
  +101074:	01 00 00 00 	nop *
diff --git a/ld/testsuite/ld-sparc/tlssunpic32.dd b/ld/testsuite/ld-sparc/tlssunpic32.dd
index c34d514..5589771 100644
--- a/ld/testsuite/ld-sparc/tlssunpic32.dd
+++ b/ld/testsuite/ld-sparc/tlssunpic32.dd
@@ -37,8 +37,8 @@ Disassembly of section .text:
  +1058:	11 00 00 00 	sethi  %hi\(0\), %o0
  +105c:	92 02 20 3c 	add  %o0, 0x3c, %o1	! 3c <.*>
  +1060:	d0 05 c0 09 	ld  \[ %l7 \+ %o1 \], %o0
- +1064:	90 01 c0 08 	add  %g7, %o0, %o0
- +1068:	01 00 00 00 	nop *
+ +1064:	01 00 00 00 	nop *
+ +1068:	90 01 c0 08 	add  %g7, %o0, %o0
  +106c:	01 00 00 00 	nop *
  +1070:	01 00 00 00 	nop *
  +1074:	01 00 00 00 	nop *
@@ -55,8 +55,8 @@ Disassembly of section .text:
  +10a0:	11 00 00 00 	sethi  %hi\(0\), %o0
  +10a4:	90 02 20 0c 	add  %o0, 0xc, %o0	! c <.*>
  +10a8:	d0 05 c0 08 	ld  \[ %l7 \+ %o0 \], %o0
- +10ac:	90 01 c0 08 	add  %g7, %o0, %o0
- +10b0:	01 00 00 00 	nop *
+ +10ac:	01 00 00 00 	nop *
+ +10b0:	90 01 c0 08 	add  %g7, %o0, %o0
  +10b4:	01 00 00 00 	nop *
  +10b8:	01 00 00 00 	nop *
  +10bc:	01 00 00 00 	nop *
@@ -73,8 +73,8 @@ Disassembly of section .text:
  +10e8:	11 00 00 00 	sethi  %hi\(0\), %o0
  +10ec:	90 02 20 48 	add  %o0, 0x48, %o0	! 48 <.*>
  +10f0:	d0 05 c0 08 	ld  \[ %l7 \+ %o0 \], %o0
- +10f4:	90 01 c0 08 	add  %g7, %o0, %o0
- +10f8:	01 00 00 00 	nop *
+ +10f4:	01 00 00 00 	nop *
+ +10f8:	90 01 c0 08 	add  %g7, %o0, %o0
  +10fc:	01 00 00 00 	nop *
  +1100:	01 00 00 00 	nop *
  +1104:	01 00 00 00 	nop *
@@ -91,8 +91,8 @@ Disassembly of section .text:
  +1130:	11 00 00 00 	sethi  %hi\(0\), %o0
  +1134:	90 02 20 24 	add  %o0, 0x24, %o0	! 24 <.*>
  +1138:	d0 05 c0 08 	ld  \[ %l7 \+ %o0 \], %o0
- +113c:	90 01 c0 08 	add  %g7, %o0, %o0
- +1140:	01 00 00 00 	nop *
+ +113c:	01 00 00 00 	nop *
+ +1140:	90 01 c0 08 	add  %g7, %o0, %o0
  +1144:	01 00 00 00 	nop *
  +1148:	01 00 00 00 	nop *
  +114c:	01 00 00 00 	nop *
diff --git a/ld/testsuite/ld-sparc/tlssunpic64.dd b/ld/testsuite/ld-sparc/tlssunpic64.dd
index 0b41b68..5e94858 100644
--- a/ld/testsuite/ld-sparc/tlssunpic64.dd
+++ b/ld/testsuite/ld-sparc/tlssunpic64.dd
@@ -37,8 +37,8 @@ Disassembly of section .text:
  +1058:	11 00 00 00 	sethi  %hi\(0\), %o0
  +105c:	92 02 20 78 	add  %o0, 0x78, %o1	! 78 <.*>
  +1060:	d0 5d c0 09 	ldx  \[ %l7 \+ %o1 \], %o0
- +1064:	90 01 c0 08 	add  %g7, %o0, %o0
- +1068:	01 00 00 00 	nop *
+ +1064:	01 00 00 00 	nop *
+ +1068:	90 01 c0 08 	add  %g7, %o0, %o0
  +106c:	01 00 00 00 	nop *
  +1070:	01 00 00 00 	nop *
  +1074:	01 00 00 00 	nop *
@@ -55,8 +55,8 @@ Disassembly of section .text:
  +10a0:	11 00 00 00 	sethi  %hi\(0\), %o0
  +10a4:	90 02 20 18 	add  %o0, 0x18, %o0	! 18 <.*>
  +10a8:	d0 5d c0 08 	ldx  \[ %l7 \+ %o0 \], %o0
- +10ac:	90 01 c0 08 	add  %g7, %o0, %o0
- +10b0:	01 00 00 00 	nop *
+ +10ac:	01 00 00 00 	nop *
+ +10b0:	90 01 c0 08 	add  %g7, %o0, %o0
  +10b4:	01 00 00 00 	nop *
  +10b8:	01 00 00 00 	nop *
  +10bc:	01 00 00 00 	nop *
@@ -73,8 +73,8 @@ Disassembly of section .text:
  +10e8:	11 00 00 00 	sethi  %hi\(0\), %o0
  +10ec:	90 02 20 90 	add  %o0, 0x90, %o0	! 90 <.*>
  +10f0:	d0 5d c0 08 	ldx  \[ %l7 \+ %o0 \], %o0
- +10f4:	90 01 c0 08 	add  %g7, %o0, %o0
- +10f8:	01 00 00 00 	nop *
+ +10f4:	01 00 00 00 	nop *
+ +10f8:	90 01 c0 08 	add  %g7, %o0, %o0
  +10fc:	01 00 00 00 	nop *
  +1100:	01 00 00 00 	nop *
  +1104:	01 00 00 00 	nop *
@@ -91,8 +91,8 @@ Disassembly of section .text:
  +1130:	11 00 00 00 	sethi  %hi\(0\), %o0
  +1134:	90 02 20 48 	add  %o0, 0x48, %o0	! 48 <.*>
  +1138:	d0 5d c0 08 	ldx  \[ %l7 \+ %o0 \], %o0
- +113c:	90 01 c0 08 	add  %g7, %o0, %o0
- +1140:	01 00 00 00 	nop *
+ +113c:	01 00 00 00 	nop *
+ +1140:	90 01 c0 08 	add  %g7, %o0, %o0
  +1144:	01 00 00 00 	nop *
  +1148:	01 00 00 00 	nop *
  +114c:	01 00 00 00 	nop *

Re: Release 2.22: branch create

[Eric Botcazou]

> Eric, could you please test this patch?  GOLD had the same exact bug so I
> fixed it there too.
>
> bfd/
>
> 	PR binutils/13301
> 	* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Always move the
> 	__tls_get_addr call delay slot instruction forward 4 bytes when
> 	performing relaxation.

Not sufficient it seems, you also need to move the potential relocation of the 
insn in the delay slot.  The example I have is:

   0x00014188 <+232>:   add  %g7, %o0, %o0
   0x0001418c <+236>:   sethi  %hi(0), %l0
   0x00014190 <+240>:   ld  [ %o0 ], %g1

before the change and:

   0x00014188 <+232>:   sethi  %hi(0), %l0
   0x0001418c <+236>:   add  %g0, %g0, %o0
   0x00014190 <+240>:   ld  [ %o0 ], %g1

after, because of a R_SPARC_TLS_GD_HI22 relocation attached to the insn.

-- 
Eric Botcazou

Re: Release 2.22: branch create

[David Miller]

From: Eric Botcazou <ebotcazou@adacore.com>
Date: Mon, 17 Oct 2011 11:29:18 +0200

>> Eric, could you please test this patch?  GOLD had the same exact bug so I
>> fixed it there too.
>>
>> bfd/
>>
>> 	PR binutils/13301
>> 	* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Always move the
>> 	__tls_get_addr call delay slot instruction forward 4 bytes when
>> 	performing relaxation.
> 
> Not sufficient it seems, you also need to move the potential relocation of the 
> insn in the delay slot.  The example I have is:
> 
>    0x00014188 <+232>:   add  %g7, %o0, %o0
>    0x0001418c <+236>:   sethi  %hi(0), %l0
>    0x00014190 <+240>:   ld  [ %o0 ], %g1
> 
> before the change and:
> 
>    0x00014188 <+232>:   sethi  %hi(0), %l0
>    0x0001418c <+236>:   add  %g0, %g0, %o0
>    0x00014190 <+240>:   ld  [ %o0 ], %g1
> 
> after, because of a R_SPARC_TLS_GD_HI22 relocation attached to the insn.

Thanks for testing Eric, I'll fix this up.

Re: Release 2.22: branch create

[David Miller]

From: Eric Botcazou <ebotcazou@adacore.com>
Date: Mon, 17 Oct 2011 11:29:18 +0200

> Not sufficient it seems, you also need to move the potential relocation of the 
> insn in the delay slot.  The example I have is:
> 
>    0x00014188 <+232>:   add  %g7, %o0, %o0
>    0x0001418c <+236>:   sethi  %hi(0), %l0
>    0x00014190 <+240>:   ld  [ %o0 ], %g1
> 
> before the change and:
> 
>    0x00014188 <+232>:   sethi  %hi(0), %l0
>    0x0001418c <+236>:   add  %g0, %g0, %o0
>    0x00014190 <+240>:   ld  [ %o0 ], %g1
> 
> after, because of a R_SPARC_TLS_GD_HI22 relocation attached to the insn.

Sorry for taking so long, here is something that should work better.

bfd/

	PR binutils/13301
	* elfxx-sparc.c (sparc_elf_find_reloc_at_ofs): New function.
	(_bfd_sparc_elf_relocate_section): Always move the __tls_get_addr
	call delay slot instruction forward 4 bytes when performing
	relaxation.

gold/

	PR binutils/13301
	* sparc.cc (Target_sparc::Relocate::reloc_adjust_addr_): New
	member to track relocation locations that have moved during TLS
	reloc optimizations.
	(Target_sparc::Relocate::Relocate): Initialize to NULL.
	(Target_sparc::Relocate::relocate): Adjust view down by 4
	bytes if it matches reloc_adjust_addr_.
	(Target_sparc::Relocate::relocate_tls): Always move the
	__tls_get_addr call delay slot instruction forward 4 bytes when
	performing relaxation.

ld/testsuite/

	* ld-sparc/tlssunbin32.dd: Update for TLS call relaxation fix
	for PR 13301.
	* ld-sparc/tlssunbin64.dd: Likewise.
	* ld-sparc/tlssunpic32.dd: Likewise.
	* ld-sparc/tlssunpic64.dd: Likewise.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 13242ba..3e6b908 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,11 @@
+2011-10-16  David S. Miller  <davem@davemloft.net>
+
+	PR binutils/13301
+	* elfxx-sparc.c (sparc_elf_find_reloc_at_ofs): New function.
+	(_bfd_sparc_elf_relocate_section): Always move the __tls_get_addr
+	call delay slot instruction forward 4 bytes when performing
+	relaxation.
+
 2011-10-14  Hans-Peter Nilsson  <hp@axis.com>
 
 	* elf32-cris.c (cris_elf_gc_sweep_hook) <R_CRIS_16_GOTPLT>
diff --git a/bfd/elfxx-sparc.c b/bfd/elfxx-sparc.c
index 438b7f5..9a15124 100644
--- a/bfd/elfxx-sparc.c
+++ b/bfd/elfxx-sparc.c
@@ -1830,6 +1830,20 @@ _bfd_sparc_elf_gc_mark_hook (asection *sec,
   return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
 }
 
+static Elf_Internal_Rela *
+sparc_elf_find_reloc_at_ofs (Elf_Internal_Rela *rel,
+			     Elf_Internal_Rela *relend,
+			     bfd_vma offset)
+{
+  while (rel < relend)
+    {
+      if (rel->r_offset == offset)
+	return rel;
+      rel++;
+    }
+  return NULL;
+}
+
 /* Update the got entry reference counts for the section being removed.  */
 bfd_boolean
 _bfd_sparc_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info,
@@ -3676,6 +3690,7 @@ _bfd_sparc_elf_relocate_section (bfd *output_bfd,
 	  if (! info->shared
 	      || (r_type == R_SPARC_TLS_GD_CALL && tls_type == GOT_TLS_IE))
 	    {
+	      Elf_Internal_Rela *rel2;
 	      bfd_vma insn;
 
 	      if (!info->shared && (h == NULL || h->dynindx == -1))
@@ -3711,7 +3726,26 @@ _bfd_sparc_elf_relocate_section (bfd *output_bfd,
 		  continue;
 		}
 
-	      bfd_put_32 (output_bfd, 0x9001c008, contents + rel->r_offset);
+	      /* We cannot just overwrite the delay slot instruction,
+		 as it might be what puts the %o0 argument to
+		 __tls_get_addr into place.  So we have to transpose
+		 the delay slot with the add we patch in.  */
+	      insn = bfd_get_32 (input_bfd, contents + rel->r_offset + 4);
+	      bfd_put_32 (output_bfd, insn,
+			  contents + rel->r_offset);
+	      bfd_put_32 (output_bfd, 0x9001c008,
+			  contents + rel->r_offset + 4);
+
+	      rel2 = rel;
+	      while ((rel2 = sparc_elf_find_reloc_at_ofs (rel2 + 1, relend,
+							  rel->r_offset + 4))
+		     != NULL)
+		{
+		  /* If the instruction we moved has a relocation attached to
+		     it, adjust the offset so that it will apply to the correct
+		     instruction.  */
+		  rel2->r_offset -= 4;
+		}
 	      continue;
 	    }
 
diff --git a/gold/ChangeLog b/gold/ChangeLog
index e6e8a9b..fffd22c 100644
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,3 +1,16 @@
+2011-10-16  David S. Miller  <davem@davemloft.net>
+
+	PR binutils/13301
+	* sparc.cc (Target_sparc::Relocate::reloc_adjust_addr_): New
+	member to track relocation locations that have moved during TLS
+	reloc optimizations.
+	(Target_sparc::Relocate::Relocate): Initialize to NULL.
+	(Target_sparc::Relocate::relocate): Adjust view down by 4
+	bytes if it matches reloc_adjust_addr_.
+	(Target_sparc::Relocate::relocate_tls): Always move the
+	__tls_get_addr call delay slot instruction forward 4 bytes when
+	performing relaxation.
+
 2011-10-12  Cary Coutant  <ccoutant@google.com>
 
 	* gold/output.cc (Output_file::open_base_file): Handle case where
diff --git a/gold/sparc.cc b/gold/sparc.cc
index 1d2cbad..12e1dee 100644
--- a/gold/sparc.cc
+++ b/gold/sparc.cc
@@ -265,7 +265,7 @@ class Target_sparc : public Sized_target<size, big_endian>
   {
    public:
     Relocate()
-      : ignore_gd_add_(false)
+      : ignore_gd_add_(false), reloc_adjust_addr_(NULL)
     { }
 
     ~Relocate()
@@ -302,6 +302,9 @@ class Target_sparc : public Sized_target<size, big_endian>
 
     // Ignore the next relocation which should be R_SPARC_TLS_GD_ADD
     bool ignore_gd_add_;
+
+    // If we hit a reloc at this view address, adjust it back by 4 bytes.
+    unsigned char *reloc_adjust_addr_;
   };
 
   // A class which returns the size required for a relocation type,
@@ -2622,6 +2625,8 @@ Target_sparc<size, big_endian>::Relocate::relocate(
 	  return false;
 	}
     }
+  if (this->reloc_adjust_addr_ == view)
+    view -= 4;
 
   typedef Sparc_relocate_functions<size, big_endian> Reloc;
 
@@ -3101,7 +3106,15 @@ Target_sparc<size, big_endian>::Relocate::relocate_tls(
 		      wv += 1;
 		      this->ignore_gd_add_ = true;
 		    }
-
+		  else
+		    {
+		      // Even if the delay slot isn't the TLS_GD_ADD
+		      // instruction, we still have to handle the case
+		      // where it sets up %o0 in some other way.
+		      elfcpp::Swap<32, true>::writeval(wv, val);
+		      wv += 1;
+		      this->reloc_adjust_addr_ = view + 4;
+		    }
 		  // call __tls_get_addr --> add %g7, %o0, %o0
 		  elfcpp::Swap<32, true>::writeval(wv, 0x9001c008);
 		  break;
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 69df1ad..a4f79ae 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2011-10-16  David S. Miller  <davem@davemloft.net>
+
+	* ld-sparc/tlssunbin32.dd: Update for TLS call relaxation fix
+	for PR 13301.
+	* ld-sparc/tlssunbin64.dd: Likewise.
+	* ld-sparc/tlssunpic32.dd: Likewise.
+	* ld-sparc/tlssunpic64.dd: Likewise.
+
 2011-10-14  Hans-Peter Nilsson  <hp@axis.com>
 
 	* ld-cris/pic-gc-72.d: Adjust for dropping unused undefined
diff --git a/ld/testsuite/ld-sparc/tlssunbin32.dd b/ld/testsuite/ld-sparc/tlssunbin32.dd
index 37c1d04..c31d190 100644
--- a/ld/testsuite/ld-sparc/tlssunbin32.dd
+++ b/ld/testsuite/ld-sparc/tlssunbin32.dd
@@ -27,8 +27,8 @@ Disassembly of section .text:
  +11034:	01 00 00 00 	nop *
  +11038:	d0 05 c0 12 	ld  \[ %l7 \+ %l2 \], %o0
  +1103c:	01 00 00 00 	nop *
- +11040:	90 01 c0 08 	add  %g7, %o0, %o0
- +11044:	01 00 00 00 	nop *
+ +11040:	01 00 00 00 	nop *
+ +11044:	90 01 c0 08 	add  %g7, %o0, %o0
  +11048:	01 00 00 00 	nop *
  +1104c:	01 00 00 00 	nop *
  +11050:	01 00 00 00 	nop *
@@ -36,8 +36,8 @@ Disassembly of section .text:
  +11058:	11 00 00 00 	sethi  %hi\(0\), %o0
  +1105c:	92 02 20 08 	add  %o0, 8, %o1	! 8 <.*>
  +11060:	d0 05 c0 09 	ld  \[ %l7 \+ %o1 \], %o0
- +11064:	90 01 c0 08 	add  %g7, %o0, %o0
- +11068:	01 00 00 00 	nop *
+ +11064:	01 00 00 00 	nop *
+ +11068:	90 01 c0 08 	add  %g7, %o0, %o0
  +1106c:	01 00 00 00 	nop *
  +11070:	01 00 00 00 	nop *
  +11074:	01 00 00 00 	nop *
diff --git a/ld/testsuite/ld-sparc/tlssunbin64.dd b/ld/testsuite/ld-sparc/tlssunbin64.dd
index 0585ae6..cd7db1c 100644
--- a/ld/testsuite/ld-sparc/tlssunbin64.dd
+++ b/ld/testsuite/ld-sparc/tlssunbin64.dd
@@ -27,8 +27,8 @@ Disassembly of section .text:
  +101034:	01 00 00 00 	nop *
  +101038:	d0 5d c0 12 	ldx  \[ %l7 \+ %l2 \], %o0
  +10103c:	01 00 00 00 	nop *
- +101040:	90 01 c0 08 	add  %g7, %o0, %o0
- +101044:	01 00 00 00 	nop *
+ +101040:	01 00 00 00 	nop *
+ +101044:	90 01 c0 08 	add  %g7, %o0, %o0
  +101048:	01 00 00 00 	nop *
  +10104c:	01 00 00 00 	nop *
  +101050:	01 00 00 00 	nop *
@@ -36,8 +36,8 @@ Disassembly of section .text:
  +101058:	11 00 00 00 	sethi  %hi\(0\), %o0
  +10105c:	92 02 20 10 	add  %o0, 0x10, %o1	! 10 <.*>
  +101060:	d0 5d c0 09 	ldx  \[ %l7 \+ %o1 \], %o0
- +101064:	90 01 c0 08 	add  %g7, %o0, %o0
- +101068:	01 00 00 00 	nop *
+ +101064:	01 00 00 00 	nop *
+ +101068:	90 01 c0 08 	add  %g7, %o0, %o0
  +10106c:	01 00 00 00 	nop *
  +101070:	01 00 00 00 	nop *
  +101074:	01 00 00 00 	nop *
diff --git a/ld/testsuite/ld-sparc/tlssunpic32.dd b/ld/testsuite/ld-sparc/tlssunpic32.dd
index c34d514..5589771 100644
--- a/ld/testsuite/ld-sparc/tlssunpic32.dd
+++ b/ld/testsuite/ld-sparc/tlssunpic32.dd
@@ -37,8 +37,8 @@ Disassembly of section .text:
  +1058:	11 00 00 00 	sethi  %hi\(0\), %o0
  +105c:	92 02 20 3c 	add  %o0, 0x3c, %o1	! 3c <.*>
  +1060:	d0 05 c0 09 	ld  \[ %l7 \+ %o1 \], %o0
- +1064:	90 01 c0 08 	add  %g7, %o0, %o0
- +1068:	01 00 00 00 	nop *
+ +1064:	01 00 00 00 	nop *
+ +1068:	90 01 c0 08 	add  %g7, %o0, %o0
  +106c:	01 00 00 00 	nop *
  +1070:	01 00 00 00 	nop *
  +1074:	01 00 00 00 	nop *
@@ -55,8 +55,8 @@ Disassembly of section .text:
  +10a0:	11 00 00 00 	sethi  %hi\(0\), %o0
  +10a4:	90 02 20 0c 	add  %o0, 0xc, %o0	! c <.*>
  +10a8:	d0 05 c0 08 	ld  \[ %l7 \+ %o0 \], %o0
- +10ac:	90 01 c0 08 	add  %g7, %o0, %o0
- +10b0:	01 00 00 00 	nop *
+ +10ac:	01 00 00 00 	nop *
+ +10b0:	90 01 c0 08 	add  %g7, %o0, %o0
  +10b4:	01 00 00 00 	nop *
  +10b8:	01 00 00 00 	nop *
  +10bc:	01 00 00 00 	nop *
@@ -73,8 +73,8 @@ Disassembly of section .text:
  +10e8:	11 00 00 00 	sethi  %hi\(0\), %o0
  +10ec:	90 02 20 48 	add  %o0, 0x48, %o0	! 48 <.*>
  +10f0:	d0 05 c0 08 	ld  \[ %l7 \+ %o0 \], %o0
- +10f4:	90 01 c0 08 	add  %g7, %o0, %o0
- +10f8:	01 00 00 00 	nop *
+ +10f4:	01 00 00 00 	nop *
+ +10f8:	90 01 c0 08 	add  %g7, %o0, %o0
  +10fc:	01 00 00 00 	nop *
  +1100:	01 00 00 00 	nop *
  +1104:	01 00 00 00 	nop *
@@ -91,8 +91,8 @@ Disassembly of section .text:
  +1130:	11 00 00 00 	sethi  %hi\(0\), %o0
  +1134:	90 02 20 24 	add  %o0, 0x24, %o0	! 24 <.*>
  +1138:	d0 05 c0 08 	ld  \[ %l7 \+ %o0 \], %o0
- +113c:	90 01 c0 08 	add  %g7, %o0, %o0
- +1140:	01 00 00 00 	nop *
+ +113c:	01 00 00 00 	nop *
+ +1140:	90 01 c0 08 	add  %g7, %o0, %o0
  +1144:	01 00 00 00 	nop *
  +1148:	01 00 00 00 	nop *
  +114c:	01 00 00 00 	nop *
diff --git a/ld/testsuite/ld-sparc/tlssunpic64.dd b/ld/testsuite/ld-sparc/tlssunpic64.dd
index 0b41b68..5e94858 100644
--- a/ld/testsuite/ld-sparc/tlssunpic64.dd
+++ b/ld/testsuite/ld-sparc/tlssunpic64.dd
@@ -37,8 +37,8 @@ Disassembly of section .text:
  +1058:	11 00 00 00 	sethi  %hi\(0\), %o0
  +105c:	92 02 20 78 	add  %o0, 0x78, %o1	! 78 <.*>
  +1060:	d0 5d c0 09 	ldx  \[ %l7 \+ %o1 \], %o0
- +1064:	90 01 c0 08 	add  %g7, %o0, %o0
- +1068:	01 00 00 00 	nop *
+ +1064:	01 00 00 00 	nop *
+ +1068:	90 01 c0 08 	add  %g7, %o0, %o0
  +106c:	01 00 00 00 	nop *
  +1070:	01 00 00 00 	nop *
  +1074:	01 00 00 00 	nop *
@@ -55,8 +55,8 @@ Disassembly of section .text:
  +10a0:	11 00 00 00 	sethi  %hi\(0\), %o0
  +10a4:	90 02 20 18 	add  %o0, 0x18, %o0	! 18 <.*>
  +10a8:	d0 5d c0 08 	ldx  \[ %l7 \+ %o0 \], %o0
- +10ac:	90 01 c0 08 	add  %g7, %o0, %o0
- +10b0:	01 00 00 00 	nop *
+ +10ac:	01 00 00 00 	nop *
+ +10b0:	90 01 c0 08 	add  %g7, %o0, %o0
  +10b4:	01 00 00 00 	nop *
  +10b8:	01 00 00 00 	nop *
  +10bc:	01 00 00 00 	nop *
@@ -73,8 +73,8 @@ Disassembly of section .text:
  +10e8:	11 00 00 00 	sethi  %hi\(0\), %o0
  +10ec:	90 02 20 90 	add  %o0, 0x90, %o0	! 90 <.*>
  +10f0:	d0 5d c0 08 	ldx  \[ %l7 \+ %o0 \], %o0
- +10f4:	90 01 c0 08 	add  %g7, %o0, %o0
- +10f8:	01 00 00 00 	nop *
+ +10f4:	01 00 00 00 	nop *
+ +10f8:	90 01 c0 08 	add  %g7, %o0, %o0
  +10fc:	01 00 00 00 	nop *
  +1100:	01 00 00 00 	nop *
  +1104:	01 00 00 00 	nop *
@@ -91,8 +91,8 @@ Disassembly of section .text:
  +1130:	11 00 00 00 	sethi  %hi\(0\), %o0
  +1134:	90 02 20 48 	add  %o0, 0x48, %o0	! 48 <.*>
  +1138:	d0 5d c0 08 	ldx  \[ %l7 \+ %o0 \], %o0
- +113c:	90 01 c0 08 	add  %g7, %o0, %o0
- +1140:	01 00 00 00 	nop *
+ +113c:	01 00 00 00 	nop *
+ +1140:	90 01 c0 08 	add  %g7, %o0, %o0
  +1144:	01 00 00 00 	nop *
  +1148:	01 00 00 00 	nop *
  +114c:	01 00 00 00 	nop *

Re: Release 2.22: branch create

[Ian Lance Taylor]

On Tue, Oct 18, 2011 at 1:46 PM, David Miller <davem@davemloft.net> wrote:
>
> gold/
>
>        PR binutils/13301
>        * sparc.cc (Target_sparc::Relocate::reloc_adjust_addr_): New
>        member to track relocation locations that have moved during TLS
>        reloc optimizations.
>        (Target_sparc::Relocate::Relocate): Initialize to NULL.
>        (Target_sparc::Relocate::relocate): Adjust view down by 4
>        bytes if it matches reloc_adjust_addr_.
>        (Target_sparc::Relocate::relocate_tls): Always move the
>        __tls_get_addr call delay slot instruction forward 4 bytes when
>        performing relaxation.

This part of the patch looks fine.

Thanks.

Ian

Re: Release 2.22: branch create

[Eric Botcazou]

> Sorry for taking so long, here is something that should work better.
>
> bfd/
>
> 	PR binutils/13301
> 	* elfxx-sparc.c (sparc_elf_find_reloc_at_ofs): New function.
> 	(_bfd_sparc_elf_relocate_section): Always move the __tls_get_addr
> 	call delay slot instruction forward 4 bytes when performing
> 	relaxation.
>
> gold/
>
> 	PR binutils/13301
> 	* sparc.cc (Target_sparc::Relocate::reloc_adjust_addr_): New
> 	member to track relocation locations that have moved during TLS
> 	reloc optimizations.
> 	(Target_sparc::Relocate::Relocate): Initialize to NULL.
> 	(Target_sparc::Relocate::relocate): Adjust view down by 4
> 	bytes if it matches reloc_adjust_addr_.
> 	(Target_sparc::Relocate::relocate_tls): Always move the
> 	__tls_get_addr call delay slot instruction forward 4 bytes when
> 	performing relaxation.

Yes, the MPFR testsuite is all clean with it:

[tversion] GMP: header 4.2.4, library 4.2.4
[tversion] MPFR tuning parameters from src/sparc64/mparam.h
PASS: tversion
====================
All 160 tests passed
(1 test was not run)

for both linkers.  Thanks for fixing this!

-- 
Eric Botcazou

Re: Release 2.22: branch create

[David Miller]

From: Eric Botcazou <ebotcazou@adacore.com>
Date: Wed, 19 Oct 2011 00:47:46 +0200

> Yes, the MPFR testsuite is all clean with it:
> 
> [tversion] GMP: header 4.2.4, library 4.2.4
> [tversion] MPFR tuning parameters from src/sparc64/mparam.h
> PASS: tversion
> ====================
> All 160 tests passed
> (1 test was not run)
> 
> for both linkers.  Thanks for fixing this!

Thanks for testing, I'll commit the fix in a few moments.

Re: Release 2.22: branch created

[Tristan Gingold]

On Oct 16, 2011, at 4:44 PM, Eric Botcazou wrote:

>> The branch is open to fix regressions/bugs, do not hesitate to ask before
>> committing on the branch.
> 
> An annoying bug has been identified on the SPARC (PR 13301), whose fix is very 
> likely trivial, so it would be nice if it could make it into the release.

Ok.

> 
> -- 
> Eric Botcazou

Release 2.22: Next week ...

[Tristan Gingold]

Hi,

I plan to make the 2.22 release next week.
There are still a few pending back ports: micromips and 'V2 of get symbol linker plugin interface' come to my mind.

As usual, speak up if you think I missed something.

Tristan.

Re: Release 2.22: Next week ...

[Tristan Gingold]

On Nov 9, 2011, at 10:25 AM, Tristan Gingold wrote:

> Hi,
> 
> I plan to make the 2.22 release next week.
> There are still a few pending back ports: micromips and 'V2 of get symbol linker plugin interface' come to my mind.
> 
> As usual, speak up if you think I missed something.

I have run the testsuite for most of the targets.  I think there aren't blocking regressions for a 22.0, although I think it would be nice to clean-up arm-eabi and mips*-* for the 22.1

Tristan.


alpha-linux: OK
arc-elf: OK
arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Long
arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 1
arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 2
arm-linux-gnueabi: OK
avr: OK
bfin-elf: OK
cr16-elf: OK
cris-elf: OK
crx-elf: OK
d10v-elf: OK
d30v-elf: OK
dlx-elf: OK
fr30-elf: OK
frv-elf: OK
h8300-elf: FAIL: Check bad group
h8300-elf: FAIL: difference between forward references
hppa-hp-hpux10: OK
hppa-linux-gnu: FAIL: --gc-sections with __start_
hppa64-hp-hpux11.23: OK
i370-linux: FAIL: -shared --entry foo -u foo archive
i370-linux: FAIL: -shared --entry foo archive
i370-linux: FAIL: Build shared library for next test
i370-linux: FAIL: Weak symbols in dynamic objects 1 (main test)
i370-linux: FAIL: Weak symbols in dynamic objects 1 (support)
i370-linux: FAIL: bad byte directive
i370-linux: FAIL: ld link shared library
i370-linux: FAIL: ld-elf/compress1c
i370-linux: FAIL: ld-elf/dynamic1
i370-linux: FAIL: ld-elf/dynsym1
i370-linux: FAIL: ld-elf/hash
i370-linux: FAIL: ld-elf/local1
i370-linux: FAIL: ld-elf/textaddr1
i370-linux: FAIL: ld-elf/textaddr2
i370-linux: FAIL: ld-elf/textaddr3
i370-linux: FAIL: ld-elf/textaddr4
i370-linux: FAIL: ld-elf/textaddr5
i370-linux: FAIL: ld-elf/textaddr6
i370-linux: FAIL: ld-elf/unknown2
i370-linux: FAIL: read-only .eh_frame section
i370-linux: FAIL: read-only .gcc_except_table section
i686-pc-cygwin: OK
i686-pc-linux-gnu: OK
ia64-linux: OK
ip2k-elf: OK
iq2000-elf: OK
lm32-elf: OK
m32c-elf: OK
m32r-elf: OK
m68hc11-elf: OK
m68k-elf: OK
mcore-elf: OK
mep-elf: OK
microblaze-elf: OK
mingw32-pe: OK
mips-ecoff: FAIL: .set arch=FOO
mips-ecoff: FAIL: Loongson delay slot tests
mips-ecoff: FAIL: Loongson-3A tests
mips-ecoff: FAIL: Loongson-3A tests
mips-ecoff: FAIL: MCU for MIPS32r2 (mips32r2)
mips-ecoff: FAIL: MCU for MIPS32r2 (mips64r2)
mips-ecoff: FAIL: MIPS -mgp32 -mfp32
mips-ecoff: FAIL: MIPS -mgp32 -mfp64
mips-ecoff: FAIL: MIPS -mgp64 -mfp32
mips-ecoff: FAIL: MIPS -mgp64 -mfp64
mips-ecoff: FAIL: MIPS DSP ASE Rev2 for MIPS32
mips-ecoff: FAIL: MIPS DSP ASE for MIPS32
mips-ecoff: FAIL: MIPS DSP ASE for MIPS64
mips-ecoff: FAIL: MIPS MT ASE for MIPS32
mips-ecoff: FAIL: MIPS VR4111
mips-ecoff: FAIL: MIPS VR4120
mips-ecoff: FAIL: MIPS VR4130 workarounds
mips-ecoff: FAIL: MIPS VR5400
mips-ecoff: FAIL: MIPS VR5500
mips-ecoff: FAIL: MIPS align maximum
mips-ecoff: FAIL: MIPS jal mask 1.1 (mips3)
mips-ecoff: FAIL: MIPS jal mask 1.1 (mips4)
mips-ecoff: FAIL: MIPS jal mask 1.1 (mips5)
mips-ecoff: FAIL: MIPS jal mask 1.1 (mips64)
mips-ecoff: FAIL: MIPS jal mask 1.1 (mips64r2)
mips-ecoff: FAIL: MIPS jal mask 1.1 (octeon)
mips-ecoff: FAIL: MIPS jal mask 1.1 (r4000)
mips-ecoff: FAIL: MIPS jal mask 1.1 (sb1)
mips-ecoff: FAIL: MIPS jal mask 1.1 (vr5400)
mips-ecoff: FAIL: MIPS jal mask 1.1 (xlr)
mips-ecoff: FAIL: MIPS jal mask 1.2 (mips3)
mips-ecoff: FAIL: MIPS jal mask 1.2 (mips4)
mips-ecoff: FAIL: MIPS jal mask 1.2 (mips5)
mips-ecoff: FAIL: MIPS jal mask 1.2 (mips64)
mips-ecoff: FAIL: MIPS jal mask 1.2 (mips64r2)
mips-ecoff: FAIL: MIPS jal mask 1.2 (octeon)
mips-ecoff: FAIL: MIPS jal mask 1.2 (r4000)
mips-ecoff: FAIL: MIPS jal mask 1.2 (sb1)
mips-ecoff: FAIL: MIPS jal mask 1.2 (vr5400)
mips-ecoff: FAIL: MIPS jal mask 1.2 (xlr)
mips-ecoff: FAIL: MIPS l.d (mips3)
mips-ecoff: FAIL: MIPS l.d (mips4)
mips-ecoff: FAIL: MIPS l.d (mips5)
mips-ecoff: FAIL: MIPS l.d (mips64)
mips-ecoff: FAIL: MIPS l.d (mips64r2)
mips-ecoff: FAIL: MIPS l.d (octeon)
mips-ecoff: FAIL: MIPS l.d (r4000)
mips-ecoff: FAIL: MIPS l.d (sb1)
mips-ecoff: FAIL: MIPS l.d (vr5400)
mips-ecoff: FAIL: MIPS l.d (xlr)
mips-ecoff: FAIL: MIPS l.d forward (mips3)
mips-ecoff: FAIL: MIPS l.d forward (mips4)
mips-ecoff: FAIL: MIPS l.d forward (mips5)
mips-ecoff: FAIL: MIPS l.d forward (mips64)
mips-ecoff: FAIL: MIPS l.d forward (mips64r2)
mips-ecoff: FAIL: MIPS l.d forward (octeon)
mips-ecoff: FAIL: MIPS l.d forward (r4000)
mips-ecoff: FAIL: MIPS l.d forward (sb1)
mips-ecoff: FAIL: MIPS l.d forward (vr5400)
mips-ecoff: FAIL: MIPS l.d forward (xlr)
mips-ecoff: FAIL: MIPS lb (mips1)
mips-ecoff: FAIL: MIPS lb (r3000)
mips-ecoff: FAIL: MIPS lb (r3900)
mips-ecoff: FAIL: MIPS ld (mips3)
mips-ecoff: FAIL: MIPS ld (mips4)
mips-ecoff: FAIL: MIPS ld (mips5)
mips-ecoff: FAIL: MIPS ld (mips64)
mips-ecoff: FAIL: MIPS ld (mips64r2)
mips-ecoff: FAIL: MIPS ld (octeon)
mips-ecoff: FAIL: MIPS ld (r4000)
mips-ecoff: FAIL: MIPS ld (sb1)
mips-ecoff: FAIL: MIPS ld (vr5400)
mips-ecoff: FAIL: MIPS ld (xlr)
mips-ecoff: FAIL: MIPS ld forward (mips3)
mips-ecoff: FAIL: MIPS ld forward (mips4)
mips-ecoff: FAIL: MIPS ld forward (mips5)
mips-ecoff: FAIL: MIPS ld forward (mips64)
mips-ecoff: FAIL: MIPS ld forward (mips64r2)
mips-ecoff: FAIL: MIPS ld forward (octeon)
mips-ecoff: FAIL: MIPS ld forward (r4000)
mips-ecoff: FAIL: MIPS ld forward (sb1)
mips-ecoff: FAIL: MIPS ld forward (vr5400)
mips-ecoff: FAIL: MIPS ld forward (xlr)
mips-ecoff: FAIL: MIPS ld-st-la (EABI64)
mips-ecoff: FAIL: MIPS ld-st-la bad constants (ABI o32)
mips-ecoff: FAIL: MIPS ld-st-la bad constants (ABI o32, mips3)
mips-ecoff: FAIL: MIPS ld-st-la bad constants (ABI o32, mips3, shared)
mips-ecoff: FAIL: MIPS ld-st-la bad constants (ABI o32, shared)
mips-ecoff: FAIL: MIPS ld-st-la constants (ABI o32)
mips-ecoff: FAIL: MIPS ld-st-la constants (ABI o32, mips3)
mips-ecoff: FAIL: MIPS ld-st-la constants (ABI o32, mips3, shared)
mips-ecoff: FAIL: MIPS ld-st-la constants (ABI o32, shared)
mips-ecoff: FAIL: MIPS ldc1 (mips3)
mips-ecoff: FAIL: MIPS ldc1 (mips4)
mips-ecoff: FAIL: MIPS ldc1 (mips5)
mips-ecoff: FAIL: MIPS ldc1 (mips64)
mips-ecoff: FAIL: MIPS ldc1 (mips64r2)
mips-ecoff: FAIL: MIPS ldc1 (octeon)
mips-ecoff: FAIL: MIPS ldc1 (r4000)
mips-ecoff: FAIL: MIPS ldc1 (sb1)
mips-ecoff: FAIL: MIPS ldc1 (vr5400)
mips-ecoff: FAIL: MIPS ldc1 (xlr)
mips-ecoff: FAIL: MIPS ldc1 forward (mips3)
mips-ecoff: FAIL: MIPS ldc1 forward (mips4)
mips-ecoff: FAIL: MIPS ldc1 forward (mips5)
mips-ecoff: FAIL: MIPS ldc1 forward (mips64)
mips-ecoff: FAIL: MIPS ldc1 forward (mips64r2)
mips-ecoff: FAIL: MIPS ldc1 forward (octeon)
mips-ecoff: FAIL: MIPS ldc1 forward (r4000)
mips-ecoff: FAIL: MIPS ldc1 forward (sb1)
mips-ecoff: FAIL: MIPS ldc1 forward (vr5400)
mips-ecoff: FAIL: MIPS ldc1 forward (xlr)
mips-ecoff: FAIL: MIPS mips32r2-ill-fp64 (mips64r2)
mips-ecoff: FAIL: MIPS mips32r2-ill-fp64 (octeon)
mips-ecoff: FAIL: MIPS octeon instructions (octeon)
mips-ecoff: FAIL: MIPS octeon-pref mfix-cn63xxp1 (octeon)
mips-ecoff: FAIL: MIPS odd float
mips-ecoff: FAIL: MIPS relax (mips2)
mips-ecoff: FAIL: MIPS relax (mips3)
mips-ecoff: FAIL: MIPS relax (mips32)
mips-ecoff: FAIL: MIPS relax (mips32r2)
mips-ecoff: FAIL: MIPS relax (mips4)
mips-ecoff: FAIL: MIPS relax (mips5)
mips-ecoff: FAIL: MIPS relax (mips64)
mips-ecoff: FAIL: MIPS relax (mips64r2)
mips-ecoff: FAIL: MIPS relax (octeon)
mips-ecoff: FAIL: MIPS relax (r4000)
mips-ecoff: FAIL: MIPS relax (sb1)
mips-ecoff: FAIL: MIPS relax (vr5400)
mips-ecoff: FAIL: MIPS relax (xlr)
mips-ecoff: FAIL: MIPS relax with .set at (mips2)
mips-ecoff: FAIL: MIPS relax with .set at (mips3)
mips-ecoff: FAIL: MIPS relax with .set at (mips32)
mips-ecoff: FAIL: MIPS relax with .set at (mips32r2)
mips-ecoff: FAIL: MIPS relax with .set at (mips4)
mips-ecoff: FAIL: MIPS relax with .set at (mips5)
mips-ecoff: FAIL: MIPS relax with .set at (mips64)
mips-ecoff: FAIL: MIPS relax with .set at (mips64r2)
mips-ecoff: FAIL: MIPS relax with .set at (octeon)
mips-ecoff: FAIL: MIPS relax with .set at (r4000)
mips-ecoff: FAIL: MIPS relax with .set at (sb1)
mips-ecoff: FAIL: MIPS relax with .set at (vr5400)
mips-ecoff: FAIL: MIPS relax with .set at (xlr)
mips-ecoff: FAIL: MIPS s.d (mips3)
mips-ecoff: FAIL: MIPS s.d (mips4)
mips-ecoff: FAIL: MIPS s.d (mips5)
mips-ecoff: FAIL: MIPS s.d (mips64)
mips-ecoff: FAIL: MIPS s.d (mips64r2)
mips-ecoff: FAIL: MIPS s.d (octeon)
mips-ecoff: FAIL: MIPS s.d (r4000)
mips-ecoff: FAIL: MIPS s.d (sb1)
mips-ecoff: FAIL: MIPS s.d (vr5400)
mips-ecoff: FAIL: MIPS s.d (xlr)
mips-ecoff: FAIL: MIPS s.d forward (mips3)
mips-ecoff: FAIL: MIPS s.d forward (mips4)
mips-ecoff: FAIL: MIPS s.d forward (mips5)
mips-ecoff: FAIL: MIPS s.d forward (mips64)
mips-ecoff: FAIL: MIPS s.d forward (mips64r2)
mips-ecoff: FAIL: MIPS s.d forward (octeon)
mips-ecoff: FAIL: MIPS s.d forward (r4000)
mips-ecoff: FAIL: MIPS s.d forward (sb1)
mips-ecoff: FAIL: MIPS s.d forward (vr5400)
mips-ecoff: FAIL: MIPS s.d forward (xlr)
mips-ecoff: FAIL: MIPS sd (mips3)
mips-ecoff: FAIL: MIPS sd (mips4)
mips-ecoff: FAIL: MIPS sd (mips5)
mips-ecoff: FAIL: MIPS sd (mips64)
mips-ecoff: FAIL: MIPS sd (mips64r2)
mips-ecoff: FAIL: MIPS sd (octeon)
mips-ecoff: FAIL: MIPS sd (r4000)
mips-ecoff: FAIL: MIPS sd (sb1)
mips-ecoff: FAIL: MIPS sd (vr5400)
mips-ecoff: FAIL: MIPS sd (xlr)
mips-ecoff: FAIL: MIPS sd forward (mips3)
mips-ecoff: FAIL: MIPS sd forward (mips4)
mips-ecoff: FAIL: MIPS sd forward (mips5)
mips-ecoff: FAIL: MIPS sd forward (mips64)
mips-ecoff: FAIL: MIPS sd forward (mips64r2)
mips-ecoff: FAIL: MIPS sd forward (octeon)
mips-ecoff: FAIL: MIPS sd forward (r4000)
mips-ecoff: FAIL: MIPS sd forward (sb1)
mips-ecoff: FAIL: MIPS sd forward (vr5400)
mips-ecoff: FAIL: MIPS sd forward (xlr)
mips-ecoff: FAIL: MIPS sdc1 (mips3)
mips-ecoff: FAIL: MIPS sdc1 (mips4)
mips-ecoff: FAIL: MIPS sdc1 (mips5)
mips-ecoff: FAIL: MIPS sdc1 (mips64)
mips-ecoff: FAIL: MIPS sdc1 (mips64r2)
mips-ecoff: FAIL: MIPS sdc1 (octeon)
mips-ecoff: FAIL: MIPS sdc1 (r4000)
mips-ecoff: FAIL: MIPS sdc1 (sb1)
mips-ecoff: FAIL: MIPS sdc1 (vr5400)
mips-ecoff: FAIL: MIPS sdc1 (xlr)
mips-ecoff: FAIL: MIPS sdc1 forward (mips3)
mips-ecoff: FAIL: MIPS sdc1 forward (mips4)
mips-ecoff: FAIL: MIPS sdc1 forward (mips5)
mips-ecoff: FAIL: MIPS sdc1 forward (mips64)
mips-ecoff: FAIL: MIPS sdc1 forward (mips64r2)
mips-ecoff: FAIL: MIPS sdc1 forward (octeon)
mips-ecoff: FAIL: MIPS sdc1 forward (r4000)
mips-ecoff: FAIL: MIPS sdc1 forward (sb1)
mips-ecoff: FAIL: MIPS sdc1 forward (vr5400)
mips-ecoff: FAIL: MIPS sdc1 forward (xlr)
mips-ecoff: FAIL: MIPS1 branch relaxation with swapping
mips-ecoff: FAIL: MIPS2 branch likely relaxation with swapping
mips-ecoff: FAIL: MIPS2 branch relaxation with swapping
mips-ecoff: FAIL: MIPS32 odd single-precision float registers (mips32)
mips-ecoff: FAIL: MIPS32 odd single-precision float registers (mips32r2)
mips-ecoff: FAIL: MIPS32 odd single-precision float registers (mips64)
mips-ecoff: FAIL: MIPS32 odd single-precision float registers (mips64r2)
mips-ecoff: FAIL: MIPS32 odd single-precision float registers (octeon)
mips-ecoff: FAIL: MIPS32 odd single-precision float registers (sb1)
mips-ecoff: FAIL: MIPS32 odd single-precision float registers (xlr)
mips-ecoff: FAIL: ST Microelectronics Loongson-2E tests
mips-ecoff: FAIL: ST Microelectronics Loongson-2F tests
mips-ecoff: FAIL: ST Microelectronics Loongson-2F workarounds of Jump Instruction issue
mips-ecoff: FAIL: ST Microelectronics Loongson-2F workarounds of nop issue
mips-ecoff: FAIL: SmartMIPS
mips-ecoff: FAIL: assembly line numbers
mips-ecoff: FAIL: gas/mips/align2
mips-ecoff: FAIL: gas/mips/align2-el
mips-ecoff: FAIL: gas/mips/call-nonpic-1
mips-ecoff: FAIL: gas/mips/macro-warn-1
mips-ecoff: FAIL: gas/mips/macro-warn-2
mips-ecoff: FAIL: gas/mips/mips16-vis-1
mips-ecoff: FAIL: gas/mips/pr12915
mips-ecoff: FAIL: gas/mips/reginfo-1a
mips-ecoff: FAIL: gas/mips/reginfo-1b
mips-ecoff: FAIL: gas/mips/vxworks1
mips-ecoff: FAIL: gas/mips/vxworks1-el
mips-ecoff: FAIL: gas/mips/vxworks1-xgot
mips-ecoff: FAIL: gas/mips/vxworks1-xgot-el
mips-ecoff: FAIL: ld-scripts/defined5
mips-ecoff: FAIL: noreorder test
mips-elf: FAIL: --localize-hidden test 1
mips-elf: FAIL: Global calls from mips16
mips-elf: FAIL: MIPS DWARF-2 location information with branch swapping (2) (micromips)
mips-elf: FAIL: MIPS eh-frame 3
mips-elf: FAIL: MIPS eh-frame 4
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-00
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-01
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-02
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-03
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-04
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-05
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-10
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-11
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-12
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-13
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-14
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-15
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-20
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-21
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-22
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-23
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-24
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-25
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-30
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-31
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-32
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-33
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-34
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-35
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-40
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-41
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-42
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-43
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-44
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-45
mips-elf: FAIL: ld-mips-elf/attr-gnu-4-51
mips-linux: FAIL: --gc-sections with __start_
mips-linux: FAIL: MIPS DWARF-2 location information with branch swapping (2) (micromips)
mips64-elf: FAIL: --localize-hidden test 1
mips64-elf: FAIL: Global calls from mips16
mips64-elf: FAIL: MIPS DWARF-2 location information with branch swapping (2) (micromips)
mips64-elf: FAIL: MIPS eh-frame 3
mips64-elf: FAIL: MIPS eh-frame 4
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-00
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-01
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-02
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-03
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-04
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-05
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-10
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-11
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-12
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-13
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-14
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-15
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-20
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-21
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-22
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-23
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-24
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-25
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-30
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-31
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-32
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-33
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-34
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-35
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-40
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-41
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-42
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-43
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-44
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-45
mips64-elf: FAIL: ld-mips-elf/attr-gnu-4-51
mmix: FAIL: gas/mmix/fb-2
mmix: FAIL: ld-mmix/bpo-10
mmix: FAIL: ld-mmix/bpo-11
mmix: FAIL: ld-mmix/bpo-9
mmix: FAIL: ld-mmix/sec-7m
mn10200-elf: FAIL: difference between forward references
mn10300-elf: OK
moxie-elf: OK
msp430-elf: OK
pdp11-dec-aout: OK
pj-elf: OK
powerpc-elf: OK
powerpc64-elf: OK
rs6000-ibm-aix6: OK
rx-elf: FAIL: --set-section-flags test 1 (sections)
rx-elf: FAIL: --sort-section alignment
rx-elf: FAIL: --sort-section name
rx-elf: FAIL: ALIGNOF
rx-elf: FAIL: MEMORY
rx-elf: FAIL: PHDRS
rx-elf: FAIL: SORT_BY_ALIGNMENT
rx-elf: FAIL: SORT_BY_ALIGNMENT(SORT_BY_ALIGNMENT())
rx-elf: FAIL: SORT_BY_ALIGNMENT(SORT_BY_ALIGNMENT()) --sort-section alignment
rx-elf: FAIL: SORT_BY_ALIGNMENT(SORT_BY_ALIGNMENT()) --sort-section name
rx-elf: FAIL: SORT_BY_ALIGNMENT(SORT_BY_NAME())
rx-elf: FAIL: SORT_BY_ALIGNMENT(SORT_BY_NAME()) --sort-section alignment
rx-elf: FAIL: SORT_BY_ALIGNMENT(SORT_BY_NAME()) --sort-section name
rx-elf: FAIL: SORT_BY_NAME(SORT_BY_ALIGNMENT())
rx-elf: FAIL: SORT_BY_NAME(SORT_BY_ALIGNMENT()) --sort-section alignment
rx-elf: FAIL: SORT_BY_NAME(SORT_BY_ALIGNMENT()) --sort-section alignment
rx-elf: FAIL: SORT_BY_NAME(SORT_BY_NAME())
rx-elf: FAIL: SORT_BY_NAME(SORT_BY_NAME()) --sort-section alignment
rx-elf: FAIL: SORT_BY_NAME(SORT_BY_NAME()) --sort-section name
rx-elf: FAIL: align1
rx-elf: FAIL: check sections 2
rx-elf: FAIL: copy with setting section flags 3
rx-elf: FAIL: gas/rx/abs
rx-elf: FAIL: gas/rx/adc
rx-elf: FAIL: gas/rx/add
rx-elf: FAIL: gas/rx/and
rx-elf: FAIL: gas/rx/bclr
rx-elf: FAIL: gas/rx/bcnd
rx-elf: FAIL: gas/rx/bmcnd
rx-elf: FAIL: gas/rx/bnot
rx-elf: FAIL: gas/rx/bra
rx-elf: FAIL: gas/rx/brk
rx-elf: FAIL: gas/rx/bset
rx-elf: FAIL: gas/rx/bsr
rx-elf: FAIL: gas/rx/btst
rx-elf: FAIL: gas/rx/clrpsw
rx-elf: FAIL: gas/rx/cmp
rx-elf: FAIL: gas/rx/dbt
rx-elf: FAIL: gas/rx/div
rx-elf: FAIL: gas/rx/divu
rx-elf: FAIL: gas/rx/emul
rx-elf: FAIL: gas/rx/emulu
rx-elf: FAIL: gas/rx/fadd
rx-elf: FAIL: gas/rx/fcmp
rx-elf: FAIL: gas/rx/fdiv
rx-elf: FAIL: gas/rx/fmul
rx-elf: FAIL: gas/rx/fsub
rx-elf: FAIL: gas/rx/ftoi
rx-elf: FAIL: gas/rx/gprel
rx-elf: FAIL: gas/rx/int
rx-elf: FAIL: gas/rx/itof
rx-elf: FAIL: gas/rx/jmp
rx-elf: FAIL: gas/rx/jsr
rx-elf: FAIL: gas/rx/machi
rx-elf: FAIL: gas/rx/maclo
rx-elf: FAIL: gas/rx/max
rx-elf: FAIL: gas/rx/min
rx-elf: FAIL: gas/rx/mov
rx-elf: FAIL: gas/rx/movu
rx-elf: FAIL: gas/rx/mul
rx-elf: FAIL: gas/rx/mulhi
rx-elf: FAIL: gas/rx/mullo
rx-elf: FAIL: gas/rx/mvfachi
rx-elf: FAIL: gas/rx/mvfaclo
rx-elf: FAIL: gas/rx/mvfacmi
rx-elf: FAIL: gas/rx/mvfc
rx-elf: FAIL: gas/rx/mvfcp
rx-elf: FAIL: gas/rx/mvtachi
rx-elf: FAIL: gas/rx/mvtaclo
rx-elf: FAIL: gas/rx/mvtc
rx-elf: FAIL: gas/rx/mvtcp
rx-elf: FAIL: gas/rx/neg
rx-elf: FAIL: gas/rx/nop
rx-elf: FAIL: gas/rx/not
rx-elf: FAIL: gas/rx/opecp
rx-elf: FAIL: gas/rx/or
rx-elf: FAIL: gas/rx/pop
rx-elf: FAIL: gas/rx/popc
rx-elf: FAIL: gas/rx/popm
rx-elf: FAIL: gas/rx/push
rx-elf: FAIL: gas/rx/pushc
rx-elf: FAIL: gas/rx/pushm
rx-elf: FAIL: gas/rx/r-bcc
rx-elf: FAIL: gas/rx/r-bra
rx-elf: FAIL: gas/rx/racw
rx-elf: FAIL: gas/rx/revl
rx-elf: FAIL: gas/rx/revw
rx-elf: FAIL: gas/rx/rmpa
rx-elf: FAIL: gas/rx/rolc
rx-elf: FAIL: gas/rx/rorc
rx-elf: FAIL: gas/rx/rotl
rx-elf: FAIL: gas/rx/rotr
rx-elf: FAIL: gas/rx/round
rx-elf: FAIL: gas/rx/rte
rx-elf: FAIL: gas/rx/rtfi
rx-elf: FAIL: gas/rx/rts
rx-elf: FAIL: gas/rx/rtsd
rx-elf: FAIL: gas/rx/sat
rx-elf: FAIL: gas/rx/satr
rx-elf: FAIL: gas/rx/sbb
rx-elf: FAIL: gas/rx/sccnd
rx-elf: FAIL: gas/rx/scmpu
rx-elf: FAIL: gas/rx/setpsw
rx-elf: FAIL: gas/rx/shar
rx-elf: FAIL: gas/rx/shll
rx-elf: FAIL: gas/rx/shlr
rx-elf: FAIL: gas/rx/smovb
rx-elf: FAIL: gas/rx/smovf
rx-elf: FAIL: gas/rx/smovu
rx-elf: FAIL: gas/rx/sstr
rx-elf: FAIL: gas/rx/stnz
rx-elf: FAIL: gas/rx/stz
rx-elf: FAIL: gas/rx/sub
rx-elf: FAIL: gas/rx/suntil
rx-elf: FAIL: gas/rx/swhile
rx-elf: FAIL: gas/rx/tst
rx-elf: FAIL: gas/rx/wait
rx-elf: FAIL: gas/rx/xchg
rx-elf: FAIL: gas/rx/xor
rx-elf: FAIL: include-1
rx-elf: FAIL: ld-discard/extern
rx-elf: FAIL: ld-discard/start
rx-elf: FAIL: ld-discard/static
rx-elf: FAIL: ld-elf/merge
rx-elf: FAIL: ld-elf/merge2
rx-elf: FAIL: ld-elf/note-2
rx-elf: FAIL: ld-elf/orphan
rx-elf: FAIL: ld-elf/orphan-region
rx-elf: FAIL: ld-elf/orphan2
rx-elf: FAIL: ld-scripts/align2a
rx-elf: FAIL: ld-scripts/align2b
rx-elf: FAIL: ld-scripts/default-script1
rx-elf: FAIL: ld-scripts/default-script2
rx-elf: FAIL: ld-scripts/default-script3
rx-elf: FAIL: ld-scripts/default-script4
rx-elf: FAIL: ld-scripts/empty-aligned
rx-elf: FAIL: ld-scripts/provide-1
rx-elf: FAIL: ld-scripts/size-1
rx-elf: FAIL: ld-scripts/size-2
rx-elf: FAIL: objcopy --reverse-bytes
rx-elf: FAIL: objdump -h
rx-elf: FAIL: objdump -r
rx-elf: FAIL: objdump -s
rx-elf: FAIL: readelf -S
rx-elf: FAIL: readelf -p: missing: .*test_string.*
rx-elf: FAIL: readelf -r
rx-elf: FAIL: relocatable with script
rx-elf: FAIL: rgn-over1 (map check)
rx-elf: FAIL: rgn-over2 (map check)
rx-elf: FAIL: rgn-over3 (map check)
rx-elf: FAIL: rgn-over4 (map check)
rx-elf: FAIL: rgn-over5 (map check)
rx-elf: FAIL: rgn-over6 (map check)
rx-elf: FAIL: rgn-over7 (map check)
rx-elf: FAIL: script
rx-elf: FAIL: size -A
rx-elf: FAIL: weak symbols
rx-elf: FAIL: weak undefined symbols
s390-linux: OK
score-elf: FAIL: gas/score/branch_32
score-elf: FAIL: gas/score/branch_32-lt
score-elf: FAIL: ld-elf/orphan4
sh4-elf: OK
sh64-elf: OK
sparc-elf: OK
sparc64-elf: OK
spu-elf: OK
tic4x-coff: FAIL: .strings tests
tic4x-coff: FAIL: bad byte directive
tic4x-coff: FAIL: include-1
tic4x-coff: FAIL: ld-scripts/data
tic4x-coff: FAIL: ld-scripts/size-1
tic4x-coff: FAIL: objcopy (simple copy)
tic54x-coff: FAIL: -l: test
tic54x-coff: FAIL: -l: test (preparation)
tic54x-coff: FAIL: APP with macro then NO_APP
tic54x-coff: FAIL: APP with macro then NO_APP then more code
tic54x-coff: FAIL: APP with macro without NO_APP
tic54x-coff: FAIL: bad byte directive
tic54x-coff: FAIL: c54x cons tests
tic54x-coff: FAIL: c54x cons tests, w/extended addressing
tic54x-coff: FAIL: c54x field directive
tic54x-coff: FAIL: c54x set/equ directive
tic54x-coff: FAIL: c54x subsyms
tic54x-coff: FAIL: include-1
tic54x-coff: FAIL: included file with .if 0 wrapped in APP/NO_APP, no final NO_APP, macro in main file
tic54x-coff: FAIL: ld-scripts/data
tic54x-coff: FAIL: ld-scripts/default-script1
tic54x-coff: FAIL: ld-scripts/default-script2
tic54x-coff: FAIL: ld-scripts/default-script3
tic54x-coff: FAIL: ld-scripts/default-script4
tic54x-coff: FAIL: ld-scripts/empty-address-1
tic54x-coff: FAIL: ld-scripts/empty-address-2a
tic54x-coff: FAIL: ld-scripts/empty-address-2b
tic54x-coff: FAIL: ld-scripts/provide-1
tic54x-coff: FAIL: ld-scripts/provide-2
tic54x-coff: FAIL: ld-scripts/size-1
tic6x-elf: FAIL: Build shared library for next test
tic6x-elf: FAIL: Link eh-group.o to eh-group
tilegx-elf: OK
tilepro-elf: FAIL: readelf -S
tx39-elf: OK
v850-elf: OK
vax-netbsdelf: OK
x86_64-pc-linux-gnu: OK
x86_64-w64-mingw32: OK
xstormy16-elf: OK
xtensa-elf: OK
z80-coff: OK
z8k-coff: OK

Re: Release 2.22: Next week ...

[Matthew Gretton-Dann]

On 17/11/11 14:50, Tristan Gingold wrote:
> On Nov 9, 2011, at 10:25 AM, Tristan Gingold wrote:
>
>> Hi,
>>
>> I plan to make the 2.22 release next week.
>> There are still a few pending back ports: micromips and 'V2 of get symbol linker plugin interface' come to my mind.
>>
>> As usual, speak up if you think I missed something.
>
> I have run the testsuite for most of the targets.  I think there aren't blocking regressions for a 22.0, although I think it would be nice to clean-up arm-eabi and mips*-* for the 22.1

> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Long
> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 1
> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 2

I thought I had fixed these with:
	http://sourceware.org/ml/binutils/2011-11/msg00072.html

Which was committed:
	http://sourceware.org/ml/binutils-cvs/2011-11/msg00042.html

When I run the tests myself targetting arm-none-eabi they pass, as they 
also (I am assuming) in your arm-linux-gnueabi run (you didn't highlight 
them there).

Do you mind sending me the appropriate part of ld.log from the testrun 
and I will try to see if I can reproduce the failure?

Thanks,

Matt

-- 
Matthew Gretton-Dann
Principal Engineer, PD Software - Tools, ARM Ltd

Re: Release 2.22: Next week ...

[Tristan Gingold]

On Nov 17, 2011, at 4:10 PM, Matthew Gretton-Dann wrote:

> On 17/11/11 14:50, Tristan Gingold wrote:
>> On Nov 9, 2011, at 10:25 AM, Tristan Gingold wrote:
>> 
>>> Hi,
>>> 
>>> I plan to make the 2.22 release next week.
>>> There are still a few pending back ports: micromips and 'V2 of get symbol linker plugin interface' come to my mind.
>>> 
>>> As usual, speak up if you think I missed something.
>> 
>> I have run the testsuite for most of the targets.  I think there aren't blocking regressions for a 22.0, although I think it would be nice to clean-up arm-eabi and mips*-* for the 22.1
> 
>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Long
>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 1
>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 2
> 
> I thought I had fixed these with:
> 	http://sourceware.org/ml/binutils/2011-11/msg00072.html
> 
> Which was committed:
> 	http://sourceware.org/ml/binutils-cvs/2011-11/msg00042.html
> 
> When I run the tests myself targetting arm-none-eabi they pass, as they also (I am assuming) in your arm-linux-gnueabi run (you didn't highlight them there).

Yes, I was surprised too.

> Do you mind sending me the appropriate part of ld.log from the testrun and I will try to see if I can reproduce the failure?

Sure:

/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../gas/as-new    -o tmpdir/jump-reloc-veneers.o -march=armv7-a -mthumb /tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm/jump-reloc-veneers.s
Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../gas/as-new    -o tmpdir/jump-reloc-veneers.o -march=armv7-a -mthumb /tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm/jump-reloc-veneers.s 2>&1}  /dev/null ld.tmp (timeout = 300)
/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/ld-new   -o tmpdir/jump-reloc-veneers-short1 -L/tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm --no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000 tmpdir/jump-reloc-veneers.o
Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/ld-new   -o tmpdir/jump-reloc-veneers-short1 -L/tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm --no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000 tmpdir/jump-reloc-veneers.o 2>&1}  /dev/null ld.tmp (timeout = 300)
Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../binutils/objdump -d tmpdir/jump-reloc-veneers-short1 >dump.out 2>ld.stderr}  /dev/null  (timeout = 300)
/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../binutils/objdump -d tmpdir/jump-reloc-veneers-short1
regexp_diff match failure
regexp "^    9000:      e7fe            b.n     9000 <dest>$"
line   "    9000:       f7ff bffe       b.w     9000 <dest>"
FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 1

Tell me if you need more.

Tristan.

Re: Release 2.22: Next week ...

[Matthew Gretton-Dann]

On 17/11/11 15:19, Tristan Gingold wrote:
>
> On Nov 17, 2011, at 4:10 PM, Matthew Gretton-Dann wrote:
>
>> On 17/11/11 14:50, Tristan Gingold wrote:
>>> On Nov 9, 2011, at 10:25 AM, Tristan Gingold wrote:
>>>
>>>> Hi,
>>>>
>>>> I plan to make the 2.22 release next week.
>>>> There are still a few pending back ports: micromips and 'V2 of get symbol linker plugin interface' come to my mind.
>>>>
>>>> As usual, speak up if you think I missed something.
>>>
>>> I have run the testsuite for most of the targets.  I think there aren't blocking regressions for a 22.0, although I think it would be nice to clean-up arm-eabi and mips*-* for the 22.1
>>
>>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Long
>>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 1
>>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 2
>>
>> I thought I had fixed these with:
>> 	http://sourceware.org/ml/binutils/2011-11/msg00072.html
>>
>> Which was committed:
>> 	http://sourceware.org/ml/binutils-cvs/2011-11/msg00042.html
>>
>> When I run the tests myself targetting arm-none-eabi they pass, as they also (I am assuming) in your arm-linux-gnueabi run (you didn't highlight them there).
>
> Yes, I was surprised too.
>
>> Do you mind sending me the appropriate part of ld.log from the testrun and I will try to see if I can reproduce the failure?
>
> Sure:
>
> /tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../gas/as-new    -o tmpdir/jump-reloc-veneers.o -march=armv7-a -mthumb /tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm/jump-reloc-veneers.s
> Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../gas/as-new    -o tmpdir/jump-reloc-veneers.o -march=armv7-a -mthumb /tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm/jump-reloc-veneers.s 2>&1}  /dev/null ld.tmp (timeout = 300)
> /tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/ld-new   -o tmpdir/jump-reloc-veneers-short1 -L/tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm --no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000 tmpdir/jump-reloc-veneers.o
> Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/ld-new   -o tmpdir/jump-reloc-veneers-short1 -L/tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm --no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000 tmpdir/jump-reloc-veneers.o 2>&1}  /dev/null ld.tmp (timeout = 300)
> Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../binutils/objdump -d tmpdir/jump-reloc-veneers-short1>dump.out 2>ld.stderr}  /dev/null  (timeout = 300)
> /tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../binutils/objdump -d tmpdir/jump-reloc-veneers-short1
> regexp_diff match failure
> regexp "^    9000:      e7fe            b.n     9000<dest>$"
> line   "    9000:       f7ff bffe       b.w     9000<dest>"
> FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 1

So this looks like the failure mode I fixed.

> Tell me if you need more.

I still can't reproduce this - can you send me you configure 
command-line and the host you are running on please?

I don't think this is a reason to hold the release up - the failure is 
not a failure in the linker, but rather the test not keeping up with a 
(correct) change in the assembler's output.

Thanks,

Matt


-- 
Matthew Gretton-Dann
Principal Engineer, PD Software - Tools, ARM Ltd

Re: Release 2.22: Next week ...

[Tristan Gingold]

On Nov 17, 2011, at 6:34 PM, Matthew Gretton-Dann wrote:

> On 17/11/11 15:19, Tristan Gingold wrote:
>> 
>> On Nov 17, 2011, at 4:10 PM, Matthew Gretton-Dann wrote:
>> 
>>> On 17/11/11 14:50, Tristan Gingold wrote:
>>>> On Nov 9, 2011, at 10:25 AM, Tristan Gingold wrote:
>>>> 
>>>>> Hi,
>>>>> 
>>>>> I plan to make the 2.22 release next week.
>>>>> There are still a few pending back ports: micromips and 'V2 of get symbol linker plugin interface' come to my mind.
>>>>> 
>>>>> As usual, speak up if you think I missed something.
>>>> 
>>>> I have run the testsuite for most of the targets.  I think there aren't blocking regressions for a 22.0, although I think it would be nice to clean-up arm-eabi and mips*-* for the 22.1
>>> 
>>>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Long
>>>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 1
>>>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 2
>>> 
>>> I thought I had fixed these with:
>>> 	http://sourceware.org/ml/binutils/2011-11/msg00072.html
>>> 
>>> Which was committed:
>>> 	http://sourceware.org/ml/binutils-cvs/2011-11/msg00042.html
>>> 
>>> When I run the tests myself targetting arm-none-eabi they pass, as they also (I am assuming) in your arm-linux-gnueabi run (you didn't highlight them there).
>> 
>> Yes, I was surprised too.
>> 
>>> Do you mind sending me the appropriate part of ld.log from the testrun and I will try to see if I can reproduce the failure?
>> 
>> Sure:
>> 
>> /tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../gas/as-new    -o tmpdir/jump-reloc-veneers.o -march=armv7-a -mthumb /tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm/jump-reloc-veneers.s
>> Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../gas/as-new    -o tmpdir/jump-reloc-veneers.o -march=armv7-a -mthumb /tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm/jump-reloc-veneers.s 2>&1}  /dev/null ld.tmp (timeout = 300)
>> /tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/ld-new   -o tmpdir/jump-reloc-veneers-short1 -L/tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm --no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000 tmpdir/jump-reloc-veneers.o
>> Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/ld-new   -o tmpdir/jump-reloc-veneers-short1 -L/tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm --no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000 tmpdir/jump-reloc-veneers.o 2>&1}  /dev/null ld.tmp (timeout = 300)
>> Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../binutils/objdump -d tmpdir/jump-reloc-veneers-short1>dump.out 2>ld.stderr}  /dev/null  (timeout = 300)
>> /tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../binutils/objdump -d tmpdir/jump-reloc-veneers-short1
>> regexp_diff match failure
>> regexp "^    9000:      e7fe            b.n     9000<dest>$"
>> line   "    9000:       f7ff bffe       b.w     9000<dest>"
>> FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 1
> 
> So this looks like the failure mode I fixed.
> 
>> Tell me if you need more.
> 
> I still can't reproduce this - can you send me you configure command-line and the host you are running on please?

/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld $ head config.log
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.

It was created by configure, which was
generated by GNU Autoconf 2.64.  Invocation command line was

  $ /tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/configure --cache-file=./config.cache --with-gnu-as --with-gnu-ld --with-system-zlib --prefix=/tmp/binutils-2.21.90-sc/inst-arm-eabi --program-transform-name=s&^&arm-eabi-& --disable-option-checking --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-eabi --srcdir=../../binutils-2.21.90/ld

> 
> I don't think this is a reason to hold the release up - the failure is not a failure in the linker, but rather the test not keeping up with a (correct) change in the assembler's output.

Ok.

thank you for the investigation work.

Tristan.

> 
> Thanks,
> 
> Matt
> 
> 
> -- 
> Matthew Gretton-Dann
> Principal Engineer, PD Software - Tools, ARM Ltd
> 

Re: Release 2.22: Next week ...

[Doug Kwan (關振德)]

Tristan,

If you don't mind, can I also backport these gold's ARM fixes for test
regression?

http://sourceware.org/ml/binutils-cvs/2011-11/msg00047.html
http://sourceware.org/ml/binutils-cvs/2011-11/msg00041.html
http://sourceware.org/ml/binutils-cvs/2011-11/msg00043.html

-Doug

On Thu, Nov 17, 2011 at 7:19 AM, Tristan Gingold <gingold@adacore.com> wrote:
>
> On Nov 17, 2011, at 4:10 PM, Matthew Gretton-Dann wrote:
>
>> On 17/11/11 14:50, Tristan Gingold wrote:
>>> On Nov 9, 2011, at 10:25 AM, Tristan Gingold wrote:
>>>
>>>> Hi,
>>>>
>>>> I plan to make the 2.22 release next week.
>>>> There are still a few pending back ports: micromips and 'V2 of get symbol linker plugin interface' come to my mind.
>>>>
>>>> As usual, speak up if you think I missed something.
>>>
>>> I have run the testsuite for most of the targets.  I think there aren't blocking regressions for a 22.0, although I think it would be nice to clean-up arm-eabi and mips*-* for the 22.1
>>
>>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Long
>>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 1
>>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 2
>>
>> I thought I had fixed these with:
>>       http://sourceware.org/ml/binutils/2011-11/msg00072.html
>>
>> Which was committed:
>>       http://sourceware.org/ml/binutils-cvs/2011-11/msg00042.html
>>
>> When I run the tests myself targetting arm-none-eabi they pass, as they also (I am assuming) in your arm-linux-gnueabi run (you didn't highlight them there).
>
> Yes, I was surprised too.
>
>> Do you mind sending me the appropriate part of ld.log from the testrun and I will try to see if I can reproduce the failure?
>
> Sure:
>
> /tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../gas/as-new    -o tmpdir/jump-reloc-veneers.o -march=armv7-a -mthumb /tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm/jump-reloc-veneers.s
> Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../gas/as-new    -o tmpdir/jump-reloc-veneers.o -march=armv7-a -mthumb /tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm/jump-reloc-veneers.s 2>&1}  /dev/null ld.tmp (timeout = 300)
> /tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/ld-new   -o tmpdir/jump-reloc-veneers-short1 -L/tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm --no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000 tmpdir/jump-reloc-veneers.o
> Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/ld-new   -o tmpdir/jump-reloc-veneers-short1 -L/tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm --no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000 tmpdir/jump-reloc-veneers.o 2>&1}  /dev/null ld.tmp (timeout = 300)
> Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../binutils/objdump -d tmpdir/jump-reloc-veneers-short1 >dump.out 2>ld.stderr}  /dev/null  (timeout = 300)
> /tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../binutils/objdump -d tmpdir/jump-reloc-veneers-short1
> regexp_diff match failure
> regexp "^    9000:      e7fe            b.n     9000 <dest>$"
> line   "    9000:       f7ff bffe       b.w     9000 <dest>"
> FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 1
>
> Tell me if you need more.
>
> Tristan.
>
>

Re: Release 2.22: Next week ...

[Tristan Gingold]

On Nov 18, 2011, at 8:47 AM, Doug Kwan (關振德) wrote:

> Tristan,
> 
> If you don't mind, can I also backport these gold's ARM fixes for test
> regression?
> 
> http://sourceware.org/ml/binutils-cvs/2011-11/msg00047.html
> http://sourceware.org/ml/binutils-cvs/2011-11/msg00041.html
> http://sourceware.org/ml/binutils-cvs/2011-11/msg00043.html

Done.

> 
> -Doug
> 
> On Thu, Nov 17, 2011 at 7:19 AM, Tristan Gingold <gingold@adacore.com> wrote:
>> 
>> On Nov 17, 2011, at 4:10 PM, Matthew Gretton-Dann wrote:
>> 
>>> On 17/11/11 14:50, Tristan Gingold wrote:
>>>> On Nov 9, 2011, at 10:25 AM, Tristan Gingold wrote:
>>>> 
>>>>> Hi,
>>>>> 
>>>>> I plan to make the 2.22 release next week.
>>>>> There are still a few pending back ports: micromips and 'V2 of get symbol linker plugin interface' come to my mind.
>>>>> 
>>>>> As usual, speak up if you think I missed something.
>>>> 
>>>> I have run the testsuite for most of the targets.  I think there aren't blocking regressions for a 22.0, although I think it would be nice to clean-up arm-eabi and mips*-* for the 22.1
>>> 
>>>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Long
>>>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 1
>>>> arm-eabi: FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 2
>>> 
>>> I thought I had fixed these with:
>>>       http://sourceware.org/ml/binutils/2011-11/msg00072.html
>>> 
>>> Which was committed:
>>>       http://sourceware.org/ml/binutils-cvs/2011-11/msg00042.html
>>> 
>>> When I run the tests myself targetting arm-none-eabi they pass, as they also (I am assuming) in your arm-linux-gnueabi run (you didn't highlight them there).
>> 
>> Yes, I was surprised too.
>> 
>>> Do you mind sending me the appropriate part of ld.log from the testrun and I will try to see if I can reproduce the failure?
>> 
>> Sure:
>> 
>> /tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../gas/as-new    -o tmpdir/jump-reloc-veneers.o -march=armv7-a -mthumb /tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm/jump-reloc-veneers.s
>> Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../gas/as-new    -o tmpdir/jump-reloc-veneers.o -march=armv7-a -mthumb /tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm/jump-reloc-veneers.s 2>&1}  /dev/null ld.tmp (timeout = 300)
>> /tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/ld-new   -o tmpdir/jump-reloc-veneers-short1 -L/tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm --no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000 tmpdir/jump-reloc-veneers.o
>> Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/ld-new   -o tmpdir/jump-reloc-veneers-short1 -L/tmp/binutils-2.21.90-sc/binutils-2.21.90/ld/testsuite/ld-arm --no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000 tmpdir/jump-reloc-veneers.o 2>&1}  /dev/null ld.tmp (timeout = 300)
>> Executing on host: sh -c {/tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../binutils/objdump -d tmpdir/jump-reloc-veneers-short1 >dump.out 2>ld.stderr}  /dev/null  (timeout = 300)
>> /tmp/binutils-2.21.90-sc/objs-arm-eabi/ld/../binutils/objdump -d tmpdir/jump-reloc-veneers-short1
>> regexp_diff match failure
>> regexp "^    9000:      e7fe            b.n     9000 <dest>$"
>> line   "    9000:       f7ff bffe       b.w     9000 <dest>"
>> FAIL: R_ARM_THM_JUMP24 Relocation veneers: Short 1
>> 
>> Tell me if you need more.
>> 
>> Tristan.
>> 
>> 

Re: Release 2.22: Next week ...

[James Murray]

On 17/11/11 14:50, Tristan Gingold wrote: 

References: <ADFB3A72-FDFA-4402-A6D5-CADEA94D0ED2@adacore.com>
<1747C46F-9EE9-4FE6-B84C-09DC53F21DE0@adacore.com>
<2E7397C5-D6E3-4DEC-812E-156DEBA441A8@adacore.com>

> I have run the testsuite for most of the targets. 
> m68hc11-elf: OK

Seems ok, but what about the sub-targets? They fail the test-suite.
m68hc11-elf  PASS
m68hc12-elf - 10 gas failures
m6811-elf - 5 gas failures
m6812-elf - 15 gas failures

Does this matter? Should the tests only be run with the 'main' target?

I believe the following patch resolves the 10 gas failures on
m68hc12-elf, the hc11 tests were being run without a target specified,
so will only work if the target is built as m68hc11. When they then run
as hc12 they do not spit out the expected error as those operands/modess
are valid on hc12.

###########################
diff -Nuar -x '.#*' -x CVS src/gas/testsuite/gas/m68hc11/m68hc11.exp
binutils-20111216/gas/testsuite/gas/m68hc11/m68hc11.exp
--- src/gas/testsuite/gas/m68hc11/m68hc11.exp 2004-08-01
20:59:51.000000000 +0100
+++ binutils-20111216/gas/testsuite/gas/m68hc11/m68hc11.exp 2011-12-17
02:07:50.000000000 +0000
@@ -78,28 +82,29 @@
     gas_m68hc11_message "Warning" $options $line $expect
}

+#add machine option as default is now m9s12x
# ------------------
# 68HC11 error tests
-gas_m68hc11_error "" "puld\n" "Opcode .puld. is not recognized"
-gas_m68hc11_error "" "ldab\n" "Invalid operand for .ldab."
-gas_m68hc11_error "" "ldab 256,x\n" "Operand out of 8-bit range:.*256"
-gas_m68hc11_error "" "ldab 257,y\n" "Operand out of 8-bit range:.*257"
-gas_m68hc11_error "" "ldab -1,y\n" "Operand out of 8-bit range:.*-1"
-gas_m68hc11_error "" "ldab bar,y\nbar=300" "value of 300 too large for
field of 1 byte"
-gas_m68hc11_error "" "jmp \#23\n" "Immediate operand is not allowed"
-gas_m68hc11_error "" "ldab \[d,pc\]\n" "Indirect indexed addressing is
not valid for 68HC11"
-gas_m68hc11_error "" "ldab ,t\n" "Spurious .,. or bad indirect
register"
-gas_m68hc11_error "" "ldab 1,t\n" "Garbage at end of instruction:.*,t"
-gas_m68hc11_error "" "ldab 1,,x\n" "Garbage at end of instruction:.*,x"
-gas_m68hc11_error "" "ldab 1,+x\n" "Pre-increment mode is not valid"
-gas_m68hc11_error "" "ldab 1,-x\n" "Pre-increment mode is not valid"
-gas_m68hc11_error "" "ldab 1,x+\n" "Post-increment mode is not valid"
-gas_m68hc11_error "" "ldab 1,x-\n" "Post-decrement mode is not valid"
-gas_m68hc11_error "" "ldd \#65536\n" "Operand out of 16-bit range"
-gas_m68hc11_error "--short-branchs" "bne 200\n" \
+gas_m68hc11_error "-m68hc11" "puld\n" "Opcode .puld. is not recognized"
+gas_m68hc11_error "-m68hc11" "ldab\n" "Invalid operand for .ldab."
+gas_m68hc11_error "-m68hc11" "ldab 256,x\n" "Operand out of 8-bit
range:.*256"
+gas_m68hc11_error "-m68hc11" "ldab 257,y\n" "Operand out of 8-bit
range:.*257"
+gas_m68hc11_error "-m68hc11" "ldab -1,y\n" "Operand out of 8-bit
range:.*-1"
+gas_m68hc11_error "-m68hc11" "ldab bar,y\nbar=300" "value of 300 too
large for field of 1 byte"
+gas_m68hc11_error "-m68hc11" "jmp \#23\n" "Immediate operand is not
allowed"
+gas_m68hc11_error "-m68hc11" "ldab \[d,pc\]\n" "Indirect indexed
addressing is not valid for 68HC11"
+gas_m68hc11_error "-m68hc11" "ldab ,t\n" "Spurious .,. or bad indirect
register"
+gas_m68hc11_error "-m68hc11" "ldab 1,t\n" "Garbage at end of
instruction:.*,t"
+gas_m68hc11_error "-m68hc11" "ldab 1,,x\n" "Garbage at end of
instruction:.*,x"
+gas_m68hc11_error "-m68hc11" "ldab 1,+x\n" "Pre-increment mode is not
valid"
+gas_m68hc11_error "-m68hc11" "ldab 1,-x\n" "Pre-increment mode is not
valid"
+gas_m68hc11_error "-m68hc11" "ldab 1,x+\n" "Post-increment mode is not
valid"
+gas_m68hc11_error "-m68hc11" "ldab 1,x-\n" "Post-decrement mode is not
valid"
+gas_m68hc11_error "-m68hc11" "ldd \#65536\n" "Operand out of 16-bit
range"
+gas_m68hc11_error "-m68hc11 --short-branchs" "bne 200\n" \
     "Operand out of range for a relative branch"
-gas_m68hc11_error "" "bar\n" "Opcode .bar. is not recognized."
-gas_m68hc11_error "--print-insn-syntax" "bne\n" \
+gas_m68hc11_error "-m68hc11" "bar\n" "Opcode .bar. is not recognized."
+gas_m68hc11_error "-m68hc11 --print-insn-syntax" "bne\n" \
     "Instruction formats for .bne..*"

# ------------------
###########################

However, resolving those then exposes 10 test failures in ld. I have not
yet investigated those.

My reason for asking is that I have some work to submit on the m68hc11
target and don't want to be rejected on these testsuite failures.
(My previous attempt at submission in Feb/Mar did expose some genuine
regressions which I have since corrected.)

regards

James Murray

PS. I hope the References works ok, I find it tricky to reply with
correct headers when I receive only the digest and the online version
doesn't display the Message-id. Any tips?

Re: Release 2.22: Next week ...

[Tristan Gingold]

On Dec 18, 2011, at 6:45 PM, James Murray wrote:

> On 17/11/11 14:50, Tristan Gingold wrote: 
> 
> References: <ADFB3A72-FDFA-4402-A6D5-CADEA94D0ED2@adacore.com>
> <1747C46F-9EE9-4FE6-B84C-09DC53F21DE0@adacore.com>
> <2E7397C5-D6E3-4DEC-812E-156DEBA441A8@adacore.com>
> 
>> I have run the testsuite for most of the targets. 
>> m68hc11-elf: OK
> 
> Seems ok, but what about the sub-targets? They fail the test-suite.
> m68hc11-elf  PASS
> m68hc12-elf - 10 gas failures
> m6811-elf - 5 gas failures
> m6812-elf - 15 gas failures

Clearly there are targets and sub targets that I don't test.

> Does this matter? Should the tests only be run with the 'main' target?

It is of course better to test as many targets as you can when submitting patches.

> I believe the following patch resolves the 10 gas failures on
> m68hc12-elf, the hc11 tests were being run without a target specified,
> so will only work if the target is built as m68hc11. When they then run
> as hc12 they do not spit out the expected error as those operands/modess
> are valid on hc12.

I don't know the m6811/12 targets, so I can't comment quickly.

These targets look to be almost unmaintained for a while so fell free to take the lead!

> ###########################
> diff -Nuar -x '.#*' -x CVS src/gas/testsuite/gas/m68hc11/m68hc11.exp
> binutils-20111216/gas/testsuite/gas/m68hc11/m68hc11.exp
> --- src/gas/testsuite/gas/m68hc11/m68hc11.exp 2004-08-01
> 20:59:51.000000000 +0100
> +++ binutils-20111216/gas/testsuite/gas/m68hc11/m68hc11.exp 2011-12-17
> 02:07:50.000000000 +0000
[..]
> # ------------------
> ###########################
> 
> However, resolving those then exposes 10 test failures in ld. I have not
> yet investigated those.
> 
> My reason for asking is that I have some work to submit on the m68hc11
> target and don't want to be rejected on these testsuite failures.
> (My previous attempt at submission in Feb/Mar did expose some genuine
> regressions which I have since corrected.)

The maintainer will take the decision.

> regards
> 
> James Murray
> 
> PS. I hope the References works ok, I find it tricky to reply with
> correct headers when I receive only the digest and the online version
> doesn't display the Message-id. Any tips?

Disable to digest option ?  Use the archive web page ?

Tristan.

Re: Release 2.22: Next week ...

[James Murray]

On Mon, 2011-12-19 at 10:35 +0100, Tristan Gingold wrote: 
> On Dec 18, 2011, at 6:45 PM, James Murray wrote:
> 
> > On 17/11/11 14:50, Tristan Gingold wrote: 
> > 
> > References: <ADFB3A72-FDFA-4402-A6D5-CADEA94D0ED2@adacore.com>
> > <1747C46F-9EE9-4FE6-B84C-09DC53F21DE0@adacore.com>
> > <2E7397C5-D6E3-4DEC-812E-156DEBA441A8@adacore.com>
> > 
> >> I have run the testsuite for most of the targets. 
> >> m68hc11-elf: OK
> > 
> > Seems ok, but what about the sub-targets? They fail the test-suite.
> > m68hc11-elf  PASS
> > m68hc12-elf - 10 gas failures
> > m6811-elf - 5 gas failures
> > m6812-elf - 15 gas failures
> 
> Clearly there are targets and sub targets that I don't test.
> 
> > Does this matter? Should the tests only be run with the 'main' target?
> 
> It is of course better to test as many targets as you can when submitting patches.
> 

OK, what I've learned is that the tests fail if gcc is available for
that sub-target, otherwise the failing ld tests are skipped and the
target passes. (Hence for me m68hc11 passed and m9s12x failed.)

The ten FAILS are:
FAIL: Check --gc-section
FAIL: Check --gc-section/-q
FAIL: plugin claimfile lost symbol
FAIL: plugin claimfile replace symbol
FAIL: plugin claimfile resolve symbol
FAIL: plugin claimfile replace file
FAIL: plugin ignore lib
FAIL: plugin claimfile replace lib
FAIL: NOCROSSREFS 3
FAIL: S-records

Nine of them are fixed by target conditionally adding
-fomit_frame_pointer to the cflags/CFLAGS

However, I'm stuck on the S-records test, it reports:

m9s12x-elf-gcc -B/usr/src/jsm/build/binout-9s12x/ld/tmpdir/gas/
-I/usr/src/jsm/binutils-cvs/binutils-20111216/ld/testsuite/ld-srec -g
-O2 -fomit-frame-pointer
-c /usr/src/jsm/binutils-cvs/binutils-20111216/ld/testsuite/ld-srec/sr2.c -o tmpdir/sr2.o
Executing on host: sh -c {m9s12x-elf-gcc
-B/usr/src/jsm/build/binout-9s12x/ld/tmpdir/gas/
-I/usr/src/jsm/binutils-cvs/binutils-20111216/ld/testsuite/ld-srec -g
-O2 -fomit-frame-pointer
-c /usr/src/jsm/binutils-cvs/binutils-20111216/ld/testsuite/ld-srec/sr2.c -o tmpdir/sr2.o 2>&1}  /dev/null ld.tmp (timeout = 300)
spawn [open ...]
/usr/src/jsm/build/binout-9s12x/ld/ld-new   -o tmpdir/sr1
--traditional-format -G 0 --defsym __stack_chk_fail=0 --defsym
_start=0xc000 tmpdir/sr1.o tmpdir/sr2.o
Executing on host: sh -c {/usr/src/jsm/build/binout-9s12x/ld/ld-new   -o
tmpdir/sr1 --traditional-format -G 0 --defsym __stack_chk_fail=0
--defsym _start=0xc000 tmpdir/sr1.o tmpdir/sr2.o 2>&1}  /dev/null ld.tmp
(timeout = 300)
spawn [open ...]
/usr/src/jsm/build/binout-9s12x/ld/ld-new   -o tmpdir/sr2.sr
--traditional-format -G 0 --defsym __stack_chk_fail=0 --defsym
_start=0xc000 --oformat srec tmpdir/sr1.o tmpdir/sr2.o
Executing on host: sh -c {/usr/src/jsm/build/binout-9s12x/ld/ld-new   -o
tmpdir/sr2.sr --traditional-format -G 0 --defsym __stack_chk_fail=0
--defsym _start=0xc000 --oformat srec tmpdir/sr1.o tmpdir/sr2.o
2>&1}  /dev/null ld.tmp (timeout = 300)
spawn [open ...]
/usr/src/jsm/build/binout-9s12x/ld/ld-new: can not size stub section:
Invalid operation
/usr/src/jsm/build/binout-9s12x/ld/ld-new: can not size stub section:
Invalid operation
FAIL: S-records

(I've cleaned up a warning about _start not being defined for that
target.)

> 
> The maintainer will take the decision.
> 

Unfortunately, it seems that I'm currently the closest thing to a
maintainer of the m68hc11 target. If anyone else is out there I'd be
keen to work with them.

regards

James Murray 

Re: Release 2.22: Next week ... (m68hc11 testsuite)

[James Murray]

Previously I wrote:
> However, I'm stuck on the S-records test, it reports:
>
> m9s12x-elf-gcc -B/usr/src/jsm/build/binout-9s12x/ld/tmpdir/gas/
> -I/usr/src/jsm/binutils-cvs/binutils-20111216/ld/testsuite/ld-srec -g
> -O2 -fomit-frame-pointer
>
-c /usr/src/jsm/binutils-cvs/binutils-20111216/ld/testsuite/ld-srec/sr2.c >=
 -o tmpdir/sr2.o
> Executing on host: sh -c {m9s12x-elf-gcc
> -B/usr/src/jsm/build/binout-9s12x/ld/tmpdir/gas/
> -I/usr/src/jsm/binutils-cvs/binutils-20111216/ld/testsuite/ld-srec -g
> -O2 -fomit-frame-pointer
>
-c /usr/src/jsm/binutils-cvs/binutils-20111216/ld/testsuite/ld-srec/sr2.c >=
 -o tmpdir/sr2.o 2>&1}  /dev/null ld.tmp (timeout = 300)
> spawn [open ...]
> /usr/src/jsm/build/binout-9s12x/ld/ld-new   -o tmpdir/sr1
> --traditional-format -G 0 --defsym __stack_chk_fail=3D3D0 --defsym
> _start=0xc000 tmpdir/sr1.o tmpdir/sr2.o
> Executing on host: sh -c {/usr/src/jsm/build/binout-9s12x/ld/ld-new
> -o tmpdir/sr1 --traditional-format -G 0 --defsym __stack_chk_fail=0
> --defsym _start=0xc000 tmpdir/sr1.o tmpdir/sr2.o 2>&1}  /dev/null
ld.tmp
> (timeout = 300)
> spawn [open ...]
> /usr/src/jsm/build/binout-9s12x/ld/ld-new   -o tmpdir/sr2.sr
> --traditional-format -G 0 --defsym __stack_chk_fail=0 --defsym
> _start=0xc000 --oformat srec tmpdir/sr1.o tmpdir/sr2.o
> Executing on host: sh -c {/usr/src/jsm/build/binout-9s12x/ld/ld-new
-o
> tmpdir/sr2.sr --traditional-format -G 0 --defsym __stack_chk_fail=0
> --defsym _start=0xc000 --oformat srec tmpdir/sr1.o tmpdir/sr2.o
> 2>&1}  /dev/null ld.tmp (timeout = 300)
> spawn [open ...]
> /usr/src/jsm/build/binout-9s12x/ld/ld-new: can not size stub section:
> Invalid operation
> /usr/src/jsm/build/binout-9s12x/ld/ld-new: can not size stub section:
> Invalid operation
> FAIL: S-records

The error is being generated here in ld/emultempl/m68hc1xelf.em
--------------------------
static void
m68hc11_elf_${EMULATION_NAME}_before_allocation (void)
{
  lang_memory_region_type* region;
  int ret;

  gld${EMULATION_NAME}_before_allocation ();

  /* If generating a relocatable output file, then we don't
     have to generate the trampolines.  */
  if (link_info.relocatable)
    return;

  ret = elf32_m68hc11_setup_section_lists (link_info.output_bfd,
&link_info);
  if (ret != 0 && no_trampoline == 0)
    {
      if (ret < 0)
{
  einfo ("%X%P: can not size stub section: %E\n");
  return;
}
--------------------------
ret has the value -1

Any ideas on whether this is a real problem or if the test is never
going to work on m68hc11
It looks as though this might have never worked?

regards

James Murray

Re: Release 2.22: Next week ... (m68hc11 testsuite)

[Tristan Gingold]

On Dec 20, 2011, at 2:51 PM, James Murray wrote:

> Previously I wrote:
>> However, I'm stuck on the S-records test, it reports:
>> 
>> m9s12x-elf-gcc -B/usr/src/jsm/build/binout-9s12x/ld/tmpdir/gas/
>> -I/usr/src/jsm/binutils-cvs/binutils-20111216/ld/testsuite/ld-srec -g
>> -O2 -fomit-frame-pointer
>> 
> -c /usr/src/jsm/binutils-cvs/binutils-20111216/ld/testsuite/ld-srec/sr2.c >=
> -o tmpdir/sr2.o
>> Executing on host: sh -c {m9s12x-elf-gcc
>> -B/usr/src/jsm/build/binout-9s12x/ld/tmpdir/gas/
>> -I/usr/src/jsm/binutils-cvs/binutils-20111216/ld/testsuite/ld-srec -g
>> -O2 -fomit-frame-pointer
>> 
> -c /usr/src/jsm/binutils-cvs/binutils-20111216/ld/testsuite/ld-srec/sr2.c >=
> -o tmpdir/sr2.o 2>&1}  /dev/null ld.tmp (timeout = 300)
>> spawn [open ...]
>> /usr/src/jsm/build/binout-9s12x/ld/ld-new   -o tmpdir/sr1
>> --traditional-format -G 0 --defsym __stack_chk_fail=3D3D0 --defsym
>> _start=0xc000 tmpdir/sr1.o tmpdir/sr2.o
>> Executing on host: sh -c {/usr/src/jsm/build/binout-9s12x/ld/ld-new
>> -o tmpdir/sr1 --traditional-format -G 0 --defsym __stack_chk_fail=0
>> --defsym _start=0xc000 tmpdir/sr1.o tmpdir/sr2.o 2>&1}  /dev/null
> ld.tmp
>> (timeout = 300)
>> spawn [open ...]
>> /usr/src/jsm/build/binout-9s12x/ld/ld-new   -o tmpdir/sr2.sr
>> --traditional-format -G 0 --defsym __stack_chk_fail=0 --defsym
>> _start=0xc000 --oformat srec tmpdir/sr1.o tmpdir/sr2.o
>> Executing on host: sh -c {/usr/src/jsm/build/binout-9s12x/ld/ld-new
> -o
>> tmpdir/sr2.sr --traditional-format -G 0 --defsym __stack_chk_fail=0
>> --defsym _start=0xc000 --oformat srec tmpdir/sr1.o tmpdir/sr2.o
>> 2>&1}  /dev/null ld.tmp (timeout = 300)
>> spawn [open ...]
>> /usr/src/jsm/build/binout-9s12x/ld/ld-new: can not size stub section:
>> Invalid operation
>> /usr/src/jsm/build/binout-9s12x/ld/ld-new: can not size stub section:
>> Invalid operation
>> FAIL: S-records
> 
> The error is being generated here in ld/emultempl/m68hc1xelf.em
> --------------------------
> static void
> m68hc11_elf_${EMULATION_NAME}_before_allocation (void)
> {
>  lang_memory_region_type* region;
>  int ret;
> 
>  gld${EMULATION_NAME}_before_allocation ();
> 
>  /* If generating a relocatable output file, then we don't
>     have to generate the trampolines.  */
>  if (link_info.relocatable)
>    return;
> 
>  ret = elf32_m68hc11_setup_section_lists (link_info.output_bfd,
> &link_info);
>  if (ret != 0 && no_trampoline == 0)
>    {
>      if (ret < 0)
> {
>  einfo ("%X%P: can not size stub section: %E\n");
>  return;
> }
> --------------------------
> ret has the value -1
> 
> Any ideas on whether this is a real problem or if the test is never
> going to work on m68hc11
> It looks as though this might have never worked?

AFAIK, generating directly srec from the elf linker is broken on many targets.  I would consider them as XFAIL.

Tristan.

Re: Release 2.22: Next week ... (m68hc11 testsuite)

[James Murray]

On Tue, 2011-12-20 at 14:55 +0100, Tristan Gingold wrote:
> On Dec 20, 2011, at 2:51 PM, James Murray wrote:

> > Any ideas on whether this is a real problem or if the test is never
> > going to work on m68hc11

> AFAIK, generating directly srec from the elf linker is broken on many targets.  I would consider them as XFAIL.
> 

Thanks, done. Assuming I have the right tools/config for "make check"
I'm now seeing a pass.

regards

James

Re: Release 2.22: Next week ... (m68hc11 testsuite)

[James Murray]

On Tue, 2011-12-20 at 14:49 +0000, James Murray wrote:
> On Tue, 2011-12-20 at 14:55 +0100, Tristan Gingold wrote:
> > On Dec 20, 2011, at 2:51 PM, James Murray wrote:
>=20
> > > Any ideas on whether this is a real problem or if the test is never
> > > going to work on m68hc11

I've been working my way through the tests and feel like I'm getting a
better handle on things.

However, it appears that the ld testsuite is effectively skipped for the
main target. All the test files start similar to this:
#source: far-hc11.s
#as: -m68hc11
#ld: -m m68hc11elf
#objdump: -d --prefix-addresses -r
#target: m6811-*-* m6812-*-*

That means that when you build for the default target of m68hc11 they
are all ignored.

That's a big problem as it seems there's a long-standing critical bug
that they would have exposed.

The hc11/hc12 platform frequently use banked memory.
Later chips (hcs12, s12x) have built in call/rtc commands to do this,
but the earlier 11,12 chips had custom hardware and need specific
trampoline code to correctly jump there. This essential trampoline code
is not being emitted. I checked in my code, virgin CVS and back to 2.18.
All the same, missing.

At a glance, the trampoline generation code exists in BFD, but appears
to be broken somehow. This is rather beyond the scope of what I was
hoping to work on and dates back to the initial work that Stephane
Carrez contributed.

Also, regarding the build targets, I'm not fully sure what purpose it
serves to build for different sub-targets. It (now) makes more sense to
build for just the one target and specify the sub-target at runtime. I
don't plan on changing that presently though.

thoughts?

regards

James Murray

Re: Release 2.22: Next week ... (m68hc11 testsuite)

[James Murray]

On Thu, 2011-12-29 at 15:45 +0000, James Murray wrote:
> That's a big problem as it seems there's a long-standing critical bug
> that they would have exposed.
> 
>  This essential trampoline code
> is not being emitted.

After extensive investigation I found that the broke between 2.16 and
2.17

Specifically this patch to elflink.c committed on 2006-08-15 ~19.30
----------------------------------------------------------
--- src-old/bfd/elflink.c 2011-12-30 01:32:04.000000000 +0000
+++ src-old2/bfd/elflink.c 2011-12-30 01:35:01.000000000 +0000
@@ -4058,13 +4058,13 @@
 	    isym->st_other = (STV_HIDDEN
 			      | (isym->st_other & ~ELF_ST_VISIBILITY (-1)));
 
-	  if (isym->st_other != 0 && !dynamic)
+	  if (ELF_ST_VISIBILITY (isym->st_other) != 0 && !dynamic)
 	    {
 	      unsigned char hvis, symvis, other, nvis;
 
-	      /* Take the balance of OTHER from the definition.  */
-	      other = (definition ? isym->st_other : h->other);
-	      other &= ~ ELF_ST_VISIBILITY (-1);
+	      /* Only merge the visibility. Leave the remainder of the
+		 st_other field to elf_backend_merge_symbol_attribute.  */
+	      other = h->other & ~ELF_ST_VISIBILITY (-1);
 
 	      /* Combine visibilities, using the most constraining one.  */
 	      hvis   = ELF_ST_VISIBILITY (h->other);
----------------------------------------------------------

The accompanying bfd ChangeLog entry says:
----------------------------------------------------------
 2006-08-15  Thiemo Seufer  <ths@mips.com>
             Nigel Stephens  <nigel@mips.com>

	* elf32-mips.c, elf64-mips.c, elfn32-mips.c
	(elf_backend_merge_symbol_attribute): Define.
	* elflink.c (elf_link_add_object_symbols): Merge only the ELF
	visibility flags.
	* elfxx-mips.c (_bfd_mips_elf_merge_symbol_attribute): New function.
----------------------------------------------------------

What does this mean and what needs doing to get the m68hc11 trampoline
code back?

regards

James Murray

Re: Release 2.22: Next week ... (m68hc11 testsuite)

[James Murray]

Another m68hc11 testsuite question.

The one remaining testsuite fail I see looks like it might be related to
"PR 6848"

When built for target m6811, the following gas test fails:
(It is skipped for the normal target name m68hc11.)
---------------------------------
../as-new   -o
dump.o /usr/src/jsm/binutils-cvs/test/src/gas/testsuite/gas/elf/redef.s
Executing on host: sh -c {../as-new   -o
dump.o /usr/src/jsm/binutils-cvs/test/src/gas/testsuite/gas/elf/redef.s
2>&1}  /dev/null gas.out (timeout = 300)
spawn [open ...]
/usr/src/jsm/binutils-cvs/test/src/gas/testsuite/gas/elf/redef.s:
Assembler messages:
/usr/src/jsm/binutils-cvs/test/src/gas/testsuite/gas/elf/redef.s:4:
Error: redefined symbol cannot be used on reloc
/usr/src/jsm/binutils-cvs/test/src/gas/testsuite/gas/elf/redef.s:
Assembler messages:
/usr/src/jsm/binutils-cvs/test/src/gas/testsuite/gas/elf/redef.s:4:
Error: redefined symbol cannot be used on reloc
/usr/src/jsm/binutils-cvs/test/binout/gas/testsuite/../../binutils/objdump  -t dump.o
Executing on host: sh -c
{/usr/src/jsm/binutils-cvs/test/binout/gas/testsuite/../../binutils/objdump  -t dump.o >dump.out 2>gas.stderr}  /dev/null  (timeout = 300)
spawn [open ...]
/usr/src/jsm/binutils-cvs/test/binout/gas/testsuite/../../binutils/objdump: 'dump.o': No such file
FAIL: .equ redefinitions (ELF)

---------------------------------

Is this an expected failure or does it indicate a problem with the
target that needs fixing?

I'm hoping to have a revised 9s12x/xgate patch ready soon, Sean Keys has
been peer-reviewing the output and giving feedback. I've added the
missing opcodes he identified, cleaned up some other issues, added new
tests and believe I've resolved the trampoline generation problem too.

regards

James Murray

m68hc11 trampolines

[Alan Modra]

On Fri, Dec 30, 2011 at 02:12:54AM +0000, James Murray wrote:
> What does this mean and what needs doing to get the m68hc11 trampoline
> code back?

Try this.

Index: bfd/elf32-m68hc11.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-m68hc11.c,v
retrieving revision 1.40
diff -u -p -r1.40 elf32-m68hc11.c
--- bfd/elf32-m68hc11.c	25 Aug 2010 14:53:42 -0000	1.40
+++ bfd/elf32-m68hc11.c	9 Feb 2012 12:26:12 -0000
@@ -1302,6 +1302,7 @@ static const struct bfd_elf_special_sect
 #define elf_backend_final_write_processing	0
 #define elf_backend_can_gc_sections		1
 #define elf_backend_special_sections  elf32_m68hc11_special_sections
+#define elf_backend_merge_symbol_attribute elf32_m68hc11_merge_symbol_attribute
 
 #define bfd_elf32_bfd_link_hash_table_create \
                                 m68hc11_elf_bfd_link_hash_table_create
Index: bfd/elf32-m68hc12.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-m68hc12.c,v
retrieving revision 1.30
diff -u -p -r1.30 elf32-m68hc12.c
--- bfd/elf32-m68hc12.c	25 Aug 2010 14:53:42 -0000	1.30
+++ bfd/elf32-m68hc12.c	9 Feb 2012 12:26:12 -0000
@@ -581,6 +581,7 @@ static const struct bfd_elf_special_sect
 #define elf_backend_special_sections elf32_m68hc12_special_sections
 #define elf_backend_post_process_headers     elf32_m68hc11_post_process_headers
 #define elf_backend_add_symbol_hook  elf32_m68hc11_add_symbol_hook
+#define elf_backend_merge_symbol_attribute elf32_m68hc11_merge_symbol_attribute
 
 #define bfd_elf32_bfd_link_hash_table_create \
                                 m68hc12_elf_bfd_link_hash_table_create
Index: bfd/elf32-m68hc1x.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-m68hc1x.c,v
retrieving revision 1.40
diff -u -p -r1.40 elf32-m68hc1x.c
--- bfd/elf32-m68hc1x.c	2 Jun 2011 13:43:14 -0000	1.40
+++ bfd/elf32-m68hc1x.c	9 Feb 2012 12:26:13 -0000
@@ -214,6 +214,20 @@ elf32_m68hc11_add_symbol_hook (bfd *abfd
   return TRUE;
 }
 
+/* Merge non-visibility st_other attributes, STO_M68HC12_FAR and
+   STO_M68HC12_INTERRUPT.  */
+
+void
+elf32_m68hc11_merge_symbol_attribute (struct elf_link_hash_entry *h,
+				      const Elf_Internal_Sym *isym,
+				      bfd_boolean definition,
+				      bfd_boolean dynamic ATTRIBUTE_UNUSED)
+{
+  if (definition)
+    h->other = ((isym->st_other & ~ELF_ST_VISIBILITY (-1))
+		| ELF_ST_VISIBILITY (h->other));
+}
+
 /* External entry points for sizing and building linker stubs.  */
 
 /* Set up various things so that we can make a list of input sections
Index: bfd/elf32-m68hc1x.h
===================================================================
RCS file: /cvs/src/src/bfd/elf32-m68hc1x.h,v
retrieving revision 1.11
diff -u -p -r1.11 elf32-m68hc1x.h
--- bfd/elf32-m68hc1x.h	4 Feb 2010 09:16:39 -0000	1.11
+++ bfd/elf32-m68hc1x.h	9 Feb 2012 12:26:13 -0000
@@ -176,6 +176,10 @@ bfd_boolean elf32_m68hc11_add_symbol_hoo
    flagword *flagsp, asection **secp,
    bfd_vma *valp);
 
+void elf32_m68hc11_merge_symbol_attribute
+  (struct elf_link_hash_entry *, const Elf_Internal_Sym *,
+   bfd_boolean, bfd_boolean);
+
 /* Tweak the OSABI field of the elf header.  */
 
 extern void elf32_m68hc11_post_process_headers (bfd*, struct bfd_link_info*);


-- 
Alan Modra
Australia Development Lab, IBM

Re: m68hc11 trampolines

[Alan Modra]

On Thu, Feb 09, 2012 at 11:23:01PM +1030, Alan Modra wrote:
> On Fri, Dec 30, 2011 at 02:12:54AM +0000, James Murray wrote:
> > What does this mean and what needs doing to get the m68hc11 trampoline
> > code back?
> 
> Try this.

Now committed.

bfd/
	* elf32-m68hc1x.c (elf32_m68hc11_merge_symbol_attribute): New function.
	* elf32-m68hc1x.h (elf32_m68hc11_merge_symbol_attribute): Declare.
	* elf32-m68hc11.c (elf_backend_merge_symbol_attribute): Define.
	* elf32-m68hc12.c (elf_backend_merge_symbol_attribute): Define.

gas/testsuite/
	* gas/all/gas.exp (redef2): xfail m6811 and m6812.
	* gas/elf/elf.exp: Use is_elf_format.
	* gas/symver/symver.exp: Likewise.
	* gas/m68hc11/m68hc11.exp: Simplify target test.
	Add -m68hc11 to error tests that pass for hc12.

ld/testsuite/
	* ld-m68hc11/m68hc11.exp: Run for m68hc11-*-* and m68hc12-*-*.
	* ld-m68hc11/adj-brset.d: Remove redundant #target line.  Add
	-m m68hc11elf to ld invocation.
	* ld-m68hc11/adj-jump.d: Likewise.
	* ld-m68hc11/bug-1403.d: Likewise.
	* ld-m68hc11/bug-1417.d: Likewise.
	* ld-m68hc11/bug-3331.d: Likewise.
	* ld-m68hc11/relax-direct.d: Likewise.
	* ld-m68hc11/relax-group.d: Likewise.
	* ld-m68hc11/far-hc11.d: Remove redundant #target line.  Adjust for
	changed addresses.
	* ld-m68hc11/far-hc12.d: Remove redundant #target line.
	* ld-m68hc11/link-hcs12.d: Likewise, and adjust for header changes.

Index: bfd/elf32-m68hc1x.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-m68hc1x.c,v
retrieving revision 1.40
diff -u -p -r1.40 elf32-m68hc1x.c
--- bfd/elf32-m68hc1x.c	2 Jun 2011 13:43:14 -0000	1.40
+++ bfd/elf32-m68hc1x.c	10 Feb 2012 03:32:25 -0000
@@ -1,6 +1,6 @@
 /* Motorola 68HC11/HC12-specific support for 32-bit ELF
    Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
-   2009, 2010, 2011  Free Software Foundation, Inc.
+   2009, 2010, 2011, 2012 Free Software Foundation, Inc.
    Contributed by Stephane Carrez (stcarrez@nerim.fr)
 
    This file is part of BFD, the Binary File Descriptor library.
@@ -214,6 +214,20 @@ elf32_m68hc11_add_symbol_hook (bfd *abfd
   return TRUE;
 }
 
+/* Merge non-visibility st_other attributes, STO_M68HC12_FAR and
+   STO_M68HC12_INTERRUPT.  */
+
+void
+elf32_m68hc11_merge_symbol_attribute (struct elf_link_hash_entry *h,
+				      const Elf_Internal_Sym *isym,
+				      bfd_boolean definition,
+				      bfd_boolean dynamic ATTRIBUTE_UNUSED)
+{
+  if (definition)
+    h->other = ((isym->st_other & ~ELF_ST_VISIBILITY (-1))
+		| ELF_ST_VISIBILITY (h->other));
+}
+
 /* External entry points for sizing and building linker stubs.  */
 
 /* Set up various things so that we can make a list of input sections
Index: bfd/elf32-m68hc1x.h
===================================================================
RCS file: /cvs/src/src/bfd/elf32-m68hc1x.h,v
retrieving revision 1.11
diff -u -p -r1.11 elf32-m68hc1x.h
--- bfd/elf32-m68hc1x.h	4 Feb 2010 09:16:39 -0000	1.11
+++ bfd/elf32-m68hc1x.h	10 Feb 2012 03:32:25 -0000
@@ -1,5 +1,5 @@
 /* Motorola 68HC11/68HC12-specific support for 32-bit ELF
-   Copyright 2003, 2004, 2005, 2006, 2007, 2009, 2010
+   Copyright 2003, 2004, 2005, 2006, 2007, 2009, 2010, 2012
    Free Software Foundation, Inc.
    Contributed by Stephane Carrez (stcarrez@nerim.fr)
 
@@ -176,6 +176,10 @@ bfd_boolean elf32_m68hc11_add_symbol_hoo
    flagword *flagsp, asection **secp,
    bfd_vma *valp);
 
+void elf32_m68hc11_merge_symbol_attribute
+  (struct elf_link_hash_entry *, const Elf_Internal_Sym *,
+   bfd_boolean, bfd_boolean);
+
 /* Tweak the OSABI field of the elf header.  */
 
 extern void elf32_m68hc11_post_process_headers (bfd*, struct bfd_link_info*);
Index: bfd/elf32-m68hc11.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-m68hc11.c,v
retrieving revision 1.40
diff -u -p -r1.40 elf32-m68hc11.c
--- bfd/elf32-m68hc11.c	25 Aug 2010 14:53:42 -0000	1.40
+++ bfd/elf32-m68hc11.c	10 Feb 2012 03:32:24 -0000
@@ -1,5 +1,5 @@
 /* Motorola 68HC11-specific support for 32-bit ELF
-   Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2010
+   Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2010, 2012
    Free Software Foundation, Inc.
    Contributed by Stephane Carrez (stcarrez@nerim.fr)
    (Heavily copied from the D10V port by Martin Hunt (hunt@cygnus.com))
@@ -1302,6 +1302,7 @@ static const struct bfd_elf_special_sect
 #define elf_backend_final_write_processing	0
 #define elf_backend_can_gc_sections		1
 #define elf_backend_special_sections  elf32_m68hc11_special_sections
+#define elf_backend_merge_symbol_attribute elf32_m68hc11_merge_symbol_attribute
 
 #define bfd_elf32_bfd_link_hash_table_create \
                                 m68hc11_elf_bfd_link_hash_table_create
Index: bfd/elf32-m68hc12.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-m68hc12.c,v
retrieving revision 1.30
diff -u -p -r1.30 elf32-m68hc12.c
--- bfd/elf32-m68hc12.c	25 Aug 2010 14:53:42 -0000	1.30
+++ bfd/elf32-m68hc12.c	10 Feb 2012 03:32:24 -0000
@@ -1,5 +1,5 @@
 /* Motorola 68HC12-specific support for 32-bit ELF
-   Copyright 1999, 2000, 2002, 2003, 2004, 2005, 2006, 2007
+   Copyright 1999, 2000, 2002, 2003, 2004, 2005, 2006, 2007, 2010, 2012
    Free Software Foundation, Inc.
    Contributed by Stephane Carrez (stcarrez@nerim.fr)
    (Heavily copied from the D10V port by Martin Hunt (hunt@cygnus.com))
@@ -581,6 +581,7 @@ static const struct bfd_elf_special_sect
 #define elf_backend_special_sections elf32_m68hc12_special_sections
 #define elf_backend_post_process_headers     elf32_m68hc11_post_process_headers
 #define elf_backend_add_symbol_hook  elf32_m68hc11_add_symbol_hook
+#define elf_backend_merge_symbol_attribute elf32_m68hc11_merge_symbol_attribute
 
 #define bfd_elf32_bfd_link_hash_table_create \
                                 m68hc12_elf_bfd_link_hash_table_create
Index: gas/testsuite/gas/all/gas.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/all/gas.exp,v
retrieving revision 1.74
diff -u -p -r1.74 gas.exp
--- gas/testsuite/gas/all/gas.exp	14 May 2011 00:52:07 -0000	1.74
+++ gas/testsuite/gas/all/gas.exp	10 Feb 2012 06:27:48 -0000
@@ -132,9 +132,11 @@ case $target_triplet in {
 	run_dump_test redef
 	# These targets fail redef2 because they disallow redefined
 	# symbols on relocs.
-	setup_xfail "m68hc*-*-*" "rx-*-*" "vax*-*-*" "z8k-*-*"
+	setup_xfail "m68hc1*-*-*" "m6811-*-*" "m6812-*-*"
+	setup_xfail "rx-*-*" "vax*-*-*" "z8k-*-*"
 	run_dump_test redef2
-	setup_xfail "m68hc*-*-*" "rx-*-*" "vax*-*-*" "z8k-*-*"
+	setup_xfail "m68hc1*-*-*" "m6811-*-*" "m6812-*-*"
+	setup_xfail "rx-*-*" "vax*-*-*" "z8k-*-*"
 	# rs6000-aix disallows redefinition via .comm.
 	setup_xfail "*-*-aix*"
 	# SOM uses a different syntax for .comm
Index: gas/testsuite/gas/elf/elf.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/elf/elf.exp,v
retrieving revision 1.78
diff -u -p -r1.78 elf.exp
--- gas/testsuite/gas/elf/elf.exp	4 Aug 2011 20:20:11 -0000	1.78
+++ gas/testsuite/gas/elf/elf.exp	10 Feb 2012 06:27:52 -0000
@@ -37,19 +37,7 @@ proc run_elf_list_test { name suffix opt
 }
 
 # We're testing bits in obj-elf -- don't run on anything else.
-if { ([istarget "*-*-*elf*"]
-      || [istarget "*-*-linux*"]
-      || [istarget "*-*-gnu*"]
-      || [istarget "m6811-*"]
-      || [istarget "m6812-*"]
-      || [istarget "sparc*-*-solaris*"]
-      || [istarget "mips*-*-irix6*"]
-      || [istarget "arm*-*-eabi"])
-     && ![istarget *-*-linux*aout*]
-     && ![istarget *-*-linux*coff*]
-     && ![istarget *-*-linux*oldld*]
-     && ![istarget sh64*-*-linux*]
-} then {
+if { [is_elf_format] } then {
     set target_machine ""
     if {[istarget "mips*-*-*"]} then {
 	set target_machine -mips
Index: gas/testsuite/gas/m68hc11/m68hc11.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/m68hc11/m68hc11.exp,v
retrieving revision 1.7
diff -u -p -r1.7 m68hc11.exp
--- gas/testsuite/gas/m68hc11/m68hc11.exp	1 Aug 2004 19:59:51 -0000	1.7
+++ gas/testsuite/gas/m68hc11/m68hc11.exp	10 Feb 2012 06:27:52 -0000
@@ -1,14 +1,10 @@
 #
 # Some generic m68HC11 tests
 #
-if ![istarget "m68hc11-*-*"] then {
-    if ![istarget "m6811-*-*"] then {
-	if ![istarget "m68hc12-*-*"] then {
-	    if ![istarget "m6812-*-*"] then {
-		return
-	    }
-	}
-    }
+if { ![istarget "m68hc1*-*-*"]
+     && ![istarget "m6811-*-*"]
+     && ![istarget "m6812-*-*"] } then {
+    return
 }
 
 # Simple test for --print-opcodes (list of supported opcodes)
@@ -80,21 +76,21 @@ proc gas_m68hc11_warning { options line 
 
 # ------------------
 # 68HC11 error tests
-gas_m68hc11_error "" "puld\n" "Opcode .puld. is not recognized"
+gas_m68hc11_error "-m68hc11" "puld\n" "Opcode .puld. is not recognized"
 gas_m68hc11_error "" "ldab\n" "Invalid operand for .ldab."
-gas_m68hc11_error "" "ldab 256,x\n" "Operand out of 8-bit range:.*256"
-gas_m68hc11_error "" "ldab 257,y\n" "Operand out of 8-bit range:.*257"
-gas_m68hc11_error "" "ldab -1,y\n" "Operand out of 8-bit range:.*-1"
-gas_m68hc11_error "" "ldab bar,y\nbar=300" "value of 300 too large for field of 1 byte"
+gas_m68hc11_error "-m68hc11" "ldab 256,x\n" "Operand out of 8-bit range:.*256"
+gas_m68hc11_error "-m68hc11" "ldab 257,y\n" "Operand out of 8-bit range:.*257"
+gas_m68hc11_error "-m68hc11" "ldab -1,y\n" "Operand out of 8-bit range:.*-1"
+gas_m68hc11_error "-m68hc11" "ldab bar,y\nbar=300" "value of 300 too large for field of 1 byte"
 gas_m68hc11_error "" "jmp \#23\n" "Immediate operand is not allowed"
-gas_m68hc11_error "" "ldab \[d,pc\]\n" "Indirect indexed addressing is not valid for 68HC11"
+gas_m68hc11_error "-m68hc11" "ldab \[d,pc\]\n" "Indirect indexed addressing is not valid for 68HC11"
 gas_m68hc11_error "" "ldab ,t\n" "Spurious .,. or bad indirect register"
 gas_m68hc11_error "" "ldab 1,t\n" "Garbage at end of instruction:.*,t"
 gas_m68hc11_error "" "ldab 1,,x\n" "Garbage at end of instruction:.*,x"
-gas_m68hc11_error "" "ldab 1,+x\n" "Pre-increment mode is not valid"
-gas_m68hc11_error "" "ldab 1,-x\n" "Pre-increment mode is not valid"
-gas_m68hc11_error "" "ldab 1,x+\n" "Post-increment mode is not valid"
-gas_m68hc11_error "" "ldab 1,x-\n" "Post-decrement mode is not valid"
+gas_m68hc11_error "-m68hc11" "ldab 1,+x\n" "Pre-increment mode is not valid"
+gas_m68hc11_error "-m68hc11" "ldab 1,-x\n" "Pre-increment mode is not valid"
+gas_m68hc11_error "-m68hc11" "ldab 1,x+\n" "Post-increment mode is not valid"
+gas_m68hc11_error "-m68hc11" "ldab 1,x-\n" "Post-decrement mode is not valid"
 gas_m68hc11_error "" "ldd \#65536\n" "Operand out of 16-bit range"
 gas_m68hc11_error "--short-branchs" "bne 200\n" \
     "Operand out of range for a relative branch"
Index: gas/testsuite/gas/symver/symver.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/symver/symver.exp,v
retrieving revision 1.6
diff -u -p -r1.6 symver.exp
--- gas/testsuite/gas/symver/symver.exp	20 Nov 2010 15:36:33 -0000	1.6
+++ gas/testsuite/gas/symver/symver.exp	10 Feb 2012 06:27:53 -0000
@@ -15,13 +15,7 @@ proc run_error_test { name opts } {
 }
 
 # symver is only supported by ELF targets.
-if { ([istarget "*-*-elf*"]		
-      || [istarget "m6811-*"]
-      || [istarget "m6812-*"]
-      || [istarget "*-*-linux*"]
-      || [istarget "*-*-gnu*"])
-     && ![istarget *-*-linux*aout*]
-     && ![istarget *-*-linux*oldld*] } then {
+if { [is_elf_format] } then {
 
     if {[istarget "ia64-*"]} then {
       return
Index: ld/testsuite/ld-m68hc11/m68hc11.exp
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-m68hc11/m68hc11.exp,v
retrieving revision 1.4
diff -u -p -r1.4 m68hc11.exp
--- ld/testsuite/ld-m68hc11/m68hc11.exp	2 Sep 2009 07:25:40 -0000	1.4
+++ ld/testsuite/ld-m68hc11/m68hc11.exp	10 Feb 2012 03:33:11 -0000
@@ -22,7 +22,8 @@
 
 # Test 68HC11 relaxing.  This tests the assembler as well as the linker.
 
-if { ![istarget m6811-*-*] && ![istarget m6812-*-*] } {
+if { ![istarget m6811-*-*] && ![istarget m6812-*-*]
+     && ![istarget m68hc11-*-*] && ![istarget m68hc12-*-*] } {
     return
 }
 
Index: ld/testsuite/ld-m68hc11/adj-brset.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-m68hc11/adj-brset.d,v
retrieving revision 1.1
diff -u -p -r1.1 adj-brset.d
--- ld/testsuite/ld-m68hc11/adj-brset.d	14 Oct 2002 21:20:16 -0000	1.1
+++ ld/testsuite/ld-m68hc11/adj-brset.d	10 Feb 2012 03:33:11 -0000
@@ -1,8 +1,7 @@
 #source: adj-brset.s
 #as: -m68hc11
-#ld: --relax
+#ld: -m m68hc11elf --relax
 #objdump: -d --prefix-addresses -r
-#target: m6811-*-* m6812-*-*
 
 .*: +file format elf32\-m68hc11
 
Index: ld/testsuite/ld-m68hc11/adj-jump.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-m68hc11/adj-jump.d,v
retrieving revision 1.1
diff -u -p -r1.1 adj-jump.d
--- ld/testsuite/ld-m68hc11/adj-jump.d	14 Oct 2002 21:20:16 -0000	1.1
+++ ld/testsuite/ld-m68hc11/adj-jump.d	10 Feb 2012 03:33:11 -0000
@@ -1,8 +1,7 @@
 #source: adj-jump.s
 #as: -m68hc11
-#ld: --relax
+#ld: -m m68hc11elf --relax
 #objdump: -d --prefix-addresses -r
-#target: m6811-*-* m6812-*-*
 
 .*: +file format elf32\-m68hc11
 
Index: ld/testsuite/ld-m68hc11/bug-1403.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-m68hc11/bug-1403.d,v
retrieving revision 1.1
diff -u -p -r1.1 bug-1403.d
--- ld/testsuite/ld-m68hc11/bug-1403.d	14 Oct 2002 21:20:16 -0000	1.1
+++ ld/testsuite/ld-m68hc11/bug-1403.d	10 Feb 2012 03:33:11 -0000
@@ -1,8 +1,7 @@
 #source: bug-1403.s
 #as: -m68hc11
-#ld: --relax
+#ld: -m m68hc11elf --relax
 #objdump: -d --prefix-addresses -r
-#target: m6811-*-* m6812-*-*
 
 .*: +file format elf32-m68hc11
 
Index: ld/testsuite/ld-m68hc11/bug-1417.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-m68hc11/bug-1417.d,v
retrieving revision 1.2
diff -u -p -r1.2 bug-1417.d
--- ld/testsuite/ld-m68hc11/bug-1417.d	4 Apr 2003 21:17:59 -0000	1.2
+++ ld/testsuite/ld-m68hc11/bug-1417.d	10 Feb 2012 03:33:11 -0000
@@ -1,8 +1,7 @@
 #source: bug-1417.s
 #as: -m68hc11
-#ld: --relax
+#ld: -m m68hc11elf --relax
 #objdump: -d --prefix-addresses -r
-#target: m6811-*-* m6812-*-*
 
 .*: +file format elf32-m68hc11
 
Index: ld/testsuite/ld-m68hc11/bug-3331.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-m68hc11/bug-3331.d,v
retrieving revision 1.1
diff -u -p -r1.1 bug-3331.d
--- ld/testsuite/ld-m68hc11/bug-3331.d	26 Apr 2003 11:53:36 -0000	1.1
+++ ld/testsuite/ld-m68hc11/bug-3331.d	10 Feb 2012 03:33:11 -0000
@@ -1,8 +1,7 @@
 #source: bug-3331.s
 #as: -m68hc11
-#ld: --relax
+#ld: -m m68hc11elf --relax
 #objdump: -d --prefix-addresses -r
-#target: m6811-*-* m6812-*-*
 
 .*: +file format elf32-m68hc11
 
Index: ld/testsuite/ld-m68hc11/far-hc11.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-m68hc11/far-hc11.d,v
retrieving revision 1.1
diff -u -p -r1.1 far-hc11.d
--- ld/testsuite/ld-m68hc11/far-hc11.d	21 Apr 2003 13:30:14 -0000	1.1
+++ ld/testsuite/ld-m68hc11/far-hc11.d	10 Feb 2012 03:33:11 -0000
@@ -2,31 +2,30 @@
 #as: -m68hc11
 #ld: -m m68hc11elf
 #objdump: -d --prefix-addresses -r
-#target: m6811-*-* m6812-*-*
 
 .*:     file format elf32-m68hc11
 
 Disassembly of section .text:
 0+8000 <tramp._far_foo> pshb
 0+8001 <tramp._far_foo\+0x1> ldab	\#0
-0+8003 <tramp._far_foo\+0x3> ldy	\#0+6c <_far_foo>
+0+8003 <tramp._far_foo\+0x3> ldy	\#0+8072 <_far_foo>
 0+8007 <tramp._far_foo\+0x7> jmp	0+8056 <__far_trampoline>
 0+800a <tramp._far_bar> pshb
 0+800b <tramp._far_bar\+0x1> ldab	\#0
-0+800d <tramp._far_bar\+0x3> ldy	\#0+64 <stack>
+0+800d <tramp._far_bar\+0x3> ldy	\#0+806a .*
 0+8011 <tramp._far_bar\+0x7> jmp	0+8056 <__far_trampoline>
 0+8014 <_start> lds	\#0+64 <stack>
-0+8017 <_start\+0x3> ldx	\#0+abcd <__data_image\+0x2b63>
+0+8017 <_start\+0x3> ldx	\#0+abcd .*
 0+801a <_start\+0x6> pshx
-0+801b <_start\+0x7> ldd	\#0+1234 <__data_section_start\+0x134>
-0+801e <_start\+0xa> ldx	\#0+5678 <__data_section_start\+0x4578>
+0+801b <_start\+0x7> ldd	\#0+1234 .*
+0+801e <_start\+0xa> ldx	\#0+5678 .*
 0+8021 <_start\+0xd> jsr	0+800a <tramp._far_bar>
-0+8024 <_start\+0x10> cpx	\#0+1234 <__data_section_start\+0x134>
+0+8024 <_start\+0x10> cpx	\#0+1234 .*
 0+8027 <_start\+0x13> bne	0+804e <fail>
-0+8029 <_start\+0x15> cpd	\#0+5678 <__data_section_start\+0x4578>
+0+8029 <_start\+0x15> cpd	\#0+5678 .*
 0+802d <_start\+0x19> bne	0+804e <fail>
 0+802f <_start\+0x1b> pulx
-0+8030 <_start\+0x1c> cpx	\#0+abcd <__data_image\+0x2b63>
+0+8030 <_start\+0x1c> cpx	\#0+abcd .*
 0+8033 <_start\+0x1f> bne	0+804e <fail>
 0+8035 <_start\+0x21> ldd	\#0+8000 <tramp._far_foo>
 0+8038 <_start\+0x24> xgdx
@@ -35,7 +34,7 @@ Disassembly of section .text:
 0+803e <_start\+0x2a> xgdy
 0+8040 <_start\+0x2c> jsr	0,y
 0+8043 <_start\+0x2f> ldaa	\#0
-0+8045 <_start\+0x31> ldy	\#0+73 <_far_no_tramp>
+0+8045 <_start\+0x31> ldy	\#0+8079 <_far_no_tramp>
 0+8049 <_start\+0x35> bsr	0+8066 <__call_a16>
 0+804b <_start\+0x37> clra
 0+804c <_start\+0x38> clrb
@@ -59,15 +58,15 @@ Disassembly of section .text:
 0+8066 <__call_a16> psha
 0+8067 <__call_a16\+0x1> jmp	0,y
 Disassembly of section .bank1:
-0+64 <_far_bar> jsr	0+6b <local_bank1>
-0+67 <_far_bar\+0x3> xgdx
-0+68 <_far_bar\+0x4> jmp	0+8054 <__return>
-0+6b <local_bank1> rts
+0+806a <_far_bar> jsr	0+8071 <local_bank1>
+0+806d <_far_bar\+0x3> xgdx
+0+806e <_far_bar\+0x4> jmp	0+8054 <__return>
+0+8071 <local_bank1> rts
 Disassembly of section .bank2:
-0+6c <_far_foo> jsr	0+72 <local_bank2>
-0+6f <_far_foo\+0x3> jmp	0+8054 <__return>
-0+72 <local_bank2> rts
+0+8072 <_far_foo> jsr	0+8078 <local_bank2>
+0+8075 <_far_foo\+0x3> jmp	0+8054 <__return>
+0+8078 <local_bank2> rts
 Disassembly of section .bank3:
-0+73 <_far_no_tramp> jsr	0+79 <local_bank3>
-0+76 <_far_no_tramp\+0x3> jmp	0+8054 <__return>
-0+79 <local_bank3> rts
+0+8079 <_far_no_tramp> jsr	0+807f <local_bank3>
+0+807c <_far_no_tramp\+0x3> jmp	0+8054 <__return>
+0+807f <local_bank3> rts
Index: ld/testsuite/ld-m68hc11/far-hc12.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-m68hc11/far-hc12.d,v
retrieving revision 1.1
diff -u -p -r1.1 far-hc12.d
--- ld/testsuite/ld-m68hc11/far-hc12.d	21 Apr 2003 13:30:14 -0000	1.1
+++ ld/testsuite/ld-m68hc11/far-hc12.d	10 Feb 2012 03:33:11 -0000
@@ -2,7 +2,6 @@
 #as: -m68hc12
 #ld: -m m68hc12elf --script $srcdir/$subdir/far-hc12.ld
 #objdump: -d --prefix-addresses -r
-#target: m6811-*-* m6812-*-*
 
 .*:     file format elf32\-m68hc12
 
Index: ld/testsuite/ld-m68hc11/link-hcs12.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-m68hc11/link-hcs12.d,v
retrieving revision 1.1
diff -u -p -r1.1 link-hcs12.d
--- ld/testsuite/ld-m68hc11/link-hcs12.d	13 May 2003 19:11:45 -0000	1.1
+++ ld/testsuite/ld-m68hc11/link-hcs12.d	10 Feb 2012 03:33:11 -0000
@@ -3,17 +3,12 @@
 #as: -mshort
 #ld: -m m68hc12elf
 #objdump: -p -d --prefix-addresses -r
-#target: m6811-*-* m6812-*-*
 
 .*:     file format elf32\-m68hc12
 
 Program Header:
-    LOAD off    0x0+ vaddr 0x0+1000 paddr 0x0+1000 align 2\*\*12
-         filesz 0x0+100 memsz 0x0+100 flags rw-
     LOAD off    0x0+1000 vaddr 0x0+8000 paddr 0x0+8000 align 2\*\*12
          filesz 0x0+6 memsz 0x0+6 flags r-x
-    LOAD off    0x0+1100 vaddr 0x0+1100 paddr 0x0+8006 align 2\*\*12
-         filesz 0x0+ memsz 0x0+ flags rw-
 private flags = 22:\[abi=16\-bit int, 64\-bit double, cpu=HCS12\] \[memory=flat\]
 
 Disassembly of section .text:
Index: ld/testsuite/ld-m68hc11/relax-direct.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-m68hc11/relax-direct.d,v
retrieving revision 1.1
diff -u -p -r1.1 relax-direct.d
--- ld/testsuite/ld-m68hc11/relax-direct.d	14 Oct 2002 21:20:16 -0000	1.1
+++ ld/testsuite/ld-m68hc11/relax-direct.d	10 Feb 2012 03:33:11 -0000
@@ -1,8 +1,7 @@
 #source: relax-direct.s
 #as: -m68hc11
-#ld: --relax
+#ld: -m m68hc11elf --relax
 #objdump: -d --prefix-addresses -r
-#target: m6811-*-* m6812-*-*
 
 .*: +file format elf32-m68hc11
 
Index: ld/testsuite/ld-m68hc11/relax-group.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-m68hc11/relax-group.d,v
retrieving revision 1.1
diff -u -p -r1.1 relax-group.d
--- ld/testsuite/ld-m68hc11/relax-group.d	14 Oct 2002 21:20:16 -0000	1.1
+++ ld/testsuite/ld-m68hc11/relax-group.d	10 Feb 2012 03:33:11 -0000
@@ -1,8 +1,7 @@
 #source: relax-group.s
 #as: -m68hc11
-#ld: --relax
+#ld: -m m68hc11elf --relax
 #objdump: -d --prefix-addresses -r
-#target: m6811-*-* m6812-*-*
 
 .*: +file format elf32-m68hc11
 

-- 
Alan Modra
Australia Development Lab, IBM

Re: m68hc11 trampolines

[James Murray]

On Mon, 2012-02-13 at 13:02 +1030, Alan Modra wrote:
> On Thu, Feb 09, 2012 at 11:23:01PM +1030, Alan Modra wrote:
> > On Fri, Dec 30, 2011 at 02:12:54AM +0000, James Murray wrote:
> > > What does this mean and what needs doing to get the m68hc11 trampoline
> > > code back?
> > 
> > Try this.
> 

That's certainly more involved than the workaround I'd been using:

------------------------

diff -Nuar -x '.#*' -x CVS src-old/include/elf/m68hc11.h
src/include/elf/m68hc11.h
--- src-old/include/elf/m68hc11.h	2011-02-01 01:09:13.000000000 +0000
+++ src/include/elf/m68hc11.h	2012-01-02 00:33:35.000000000 +0000
@@ -86,10 +93,10 @@
 /* Special values for the st_other field in the symbol table.  These
    are used for 68HC12 to identify far functions (must be called with
    'call' and returns with 'rtc').  */
-#define STO_M68HC12_FAR 0x80
+#define STO_M68HC12_FAR 0x81 // was 0x80
 
 /* Identify interrupt handlers.  This is used by the debugger to
    correctly compute the stack frame.  */
-#define STO_M68HC12_INTERRUPT 0x40
+#define STO_M68HC12_INTERRUPT 0x41 // was 0x40
      
 #endif

------------------------

(I've not yet completed cleaning up my other work yet.)

regards

James Murray

Re: m68hc11 trampolines

[Alan Modra]

On Tue, Feb 14, 2012 at 11:08:25PM +0000, James Murray wrote:
> -#define STO_M68HC12_FAR 0x80
> +#define STO_M68HC12_FAR 0x81 // was 0x80

Ick, no, you can't hijack STV_INTERNAL for your own use like this.

-- 
Alan Modra
Australia Development Lab, IBM

Re: m68hc11 trampolines

[Jeffrey Walton]

On Tue, Feb 14, 2012 at 6:08 PM, James Murray <jsm@jsm-net.demon.co.uk> wrote:
> On Mon, 2012-02-13 at 13:02 +1030, Alan Modra wrote:
>> On Thu, Feb 09, 2012 at 11:23:01PM +1030, Alan Modra wrote:
>> > On Fri, Dec 30, 2011 at 02:12:54AM +0000, James Murray wrote:
>> > > What does this mean and what needs doing to get the m68hc11 trampoline
>> > > code back?
>> >
>> > Try this.
>>
>
> That's certainly more involved than the workaround I'd been using:
>
> ------------------------
>
> diff -Nuar -x '.#*' -x CVS src-old/include/elf/m68hc11.h
> src/include/elf/m68hc11.h
> --- src-old/include/elf/m68hc11.h       2011-02-01 01:09:13.000000000 +0000
> +++ src/include/elf/m68hc11.h   2012-01-02 00:33:35.000000000 +0000
> @@ -86,10 +93,10 @@
>  /* Special values for the st_other field in the symbol table.  These
>    are used for 68HC12 to identify far functions (must be called with
>    'call' and returns with 'rtc').  */
> -#define STO_M68HC12_FAR 0x80
> +#define STO_M68HC12_FAR 0x81 // was 0x80
>
>  /* Identify interrupt handlers.  This is used by the debugger to
>    correctly compute the stack frame.  */
> -#define STO_M68HC12_INTERRUPT 0x40
> +#define STO_M68HC12_INTERRUPT 0x41 // was 0x40
>
>  #endif
Trampolines are mutually exclusive with --noexecstack. I'd rather have
a +R +W -X stack than a trampoline.

Just sayin....

Jeff

Re: m68hc11 trampolines

[James Murray]

On Tue, 2012-02-14 at 18:51 -0500, Jeffrey Walton wrote:
> Trampolines are mutually exclusive with --noexecstack. I'd rather have
> a +R +W -X stack than a trampoline.

The hc11 trampolines don't use an executable stack, they reside in
non-banked flash.

Maybe I'm misunderstanding your comment ?

James