From mboxrd@z Thu Jan 1 00:00:00 1970 From: Nick Clifton To: binutils@sourceware.cygnus.com Subject: Re: Patch to change ARM register name set Date: Thu, 01 Jul 1999 00:00:00 -0000 Message-id: <199906151519.QAA08432@pathia.cygnus.co.uk> X-SW-Source: 1999-q2/msg00254.html Hi Richard, : A couple of niggles rather than anything consequential. : : Despite what I said about APCS reg names, the usage of r13, r14 and r15 is : so tightly defined by the architecture that I think it is worth preserving : the apcs-style names (sp, lr & pc respectively) for these even if using : the standard names. Use of 'fp' for r11 is more debatable since this : really is an apcs option. : : Second, the option to select this is, I think, a little unobvious unless : you already know what it is all about (what does "-M standard-names" : mean?). I'd prefer the option to be : --disassembler-options=reg-names-std : or : --disassembler-options=reg-names-apcs : : That way it is clear that the option refers to the register names and not : to some other feature of disassembly. : : Maybe there should be a : --disassembler-options=reg-names-raw : as well, that only uses r0-r15 as the names. I like it. OK here is a second revision of the patch, which implements your suggestions above: Cheers Nick --ChangeLog for include------------------------------------------------ 1999-06-14 Nick Clifton * dis-asm.h (arm_toggle_regnames): New prototype. (struct diassemble_info): New field: disassembler_options. --ChangeLog for opcodes------------------------------------------------ 1999-06-14 Nick Clifton & Drew Mosley * arm-dis.c (arm_regnames): Turn into a pointer to a register name set. (arm_regnames_standard): New variable: Array of ARM register names according to ARM instruction set nomenclature. (arm_regnames_apcs): New variable: Array of ARM register names according to ARM Procedure Call Standard. (arm_regnames_raw): New variable: Array of ARM register names using just 'r' and the register number. (arm_toggle_regnames): New function: Toggle the chosen register set naming scheme. (parse_disassembler_options): New function: Parse any target disassembler command line options. (print_insn_big_arm): Call parse_disassembler_options if any are defined. (print_insn_little_arm): Call parse_disassembler_options if any are defined. --ChangeLog for binutils------------------------------------------------ 1999-06-14 Nick Clifton * objdump.c (disassembler_options): New variable. (usage): Document new -M/--disassembler-options option. (long_options): Add --disassembler-options. (disassemble_data): Initialise disassembler_options field of disassembler_info structure. (main): Add parsing of -M option. * binutils.texi: Document new command line switch to objdump. * NEWS: Describe new command line switch to objdump. Index: include/dis-asm.h =================================================================== RCS file: /cvs/binutils/binutils/include/dis-asm.h,v retrieving revision 1.1.1.1 diff -p -r1.1.1.1 dis-asm.h *** dis-asm.h 1999/05/03 07:29:01 1.1.1.1 --- dis-asm.h 1999/06/15 15:16:11 *************** typedef struct disassemble_info { *** 133,138 **** --- 133,141 ---- zero if unknown. */ bfd_vma target2; /* Second target address for dref2 */ + /* Command line options specific to the target disassembler. */ + char * disassembler_options; + } disassemble_info; *************** extern int print_insn_v850 PARAMS ((bfd *** 180,185 **** --- 183,190 ---- extern int print_insn_tic30 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_vax PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_tic80 PARAMS ((bfd_vma, disassemble_info*)); + + extern int arm_toggle_regnames PARAMS ((void)); /* Fetch the disassembler for a given BFD, if that support is available. */ extern disassembler_ftype disassembler PARAMS ((bfd *)); Index: opcodes/arm-dis.c =================================================================== RCS file: /cvs/binutils/binutils/opcodes/arm-dis.c,v retrieving revision 1.2 diff -p -r1.2 arm-dis.c *** arm-dis.c 1999/06/04 07:14:10 1.2 --- arm-dis.c 1999/06/15 15:16:12 *************** *** 1,5 **** /* Instruction printing code for the ARM ! Copyright (C) 1994, 95, 96, 97, 1998 Free Software Foundation, Inc. Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org) Modification by James G. Smith (jsmith@cygnus.co.uk) --- 1,5 ---- /* Instruction printing code for the ARM ! Copyright (C) 1994, 95, 96, 97, 1998, 1999 Free Software Foundation, Inc. Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org) Modification by James G. Smith (jsmith@cygnus.co.uk) *************** static char *arm_conditional[] = *** 35,44 **** {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc", "hi", "ls", "ge", "lt", "gt", "le", "", "nv"}; ! static char *arm_regnames[] = {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", ! "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc"}; static char *arm_fp_const[] = {"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"}; --- 35,55 ---- {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc", "hi", "ls", "ge", "lt", "gt", "le", "", "nv"}; ! static char *arm_regnames_raw[] = {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", ! "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"}; + static char *arm_regnames_standard[] = + {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc"}; + + static char *arm_regnames_apcs[] = + {"a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", + "v5", "v6", "sl", "fp", "ip", "sp", "lr", "pc"}; + + /* Choose which register name set to use. */ + static char **arm_regnames = arm_regnames_standard; + static char *arm_fp_const[] = {"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"}; *************** print_insn_thumb (pc, info, given) *** 742,747 **** --- 753,797 ---- abort (); } + /* Select a different register name set. + Returns true if the name set selected is the APCS name set. */ + int + arm_toggle_regnames () + { + if (arm_regnames == arm_regnames_standard) + arm_regnames = arm_regnames_apcs; + else + arm_regnames = arm_regnames_standard; + + return arm_regnames == arm_regnames_apcs; + } + + static void + parse_disassembler_options (options) + char * options; + { + if (options == NULL) + return; + + if (strncmp (options, "reg-names-", 10) == 0) + { + options += 10; + + if (strcmp (options, "std") == 0) + arm_regnames = arm_regnames_standard; + else if (strcmp (options, "apcs") == 0) + arm_regnames = arm_regnames_apcs; + else if (strcmp (options, "raw") == 0) + arm_regnames = arm_regnames_raw; + else + fprintf (stderr, "Unrecognised register name set: %s\n", options); + } + else + fprintf (stderr, "Unrecognised disassembler option: %s\n", options); + + return; + } + /* NOTE: There are no checks in these routines that the relevant number of data bytes exist */ int *************** print_insn_big_arm (pc, info) *** 756,761 **** --- 806,819 ---- elf_symbol_type *es; int is_thumb; + if (info->disassembler_options) + { + parse_disassembler_options (info->disassembler_options); + + /* To avoid repeated parsing of this option, we remove it here. */ + info->disassembler_options = NULL; + } + is_thumb = false; if (info->symbols != NULL) { *************** print_insn_little_arm (pc, info) *** 838,843 **** --- 896,909 ---- elf_symbol_type *es; int is_thumb; + if (info->disassembler_options) + { + parse_disassembler_options (info->disassembler_options); + + /* To avoid repeated parsing of this option, we remove it here. */ + info->disassembler_options = NULL; + } + is_thumb = false; if (info->symbols != NULL) { Index: binutils/objdump.c =================================================================== RCS file: /cvs/binutils/binutils/binutils/objdump.c,v retrieving revision 1.4 diff -p -r1.4 objdump.c *** objdump.c 1999/06/13 19:02:25 1.4 --- objdump.c 1999/06/15 15:16:12 *************** struct objdump_disasm_info { *** 83,88 **** --- 83,91 ---- /* Architecture to disassemble for, or default if NULL. */ static char *machine = (char *) NULL; + /* Target specific options to the disassembler. */ + static char *disassembler_options = (char *) NULL; + /* Endianness to disassemble for, or default if BFD_ENDIAN_UNKNOWN. */ static enum bfd_endian endian = BFD_ENDIAN_UNKNOWN; *************** usage (stream, status) *** 217,223 **** int status; { fprintf (stream, _("\ ! Usage: %s [-ahifCdDprRtTxsSlw] [-b bfdname] [-m machine] [-j section-name]\n\ [--archive-headers] [--target=bfdname] [--debugging] [--disassemble]\n\ [--disassemble-all] [--disassemble-zeroes] [--file-headers]\n\ [--section-headers] [--headers]\n\ --- 220,227 ---- int status; { fprintf (stream, _("\ ! Usage: %s [-ahifCdDprRtTxsSlw] [-b bfdname] [-m machine] \n\ ! [-j section-name] [-M disassembler-options]\n\ [--archive-headers] [--target=bfdname] [--debugging] [--disassemble]\n\ [--disassemble-all] [--disassemble-zeroes] [--file-headers]\n\ [--section-headers] [--headers]\n\ *************** static struct option long_options[]= *** 255,260 **** --- 259,265 ---- {"demangle", no_argument, &do_demangle, 1}, {"disassemble", no_argument, NULL, 'd'}, {"disassemble-all", no_argument, NULL, 'D'}, + {"disassembler-options", required_argument, NULL, 'M'}, {"disassemble-zeroes", no_argument, &disassemble_zeroes, 1}, {"dynamic-reloc", no_argument, NULL, 'R'}, {"dynamic-syms", no_argument, NULL, 'T'}, *************** disassemble_data (abfd) *** 1564,1569 **** --- 1569,1576 ---- disasm_info.flavour = bfd_get_flavour (abfd); disasm_info.arch = bfd_get_arch (abfd); disasm_info.mach = bfd_get_mach (abfd); + disasm_info.disassembler_options = disassembler_options; + if (bfd_big_endian (abfd)) disasm_info.display_endian = disasm_info.endian = BFD_ENDIAN_BIG; else if (bfd_little_endian (abfd)) *************** main (argc, argv) *** 2694,2700 **** bfd_init (); set_default_bfd_target (); ! while ((c = getopt_long (argc, argv, "pib:m:VCdDlfahrRtTxsSj:wE:", long_options, (int *) 0)) != EOF) { --- 2701,2707 ---- bfd_init (); set_default_bfd_target (); ! while ((c = getopt_long (argc, argv, "pib:m:M:VCdDlfahrRtTxsSj:wE:", long_options, (int *) 0)) != EOF) { *************** main (argc, argv) *** 2706,2711 **** --- 2713,2721 ---- break; /* we've been given a long option */ case 'm': machine = optarg; + break; + case 'M': + disassembler_options = optarg; break; case 'j': only = optarg; Index: binutils/binutils.texi =================================================================== RCS file: /cvs/binutils/binutils/binutils/binutils.texi,v retrieving revision 1.4 diff -p -r1.4 binutils.texi *** binutils.texi 1999/06/14 01:30:17 1.4 --- binutils.texi 1999/06/15 15:16:13 *************** objdump [ -a | --archive-headers ] *** 1137,1142 **** --- 1137,1143 ---- [ -j @var{section} | --section=@var{section} ] [ -l | --line-numbers ] [ -S | --source ] [ -m @var{machine} | --architecture=@var{machine} ] + [ -M @var{options} | --disassembler-options=@var{options}] [ -p | --private-headers ] [ -r | --reloc ] [ -R | --dynamic-reloc ] [ -s | --full-contents ] [ --stabs ] *************** Specify the architecture to use when dis *** 1294,1299 **** --- 1295,1312 ---- can be useful when disassembling object files which do not describe architecture information, such as S-records. You can list the available architectures with the @samp{-i} option. + + @item -M @var{options} + @itemx --disassembler-options=@var{options} + Pass target specific information to the disassembler. Only supported on + some targets. + + If the target is an ARM architecture then this switch can be used to + select which register name set is used during disassembler. Specifying + @samp{--disassembler-options=standard_names} (the default) will select the + register names as used in ARM's instruction set documentation. Specifying + @samp{--disassembler-options=apcs_names} will select the name set used + by the ARM Procedure Call Standard. @item -p @itemx --private-headers Index: binutils/NEWS =================================================================== RCS file: /cvs/binutils/binutils/binutils/NEWS,v retrieving revision 1.3 diff -p -r1.3 NEWS *** NEWS 1999/06/12 15:42:04 1.3 --- NEWS 1999/06/15 15:16:13 *************** *** 2,7 **** --- 2,12 ---- Changes in binutils 2.10: + * New command line switch to objdump -M (or --disassembler-options) which takes + a parameter which can then be interpreted on a per-target basis by the + disassembler. Used by ARM targets to select register name sets, ISA or APCS + verions. + * objdump support for -mi386:intel which causes disassembly to be displayed with intel syntax.