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From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>
Subject: [PATCH 10/10] x86: correct/improve TSX controls
Date: Mon, 19 Dec 2022 11:48:31 +0100	[thread overview]
Message-ID: <1b04fb35-1f99-7353-4e8c-d643e8ffa975@suse.com> (raw)
In-Reply-To: <973d3274-7adc-3a7c-5aaa-916fd5adc093@suse.com>

TSXLDTRK takes RTM as a prereq. Additionally introduce an umbrella "tsx"
extension option covering both RTM and HLE, paralleling the "abm" one we
already have.

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1050,7 +1050,8 @@ static const arch_entry cpu_arch[] =
   SUBARCH (lzcnt, LZCNT, LZCNT, false),
   SUBARCH (popcnt, POPCNT, POPCNT, false),
   SUBARCH (hle, HLE, HLE, false),
-  SUBARCH (rtm, RTM, RTM, false),
+  SUBARCH (rtm, RTM, ANY_RTM, false),
+  SUBARCH (tsx, TSX, TSX, false),
   SUBARCH (invpcid, INVPCID, INVPCID, false),
   SUBARCH (clflush, CLFLUSH, CLFLUSH, false),
   SUBARCH (nop, NOP, NOP, false),
@@ -1112,7 +1113,7 @@ static const arch_entry cpu_arch[] =
   SUBARCH (rdpru, RDPRU, RDPRU, false),
   SUBARCH (mcommit, MCOMMIT, MCOMMIT, false),
   SUBARCH (sev_es, SEV_ES, ANY_SEV_ES, false),
-  SUBARCH (tsxldtrk, TSXLDTRK, TSXLDTRK, false),
+  SUBARCH (tsxldtrk, TSXLDTRK, ANY_TSXLDTRK, false),
   SUBARCH (kl, KL, ANY_KL, false),
   SUBARCH (widekl, WIDEKL, ANY_WIDEKL, false),
   SUBARCH (uintr, UINTR, UINTR, false),
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -227,6 +227,7 @@ accept various extension mnemonics.  For
 @code{popcnt},
 @code{hle},
 @code{rtm},
+@code{tsx},
 @code{invpcid},
 @code{clflush},
 @code{mwaitx},
@@ -1485,8 +1486,8 @@ supported on the CPU specified.  The cho
 @item @samp{.aes} @tab @samp{.pclmul} @tab @samp{.fma} @tab @samp{.fsgsbase}
 @item @samp{.rdrnd} @tab @samp{.f16c} @tab @samp{.avx2} @tab @samp{.bmi2}
 @item @samp{.lzcnt} @tab @samp{.popcnt} @tab @samp{.invpcid} @tab @samp{.vmfunc}
-@item @samp{.hle}
-@item @samp{.rtm} @tab @samp{.adx} @tab @samp{.rdseed} @tab @samp{.prfchw}
+@item @samp{.hle} @tab @samp{.rtm} @tab @samp{.tsx}
+@item @samp{.adx} @tab @samp{.rdseed} @tab @samp{.prfchw}
 @item @samp{.smap} @tab @samp{.mpx} @tab @samp{.sha} @tab @samp{.prefetchwt1}
 @item @samp{.clflushopt} @tab @samp{.xsavec} @tab @samp{.xsaves} @tab @samp{.se1}
 @item @samp{.avx512f} @tab @samp{.avx512cd} @tab @samp{.avx512er} @tab @samp{.avx512pf}
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -231,6 +231,10 @@ static const dependency isa_dependencies
     "SEV_ES" },
   { "RMPQUERY",
     "SNP" },
+  { "TSX",
+    "RTM|HLE" },
+  { "TSXLDTRK",
+    "RTM" },
   { "AMX_TILE",
     "XSAVE" },
   { "AMX_INT8",


  parent reply	other threads:[~2022-12-19 10:48 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-19  8:31 [PATCH 00/10] x86: re-work ISA extension dependency handling Jan Beulich
2022-12-19 10:44 ` [PATCH 01/10] " Jan Beulich
2022-12-19 10:45 ` [PATCH 02/10] x86: correct what gets disabled by certain ".arch .no*" Jan Beulich
2022-12-19 10:45 ` [PATCH 03/10] x86: correct SSE dependencies Jan Beulich
2022-12-19 10:45 ` [PATCH 04/10] x86: add dependencies on AVX2 Jan Beulich
2022-12-19 10:46 ` [PATCH 05/10] x86: rework noavx512-1 testcase Jan Beulich
2022-12-19 10:46 ` [PATCH 06/10] x86: correct dependencies of a few AVX512 sub-features Jan Beulich
2022-12-19 10:47 ` [PATCH 07/10] x86: correct XSAVE* dependencies Jan Beulich
2022-12-19 10:47 ` [PATCH 08/10] x86: add dependencies on VMX Jan Beulich
2022-12-19 10:48 ` [PATCH 09/10] x86: add dependencies on SVME Jan Beulich
2022-12-19 10:48 ` Jan Beulich [this message]
2022-12-20  2:25 ` [PATCH 00/10] x86: re-work ISA extension dependency handling H.J. Lu
2022-12-20  8:09   ` Jan Beulich

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