[PATCH 0/6] x86: a few more optimizations

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* [PATCH 0/6] x86: a few more optimizations
@ 2024-06-14 12:10 Jan Beulich
  2024-06-14 12:12 ` [PATCH 1/6] x86: optimize left-shift-by-1 Jan Beulich
                   ` (7 more replies)
  0 siblings, 8 replies; 22+ messages in thread
From: Jan Beulich @ 2024-06-14 12:10 UTC (permalink / raw)
  To: Binutils; +Cc: H.J. Lu, Lili Cui

APX {nf} insn forms present a number of interesting optimization
opportunities, often mostly for size. There are a few more that I'm
aware of, but where I'm less convinced that input code would really
ever be written like this:

1) Quite a few operations could be converted to plain MOV. For example

	{nf} xor %cl, %cl
	{nf} sub %cl, %cl
	{nf} and $0, %cl

can all be replaced by the much shorter

	mov	$0, %cl

2) Certain forms of IMUL{,ZU} with a power-of-2 immediate could be
converted to SHL. This could be beneficial even when size doesn't
shrink, for SHL still having better latency/throughput.

Thoughts?

Plus: Since, even if leaving out the further ones above, there are
quite a few {nf}-specific ones, I was wondering whether it would make
sense to put those in a separate optimize_nf_encoding() function, to
somewhat limit optimize_encoding()'s growth.

Two non-{nf} ones are here in addition, as I came to think of them
while doing the preparations / work.

1: optimize left-shift-by-1
2: optimize {nf} forms of ADD/SUB with immediate of 0x80
3: optimize {nf}-form rotate-by-width-less-1
4: optimize certain {nf}-form insns to LEA
5: optimize certain {nf}-form insns to BMI2 ones
6: optimize {,V}PEXTR{D,Q} with immediate of 0

Jan

^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 1/6] x86: optimize left-shift-by-1
  2024-06-14 12:10 [PATCH 0/6] x86: a few more optimizations Jan Beulich
@ 2024-06-14 12:12 ` Jan Beulich
  2024-06-17  2:56   ` Jiang, Haochen
  2024-06-14 12:12 ` [PATCH 2/6] x86/APX: optimize {nf} forms of ADD/SUB with immediate of 0x80 Jan Beulich
                   ` (6 subsequent siblings)
  7 siblings, 1 reply; 22+ messages in thread
From: Jan Beulich @ 2024-06-14 12:12 UTC (permalink / raw)
  To: Binutils; +Cc: H.J. Lu, Lili Cui

These can be replaced by adds when acting on a register operand.

While for the scalar forms there's no gain in encoding size, ADD
generally has higher throughput than SHL. Eflags set by ADD are a
superset of those set by SHL (AF in particular is undefined there).

For the SIMD cases the transformation also reduced code size, by
eliminating the 1-byte immediate from the resulting encoding. Note
that this transformation is not applied by gcc13 (according to my
observations), so would - as of now - even improve compiler generated
code.

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4775,6 +4775,43 @@ optimize_encoding (void)
        */
       i.tm.base_opcode = 0x84 | (i.tm.base_opcode & 1);
     }
+  else if (!optimize_for_space
+	   && i.tm.base_opcode == 0xd0
+	   && (i.tm.opcode_space == SPACE_BASE
+	       || i.tm.opcode_space == SPACE_EVEXMAP4)
+	   && !i.mem_operands)
+    {
+      /* Optimize: -O:
+	   shlb $1, %rN  -> addb %rN, %rN
+	   shlw $1, %rN  -> addw %rN, %rN
+	   shll $1, %rN  -> addl %rN, %rN
+	   shlq $1, %rN  -> addq %rN, %rN
+
+	   shlb $1, %rN, %rM  -> addb %rN, %rN, %rM
+	   shlw $1, %rN, %rM  -> addw %rN, %rN, %rM
+	   shll $1, %rN, %rM  -> addl %rN, %rN, %rM
+	   shlq $1, %rN, %rM  -> addq %rN, %rN, %rM
+       */
+      gas_assert (i.tm.extension_opcode == 4);
+      i.tm.base_opcode = 0x00;
+      i.tm.extension_opcode = None;
+      if (i.operands >= 2)
+	{
+	  i.tm.operand_types[0] = i.tm.operand_types[1];
+	  i.op[0].regs = i.op[1].regs;
+	  i.types[0] = i.types[1];
+	}
+      else
+	{
+	  /* Legacy form with omitted shift count operand.  */
+	  i.tm.operand_types[1] = i.tm.operand_types[0];
+	  i.op[1].regs = i.op[0].regs;
+	  i.types[1] = i.types[0];
+	  i.operands = 2;
+	}
+      i.reg_operands++;
+      i.imm_operands = 0;
+    }
   else if (i.tm.base_opcode == 0xba
 	   && i.tm.opcode_space == SPACE_0F
 	   && i.reg_operands == 1
@@ -5031,6 +5068,48 @@ optimize_encoding (void)
 	  i.op[1].regs = i.op[0].regs;
 	}
     }
+  else if (i.tm.extension_opcode == 6
+	   && i.tm.base_opcode >= 0x71
+	   && i.tm.base_opcode <= 0x73
+	   && i.tm.opcode_space == SPACE_0F
+	   && i.op[0].imms->X_op == O_constant
+	   && i.op[0].imms->X_add_number == 1
+	   && !i.mem_operands)
+    {
+      /* Optimize: -O:
+	   psllw $1, %mmxN          -> paddw %mmxN, %mmxN
+	   psllw $1, %xmmN          -> paddw %xmmN, %xmmN
+	   vpsllw $1, %xmmN, %xmmM  -> vpaddw %xmmN, %xmmN, %xmmM
+	   vpsllw $1, %ymmN, %ymmM  -> vpaddw %ymmN, %ymmN, %ymmM
+	   vpsllw $1, %zmmN, %zmmM  -> vpaddw %zmmN, %zmmN, %zmmM
+
+	   pslld $1, %mmxN          -> paddd %mmxN, %mmxN
+	   pslld $1, %xmmN          -> paddd %xmmN, %xmmN
+	   vpslld $1, %xmmN, %xmmM  -> vpaddd %xmmN, %xmmN, %xmmM
+	   vpslld $1, %ymmN, %ymmM  -> vpaddd %ymmN, %ymmN, %ymmM
+	   vpslld $1, %zmmN, %zmmM  -> vpaddd %zmmN, %zmmN, %zmmM
+
+	   psllq $1, %xmmN          -> paddq %xmmN, %xmmN
+	   vpsllq $1, %xmmN, %xmmM  -> vpaddq %xmmN, %xmmN, %xmmM
+	   vpsllq $1, %ymmN, %ymmM  -> vpaddq %ymmN, %ymmN, %ymmM
+	   vpsllq $1, %zmmN, %zmmM  -> vpaddq %zmmN, %zmmN, %zmmM
+	  */
+      if (i.tm.base_opcode != 0x73)
+	i.tm.base_opcode |= 0xfc; /* {,v}padd{w,d} */
+      else
+	{
+	  gas_assert (i.tm.operand_types[1].bitfield.class != RegMMX);
+	  i.tm.base_opcode = 0xd4; /* {,v}paddq */
+	}
+      i.tm.extension_opcode = None;
+      if (i.tm.opcode_modifier.vexvvvv)
+	i.tm.opcode_modifier.vexvvvv = VexVVVV_SRC1;
+      i.tm.operand_types[0] = i.tm.operand_types[1];
+      i.op[0].regs = i.op[1].regs;
+      i.types[0] = i.types[1];
+      i.reg_operands++;
+      i.imm_operands = 0;
+    }
   else if (optimize_for_space
 	   && i.tm.base_opcode == 0x59
 	   && i.tm.opcode_space == SPACE_0F38
--- a/gas/testsuite/gas/i386/optimize-2.d
+++ b/gas/testsuite/gas/i386/optimize-2.d
@@ -24,6 +24,18 @@ Disassembly of section .text:
  +[a-f0-9]+:	09 f6                	or     %esi,%esi
  +[a-f0-9]+:	87 0a                	xchg   %ecx,\(%edx\)
  +[a-f0-9]+:	87 11                	xchg   %edx,\(%ecx\)
+ +[a-f0-9]+:	d0 e2                	shl    \$1,%dl
+ +[a-f0-9]+:	d0 e2                	shl    \$1,%dl
+ +[a-f0-9]+:	66 d1 e2             	shl    \$1,%dx
+ +[a-f0-9]+:	66 d1 e2             	shl    \$1,%dx
+ +[a-f0-9]+:	d1 e2                	shl    \$1,%edx
+ +[a-f0-9]+:	d1 e2                	shl    \$1,%edx
+ +[a-f0-9]+:	d0 e2                	shl    \$1,%dl
+ +[a-f0-9]+:	d0 e2                	shl    \$1,%dl
+ +[a-f0-9]+:	66 d1 e2             	shl    \$1,%dx
+ +[a-f0-9]+:	66 d1 e2             	shl    \$1,%dx
+ +[a-f0-9]+:	d1 e2                	shl    \$1,%edx
+ +[a-f0-9]+:	d1 e2                	shl    \$1,%edx
  +[a-f0-9]+:	c5 f1 55 e9          	vandnpd %xmm1,%xmm1,%xmm5
  +[a-f0-9]+:	c5 f9 6f d1          	vmovdqa %xmm1,%xmm2
  +[a-f0-9]+:	c5 f9 6f d1          	vmovdqa %xmm1,%xmm2
@@ -164,5 +176,17 @@ Disassembly of section .text:
  +[a-f0-9]+:	66 .*	pcmpeqd %xmm2,%xmm2
  +[a-f0-9]+:	c5 .*	vpcmpeqd %xmm2,%xmm2,%xmm0
  +[a-f0-9]+:	c5 .*	vpcmpeqd %ymm2,%ymm2,%ymm0
+ +[a-f0-9]+:	0f .*	paddw  %mm2,%mm2
+ +[a-f0-9]+:	66 .*	paddw  %xmm2,%xmm2
+ +[a-f0-9]+:	c5 .*	vpaddw %xmm2,%xmm2,%xmm3
+ +[a-f0-9]+:	62 .*	vpaddw %xmm2,%xmm2,%xmm3\{%k4\}
+ +[a-f0-9]+:	0f .*	paddd  %mm2,%mm2
+ +[a-f0-9]+:	66 .*	paddd  %xmm2,%xmm2
+ +[a-f0-9]+:	c5 .*	vpaddd %ymm2,%ymm2,%ymm3
+ +[a-f0-9]+:	62 .*	vpaddd %ymm2,%ymm2,%ymm3\{%k4\}
+ +[a-f0-9]+:	0f .*	psllq  \$(0x)?1,%mm2
+ +[a-f0-9]+:	66 .*	paddq  %xmm2,%xmm2
+ +[a-f0-9]+:	c5 .*	vpaddq %xmm2,%xmm2,%xmm3
+ +[a-f0-9]+:	62 .*	vpaddq %zmm2,%zmm2,%zmm3
  +[a-f0-9]+:	c5 .*	vpunpcklqdq %xmm2,%xmm2,%xmm0
 #pass
--- a/gas/testsuite/gas/i386/optimize-2.s
+++ b/gas/testsuite/gas/i386/optimize-2.s
@@ -22,6 +22,24 @@ _start:
 	lock xchg %ecx, (%edx)
 	lock xchg (%ecx), %edx
 
+	shl	$1, %dl
+	shl	%dl
+
+	shl	$1, %dx
+	shl	%dx
+
+	shl	$1, %edx
+	shl	%edx
+
+	sal	$1, %dl
+	sal	%dl
+
+	sal	$1, %dx
+	sal	%dx
+
+	sal	$1, %edx
+	sal	%edx
+
 	vandnpd	%zmm1, %zmm1, %zmm5
 
 	vmovdqa32	%xmm1, %xmm2
@@ -184,4 +202,19 @@ _start:
 	vpcmpeqq	%xmm2, %xmm2, %xmm0
 	vpcmpeqq	%ymm2, %ymm2, %ymm0
 
+	psllw	$1, %mm2
+	psllw	$1, %xmm2
+	vpsllw	$1, %xmm2, %xmm3
+	vpsllw	$1, %xmm2, %xmm3{%k4}
+
+	pslld	$1, %mm2
+	pslld	$1, %xmm2
+	vpslld	$1, %ymm2, %ymm3
+	vpslld	$1, %ymm2, %ymm3{%k4}
+
+	psllq	$1, %mm2			# This needs leaving alone.
+	psllq	$1, %xmm2
+	vpsllq	$1, %xmm2, %xmm3
+	vpsllq	$1, %zmm2, %zmm3
+
 	vpbroadcastq	%xmm2, %xmm0
--- a/gas/testsuite/gas/i386/optimize-2b.d
+++ b/gas/testsuite/gas/i386/optimize-2b.d
@@ -25,6 +25,18 @@ Disassembly of section .text:
  +[a-f0-9]+:	85 f6                	test   %esi,%esi
  +[a-f0-9]+:	87 0a                	xchg   %ecx,\(%edx\)
  +[a-f0-9]+:	87 11                	xchg   %edx,\(%ecx\)
+ +[a-f0-9]+:	00 d2                	add    %dl,%dl
+ +[a-f0-9]+:	00 d2                	add    %dl,%dl
+ +[a-f0-9]+:	66 01 d2             	add    %dx,%dx
+ +[a-f0-9]+:	66 01 d2             	add    %dx,%dx
+ +[a-f0-9]+:	01 d2                	add    %edx,%edx
+ +[a-f0-9]+:	01 d2                	add    %edx,%edx
+ +[a-f0-9]+:	00 d2                	add    %dl,%dl
+ +[a-f0-9]+:	00 d2                	add    %dl,%dl
+ +[a-f0-9]+:	66 01 d2             	add    %dx,%dx
+ +[a-f0-9]+:	66 01 d2             	add    %dx,%dx
+ +[a-f0-9]+:	01 d2                	add    %edx,%edx
+ +[a-f0-9]+:	01 d2                	add    %edx,%edx
  +[a-f0-9]+:	c5 f1 55 e9          	vandnpd %xmm1,%xmm1,%xmm5
  +[a-f0-9]+:	c5 f9 6f d1          	vmovdqa %xmm1,%xmm2
  +[a-f0-9]+:	c5 f9 6f d1          	vmovdqa %xmm1,%xmm2
@@ -165,5 +177,17 @@ Disassembly of section .text:
  +[a-f0-9]+:	66 .*	pcmpeqq %xmm2,%xmm2
  +[a-f0-9]+:	c4 .*	vpcmpeqq %xmm2,%xmm2,%xmm0
  +[a-f0-9]+:	c4 .*	vpcmpeqq %ymm2,%ymm2,%ymm0
+ +[a-f0-9]+:	0f .*	paddw  %mm2,%mm2
+ +[a-f0-9]+:	66 .*	paddw  %xmm2,%xmm2
+ +[a-f0-9]+:	c5 .*	vpaddw %xmm2,%xmm2,%xmm3
+ +[a-f0-9]+:	62 .*	vpaddw %xmm2,%xmm2,%xmm3\{%k4\}
+ +[a-f0-9]+:	0f .*	paddd  %mm2,%mm2
+ +[a-f0-9]+:	66 .*	paddd  %xmm2,%xmm2
+ +[a-f0-9]+:	c5 .*	vpaddd %ymm2,%ymm2,%ymm3
+ +[a-f0-9]+:	62 .*	vpaddd %ymm2,%ymm2,%ymm3\{%k4\}
+ +[a-f0-9]+:	0f .*	psllq  \$(0x)?1,%mm2
+ +[a-f0-9]+:	66 .*	paddq  %xmm2,%xmm2
+ +[a-f0-9]+:	c5 .*	vpaddq %xmm2,%xmm2,%xmm3
+ +[a-f0-9]+:	62 .*	vpaddq %zmm2,%zmm2,%zmm3
  +[a-f0-9]+:	c4 .*	vpbroadcastq %xmm2,%xmm0
 #pass
--- a/gas/testsuite/gas/i386/x86-64-optimize-1.d
+++ b/gas/testsuite/gas/i386/x86-64-optimize-1.d
@@ -95,4 +95,28 @@ Disassembly of section .text:
  +[a-f0-9]+:	d5 50 29 c9          	sub    %r17d,%r17d
  +[a-f0-9]+:	62 ec 74 10 28 d1    	sub    %r18b,%r17b,%r17b
  +[a-f0-9]+:	d5 50 29 c9          	sub    %r17d,%r17d
+ +[a-f0-9]+:	00 d2                	add    %dl,%dl
+ +[a-f0-9]+:	66 01 d2             	add    %dx,%dx
+ +[a-f0-9]+:	01 d2                	add    %edx,%edx
+ +[a-f0-9]+:	48 01 d2             	add    %rdx,%rdx
+ +[a-f0-9]+:	00 d2                	add    %dl,%dl
+ +[a-f0-9]+:	66 01 d2             	add    %dx,%dx
+ +[a-f0-9]+:	01 d2                	add    %edx,%edx
+ +[a-f0-9]+:	48 01 d2             	add    %rdx,%rdx
+ +[a-f0-9]+:	62 f4 7c 18 00 d2    	add    %dl,%dl,%al
+ +[a-f0-9]+:	62 f4 7d 18 01 d2    	add    %dx,%dx,%ax
+ +[a-f0-9]+:	62 f4 7c 18 01 d2    	add    %edx,%edx,%eax
+ +[a-f0-9]+:	62 f4 fc 18 01 d2    	add    %rdx,%rdx,%rax
+ +[a-f0-9]+:	00 d2                	add    %dl,%dl
+ +[a-f0-9]+:	66 01 d2             	add    %dx,%dx
+ +[a-f0-9]+:	01 d2                	add    %edx,%edx
+ +[a-f0-9]+:	48 01 d2             	add    %rdx,%rdx
+ +[a-f0-9]+:	00 d2                	add    %dl,%dl
+ +[a-f0-9]+:	66 01 d2             	add    %dx,%dx
+ +[a-f0-9]+:	01 d2                	add    %edx,%edx
+ +[a-f0-9]+:	48 01 d2             	add    %rdx,%rdx
+ +[a-f0-9]+:	62 f4 7c 18 00 d2    	add    %dl,%dl,%al
+ +[a-f0-9]+:	62 f4 7d 18 01 d2    	add    %dx,%dx,%ax
+ +[a-f0-9]+:	62 f4 7c 18 01 d2    	add    %edx,%edx,%eax
+ +[a-f0-9]+:	62 f4 fc 18 01 d2    	add    %rdx,%rdx,%rax
 #pass
--- a/gas/testsuite/gas/i386/x86-64-optimize-1.s
+++ b/gas/testsuite/gas/i386/x86-64-optimize-1.s
@@ -89,3 +89,33 @@ _start:
 	sub	%r17b, %r17b, %r17b
 	sub	%r18b, %r17b, %r17b
 	sub	%r18b, %r18b, %r17b
+
+	shl	$1, %dl
+	shl	$1, %dx
+	shl	$1, %edx
+	shl	$1, %rdx
+
+	shl	%dl
+	shl	%dx
+	shl	%edx
+	shl	%rdx
+
+	shl	$1, %dl, %al
+	shl	$1, %dx, %ax
+	shl	$1, %edx, %eax
+	shl	$1, %rdx, %rax
+
+	sal	$1, %dl
+	sal	$1, %dx
+	sal	$1, %edx
+	sal	$1, %rdx
+
+	sal	%dl
+	sal	%dx
+	sal	%edx
+	sal	%rdx
+
+	sal	$1, %dl, %al
+	sal	$1, %dx, %ax
+	sal	$1, %edx, %eax
+	sal	$1, %rdx, %rax
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -428,26 +428,26 @@ imulzu, 0x69, APX_F, Modrm|No_bSuf|No_sS
 
 <div>
 
-<sr:opc:imm8:nf, +
-    rol:0:Imm8|Imm8S:NF, +
-    ror:1:Imm8|Imm8S:NF, +
-    rcl:2:Imm8:, +
-    rcr:3:Imm8:, +
-    sal:4:Imm8:NF, +
-    shl:4:Imm8:NF, +
-    shr:5:Imm8:NF, +
-    sar:7:Imm8:NF>
-
-<sr>, 0xd0/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:nf>, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
-<sr>, 0xd0/<sr:opc>, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-<sr>, 0xd0/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:nf>, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
+<sr:opc:imm8:opt1:nf, +
+    rol:0:Imm8|Imm8S::NF, +
+    ror:1:Imm8|Imm8S::NF, +
+    rcl:2:Imm8::, +
+    rcr:3:Imm8::, +
+    sal:4:Imm8:Optimize:NF, +
+    shl:4:Imm8:Optimize:NF, +
+    shr:5:Imm8::NF, +
+    sar:7:Imm8::NF>
+
+<sr>, 0xd0/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:opt1>|<sr:nf>, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
+<sr>, 0xd0/<sr:opc>, 0, W|Modrm|No_sSuf|<sr:opt1>, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
+<sr>, 0xd0/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:opt1>|<sr:nf>, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 <sr>, 0xc0/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:nf>, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
 <sr>, 0xc0/<sr:opc>, i186, W|Modrm|No_sSuf, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 <sr>, 0xc0/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:nf>, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 <sr>, 0xd2/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:nf>, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
 <sr>, 0xd2/<sr:opc>, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 <sr>, 0xd2/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:nf>, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-<sr>, 0xd0/<sr:opc>, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
+<sr>, 0xd0/<sr:opc>, 0, W|Modrm|No_sSuf|<sr:opt1>, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 
 <sr>
 
@@ -1023,14 +1023,14 @@ pause, 0xf390, i186, NoSuf, {}
     $avx:AVX|AVX512VL:66:Vex128|EVex128|Src1VVVV|VexW0|Disp8MemShift=4|SSE2AVX:Vex128|EVex128|DstVVVV|VexW0|Disp8MemShift=4|SSE2AVX:RegXMM:Xmmword, +
     $sse:SSE2:66:::RegXMM:Xmmword, +
     $mmx:MMX::::RegMMX:Qword>
-<MMXdq:opc:cpu:pfx:attr:vvvv:reg:mem, +
-    d:0:AVX|AVX512VL:66:Vex128|EVex128|Src1VVVV|VexW0|Disp8MemShift=4|SSE2AVX:Vex128|EVex128|DstVVVV|VexW0|Disp8MemShift=4|SSE2AVX:RegXMM:Xmmword, +
-    d:0:SSE2:66:::RegXMM:Xmmword, +
-    d:0:MMX::::RegMMX:Qword, +
-    q:1:AVX:66:Vex128|Src1VVVV|VexW0|SSE2AVX:Vex128|DstVVVV|VexW0|SSE2AVX:RegXMM:Xmmword, +
-    q:1:AVX512VL:66:EVex128|Src1VVVV|VexW1|Disp8MemShift=4|SSE2AVX:EVex128|DstVVVV|VexW1|Disp8MemShift=4|SSE2AVX:RegXMM:Xmmword, +
-    q:1:SSE2:66:::RegXMM:Xmmword, +
-    q:1:MMX::::RegMMX:Qword>
+<MMXdq:opc:cpu:pfx:attr:vvvv:optim:reg:mem, +
+    d:0:AVX|AVX512VL:66:Vex128|EVex128|Src1VVVV|VexW0|Disp8MemShift=4|SSE2AVX:Vex128|EVex128|DstVVVV|VexW0|Disp8MemShift=4|SSE2AVX:Optimize:RegXMM:Xmmword, +
+    d:0:SSE2:66:::Optimize:RegXMM:Xmmword, +
+    d:0:MMX::::Optimize:RegMMX:Qword, +
+    q:1:AVX:66:Vex128|Src1VVVV|VexW0|SSE2AVX:Vex128|DstVVVV|VexW0|SSE2AVX:Optimize:RegXMM:Xmmword, +
+    q:1:AVX512VL:66:EVex128|Src1VVVV|VexW1|Disp8MemShift=4|SSE2AVX:EVex128|DstVVVV|VexW1|Disp8MemShift=4|SSE2AVX:Optimize:RegXMM:Xmmword, +
+    q:1:SSE2:66:::Optimize:RegXMM:Xmmword, +
+    q:1:MMX:::::RegMMX:Qword>
 <MMXBW:cpu:pfx:attr:vvvv:reg:mem, +
     $avx:AVX:66:Vex128|Src1VVVV|VexW0|SSE2AVX:Vex128|DstVVVV|VexW0|SSE2AVX:RegXMM:Xmmword, +
     $apx:AVX512BW&AVX512VL:66:EVex128|Src1VVVV|VexW0|Disp8MemShift=4|SSE2AVX:EVex128|DstVVVV|VexW0|Disp8MemShift=4|SSE2AVX:RegXMM:Xmmword, +
@@ -1103,9 +1103,9 @@ pmulhw<MMXBW>, 0x<MMXBW:pfx>0fe5, <MMXBW
 pmullw<MMXBW>, 0x<MMXBW:pfx>0fd5, <MMXBW:cpu>, Modrm|<MMXBW:attr>|C|NoSuf, { <MMXBW:reg>|<MMXBW:mem>|Unspecified|BaseIndex, <MMXBW:reg> }
 por<MMX>, 0x<MMX:pfx>0feb, <MMX:cpu>, Modrm|<MMX:attr>|C|NoSuf, { <MMX:reg>|<MMX:mem>|Unspecified|BaseIndex, <MMX:reg> }
 psllw<MMXBW>, 0x<MMXBW:pfx>0ff1, <MMXBW:cpu>, Modrm|<MMXBW:attr>|NoSuf, { <MMXBW:reg>|<MMXBW:mem>|Unspecified|BaseIndex, <MMXBW:reg> }
-psllw<MMXBW>, 0x<MMXBW:pfx>0f71/6, <MMXBW:cpu>, Modrm|<MMXBW:vvvv>|NoSuf, { Imm8, <MMXBW:reg> }
+psllw<MMXBW>, 0x<MMXBW:pfx>0f71/6, <MMXBW:cpu>, Modrm|<MMXBW:vvvv>|NoSuf|Optimize, { Imm8, <MMXBW:reg> }
 psll<MMXdq>, 0x<MMXdq:pfx>0ff2 | <MMXdq:opc>, <MMXdq:cpu>, Modrm|<MMXdq:attr>|NoSuf, { <MMXdq:reg>|<MMXdq:mem>|Unspecified|BaseIndex, <MMXdq:reg> }
-psll<MMXdq>, 0x<MMXdq:pfx>0f72 | <MMXdq:opc>/6, <MMXdq:cpu>, Modrm|<MMXdq:vvvv>|NoSuf, { Imm8, <MMXdq:reg> }
+psll<MMXdq>, 0x<MMXdq:pfx>0f72 | <MMXdq:opc>/6, <MMXdq:cpu>, Modrm|<MMXdq:vvvv>|NoSuf|<MMXdq:optim>, { Imm8, <MMXdq:reg> }
 psraw<MMXBW>, 0x<MMXBW:pfx>0fe1, <MMXBW:cpu>, Modrm|<MMXBW:attr>|NoSuf, { <MMXBW:reg>|<MMXBW:mem>|Unspecified|BaseIndex, <MMXBW:reg> }
 psraw<MMXBW>, 0x<MMXBW:pfx>0f71/4, <MMXBW:cpu>, Modrm|<MMXBW:vvvv>|NoSuf, { Imm8, <MMXBW:reg> }
 psrad<MMX>, 0x<MMX:pfx>0fe2, <MMX:cpu>, Modrm|<MMX:attr>|NoSuf, { <MMX:reg>|<MMX:mem>|Unspecified|BaseIndex, <MMX:reg> }
@@ -1815,10 +1815,10 @@ vpshufhw, 0xf370, AVX|AVX2, Modrm|Vex|Sp
 vpshuflw, 0xf270, AVX|AVX2, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
 vpsign<bw>, 0x6608 | <bw:opc>, AVX|AVX2, Modrm|Vex|Space0F38|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vpsignd, 0x660a, AVX|AVX2, Modrm|Vex|Space0F38|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vpsll<dq>, 0x6672 | <dq:opc>/6, AVX|AVX2, Modrm|Vex|Space0F|DstVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM, RegXMM|RegYMM }
+vpsll<dq>, 0x6672 | <dq:opc>/6, AVX|AVX2, Modrm|Vex|Space0F|DstVVVV|VexWIG|CheckOperandSize|NoSuf|Optimize, { Imm8, RegXMM|RegYMM, RegXMM|RegYMM }
 vpsll<dq>, 0x66f2 | <dq:opc>, AVX|AVX2, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vpslldq, 0x6673/7, AVX|AVX2, Modrm|Vex|Space0F|DstVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM, RegXMM|RegYMM }
-vpsllw, 0x6671/6, AVX|AVX2, Modrm|Vex|Space0F|DstVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM, RegXMM|RegYMM }
+vpsllw, 0x6671/6, AVX|AVX2, Modrm|Vex|Space0F|DstVVVV|VexWIG|CheckOperandSize|NoSuf|Optimize, { Imm8, RegXMM|RegYMM, RegXMM|RegYMM }
 vpsllw, 0x66f1, AVX|AVX2, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vpsrad, 0x6672/4, AVX|AVX2, Modrm|Vex|Space0F|DstVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM, RegXMM|RegYMM }
 vpsrad, 0x66e2, AVX|AVX2, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM|RegYMM, RegXMM|RegYMM }
@@ -2561,7 +2561,7 @@ vpror<dq>, 0x6672/0, AVX512F, Modrm|Mask
 vpshufd, 0x6670, AVX512F, Modrm|Masking|Space0F|VexW=1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 
 vpsll<dq>, 0x66f2 | <dq:opc>, AVX512F, Modrm|Masking|Space0F|Src1VVVV|<dq:vexw>|Disp8MemShift=4|CheckOperandSize|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vpsll<dq>, 0x6672 | <dq:opc>/6, AVX512F, Modrm|Masking|Space0F|DstVVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
+vpsll<dq>, 0x6672 | <dq:opc>/6, AVX512F, Modrm|Masking|Space0F|DstVVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|Optimize, { Imm8, RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 vpsra<dq>, 0x66e2, AVX512F, Modrm|Masking|Space0F|Src1VVVV|<dq:vexw>|Disp8MemShift=4|CheckOperandSize|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
 vpsra<dq>, 0x6672/4, AVX512F, Modrm|Masking|Space0F|DstVVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 vpsrl<dq>, 0x66d2 | <dq:opc>, AVX512F, Modrm|Masking|Space0F|Src1VVVV|<dq:vexw>|Disp8MemShift=4|CheckOperandSize|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
@@ -2805,7 +2805,7 @@ vpminsw, 0x66EA, AVX512BW, Modrm|Masking
 vpmulhuw, 0x66E4, AVX512BW, Modrm|Masking|Space0F|VexWIG|Src1VVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
 vpmulhw, 0x66E5, AVX512BW, Modrm|Masking|Space0F|VexWIG|Src1VVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
 vpmullw, 0x66D5, AVX512BW, Modrm|Masking|Space0F|VexWIG|Src1VVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vpsllw, 0x6671/6, AVX512BW, Modrm|Masking|Space0F|VexWIG|DstVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
+vpsllw, 0x6671/6, AVX512BW, Modrm|Masking|Space0F|VexWIG|DstVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf|Optimize, { Imm8, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 vpsllw, 0x66F1, AVX512BW, Modrm|Masking|Space0F|VexWIG|Src1VVVV|Disp8MemShift=4|CheckOperandSize|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
 vpsraw, 0x6671/4, AVX512BW, Modrm|Masking|Space0F|VexWIG|DstVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 vpsraw, 0x66E1, AVX512BW, Modrm|Masking|Space0F|VexWIG|Src1VVVV|Disp8MemShift=4|CheckOperandSize|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }


^ permalink raw reply	[flat|nested] 22+ messages in thread

* RE: [PATCH 1/6] x86: optimize left-shift-by-1
  2024-06-14 12:12 ` [PATCH 1/6] x86: optimize left-shift-by-1 Jan Beulich
@ 2024-06-17  2:56   ` Jiang, Haochen
  2024-06-17  8:40     ` Jan Beulich
  0 siblings, 1 reply; 22+ messages in thread
From: Jiang, Haochen @ 2024-06-17  2:56 UTC (permalink / raw)
  To: Beulich, Jan, Binutils; +Cc: H.J. Lu, Cui, Lili

> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Friday, June 14, 2024 8:12 PM
> To: Binutils <binutils@sourceware.org>
> Cc: H.J. Lu <hjl.tools@gmail.com>; Cui, Lili <lili.cui@intel.com>
> Subject: [PATCH 1/6] x86: optimize left-shift-by-1
> 
> These can be replaced by adds when acting on a register operand.
> 
> While for the scalar forms there's no gain in encoding size, ADD
> generally has higher throughput than SHL. Eflags set by ADD are a
> superset of those set by SHL (AF in particular is undefined there).
> 
> For the SIMD cases the transformation also reduced code size, by
> eliminating the 1-byte immediate from the resulting encoding. Note
> that this transformation is not applied by gcc13 (according to my
> observations), so would - as of now - even improve compiler generated
> code.
> 

Hi Jan,

It is a good optimization, but I suppose it should be a compiler optimization
rather than assembler optimization.

Actually GCC should have done the optimization for most of the cases. It seems
like a optimization miss for compiler for this exact case.

Thx,
Haochen

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 1/6] x86: optimize left-shift-by-1
  2024-06-17  2:56   ` Jiang, Haochen
@ 2024-06-17  8:40     ` Jan Beulich
  0 siblings, 0 replies; 22+ messages in thread
From: Jan Beulich @ 2024-06-17  8:40 UTC (permalink / raw)
  To: Jiang, Haochen; +Cc: H.J. Lu, Cui, Lili, Binutils

On 17.06.2024 04:56, Jiang, Haochen wrote:
>> -----Original Message-----
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Friday, June 14, 2024 8:12 PM
>> To: Binutils <binutils@sourceware.org>
>> Cc: H.J. Lu <hjl.tools@gmail.com>; Cui, Lili <lili.cui@intel.com>
>> Subject: [PATCH 1/6] x86: optimize left-shift-by-1
>>
>> These can be replaced by adds when acting on a register operand.
>>
>> While for the scalar forms there's no gain in encoding size, ADD
>> generally has higher throughput than SHL. Eflags set by ADD are a
>> superset of those set by SHL (AF in particular is undefined there).
>>
>> For the SIMD cases the transformation also reduced code size, by
>> eliminating the 1-byte immediate from the resulting encoding. Note
>> that this transformation is not applied by gcc13 (according to my
>> observations), so would - as of now - even improve compiler generated
>> code.
> 
> It is a good optimization, but I suppose it should be a compiler optimization
> rather than assembler optimization.
> 
> Actually GCC should have done the optimization for most of the cases. It seems
> like a optimization miss for compiler for this exact case.

And I have a vague plan to look into locating where exactly this optimization
is missed. Sadly I don't know those parts of the compiler very well, and hence
it'll take me some time to actually find the respective (middle-end, I suppose)
code.

Jan

^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 2/6] x86/APX: optimize {nf} forms of ADD/SUB with immediate of 0x80
  2024-06-14 12:10 [PATCH 0/6] x86: a few more optimizations Jan Beulich
  2024-06-14 12:12 ` [PATCH 1/6] x86: optimize left-shift-by-1 Jan Beulich
@ 2024-06-14 12:12 ` Jan Beulich
  2024-06-14 12:13 ` [PATCH 3/6] x86/APX: optimize {nf}-form rotate-by-width-less-1 Jan Beulich
                   ` (5 subsequent siblings)
  7 siblings, 0 replies; 22+ messages in thread
From: Jan Beulich @ 2024-06-14 12:12 UTC (permalink / raw)
  To: Binutils; +Cc: H.J. Lu, Lili Cui

Unlike for the legacy forms, where there's a difference in the resulting
EFLAGS, for the NF variants we can safely replace these by the
respectively other insn while negating the immediate, saving 3 immediate
bytes (just 1 though for 16-bit operand size).

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4618,6 +4618,38 @@ optimize_encoding (void)
       i.seg[0] = NULL;
     }
 
+  if (i.has_nf
+      && i.tm.base_opcode == 0x80
+      && (i.tm.extension_opcode == 0 || i.tm.extension_opcode == 5)
+      && i.suffix != BYTE_MNEM_SUFFIX
+      && !i.types[1].bitfield.byte
+      && !i.types[2].bitfield.byte
+      && i.op[0].imms->X_op == O_constant
+      && i.op[0].imms->X_add_number == 0x80)
+    {
+      /* Optimize: -O:
+	   {nf} addw $0x80, ...  -> {nf} subw $-0x80, ...
+	   {nf} addl $0x80, ...  -> {nf} subl $-0x80, ...
+	   {nf} addq $0x80, ...  -> {nf} subq $-0x80, ...
+
+	   {nf} subw $0x80, ...  -> {nf} addw $-0x80, ...
+	   {nf} subl $0x80, ...  -> {nf} addl $-0x80, ...
+	   {nf} subq $0x80, ...  -> {nf} addq $-0x80, ...
+       */
+      i.tm.base_opcode |= 3;
+      i.tm.extension_opcode ^= 5;
+      i.tm.opcode_modifier.w = 0;
+      i.op[0].imms->X_add_number = -i.op[0].imms->X_add_number;
+
+      i.tm.operand_types[0].bitfield.imm8 = 0;
+      i.tm.operand_types[0].bitfield.imm8s = 1;
+      i.tm.operand_types[0].bitfield.imm16 = 0;
+      i.tm.operand_types[0].bitfield.imm32 = 0;
+      i.tm.operand_types[0].bitfield.imm32s = 0;
+
+      i.types[0] = i.tm.operand_types[0];
+    }
+
   if (optimize_for_space
       && i.tm.mnem_off == MN_test
       && i.reg_operands == 1
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -390,6 +390,7 @@ run_dump_test "x86-64-apx-jmpabs-intel"
 run_dump_test "x86-64-apx-jmpabs-inval"
 run_dump_test "x86-64-apx-nf"
 run_dump_test "x86-64-apx-nf-intel"
+run_dump_test "x86-64-apx-nf-optimize"
 run_dump_test "x86-64-apx-zu"
 run_dump_test "x86-64-apx-zu-intel"
 run_list_test "x86-64-apx-zu-inval"
--- a/gas/testsuite/gas/i386/x86-64-apx-nf.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf.d
@@ -701,6 +701,8 @@ Disassembly of section \.text:
 \s*[a-f0-9]+:\s*62 d4 6c 1c 33 8c 80 23 01 00 00\s+\{nf\} xor 0x123\(%r8,%rax,4\),%ecx,%edx
 \s*[a-f0-9]+:\s*62 54 fc 0c 33 8c 80 23 01 00 00\s+\{nf\} xor 0x123\(%r8,%rax,4\),%r9
 \s*[a-f0-9]+:\s*62 54 84 14 33 8c 80 23 01 00 00\s+\{nf\} xor 0x123\(%r8,%rax,4\),%r9,%r31
+
+0[0-9a-f]+ <intel>:
 \s*[a-f0-9]+:\s*62 f4 7c 0c 80 c3 7b\s+\{nf\} add\s+\$0x7b,%bl
 \s*[a-f0-9]+:\s*62 f4 6c 1c 80 c3 7b\s+\{nf\} add\s+\$0x7b,%bl,%dl
 \s*[a-f0-9]+:\s*62 f4 7d 0c 83 c2 7b\s+\{nf\} add\s+\$0x7b,%dx
--- a/gas/testsuite/gas/i386/x86-64-apx-nf.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf.s
@@ -697,7 +697,8 @@ _start:
 	{nf}	xor	291(%r8, %rax, 4), %r9
 	{nf}	xor	291(%r8, %rax, 4), %r9, %r31
 
-.intel_syntax noprefix
+	.intel_syntax noprefix
+intel:
 	{nf}	add	bl, 123
 	{nf}	add	dl, bl, 123
 	{nf}	add	dx, 123
@@ -1377,3 +1378,24 @@ _start:
 	{nf}	xor	edx, ecx, DWORD PTR [r8+rax*4+291]
 	{nf}	xor	r9, QWORD PTR [r8+rax*4+291]
 	{nf}	xor	r31, r9, QWORD PTR [r8+rax*4+291]
+
+	.att_syntax prefix
+optimize:
+	.irp op, add, sub
+	{nf}	\op	$128, %bl
+	{nf}	\op	$128, %bl, %dl
+	{nf}	\op	$128, %dx
+	{nf}	\op	$128, %dx, %ax
+	{nf}	\op	$128, %ecx
+	{nf}	\op	$128, %ecx, %edx
+	{nf}	\op	$128, %r9
+	{nf}	\op	$128, %r9, %r31
+	{nf}	\op\()b	$128, (%rax)
+	{nf}	\op	$128, (%rax), %bl
+	{nf}	\op\()w	$128, (%rax)
+	{nf}	\op	$128, (%rax), %dx
+	{nf}	\op\()l	$128, (%rax)
+	{nf}	\op	$128, (%rax), %ecx
+	{nf}	\op\()q	$128, (%rax)
+	{nf}	\op	$128, (%rax), %r9
+	.endr
--- a/gas/testsuite/gas/i386/x86-64-apx-nf-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf-intel.d
@@ -701,6 +701,8 @@ Disassembly of section \.text:
 \s*[a-f0-9]+:\s*62 d4 6c 1c 33 8c 80 23 01 00 00\s+\{nf\} xor edx,ecx,DWORD PTR \[r8\+rax\*4\+0x123\]
 \s*[a-f0-9]+:\s*62 54 fc 0c 33 8c 80 23 01 00 00\s+\{nf\} xor r9,QWORD PTR \[r8\+rax\*4\+0x123\]
 \s*[a-f0-9]+:\s*62 54 84 14 33 8c 80 23 01 00 00\s+\{nf\} xor r31,r9,QWORD PTR \[r8\+rax\*4\+0x123\]
+
+0[0-9a-f]+ <intel>:
 \s*[a-f0-9]+:\s*62 f4 7c 0c 80 c3 7b\s+\{nf\} add bl,0x7b
 \s*[a-f0-9]+:\s*62 f4 6c 1c 80 c3 7b\s+\{nf\} add dl,bl,0x7b
 \s*[a-f0-9]+:\s*62 f4 7d 0c 83 c2 7b\s+\{nf\} add dx,0x7b
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf-optimize.d
@@ -0,0 +1,1419 @@
+#as: -O
+#objdump: -dw
+#name: x86_64 APX_F insns with nf pseudo prefix and -O
+#source: x86-64-apx-nf.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 c3 7b[ 	]+\{nf\} add \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 c3 7b[ 	]+\{nf\} add \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 c2 7b[ 	]+\{nf\} add \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 c2 7b[ 	]+\{nf\} add \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 c1 7b[ 	]+\{nf\} add \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 c1 7b[ 	]+\{nf\} add \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 c1 7b[ 	]+\{nf\} add \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 c1 7b[ 	]+\{nf\} add \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 84 80 23 01 00 00 7b[ 	]+\{nf\} addb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 da[ 	]+\{nf\} add %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 00 da[ 	]+\{nf\} add %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 00 9c 80 23 01 00 00[ 	]+\{nf\} add %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 00 9c 80 23 01 00 00[ 	]+\{nf\} add %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 01 d0[ 	]+\{nf\} add %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 01 d0[ 	]+\{nf\} add %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 01 94 80 23 01 00 00[ 	]+\{nf\} add %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 01 94 80 23 01 00 00[ 	]+\{nf\} add %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 01 ca[ 	]+\{nf\} add %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 01 ca[ 	]+\{nf\} add %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 01 cf[ 	]+\{nf\} add %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 01 cf[ 	]+\{nf\} add %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 8c 80 23 01 00 00[ 	]+\{nf\} add %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 02 9c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 02 9c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 03 94 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 03 94 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 e3 7b[ 	]+\{nf\} and \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 e3 7b[ 	]+\{nf\} and \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 e2 7b[ 	]+\{nf\} and \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 e2 7b[ 	]+\{nf\} and \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 e1 7b[ 	]+\{nf\} and \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 a4 80 23 01 00 00 7b[ 	]+\{nf\} andb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 20 da[ 	]+\{nf\} and %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 20 da[ 	]+\{nf\} and %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 20 9c 80 23 01 00 00[ 	]+\{nf\} and %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 20 9c 80 23 01 00 00[ 	]+\{nf\} and %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 21 d0[ 	]+\{nf\} and %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 21 d0[ 	]+\{nf\} and %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 21 94 80 23 01 00 00[ 	]+\{nf\} and %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 21 94 80 23 01 00 00[ 	]+\{nf\} and %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 21 ca[ 	]+\{nf\} and %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 21 ca[ 	]+\{nf\} and %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 21 cf[ 	]+\{nf\} and %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 21 cf[ 	]+\{nf\} and %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 21 8c 80 23 01 00 00[ 	]+\{nf\} and %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 22 9c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 22 9c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 23 94 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 23 94 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 72 6c 0c f2 d1[ 	]+\{nf\} andn %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 52 84 04 f2 d9[ 	]+\{nf\} andn %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f2 94 80 23 01 00 00[ 	]+\{nf\} andn 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f2 bc 80 23 01 00 00[ 	]+\{nf\} andn 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 72 74 0c f7 d2[ 	]+\{nf\} bextr %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f7 94 80 23 01 00 00[ 	]+\{nf\} bextr %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5a b4 0c f7 df[ 	]+\{nf\} bextr %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} bextr %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 d9[ 	]+\{nf\} blsi %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 d9[ 	]+\{nf\} blsi %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 9c 80 23 01 00 00[ 	]+\{nf\} blsi 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 9c 80 23 01 00 00[ 	]+\{nf\} blsi 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 d1[ 	]+\{nf\} blsmsk %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 d1[ 	]+\{nf\} blsmsk %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 94 80 23 01 00 00[ 	]+\{nf\} blsmsk 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 94 80 23 01 00 00[ 	]+\{nf\} blsmsk 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 c9[ 	]+\{nf\} blsr %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 c9[ 	]+\{nf\} blsr %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 8c 80 23 01 00 00[ 	]+\{nf\} blsr 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 8c 80 23 01 00 00[ 	]+\{nf\} blsr 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 72 74 0c f5 d2[ 	]+\{nf\} bzhi %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f5 94 80 23 01 00 00[ 	]+\{nf\} bzhi %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5a b4 0c f5 df[ 	]+\{nf\} bzhi %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f5 bc 80 23 01 00 00[ 	]+\{nf\} bzhi %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 4c fc 0c 31 ff[ 	]+\{nf\} xor %r31,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c fe cb[ 	]+\{nf\} dec %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c fe cb[ 	]+\{nf\} dec %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ff ca[ 	]+\{nf\} dec %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c ff ca[ 	]+\{nf\} dec %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ff c9[ 	]+\{nf\} dec %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c ff c9[ 	]+\{nf\} dec %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff c9[ 	]+\{nf\} dec %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 ff c9[ 	]+\{nf\} dec %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c fe 8c 80 23 01 00 00[ 	]+\{nf\} decb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c fe 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 f3[ 	]+\{nf\} div %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 f2[ 	]+\{nf\} div %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f1[ 	]+\{nf\} div %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f1[ 	]+\{nf\} div %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 b4 80 23 01 00 00[ 	]+\{nf\} divb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 fb[ 	]+\{nf\} idiv %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 fb[ 	]+\{nf\} idiv %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 fa[ 	]+\{nf\} idiv %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 fa[ 	]+\{nf\} idiv %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f9[ 	]+\{nf\} idiv %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f9[ 	]+\{nf\} idiv %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f9[ 	]+\{nf\} idiv %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f9[ 	]+\{nf\} idiv %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 bc 80 23 01 00 00[ 	]+\{nf\} idivb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 bc 80 23 01 00 00[ 	]+\{nf\} idivb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 eb[ 	]+\{nf\} imul %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 ea[ 	]+\{nf\} imul %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c af c2[ 	]+\{nf\} imul %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c af c2[ 	]+\{nf\} imul %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e9[ 	]+\{nf\} imul %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c af d1[ 	]+\{nf\} imul %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c af d1[ 	]+\{nf\} imul %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e9[ 	]+\{nf\} imul %r9
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c af f9[ 	]+\{nf\} imul %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 44 a4 1c af f9[ 	]+\{nf\} imul %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 ac 80 23 01 00 00[ 	]+\{nf\} imulb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imulw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c af 94 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c af 94 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imull 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imulq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 6b c2 7b[ 	]+\{nf\} imul \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 6b d1 7b[ 	]+\{nf\} imul \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 6b f9 7b[ 	]+\{nf\} imul \$0x7b,%r9,%r15
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 6b c9 7b[ 	]+\{nf\} imul \$0x7b,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 6b 94 80 23 01 00 00 7b[ 	]+\{nf\} imul \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 6b 8c 80 23 01 00 00 7b[ 	]+\{nf\} imul \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 6b 8c 80 23 01 00 00 7b[ 	]+\{nf\} imul \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 6b c2 90[ 	]+\{nf\} imul \$0xff90,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 69 d1 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 69 f9 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,%r9,%r15
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 69 c9 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 6b 94 80 23 01 00 00 90[ 	]+\{nf\} imul \$0xff90,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 69 8c 80 23 01 00 00 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 69 8c 80 23 01 00 00 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c fe c3[ 	]+\{nf\} inc %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c fe c3[ 	]+\{nf\} inc %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ff c2[ 	]+\{nf\} inc %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c ff c2[ 	]+\{nf\} inc %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ff c1[ 	]+\{nf\} inc %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c ff c1[ 	]+\{nf\} inc %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff c1[ 	]+\{nf\} inc %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 ff c1[ 	]+\{nf\} inc %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c fe 84 80 23 01 00 00[ 	]+\{nf\} incb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c fe 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f5 c2[ 	]+\{nf\} lzcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f5 d1[ 	]+\{nf\} lzcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c f5 f9[ 	]+\{nf\} lzcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f5 94 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 e3[ 	]+\{nf\} mul %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 e2[ 	]+\{nf\} mul %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e1[ 	]+\{nf\} mul %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e1[ 	]+\{nf\} mul %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 a4 80 23 01 00 00[ 	]+\{nf\} mulb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mull 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 db[ 	]+\{nf\} neg %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c f6 db[ 	]+\{nf\} neg %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 da[ 	]+\{nf\} neg %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c f7 da[ 	]+\{nf\} neg %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 d9[ 	]+\{nf\} neg %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c f7 d9[ 	]+\{nf\} neg %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 d9[ 	]+\{nf\} neg %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 f7 d9[ 	]+\{nf\} neg %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 9c 80 23 01 00 00[ 	]+\{nf\} negb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c f6 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 cb 7b[ 	]+\{nf\} or \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 cb 7b[ 	]+\{nf\} or \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 ca 7b[ 	]+\{nf\} or \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ca 7b[ 	]+\{nf\} or \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 c9 7b[ 	]+\{nf\} or \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 8c 80 23 01 00 00 7b[ 	]+\{nf\} orb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 08 da[ 	]+\{nf\} or %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 08 da[ 	]+\{nf\} or %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 08 9c 80 23 01 00 00[ 	]+\{nf\} or %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 08 9c 80 23 01 00 00[ 	]+\{nf\} or %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 09 d0[ 	]+\{nf\} or %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 09 d0[ 	]+\{nf\} or %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 09 94 80 23 01 00 00[ 	]+\{nf\} or %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 09 94 80 23 01 00 00[ 	]+\{nf\} or %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 09 ca[ 	]+\{nf\} or %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 09 ca[ 	]+\{nf\} or %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 09 cf[ 	]+\{nf\} or %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 09 cf[ 	]+\{nf\} or %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 09 8c 80 23 01 00 00[ 	]+\{nf\} or %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 0a 9c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 0a 9c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 0b 94 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 0b 94 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 88 c2[ 	]+\{nf\} popcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 88 d1[ 	]+\{nf\} popcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c 88 f9[ 	]+\{nf\} popcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 88 94 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 88 8c 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 88 8c 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 c3[ 	]+\{nf\} rol \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 c3[ 	]+\{nf\} rol \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 c2[ 	]+\{nf\} rol \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 c2[ 	]+\{nf\} rol \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c1[ 	]+\{nf\} rol \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 c1[ 	]+\{nf\} rol \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 c1[ 	]+\{nf\} rol \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 c1[ 	]+\{nf\} rol \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 84 80 23 01 00 00[ 	]+\{nf\} rolb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 84 80 23 01 00 00[ 	]+\{nf\} rolw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 84 80 23 01 00 00[ 	]+\{nf\} roll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 84 80 23 01 00 00[ 	]+\{nf\} rolq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 c3 7b[ 	]+\{nf\} rol \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 c3 7b[ 	]+\{nf\} rol \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 c2 7b[ 	]+\{nf\} rol \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 c2 7b[ 	]+\{nf\} rol \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 84 80 23 01 00 00 7b[ 	]+\{nf\} rolb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rolw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} roll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rolq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 c3[ 	]+\{nf\} rol %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 c3[ 	]+\{nf\} rol %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 c2[ 	]+\{nf\} rol %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 c2[ 	]+\{nf\} rol %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 c1[ 	]+\{nf\} rol %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 c1[ 	]+\{nf\} rol %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 c1[ 	]+\{nf\} rol %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 c1[ 	]+\{nf\} rol %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 84 80 23 01 00 00[ 	]+\{nf\} rolb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 84 80 23 01 00 00[ 	]+\{nf\} rolw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 84 80 23 01 00 00[ 	]+\{nf\} roll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 84 80 23 01 00 00[ 	]+\{nf\} rolq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 cb[ 	]+\{nf\} ror \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 cb[ 	]+\{nf\} ror \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ca[ 	]+\{nf\} ror \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ca[ 	]+\{nf\} ror \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c9[ 	]+\{nf\} ror \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 c9[ 	]+\{nf\} ror \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 c9[ 	]+\{nf\} ror \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 c9[ 	]+\{nf\} ror \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 8c 80 23 01 00 00[ 	]+\{nf\} rorb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 cb 7b[ 	]+\{nf\} ror \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 cb 7b[ 	]+\{nf\} ror \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 ca 7b[ 	]+\{nf\} ror \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 ca 7b[ 	]+\{nf\} ror \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 cb[ 	]+\{nf\} ror %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 cb[ 	]+\{nf\} ror %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 ca[ 	]+\{nf\} ror %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 ca[ 	]+\{nf\} ror %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 c9[ 	]+\{nf\} ror %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 c9[ 	]+\{nf\} ror %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 c9[ 	]+\{nf\} ror %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 c9[ 	]+\{nf\} ror %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 8c 80 23 01 00 00[ 	]+\{nf\} rorb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 db[ 	]+\{nf\} add %bl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 00 db[ 	]+\{nf\} add %bl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 01 d2[ 	]+\{nf\} add %dx,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 01 d2[ 	]+\{nf\} add %dx,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 01 c9[ 	]+\{nf\} add %ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 01 c9[ 	]+\{nf\} add %ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 c9[ 	]+\{nf\} add %r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 c9[ 	]+\{nf\} add %r9,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 a4 80 23 01 00 00[ 	]+\{nf\} shlb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 e3[ 	]+\{nf\} shl %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 e3[ 	]+\{nf\} shl %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 e2[ 	]+\{nf\} shl %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 e2[ 	]+\{nf\} shl %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 e1[ 	]+\{nf\} shl %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 e1[ 	]+\{nf\} shl %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 e1[ 	]+\{nf\} shl %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e1[ 	]+\{nf\} shl %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 a4 80 23 01 00 00[ 	]+\{nf\} shlb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 fb[ 	]+\{nf\} sar \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 fb[ 	]+\{nf\} sar \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 fa[ 	]+\{nf\} sar \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 fa[ 	]+\{nf\} sar \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 f9[ 	]+\{nf\} sar \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 f9[ 	]+\{nf\} sar \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 f9[ 	]+\{nf\} sar \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 f9[ 	]+\{nf\} sar \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 bc 80 23 01 00 00[ 	]+\{nf\} sarb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 fb 7b[ 	]+\{nf\} sar \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 fb 7b[ 	]+\{nf\} sar \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 fa 7b[ 	]+\{nf\} sar \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 fa 7b[ 	]+\{nf\} sar \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 fb[ 	]+\{nf\} sar %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 fb[ 	]+\{nf\} sar %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 fa[ 	]+\{nf\} sar %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 fa[ 	]+\{nf\} sar %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 f9[ 	]+\{nf\} sar %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 f9[ 	]+\{nf\} sar %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 f9[ 	]+\{nf\} sar %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 f9[ 	]+\{nf\} sar %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 bc 80 23 01 00 00[ 	]+\{nf\} sarb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 db[ 	]+\{nf\} add %bl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 00 db[ 	]+\{nf\} add %bl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 01 d2[ 	]+\{nf\} add %dx,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 01 d2[ 	]+\{nf\} add %dx,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 01 c9[ 	]+\{nf\} add %ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 01 c9[ 	]+\{nf\} add %ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 c9[ 	]+\{nf\} add %r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 c9[ 	]+\{nf\} add %r9,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 a4 80 23 01 00 00[ 	]+\{nf\} shlb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 e3[ 	]+\{nf\} shl %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 e3[ 	]+\{nf\} shl %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 e2[ 	]+\{nf\} shl %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 e2[ 	]+\{nf\} shl %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 e1[ 	]+\{nf\} shl %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 e1[ 	]+\{nf\} shl %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 e1[ 	]+\{nf\} shl %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e1[ 	]+\{nf\} shl %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 a4 80 23 01 00 00[ 	]+\{nf\} shlb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 24 d0 7b[ 	]+\{nf\} shld \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 24 d0 7b[ 	]+\{nf\} shld \$0x7b,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 24 94 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 24 94 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 24 ca 7b[ 	]+\{nf\} shld \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 24 ca 7b[ 	]+\{nf\} shld \$0x7b,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 24 cf 7b[ 	]+\{nf\} shld \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 24 cf 7b[ 	]+\{nf\} shld \$0x7b,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c a5 d0[ 	]+\{nf\} shld %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c a5 d0[ 	]+\{nf\} shld %cl,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c a5 94 80 23 01 00 00[ 	]+\{nf\} shld %cl,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c a5 94 80 23 01 00 00[ 	]+\{nf\} shld %cl,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c a5 ca[ 	]+\{nf\} shld %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c a5 ca[ 	]+\{nf\} shld %cl,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c a5 cf[ 	]+\{nf\} shld %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c a5 cf[ 	]+\{nf\} shld %cl,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 eb[ 	]+\{nf\} shr \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 eb[ 	]+\{nf\} shr \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ea[ 	]+\{nf\} shr \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ea[ 	]+\{nf\} shr \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 e9[ 	]+\{nf\} shr \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 e9[ 	]+\{nf\} shr \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 e9[ 	]+\{nf\} shr \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 e9[ 	]+\{nf\} shr \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 ac 80 23 01 00 00[ 	]+\{nf\} shrb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 eb 7b[ 	]+\{nf\} shr \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 eb 7b[ 	]+\{nf\} shr \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 ea 7b[ 	]+\{nf\} shr \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 ea 7b[ 	]+\{nf\} shr \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 eb[ 	]+\{nf\} shr %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 eb[ 	]+\{nf\} shr %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 ea[ 	]+\{nf\} shr %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 ea[ 	]+\{nf\} shr %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 e9[ 	]+\{nf\} shr %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 e9[ 	]+\{nf\} shr %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 e9[ 	]+\{nf\} shr %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e9[ 	]+\{nf\} shr %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 ac 80 23 01 00 00[ 	]+\{nf\} shrb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 2c d0 7b[ 	]+\{nf\} shrd \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 2c d0 7b[ 	]+\{nf\} shrd \$0x7b,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 2c 94 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 2c 94 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 2c ca 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 2c ca 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 2c cf 7b[ 	]+\{nf\} shrd \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 2c cf 7b[ 	]+\{nf\} shrd \$0x7b,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ad d0[ 	]+\{nf\} shrd %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c ad d0[ 	]+\{nf\} shrd %cl,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ad 94 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c ad 94 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ad ca[ 	]+\{nf\} shrd %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c ad ca[ 	]+\{nf\} shrd %cl,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c ad cf[ 	]+\{nf\} shrd %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c ad cf[ 	]+\{nf\} shrd %cl,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 eb 7b[ 	]+\{nf\} sub \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 eb 7b[ 	]+\{nf\} sub \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 ea 7b[ 	]+\{nf\} sub \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ea 7b[ 	]+\{nf\} sub \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 ac 80 23 01 00 00 7b[ 	]+\{nf\} subb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 28 da[ 	]+\{nf\} sub %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 28 da[ 	]+\{nf\} sub %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 28 9c 80 23 01 00 00[ 	]+\{nf\} sub %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 28 9c 80 23 01 00 00[ 	]+\{nf\} sub %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 29 d0[ 	]+\{nf\} sub %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 29 d0[ 	]+\{nf\} sub %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 29 94 80 23 01 00 00[ 	]+\{nf\} sub %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 29 94 80 23 01 00 00[ 	]+\{nf\} sub %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 29 ca[ 	]+\{nf\} sub %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 29 ca[ 	]+\{nf\} sub %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 29 cf[ 	]+\{nf\} sub %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 29 cf[ 	]+\{nf\} sub %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2a 9c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2a 9c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 2b 94 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 2b 94 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f4 c2[ 	]+\{nf\} tzcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f4 d1[ 	]+\{nf\} tzcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c f4 f9[ 	]+\{nf\} tzcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f4 94 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f4 8c 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f4 8c 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 f3 7b[ 	]+\{nf\} xor \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 f3 7b[ 	]+\{nf\} xor \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 f2 7b[ 	]+\{nf\} xor \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 f2 7b[ 	]+\{nf\} xor \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 30 da[ 	]+\{nf\} xor %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 30 da[ 	]+\{nf\} xor %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 30 9c 80 23 01 00 00[ 	]+\{nf\} xor %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 30 9c 80 23 01 00 00[ 	]+\{nf\} xor %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 31 d0[ 	]+\{nf\} xor %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 31 d0[ 	]+\{nf\} xor %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 31 94 80 23 01 00 00[ 	]+\{nf\} xor %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 31 94 80 23 01 00 00[ 	]+\{nf\} xor %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 31 ca[ 	]+\{nf\} xor %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 31 ca[ 	]+\{nf\} xor %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 31 cf[ 	]+\{nf\} xor %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 31 cf[ 	]+\{nf\} xor %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 32 9c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 32 9c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 33 94 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 33 94 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%r9,%r31
+
+0[0-9a-f]+ <intel>:
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 c3 7b[ 	]+\{nf\} add \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 c3 7b[ 	]+\{nf\} add \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 c2 7b[ 	]+\{nf\} add \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 c2 7b[ 	]+\{nf\} add \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 c1 7b[ 	]+\{nf\} add \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 c1 7b[ 	]+\{nf\} add \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 c1 7b[ 	]+\{nf\} add \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 c1 7b[ 	]+\{nf\} add \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 84 80 23 01 00 00 7b[ 	]+\{nf\} addb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 da[ 	]+\{nf\} add %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 00 da[ 	]+\{nf\} add %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 00 9c 80 23 01 00 00[ 	]+\{nf\} add %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 00 9c 80 23 01 00 00[ 	]+\{nf\} add %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 01 d0[ 	]+\{nf\} add %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 01 d0[ 	]+\{nf\} add %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 01 94 80 23 01 00 00[ 	]+\{nf\} add %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 01 94 80 23 01 00 00[ 	]+\{nf\} add %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 01 ca[ 	]+\{nf\} add %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 01 ca[ 	]+\{nf\} add %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 01 cf[ 	]+\{nf\} add %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 01 cf[ 	]+\{nf\} add %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 8c 80 23 01 00 00[ 	]+\{nf\} add %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 02 9c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 02 9c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 03 94 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 03 94 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 e3 7b[ 	]+\{nf\} and \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 e3 7b[ 	]+\{nf\} and \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 e2 7b[ 	]+\{nf\} and \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 e2 7b[ 	]+\{nf\} and \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 e1 7b[ 	]+\{nf\} and \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 a4 80 23 01 00 00 7b[ 	]+\{nf\} andb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 20 da[ 	]+\{nf\} and %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 20 da[ 	]+\{nf\} and %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 20 9c 80 23 01 00 00[ 	]+\{nf\} and %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 20 9c 80 23 01 00 00[ 	]+\{nf\} and %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 21 d0[ 	]+\{nf\} and %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 21 d0[ 	]+\{nf\} and %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 21 94 80 23 01 00 00[ 	]+\{nf\} and %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 21 94 80 23 01 00 00[ 	]+\{nf\} and %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 21 ca[ 	]+\{nf\} and %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 21 ca[ 	]+\{nf\} and %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 21 cf[ 	]+\{nf\} and %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 21 cf[ 	]+\{nf\} and %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 21 8c 80 23 01 00 00[ 	]+\{nf\} and %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 22 9c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 22 9c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 23 94 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 23 94 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 72 6c 0c f2 d1[ 	]+\{nf\} andn %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 52 84 04 f2 d9[ 	]+\{nf\} andn %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f2 94 80 23 01 00 00[ 	]+\{nf\} andn 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f2 bc 80 23 01 00 00[ 	]+\{nf\} andn 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 72 74 0c f7 d2[ 	]+\{nf\} bextr %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f7 94 80 23 01 00 00[ 	]+\{nf\} bextr %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5a b4 0c f7 df[ 	]+\{nf\} bextr %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} bextr %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 d9[ 	]+\{nf\} blsi %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 d9[ 	]+\{nf\} blsi %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 9c 80 23 01 00 00[ 	]+\{nf\} blsi 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 9c 80 23 01 00 00[ 	]+\{nf\} blsi 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 d1[ 	]+\{nf\} blsmsk %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 d1[ 	]+\{nf\} blsmsk %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 94 80 23 01 00 00[ 	]+\{nf\} blsmsk 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 94 80 23 01 00 00[ 	]+\{nf\} blsmsk 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 c9[ 	]+\{nf\} blsr %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 c9[ 	]+\{nf\} blsr %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 8c 80 23 01 00 00[ 	]+\{nf\} blsr 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 8c 80 23 01 00 00[ 	]+\{nf\} blsr 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 72 74 0c f5 d2[ 	]+\{nf\} bzhi %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f5 94 80 23 01 00 00[ 	]+\{nf\} bzhi %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5a b4 0c f5 df[ 	]+\{nf\} bzhi %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f5 bc 80 23 01 00 00[ 	]+\{nf\} bzhi %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 4c fc 0c 31 ff[ 	]+\{nf\} xor %r31,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c fe cb[ 	]+\{nf\} dec %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c fe cb[ 	]+\{nf\} dec %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ff ca[ 	]+\{nf\} dec %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c ff ca[ 	]+\{nf\} dec %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ff c9[ 	]+\{nf\} dec %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c ff c9[ 	]+\{nf\} dec %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff c9[ 	]+\{nf\} dec %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 ff c9[ 	]+\{nf\} dec %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c fe 8c 80 23 01 00 00[ 	]+\{nf\} decb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c fe 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 f3[ 	]+\{nf\} div %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 f2[ 	]+\{nf\} div %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f1[ 	]+\{nf\} div %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f1[ 	]+\{nf\} div %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 b4 80 23 01 00 00[ 	]+\{nf\} divb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 fb[ 	]+\{nf\} idiv %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 fb[ 	]+\{nf\} idiv %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 fa[ 	]+\{nf\} idiv %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 fa[ 	]+\{nf\} idiv %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f9[ 	]+\{nf\} idiv %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f9[ 	]+\{nf\} idiv %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f9[ 	]+\{nf\} idiv %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f9[ 	]+\{nf\} idiv %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 bc 80 23 01 00 00[ 	]+\{nf\} idivb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 bc 80 23 01 00 00[ 	]+\{nf\} idivb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 eb[ 	]+\{nf\} imul %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 ea[ 	]+\{nf\} imul %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c af c2[ 	]+\{nf\} imul %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c af c2[ 	]+\{nf\} imul %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e9[ 	]+\{nf\} imul %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c af d1[ 	]+\{nf\} imul %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c af d1[ 	]+\{nf\} imul %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e9[ 	]+\{nf\} imul %r9
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c af f9[ 	]+\{nf\} imul %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 44 a4 1c af f9[ 	]+\{nf\} imul %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 ac 80 23 01 00 00[ 	]+\{nf\} imulb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imulw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c af 94 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c af 94 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imull 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imulq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c fe c3[ 	]+\{nf\} inc %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c fe c3[ 	]+\{nf\} inc %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ff c2[ 	]+\{nf\} inc %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c ff c2[ 	]+\{nf\} inc %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ff c1[ 	]+\{nf\} inc %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c ff c1[ 	]+\{nf\} inc %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff c1[ 	]+\{nf\} inc %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 ff c1[ 	]+\{nf\} inc %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c fe 84 80 23 01 00 00[ 	]+\{nf\} incb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c fe 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f5 c2[ 	]+\{nf\} lzcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f5 d1[ 	]+\{nf\} lzcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c f5 f9[ 	]+\{nf\} lzcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f5 94 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 e3[ 	]+\{nf\} mul %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 e2[ 	]+\{nf\} mul %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e1[ 	]+\{nf\} mul %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e1[ 	]+\{nf\} mul %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 a4 80 23 01 00 00[ 	]+\{nf\} mulb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mull 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 db[ 	]+\{nf\} neg %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c f6 db[ 	]+\{nf\} neg %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 da[ 	]+\{nf\} neg %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c f7 da[ 	]+\{nf\} neg %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 d9[ 	]+\{nf\} neg %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c f7 d9[ 	]+\{nf\} neg %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 d9[ 	]+\{nf\} neg %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 f7 d9[ 	]+\{nf\} neg %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 9c 80 23 01 00 00[ 	]+\{nf\} negb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c f6 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 cb 7b[ 	]+\{nf\} or \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 cb 7b[ 	]+\{nf\} or \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 ca 7b[ 	]+\{nf\} or \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ca 7b[ 	]+\{nf\} or \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 c9 7b[ 	]+\{nf\} or \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 8c 80 23 01 00 00 7b[ 	]+\{nf\} orb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 08 da[ 	]+\{nf\} or %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 08 da[ 	]+\{nf\} or %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 08 9c 80 23 01 00 00[ 	]+\{nf\} or %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 08 9c 80 23 01 00 00[ 	]+\{nf\} or %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 09 d0[ 	]+\{nf\} or %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 09 d0[ 	]+\{nf\} or %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 09 94 80 23 01 00 00[ 	]+\{nf\} or %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 09 94 80 23 01 00 00[ 	]+\{nf\} or %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 09 ca[ 	]+\{nf\} or %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 09 ca[ 	]+\{nf\} or %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 09 cf[ 	]+\{nf\} or %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 09 cf[ 	]+\{nf\} or %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 09 8c 80 23 01 00 00[ 	]+\{nf\} or %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 0a 9c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 0a 9c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 0b 94 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 0b 94 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 88 c2[ 	]+\{nf\} popcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 88 d1[ 	]+\{nf\} popcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c 88 f9[ 	]+\{nf\} popcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 88 94 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 88 8c 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 88 8c 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 c3[ 	]+\{nf\} rol \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 c3[ 	]+\{nf\} rol \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 c2[ 	]+\{nf\} rol \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 c2[ 	]+\{nf\} rol \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c1[ 	]+\{nf\} rol \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 c1[ 	]+\{nf\} rol \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 c1[ 	]+\{nf\} rol \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 c1[ 	]+\{nf\} rol \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 84 80 23 01 00 00[ 	]+\{nf\} rolb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 84 80 23 01 00 00[ 	]+\{nf\} rolw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 84 80 23 01 00 00[ 	]+\{nf\} roll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 84 80 23 01 00 00[ 	]+\{nf\} rolq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 c3 7b[ 	]+\{nf\} rol \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 c3 7b[ 	]+\{nf\} rol \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 c2 7b[ 	]+\{nf\} rol \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 c2 7b[ 	]+\{nf\} rol \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 84 80 23 01 00 00 7b[ 	]+\{nf\} rolb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rolw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} roll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rolq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 c3[ 	]+\{nf\} rol %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 c3[ 	]+\{nf\} rol %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 c2[ 	]+\{nf\} rol %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 c2[ 	]+\{nf\} rol %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 c1[ 	]+\{nf\} rol %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 c1[ 	]+\{nf\} rol %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 c1[ 	]+\{nf\} rol %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 c1[ 	]+\{nf\} rol %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 84 80 23 01 00 00[ 	]+\{nf\} rolb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 84 80 23 01 00 00[ 	]+\{nf\} rolw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 84 80 23 01 00 00[ 	]+\{nf\} roll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 84 80 23 01 00 00[ 	]+\{nf\} rolq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 cb[ 	]+\{nf\} ror \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 cb[ 	]+\{nf\} ror \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ca[ 	]+\{nf\} ror \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ca[ 	]+\{nf\} ror \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c9[ 	]+\{nf\} ror \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 c9[ 	]+\{nf\} ror \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 c9[ 	]+\{nf\} ror \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 c9[ 	]+\{nf\} ror \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 8c 80 23 01 00 00[ 	]+\{nf\} rorb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 cb 7b[ 	]+\{nf\} ror \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 cb 7b[ 	]+\{nf\} ror \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 ca 7b[ 	]+\{nf\} ror \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 ca 7b[ 	]+\{nf\} ror \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 cb[ 	]+\{nf\} ror %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 cb[ 	]+\{nf\} ror %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 ca[ 	]+\{nf\} ror %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 ca[ 	]+\{nf\} ror %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 c9[ 	]+\{nf\} ror %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 c9[ 	]+\{nf\} ror %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 c9[ 	]+\{nf\} ror %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 c9[ 	]+\{nf\} ror %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 8c 80 23 01 00 00[ 	]+\{nf\} rorb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 db[ 	]+\{nf\} add %bl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 00 db[ 	]+\{nf\} add %bl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 01 d2[ 	]+\{nf\} add %dx,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 01 d2[ 	]+\{nf\} add %dx,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 01 c9[ 	]+\{nf\} add %ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 01 c9[ 	]+\{nf\} add %ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 c9[ 	]+\{nf\} add %r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 c9[ 	]+\{nf\} add %r9,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 a4 80 23 01 00 00[ 	]+\{nf\} shlb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 e3[ 	]+\{nf\} shl %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 e3[ 	]+\{nf\} shl %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 e2[ 	]+\{nf\} shl %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 e2[ 	]+\{nf\} shl %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 e1[ 	]+\{nf\} shl %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 e1[ 	]+\{nf\} shl %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 e1[ 	]+\{nf\} shl %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e1[ 	]+\{nf\} shl %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 a4 80 23 01 00 00[ 	]+\{nf\} shlb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 fb[ 	]+\{nf\} sar \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 fb[ 	]+\{nf\} sar \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 fa[ 	]+\{nf\} sar \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 fa[ 	]+\{nf\} sar \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 f9[ 	]+\{nf\} sar \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 f9[ 	]+\{nf\} sar \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 f9[ 	]+\{nf\} sar \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 f9[ 	]+\{nf\} sar \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 bc 80 23 01 00 00[ 	]+\{nf\} sarb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 fb 7b[ 	]+\{nf\} sar \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 fb 7b[ 	]+\{nf\} sar \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 fa 7b[ 	]+\{nf\} sar \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 fa 7b[ 	]+\{nf\} sar \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 fb[ 	]+\{nf\} sar %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 fb[ 	]+\{nf\} sar %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 fa[ 	]+\{nf\} sar %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 fa[ 	]+\{nf\} sar %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 f9[ 	]+\{nf\} sar %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 f9[ 	]+\{nf\} sar %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 f9[ 	]+\{nf\} sar %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 f9[ 	]+\{nf\} sar %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 bc 80 23 01 00 00[ 	]+\{nf\} sarb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 db[ 	]+\{nf\} add %bl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 00 db[ 	]+\{nf\} add %bl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 01 d2[ 	]+\{nf\} add %dx,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 01 d2[ 	]+\{nf\} add %dx,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 01 c9[ 	]+\{nf\} add %ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 01 c9[ 	]+\{nf\} add %ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 c9[ 	]+\{nf\} add %r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 c9[ 	]+\{nf\} add %r9,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 a4 80 23 01 00 00[ 	]+\{nf\} shlb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 e3[ 	]+\{nf\} shl %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 e3[ 	]+\{nf\} shl %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 e2[ 	]+\{nf\} shl %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 e2[ 	]+\{nf\} shl %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 e1[ 	]+\{nf\} shl %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 e1[ 	]+\{nf\} shl %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 e1[ 	]+\{nf\} shl %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e1[ 	]+\{nf\} shl %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 a4 80 23 01 00 00[ 	]+\{nf\} shlb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 24 d0 7b[ 	]+\{nf\} shld \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 24 d0 7b[ 	]+\{nf\} shld \$0x7b,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 24 94 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 24 94 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 24 ca 7b[ 	]+\{nf\} shld \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 24 ca 7b[ 	]+\{nf\} shld \$0x7b,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 24 cf 7b[ 	]+\{nf\} shld \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 24 cf 7b[ 	]+\{nf\} shld \$0x7b,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c a5 d0[ 	]+\{nf\} shld %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c a5 d0[ 	]+\{nf\} shld %cl,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c a5 94 80 23 01 00 00[ 	]+\{nf\} shld %cl,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c a5 94 80 23 01 00 00[ 	]+\{nf\} shld %cl,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c a5 ca[ 	]+\{nf\} shld %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c a5 ca[ 	]+\{nf\} shld %cl,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c a5 cf[ 	]+\{nf\} shld %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c a5 cf[ 	]+\{nf\} shld %cl,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 eb[ 	]+\{nf\} shr \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 eb[ 	]+\{nf\} shr \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ea[ 	]+\{nf\} shr \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ea[ 	]+\{nf\} shr \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 e9[ 	]+\{nf\} shr \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 e9[ 	]+\{nf\} shr \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 e9[ 	]+\{nf\} shr \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 e9[ 	]+\{nf\} shr \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 ac 80 23 01 00 00[ 	]+\{nf\} shrb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 eb 7b[ 	]+\{nf\} shr \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 eb 7b[ 	]+\{nf\} shr \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 ea 7b[ 	]+\{nf\} shr \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 ea 7b[ 	]+\{nf\} shr \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 eb[ 	]+\{nf\} shr %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 eb[ 	]+\{nf\} shr %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 ea[ 	]+\{nf\} shr %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 ea[ 	]+\{nf\} shr %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 e9[ 	]+\{nf\} shr %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 e9[ 	]+\{nf\} shr %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 e9[ 	]+\{nf\} shr %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e9[ 	]+\{nf\} shr %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 ac 80 23 01 00 00[ 	]+\{nf\} shrb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 2c d0 7b[ 	]+\{nf\} shrd \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 2c d0 7b[ 	]+\{nf\} shrd \$0x7b,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 2c 94 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 2c 94 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 2c ca 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 2c ca 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 2c cf 7b[ 	]+\{nf\} shrd \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 2c cf 7b[ 	]+\{nf\} shrd \$0x7b,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ad d0[ 	]+\{nf\} shrd %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c ad d0[ 	]+\{nf\} shrd %cl,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ad 94 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c ad 94 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ad ca[ 	]+\{nf\} shrd %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c ad ca[ 	]+\{nf\} shrd %cl,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c ad cf[ 	]+\{nf\} shrd %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c ad cf[ 	]+\{nf\} shrd %cl,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 eb 7b[ 	]+\{nf\} sub \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 eb 7b[ 	]+\{nf\} sub \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 ea 7b[ 	]+\{nf\} sub \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ea 7b[ 	]+\{nf\} sub \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 ac 80 23 01 00 00 7b[ 	]+\{nf\} subb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 28 da[ 	]+\{nf\} sub %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 28 da[ 	]+\{nf\} sub %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 28 9c 80 23 01 00 00[ 	]+\{nf\} sub %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 28 9c 80 23 01 00 00[ 	]+\{nf\} sub %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 29 d0[ 	]+\{nf\} sub %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 29 d0[ 	]+\{nf\} sub %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 29 94 80 23 01 00 00[ 	]+\{nf\} sub %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 29 94 80 23 01 00 00[ 	]+\{nf\} sub %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 29 ca[ 	]+\{nf\} sub %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 29 ca[ 	]+\{nf\} sub %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 29 cf[ 	]+\{nf\} sub %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 29 cf[ 	]+\{nf\} sub %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2a 9c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2a 9c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 2b 94 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 2b 94 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f4 c2[ 	]+\{nf\} tzcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f4 d1[ 	]+\{nf\} tzcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c f4 f9[ 	]+\{nf\} tzcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f4 94 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f4 8c 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f4 8c 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 f3 7b[ 	]+\{nf\} xor \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 f3 7b[ 	]+\{nf\} xor \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 f2 7b[ 	]+\{nf\} xor \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 f2 7b[ 	]+\{nf\} xor \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 30 da[ 	]+\{nf\} xor %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 30 da[ 	]+\{nf\} xor %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 30 9c 80 23 01 00 00[ 	]+\{nf\} xor %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 30 9c 80 23 01 00 00[ 	]+\{nf\} xor %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 31 d0[ 	]+\{nf\} xor %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 31 d0[ 	]+\{nf\} xor %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 31 94 80 23 01 00 00[ 	]+\{nf\} xor %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 31 94 80 23 01 00 00[ 	]+\{nf\} xor %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 31 ca[ 	]+\{nf\} xor %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 31 ca[ 	]+\{nf\} xor %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 31 cf[ 	]+\{nf\} xor %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 31 cf[ 	]+\{nf\} xor %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 32 9c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 32 9c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 33 94 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 33 94 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%r9,%r31
+
+0[0-9a-f]+ <optimize>:
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 c3 80[ 	]+\{nf\} add \$0x80,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 c3 80[ 	]+\{nf\} add \$0x80,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 ea 80[ 	]+\{nf\} sub \$0xf+80,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ea 80[ 	]+\{nf\} sub \$0xf+80,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 e9 80[ 	]+\{nf\} sub \$0xf+80,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 e9 80[ 	]+\{nf\} sub \$0xf+80,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 e9 80[ 	]+\{nf\} sub \$0xf+80,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 e9 80[ 	]+\{nf\} sub \$0xf+80,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 00 80[ 	]+\{nf\} addb \$0x80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 64 1c 80 00 80[ 	]+\{nf\} add \$0x80,\(%rax\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 28 80[ 	]+\{nf\} subw \$0xf+80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6d 1c 83 28 80[ 	]+\{nf\} sub \$0xf+80,\(%rax\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 28 80[ 	]+\{nf\} subl \$0xf+80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 74 1c 83 28 80[ 	]+\{nf\} sub \$0xf+80,\(%rax\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c 83 28 80[ 	]+\{nf\} subq \$0xf+80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 b4 1c 83 28 80[ 	]+\{nf\} sub \$0xf+80,\(%rax\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 eb 80[ 	]+\{nf\} sub \$0x80,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 eb 80[ 	]+\{nf\} sub \$0x80,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 c2 80[ 	]+\{nf\} add \$0xf+80,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 c2 80[ 	]+\{nf\} add \$0xf+80,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 c1 80[ 	]+\{nf\} add \$0xf+80,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 c1 80[ 	]+\{nf\} add \$0xf+80,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 c1 80[ 	]+\{nf\} add \$0xf+80,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 c1 80[ 	]+\{nf\} add \$0xf+80,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 28 80[ 	]+\{nf\} subb \$0x80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 64 1c 80 28 80[ 	]+\{nf\} sub \$0x80,\(%rax\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 00 80[ 	]+\{nf\} addw \$0xf+80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6d 1c 83 00 80[ 	]+\{nf\} add \$0xf+80,\(%rax\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 00 80[ 	]+\{nf\} addl \$0xf+80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 74 1c 83 00 80[ 	]+\{nf\} add \$0xf+80,\(%rax\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c 83 00 80[ 	]+\{nf\} addq \$0xf+80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 b4 1c 83 00 80[ 	]+\{nf\} add \$0xf+80,\(%rax\),%r9
+#pass
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -311,14 +311,14 @@ sti, 0xfb, 0, NoSuf, {}
 
 // Arithmetic.
 
-<alu2:opc:c:optz:optt:opti:nf, +
-    add:0:C::::NF, +
-    or:1:C::Optimize::NF, +
-    adc:2:C::::, +
-    sbb:3:::::, +
-    and:4:C::Optimize:Optimize:NF, +
-    sub:5::Optimize:::NF, +
-    xor:6:C:Optimize:::NF>
+<alu2:opc:c:optz:optt:opti:optiE:nf, +
+    add:0:C::::Optimize:NF, +
+    or:1:C::Optimize:::NF, +
+    adc:2:C:::::, +
+    sbb:3::::::, +
+    and:4:C::Optimize:Optimize::NF, +
+    sub:5::Optimize:::Optimize:NF, +
+    xor:6:C:Optimize::::NF>
 
 <alu2>, <alu2:opc> << 3, APX_F, D|<alu2:c>|W|CheckOperandSize|Modrm|No_sSuf|DstVVVV|EVexMap4|<alu2:nf>|<alu2:optz>, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
 <alu2>, <alu2:opc> << 3, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock|<alu2:optz>|<alu2:optt>, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
@@ -327,9 +327,9 @@ sti, 0xfb, 0, NoSuf, {}
 <alu2>, 0x83/<alu2:opc>, 0, Modrm|No_bSuf|No_sSuf|HLEPrefixLock|<alu2:opti>, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 <alu2>, 0x83/<alu2:opc>, APX_F, Modrm|No_bSuf|No_sSuf|EVexMap4|<alu2:nf>, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 <alu2>, 0x04 | (<alu2:opc> << 3), 0, W|No_sSuf|<alu2:opti>, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword }
-<alu2>, 0x80/<alu2:opc>, APX_F, W|Modrm|CheckOperandSize|No_sSuf|DstVVVV|EVexMap4|<alu2:nf>, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
+<alu2>, 0x80/<alu2:opc>, APX_F, W|Modrm|CheckOperandSize|No_sSuf|DstVVVV|EVexMap4|<alu2:nf>|<alu2:optiE>, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
 <alu2>, 0x80/<alu2:opc>, 0, W|Modrm|No_sSuf|HLEPrefixLock|<alu2:opti>, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-<alu2>, 0x80/<alu2:opc>, APX_F, W|Modrm|EVexMap4|No_sSuf|<alu2:nf>, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
+<alu2>, 0x80/<alu2:opc>, APX_F, W|Modrm|EVexMap4|No_sSuf|<alu2:nf>|<alu2:optiE>, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 
 <alu2>
 


^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 3/6] x86/APX: optimize {nf}-form rotate-by-width-less-1
  2024-06-14 12:10 [PATCH 0/6] x86: a few more optimizations Jan Beulich
  2024-06-14 12:12 ` [PATCH 1/6] x86: optimize left-shift-by-1 Jan Beulich
  2024-06-14 12:12 ` [PATCH 2/6] x86/APX: optimize {nf} forms of ADD/SUB with immediate of 0x80 Jan Beulich
@ 2024-06-14 12:13 ` Jan Beulich
  2024-06-14 12:13 ` [PATCH 4/6] x86/APX: optimize certain {nf}-form insns to LEA Jan Beulich
                   ` (4 subsequent siblings)
  7 siblings, 0 replies; 22+ messages in thread
From: Jan Beulich @ 2024-06-14 12:13 UTC (permalink / raw)
  To: Binutils; +Cc: H.J. Lu, Lili Cui

Unlike for the legacy forms, where there's a difference in the resulting
EFLAGS.CF, for the NF variants the immediate can be got rid of in that
case by switching to a 1-bit rotate in the opposite direction.

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4844,6 +4844,26 @@ optimize_encoding (void)
       i.reg_operands++;
       i.imm_operands = 0;
     }
+  else if (i.has_nf && i.tm.base_opcode == 0xc0
+	   && i.op[0].imms->X_op == O_constant
+	   && i.op[0].imms->X_add_number
+	      == (i.types[i.operands - 1].bitfield.byte
+		  || i.suffix == BYTE_MNEM_SUFFIX
+		  ? 7 : i.types[i.operands - 1].bitfield.word
+			|| i.suffix == WORD_MNEM_SUFFIX
+			? 15 : 63 >> (i.types[i.operands - 1].bitfield.dword
+				      || i.suffix == LONG_MNEM_SUFFIX)))
+    {
+      /* Optimize: -O:
+	   {nf} rol $osz-1, ...   -> {nf} ror $1, ...
+	   {nf} ror $osz-1, ...   -> {nf} rol $1, ...
+       */
+      gas_assert (i.tm.extension_opcode <= 1);
+      i.tm.extension_opcode ^= 1;
+      i.tm.base_opcode = 0xd0;
+      i.tm.operand_types[0].bitfield.imm1 = 1;
+      i.imm_operands = 0;
+    }
   else if (i.tm.base_opcode == 0xba
 	   && i.tm.opcode_space == SPACE_0F
 	   && i.reg_operands == 1
--- a/gas/testsuite/gas/i386/x86-64-apx-nf.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf.s
@@ -1399,3 +1399,23 @@ optimize:
 	{nf}	\op\()q	$128, (%rax)
 	{nf}	\op	$128, (%rax), %r9
 	.endr
+
+	.irp dir, l, r
+	{nf}	ro\dir	$7, %dl
+	{nf}	ro\dir	$7, %dl, %al
+	{nf}	ro\dir	$15, %dx
+	{nf}	ro\dir	$15, %dx, %ax
+	{nf}	ro\dir	$31, %edx
+	{nf}	ro\dir	$31, %edx, %eax
+	{nf}	ro\dir	$63, %rdx
+	{nf}	ro\dir	$63, %rdx, %rax
+
+	{nf}	ro\dir\()b	$7, (%rdx)
+	{nf}	ro\dir		$7, (%rdx), %al
+	{nf}	ro\dir\()w	$15, (%rdx)
+	{nf}	ro\dir		$15, (%rdx), %ax
+	{nf}	ro\dir\()l	$31, (%rdx)
+	{nf}	ro\dir		$31, (%rdx), %eax
+	{nf}	ro\dir\()q	$63, (%rdx)
+	{nf}	ro\dir		$63, (%rdx), %rax
+	.endr
--- a/gas/testsuite/gas/i386/x86-64-apx-nf-optimize.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf-optimize.d
@@ -1416,4 +1416,36 @@ Disassembly of section \.text:
 [ 	]*[a-f0-9]+:[ 	]*62 f4 74 1c 83 00 80[ 	]+\{nf\} add \$0xf+80,\(%rax\),%ecx
 [ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c 83 00 80[ 	]+\{nf\} addq \$0xf+80,\(%rax\)
 [ 	]*[a-f0-9]+:[ 	]*62 f4 b4 1c 83 00 80[ 	]+\{nf\} add \$0xf+80,\(%rax\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 ca[ 	]+\{nf\} ror \$1,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d0 ca[ 	]+\{nf\} ror \$1,%dl,%al
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ca[ 	]+\{nf\} ror \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ca[ 	]+\{nf\} ror \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 ca[ 	]+\{nf\} ror \$1,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d1 ca[ 	]+\{nf\} ror \$1,%edx,%eax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c d1 ca[ 	]+\{nf\} ror \$1,%rdx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 1c d1 ca[ 	]+\{nf\} ror \$1,%rdx,%rax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 0a[ 	]+\{nf\} rorb \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d0 0a[ 	]+\{nf\} ror \$1,\(%rdx\),%al
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 0a[ 	]+\{nf\} rorw \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 0a[ 	]+\{nf\} ror \$1,\(%rdx\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 0a[ 	]+\{nf\} rorl \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d1 0a[ 	]+\{nf\} ror \$1,\(%rdx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c d1 0a[ 	]+\{nf\} rorq \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 1c d1 0a[ 	]+\{nf\} ror \$1,\(%rdx\),%rax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 c2[ 	]+\{nf\} rol \$1,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d0 c2[ 	]+\{nf\} rol \$1,%dl,%al
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 c2[ 	]+\{nf\} rol \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 c2[ 	]+\{nf\} rol \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c2[ 	]+\{nf\} rol \$1,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d1 c2[ 	]+\{nf\} rol \$1,%edx,%eax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c d1 c2[ 	]+\{nf\} rol \$1,%rdx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 1c d1 c2[ 	]+\{nf\} rol \$1,%rdx,%rax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 02[ 	]+\{nf\} rolb \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d0 02[ 	]+\{nf\} rol \$1,\(%rdx\),%al
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 02[ 	]+\{nf\} rolw \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 02[ 	]+\{nf\} rol \$1,\(%rdx\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 02[ 	]+\{nf\} roll \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d1 02[ 	]+\{nf\} rol \$1,\(%rdx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c d1 02[ 	]+\{nf\} rolq \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 1c d1 02[ 	]+\{nf\} rol \$1,\(%rdx\),%rax
 #pass
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -428,22 +428,22 @@ imulzu, 0x69, APX_F, Modrm|No_bSuf|No_sS
 
 <div>
 
-<sr:opc:imm8:opt1:nf, +
-    rol:0:Imm8|Imm8S::NF, +
-    ror:1:Imm8|Imm8S::NF, +
-    rcl:2:Imm8::, +
-    rcr:3:Imm8::, +
-    sal:4:Imm8:Optimize:NF, +
-    shl:4:Imm8:Optimize:NF, +
-    shr:5:Imm8::NF, +
-    sar:7:Imm8::NF>
+<sr:opc:imm8:opt1:opti:nf, +
+    rol:0:Imm8|Imm8S::Optimize:NF, +
+    ror:1:Imm8|Imm8S::Optimize:NF, +
+    rcl:2:Imm8:::, +
+    rcr:3:Imm8:::, +
+    sal:4:Imm8:Optimize::NF, +
+    shl:4:Imm8:Optimize::NF, +
+    shr:5:Imm8:::NF, +
+    sar:7:Imm8:::NF>
 
 <sr>, 0xd0/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:opt1>|<sr:nf>, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
 <sr>, 0xd0/<sr:opc>, 0, W|Modrm|No_sSuf|<sr:opt1>, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 <sr>, 0xd0/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:opt1>|<sr:nf>, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-<sr>, 0xc0/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:nf>, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
+<sr>, 0xc0/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:opti>|<sr:nf>, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
 <sr>, 0xc0/<sr:opc>, i186, W|Modrm|No_sSuf, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-<sr>, 0xc0/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:nf>, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
+<sr>, 0xc0/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:opti>|<sr:nf>, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 <sr>, 0xd2/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:nf>, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
 <sr>, 0xd2/<sr:opc>, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 <sr>, 0xd2/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:nf>, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }


^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 4/6] x86/APX: optimize certain {nf}-form insns to LEA
  2024-06-14 12:10 [PATCH 0/6] x86: a few more optimizations Jan Beulich
                   ` (2 preceding siblings ...)
  2024-06-14 12:13 ` [PATCH 3/6] x86/APX: optimize {nf}-form rotate-by-width-less-1 Jan Beulich
@ 2024-06-14 12:13 ` Jan Beulich
  2024-06-14 12:14 ` [PATCH 5/6] x86/APX: optimize certain {nf}-form insns to BMI2 ones Jan Beulich
                   ` (3 subsequent siblings)
  7 siblings, 0 replies; 22+ messages in thread
From: Jan Beulich @ 2024-06-14 12:13 UTC (permalink / raw)
  To: Binutils; +Cc: H.J. Lu, Lili Cui

..., as that leaves EFLAGS untouched anyway. That's a shorter encoding,
available as long as certain constraints on operand size and registers
are met; see code comments.

Note that this requires deferring to derive encoding_evex from {nf}
presence, as in optimize_encoding() we want to avoid touching the insns
when {evex} was also used.

Note further that this requires want_disp32() to now also consider the
opcode: We don't want to replace i.tm.mnem_off, for diagnostics to still
report the original mnemonic (or else things can get confusing). While
there, correct adjacent mis-indentation.
---
RFC: The conversion for 16-bit add-with-immediate will, when a symbol is
     in use, convert the resulting relocation from a 16-bit one to a
     32-bit one. While this isn't going to affect the result of the insn
     (will be truncated to 16 bits anyway), it would result in the
     linker noticing overflow in fewer cases. Is this deemed to be a
     problem? (If so, options are to either suppress the optimization in
     that case, or to arrange for the original relocation type to still
     be used. The former is easy but maybe undesirable, while the latter
     might be more involved.)

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1919,6 +1919,7 @@ static INLINE bool need_evex_encoding (c
 {
   return i.encoding == encoding_evex
 	|| i.encoding == encoding_evex512
+	|| i.has_nf
 	|| (t->opcode_modifier.vex && i.encoding == encoding_egpr)
 	|| i.mask.reg;
 }
@@ -3690,9 +3691,10 @@ want_disp32 (const insn_template *t)
 {
   return flag_code != CODE_64BIT
 	 || i.prefix[ADDR_PREFIX]
-	 || (t->mnem_off == MN_lea
+	 || ((t->mnem_off == MN_lea
+	      || (i.tm.base_opcode == 0x8d && i.tm.opcode_space == SPACE_BASE))
 	     && (!i.types[1].bitfield.qword
-		|| t->opcode_modifier.size == SIZE32));
+		 || t->opcode_modifier.size == SIZE32));
 }
 
 static int
@@ -4464,6 +4466,30 @@ encode_with_unaligned_vector_move (void)
     }
 }
 
+/* Check whether the promoted (to address size) register is usable as index
+   register in ModR/M SIB addressing.  */
+
+static bool is_index (const reg_entry *r)
+{
+  gas_assert (flag_code == CODE_64BIT);
+
+  if (r->reg_type.bitfield.byte)
+    {
+      if (!(r->reg_flags & RegRex64))
+	{
+	  if (r->reg_num >= 4)
+	    return false;
+	  r += 8;
+	}
+      r += 32;
+    }
+  if (r->reg_type.bitfield.word)
+    r += 32;
+  /* No need to further check .dword here.  */
+
+  return r->reg_type.bitfield.baseindex;
+}
+
 /* Try the shortest encoding by shortening operand size.  */
 
 static void
@@ -4844,6 +4870,214 @@ optimize_encoding (void)
       i.reg_operands++;
       i.imm_operands = 0;
     }
+  else if (i.has_nf && optimize_for_space
+	   && i.encoding != encoding_evex
+	   && (i.tm.base_opcode == 0x00 || i.tm.base_opcode == 0xd0)
+	   && !i.mem_operands
+	   && !i.types[1].bitfield.byte
+	   /* 16-bit operand size has extra restrictions: If REX2 was needed,
+	      no size reduction would be possible.  Plus 3-operand forms zero-
+	      extend the result, which can't be expressed with LEA.  */
+	   && (!i.types[1].bitfield.word
+	       || (i.operands == 2 && i.encoding != encoding_egpr))
+	   /* Convert only well-formed insns.  */
+	   && (!i.suffix
+	       || (i.suffix == SHORT_MNEM_SUFFIX && i.types[1].bitfield.word)
+	       || (i.suffix == LONG_MNEM_SUFFIX && i.types[1].bitfield.dword)
+	       || (i.suffix == QWORD_MNEM_SUFFIX && i.types[1].bitfield.qword))
+	   /* %rsp can't be the index.  */
+	   && (is_index (i.op[1].regs)
+	       || (i.imm_operands == 0 && is_index (i.op[0].regs)))
+	   /* While %rbp, %r13, %r21, and %r29 can be made the index in order to
+	      avoid the otherwise necessary Disp8, if the other operand is also
+	      from that set and REX2 would be required to encode the insn, the
+	      resulting encoding would be no smaller than the EVEX one.  */
+	   && (i.op[1].regs->reg_num != 5
+	       || i.encoding != encoding_egpr
+	       || i.imm_operands > 0
+	       || i.op[0].regs->reg_num != 5))
+    {
+      /* Optimize: -Os:
+	   {nf} addw %N, %M    -> leaw (%rM,%rN), %M
+	   {nf} addl %eN, %eM  -> leal (%rM,%rN), %eM
+	   {nf} addq %rN, %rM  -> leaq (%rM,%rN), %rM
+
+	   {nf} shlw $1, %N   -> leaw (%rN,%rN), %N
+	   {nf} shll $1, %eN  -> leal (%rN,%rN), %eN
+	   {nf} shlq $1, %rN  -> leaq (%rN,%rN), %rN
+
+	   {nf} addl %eK, %eN, %eM  -> leal (%rN,%rK), %eM
+	   {nf} addq %rK, %rN, %rM  -> leaq (%rN,%rK), %rM
+
+	   {nf} shll $1, %eN, %eM  -> leal (%rN,%rN), %eM
+	   {nf} shlq $1, %rN, %rM  -> leaq (%rN,%rN), %rM
+       */
+      i.tm.opcode_space = SPACE_BASE;
+      i.tm.base_opcode = 0x8d;
+      i.tm.extension_opcode = None;
+      i.tm.opcode_modifier.evex = 0;
+      i.tm.opcode_modifier.vexvvvv = 0;
+      if (i.imm_operands != 0)
+	i.index_reg = i.base_reg = i.op[1].regs;
+      else if (!is_index (i.op[0].regs)
+	       || (i.op[1].regs->reg_num == 5
+		   && i.op[0].regs->reg_num != 5))
+	{
+	  i.base_reg = i.op[0].regs;
+	  i.index_reg = i.op[1].regs;
+	}
+      else
+	{
+	  i.base_reg = i.op[1].regs;
+	  i.index_reg = i.op[0].regs;
+	}
+      if (i.types[1].bitfield.word)
+	{
+	  /* NB: No similar adjustment is needed when operand size is 32-bit.  */
+	  i.base_reg += 64;
+	  i.index_reg += 64;
+	}
+      i.op[1].regs = i.op[i.operands - 1].regs;
+
+      operand_type_set (&i.types[0], 0);
+      i.types[0].bitfield.baseindex = 1;
+      i.tm.operand_types[0] = i.types[0];
+      i.op[0].disps = NULL;
+      i.flags[0] = Operand_Mem;
+
+      i.operands = 2;
+      i.mem_operands = i.reg_operands = 1;
+      i.imm_operands = 0;
+      i.has_nf = false;
+    }
+  else if (i.has_nf && optimize_for_space
+	   && i.encoding != encoding_evex
+	   && (i.tm.base_opcode == 0x80 || i.tm.base_opcode == 0x83)
+	   && (i.tm.extension_opcode == 0
+	       || (i.tm.extension_opcode == 5
+		   && i.op[0].imms->X_op == O_constant
+		   /* Subtraction of -0x80 will end up smaller only if neither
+		      operand size nor REX/REX2 prefixes are needed.  */
+		   && (i.op[0].imms->X_add_number != -0x80
+		       || (i.types[1].bitfield.dword
+		           && !(i.op[1].regs->reg_flags & RegRex)
+		           && !(i.op[i.operands - 1].regs->reg_flags & RegRex)
+		           && i.encoding != encoding_egpr))))
+	   && !i.mem_operands
+	   && !i.types[1].bitfield.byte
+	   /* 16-bit operand size has extra restrictions: If REX2 was needed,
+	      no size reduction would be possible.  Plus 3-operand forms zero-
+	      extend the result, which can't be expressed with LEA.  */
+	   && (!i.types[1].bitfield.word
+	       || (i.operands == 2 && i.encoding != encoding_egpr))
+	   /* Convert only well-formed insns.  */
+	   && (!i.suffix
+	       || (i.suffix == SHORT_MNEM_SUFFIX && i.types[1].bitfield.word)
+	       || (i.suffix == LONG_MNEM_SUFFIX && i.types[1].bitfield.dword)
+	       || (i.suffix == QWORD_MNEM_SUFFIX && i.types[1].bitfield.qword)))
+    {
+      /* Optimize: -Os:
+	   {nf} addw $N, %M   -> leaw N(%rM), %M
+	   {nf} addl $N, %eM  -> leal N(%rM), %eM
+	   {nf} addq $N, %rM  -> leaq N(%rM), %rM
+
+	   {nf} subw $N, %M   -> leaw -N(%rM), %M
+	   {nf} subl $N, %eM  -> leal -N(%rM), %eM
+	   {nf} subq $N, %rM  -> leaq -N(%rM), %rM
+
+	   {nf} addl $N, %eK, %eM  -> leal N(%rK), %eM
+	   {nf} addq $N, %rK, %rM  -> leaq N(%rK), %rM
+
+	   {nf} subl $N, %eK, %eM  -> leal -N(%rK), %eM
+	   {nf} subq $N, %rK, %rM  -> leaq -N(%rK), %rM
+       */
+      i.tm.opcode_space = SPACE_BASE;
+      i.tm.base_opcode = 0x8d;
+      if (i.tm.extension_opcode == 5)
+	i.op[0].imms->X_add_number = -i.op[0].imms->X_add_number;
+      i.tm.extension_opcode = None;
+      i.tm.opcode_modifier.evex = 0;
+      i.tm.opcode_modifier.vexvvvv = 0;
+      i.base_reg = i.op[1].regs;
+      if (i.types[1].bitfield.word)
+	{
+	  /* NB: No similar adjustment is needed when operand size is 32-bit.  */
+	  i.base_reg += 64;
+	}
+      i.op[1].regs = i.op[i.operands - 1].regs;
+
+      operand_type_set (&i.types[0], 0);
+      i.types[0].bitfield.baseindex = 1;
+      i.types[0].bitfield.disp32 = 1;
+      i.op[0].disps = i.op[0].imms;
+      i.flags[0] = Operand_Mem;
+      optimize_disp (&i.tm);
+      i.tm.operand_types[0] = i.types[0];
+
+      i.operands = 2;
+      i.disp_operands = i.mem_operands = i.reg_operands = 1;
+      i.imm_operands = 0;
+      i.has_nf = false;
+    }
+  else if (i.has_nf
+	   && i.encoding != encoding_evex
+	   && i.tm.base_opcode == 0x6b
+	   && !i.mem_operands
+	   /* Convert only well-formed insns.  */
+	   && (!i.suffix
+	       || (i.suffix == SHORT_MNEM_SUFFIX && i.types[1].bitfield.word)
+	       || (i.suffix == LONG_MNEM_SUFFIX && i.types[1].bitfield.dword)
+	       || (i.suffix == QWORD_MNEM_SUFFIX && i.types[1].bitfield.qword))
+	   /* %rsp can't be the index.  */
+	   && is_index (i.op[1].regs)
+	   /* There's no reduction in size for 16-bit forms requiring Disp8 and
+	      REX2.  */
+	   && (!optimize_for_space
+	       || !i.types[1].bitfield.word
+	       || i.op[1].regs->reg_num != 5
+	       || i.encoding != encoding_egpr)
+	   && i.op[0].imms->X_op == O_constant
+	   && (i.op[0].imms->X_add_number == 3
+	       || i.op[0].imms->X_add_number == 5
+	       || i.op[0].imms->X_add_number == 9))
+    {
+      /* Optimize: -O:
+        For n one of 3, 5, or 9
+	   {nf} imulw $n, %N, %M    -> leaw (%rN,%rN,n-1), %M
+	   {nf} imull $n, %eN, %eM  -> leal (%rN,%rN,n-1), %eM
+	   {nf} imulq $n, %rN, %rM  -> leaq (%rN,%rN,n-1), %rM
+
+	   {nf} imulw $n, %N   -> leaw (%rN,%rN,s), %N
+	   {nf} imull $n, %eN  -> leal (%rN,%rN,s), %eN
+	   {nf} imulq $n, %rN  -> leaq (%rN,%rN,s), %rN
+       */
+      i.tm.opcode_space = SPACE_BASE;
+      i.tm.base_opcode = 0x8d;
+      i.tm.extension_opcode = None;
+      i.tm.opcode_modifier.evex = 0;
+      i.base_reg = i.op[1].regs;
+      /* NB: No similar adjustment is needed when operand size is 32 bits.  */
+      if (i.types[1].bitfield.word)
+	i.base_reg += 64;
+      i.index_reg = i.base_reg;
+      i.log2_scale_factor = i.op[0].imms->X_add_number == 9
+			    ? 3 : i.op[0].imms->X_add_number >> 1;
+
+      operand_type_set (&i.types[0], 0);
+      i.types[0].bitfield.baseindex = 1;
+      i.tm.operand_types[0] = i.types[0];
+      i.op[0].disps = NULL;
+      i.flags[0] = Operand_Mem;
+
+      i.tm.operand_types[1] = i.tm.operand_types[i.operands - 1];
+      i.op[1].regs = i.op[i.operands - 1].regs;
+      i.types[1] = i.types[i.operands - 1];
+
+      i.operands = 2;
+      i.mem_operands = i.reg_operands = 1;
+      i.imm_operands = 0;
+      i.has_nf = false;
+    }
   else if (i.has_nf && i.tm.base_opcode == 0xc0
 	   && i.op[0].imms->X_op == O_constant
 	   && i.op[0].imms->X_add_number
@@ -7080,6 +7314,10 @@ md_assemble (char *line)
     i.encoding = is_any_vex_encoding (&i.tm) ? encoding_evex
 					     : encoding_default;
 
+  /* Similarly {nf} can now be taken to imply {evex}.  */
+  if (i.has_nf && i.encoding == encoding_default)
+    i.encoding = encoding_evex;
+
   if (use_unaligned_vector_move)
     encode_with_unaligned_vector_move ();
 
@@ -7393,8 +7631,6 @@ parse_insn (const char *line, char *mnem
 		case Prefix_NF:
 		  /* {nf} */
 		  i.has_nf = true;
-		  if (i.encoding == encoding_default)
-		    i.encoding = encoding_evex;
 		  break;
 		case Prefix_NoOptimize:
 		  /* {nooptimize} */
@@ -7403,7 +7639,9 @@ parse_insn (const char *line, char *mnem
 		default:
 		  abort ();
 		}
-	      if (i.has_nf && i.encoding != encoding_evex)
+	      if (i.has_nf
+		  && i.encoding != encoding_default
+		  && i.encoding != encoding_evex)
 		{
 		  as_bad (_("{nf} cannot be combined with {vex}/{vex3}"));
 		  return NULL;
@@ -8537,9 +8775,6 @@ VEX_check_encoding (const insn_template
 
   switch (i.encoding)
     {
-    case encoding_default:
-      break;
-
     case encoding_vex:
     case encoding_vex3:
       /* This instruction must be encoded with VEX prefix.  */
@@ -8550,6 +8785,10 @@ VEX_check_encoding (const insn_template
 	}
       break;
 
+    case encoding_default:
+      if (!i.has_nf)
+	break;
+      /* Fall through.  */
     case encoding_evex:
     case encoding_evex512:
       /* This instruction must be encoded with EVEX prefix.  */
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -391,6 +391,7 @@ run_dump_test "x86-64-apx-jmpabs-inval"
 run_dump_test "x86-64-apx-nf"
 run_dump_test "x86-64-apx-nf-intel"
 run_dump_test "x86-64-apx-nf-optimize"
+run_dump_test "x86-64-apx-nf-optimize-size"
 run_dump_test "x86-64-apx-zu"
 run_dump_test "x86-64-apx-zu-intel"
 run_list_test "x86-64-apx-zu-inval"
--- a/gas/testsuite/gas/i386/x86-64-apx-nf.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf.s
@@ -1419,3 +1419,23 @@ optimize:
 	{nf}	ro\dir\()q	$63, (%rdx)
 	{nf}	ro\dir		$63, (%rdx), %rax
 	.endr
+
+	.irp r, "", e, r
+	{nf} imul $3, %\r\(cx), %\r\(dx)
+	{nf} imul $5, %\r\(bp), %\r\(dx)
+	{nf} imul $9, %\r\(cx), %\r\(bp)
+
+	# Note: %\r\(sp) source form needs leaving alone.
+	{nf} imul $3, %\r\(sp), %\r\(dx)
+	{nf} imul $5, %\r\(sp)
+
+	.ifeqs "\r",""
+	# Note: (16-bit) ZU form needs leaving alone.
+	{nf} imulzu $3, %cx, %dx
+	{nf} imulzu $5, %cx
+	# Note: 16-bit forms requiring REX2 and Disp8 want leaving alone with -Os.
+	{nf} imul $3, %bp, %r16w
+	{nf} imul $5, %r21w, %dx
+	{nf} imul $9, %r21w
+	.endif
+	.endr
--- a/gas/testsuite/gas/i386/x86-64-apx-nf-optimize.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf-optimize.d
@@ -1448,4 +1448,24 @@ Disassembly of section \.text:
 [ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d1 02[ 	]+\{nf\} rol \$1,\(%rdx\),%eax
 [ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c d1 02[ 	]+\{nf\} rolq \$1,\(%rdx\)
 [ 	]*[a-f0-9]+:[ 	]*62 f4 fc 1c d1 02[ 	]+\{nf\} rol \$1,\(%rdx\),%rax
+[ 	]*[a-f0-9]+:[ 	]*66 8d 14 49[ 	]+lea    \(%rcx,%rcx,2\),%dx
+[ 	]*[a-f0-9]+:[ 	]*66 8d 54 ad 00[ 	]+lea    0x0\(%rbp,%rbp,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*66 8d 2c c9[ 	]+lea    \(%rcx,%rcx,8\),%bp
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 6b d4 03[ 	]+\{nf\} imul \$0x3,%sp,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 6b e4 05[ 	]+\{nf\} imul \$0x5,%sp,%sp
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 6b d1 03[ 	]+\{nf\} imulzu \$0x3,%cx,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 6b c9 05[ 	]+\{nf\} imulzu \$0x5,%cx,%cx
+[ 	]*[a-f0-9]+:[ 	]*66 d5 40 8d 44 6d 00[ 	]+lea    0x0\(%rbp,%rbp,2\),%r16w
+[ 	]*[a-f0-9]+:[ 	]*66 d5 30 8d 54 ad 00[ 	]+lea    0x0\(%r21,%r21,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*66 d5 70 8d 6c ed 00[ 	]+lea    0x0\(%r21,%r21,8\),%r21w
+[ 	]*[a-f0-9]+:[ 	]*8d 14 49[ 	]+lea    \(%rcx,%rcx,2\),%edx
+[ 	]*[a-f0-9]+:[ 	]*8d 54 ad 00[ 	]+lea    0x0\(%rbp,%rbp,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*8d 2c c9[ 	]+lea    \(%rcx,%rcx,8\),%ebp
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 6b d4 03[ 	]+\{nf\} imul \$0x3,%esp,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 6b e4 05[ 	]+\{nf\} imul \$0x5,%esp,%esp
+[ 	]*[a-f0-9]+:[ 	]*48 8d 14 49[ 	]+lea    \(%rcx,%rcx,2\),%rdx
+[ 	]*[a-f0-9]+:[ 	]*48 8d 54 ad 00[ 	]+lea    0x0\(%rbp,%rbp,4\),%rdx
+[ 	]*[a-f0-9]+:[ 	]*48 8d 2c c9[ 	]+lea    \(%rcx,%rcx,8\),%rbp
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c 6b d4 03[ 	]+\{nf\} imul \$0x3,%rsp,%rdx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c 6b e4 05[ 	]+\{nf\} imul \$0x5,%rsp,%rsp
 #pass
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf-optimize-size.d
@@ -0,0 +1,1471 @@
+#as: -Os
+#objdump: -dw
+#name: x86_64 APX_F insns with nf pseudo prefix and -Os
+#source: x86-64-apx-nf.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 c3 7b[ 	]+\{nf\} add \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 c3 7b[ 	]+\{nf\} add \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*66 8d 52 7b[ 	]+lea    0x7b\(%rdx\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 c2 7b[ 	]+\{nf\} add \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*8d 49 7b[ 	]+lea    0x7b\(%rcx\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*8d 51 7b[ 	]+lea    0x7b\(%rcx\),%edx
+[ 	]*[a-f0-9]+:[ 	]*4d 8d 49 7b[ 	]+lea    0x7b\(%r9\),%r9
+[ 	]*[a-f0-9]+:[ 	]*d5 4d 8d 79 7b[ 	]+lea    0x7b\(%r9\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 84 80 23 01 00 00 7b[ 	]+\{nf\} addb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 da[ 	]+\{nf\} add %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 00 da[ 	]+\{nf\} add %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 00 9c 80 23 01 00 00[ 	]+\{nf\} add %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 00 9c 80 23 01 00 00[ 	]+\{nf\} add %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*66 8d 04 10[ 	]+lea[ 	]+\(%rax,%rdx,1\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 01 d0[ 	]+\{nf\} add %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 01 94 80 23 01 00 00[ 	]+\{nf\} add %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 01 94 80 23 01 00 00[ 	]+\{nf\} add %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*8d 14 0a[ 	]+lea[ 	]+\(%rdx,%rcx,1\),%edx
+[ 	]*[a-f0-9]+:[ 	]*44 8d 14 0a[ 	]+lea[ 	]+\(%rdx,%rcx,1\),%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*d5 5f 8d 3c 0f[ 	]+lea[ 	]+\(%r31,%r9,1\),%r31
+[ 	]*[a-f0-9]+:[ 	]*d5 1f 8d 1c 0f[ 	]+lea[ 	]+\(%r31,%r9,1\),%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 8c 80 23 01 00 00[ 	]+\{nf\} add %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 02 9c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 02 9c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 03 94 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 03 94 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 e3 7b[ 	]+\{nf\} and \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 e3 7b[ 	]+\{nf\} and \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 e2 7b[ 	]+\{nf\} and \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 e2 7b[ 	]+\{nf\} and \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 e1 7b[ 	]+\{nf\} and \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 a4 80 23 01 00 00 7b[ 	]+\{nf\} andb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 20 da[ 	]+\{nf\} and %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 20 da[ 	]+\{nf\} and %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 20 9c 80 23 01 00 00[ 	]+\{nf\} and %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 20 9c 80 23 01 00 00[ 	]+\{nf\} and %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 21 d0[ 	]+\{nf\} and %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 21 d0[ 	]+\{nf\} and %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 21 94 80 23 01 00 00[ 	]+\{nf\} and %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 21 94 80 23 01 00 00[ 	]+\{nf\} and %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 21 ca[ 	]+\{nf\} and %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 21 ca[ 	]+\{nf\} and %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 21 cf[ 	]+\{nf\} and %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 21 cf[ 	]+\{nf\} and %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 21 8c 80 23 01 00 00[ 	]+\{nf\} and %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 22 9c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 22 9c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 23 94 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 23 94 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 72 6c 0c f2 d1[ 	]+\{nf\} andn %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 52 84 04 f2 d9[ 	]+\{nf\} andn %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f2 94 80 23 01 00 00[ 	]+\{nf\} andn 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f2 bc 80 23 01 00 00[ 	]+\{nf\} andn 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 72 74 0c f7 d2[ 	]+\{nf\} bextr %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f7 94 80 23 01 00 00[ 	]+\{nf\} bextr %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5a b4 0c f7 df[ 	]+\{nf\} bextr %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} bextr %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 d9[ 	]+\{nf\} blsi %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 d9[ 	]+\{nf\} blsi %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 9c 80 23 01 00 00[ 	]+\{nf\} blsi 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 9c 80 23 01 00 00[ 	]+\{nf\} blsi 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 d1[ 	]+\{nf\} blsmsk %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 d1[ 	]+\{nf\} blsmsk %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 94 80 23 01 00 00[ 	]+\{nf\} blsmsk 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 94 80 23 01 00 00[ 	]+\{nf\} blsmsk 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 c9[ 	]+\{nf\} blsr %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 c9[ 	]+\{nf\} blsr %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 8c 80 23 01 00 00[ 	]+\{nf\} blsr 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 8c 80 23 01 00 00[ 	]+\{nf\} blsr 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 72 74 0c f5 d2[ 	]+\{nf\} bzhi %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f5 94 80 23 01 00 00[ 	]+\{nf\} bzhi %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5a b4 0c f5 df[ 	]+\{nf\} bzhi %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f5 bc 80 23 01 00 00[ 	]+\{nf\} bzhi %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 4c fc 0c 31 ff[ 	]+\{nf\} xor %r31,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c fe cb[ 	]+\{nf\} dec %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c fe cb[ 	]+\{nf\} dec %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ff ca[ 	]+\{nf\} dec %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c ff ca[ 	]+\{nf\} dec %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ff c9[ 	]+\{nf\} dec %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c ff c9[ 	]+\{nf\} dec %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff c9[ 	]+\{nf\} dec %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 ff c9[ 	]+\{nf\} dec %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c fe 8c 80 23 01 00 00[ 	]+\{nf\} decb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c fe 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 f3[ 	]+\{nf\} div %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 f2[ 	]+\{nf\} div %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f1[ 	]+\{nf\} div %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f1[ 	]+\{nf\} div %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 b4 80 23 01 00 00[ 	]+\{nf\} divb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 fb[ 	]+\{nf\} idiv %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 fb[ 	]+\{nf\} idiv %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 fa[ 	]+\{nf\} idiv %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 fa[ 	]+\{nf\} idiv %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f9[ 	]+\{nf\} idiv %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f9[ 	]+\{nf\} idiv %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f9[ 	]+\{nf\} idiv %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f9[ 	]+\{nf\} idiv %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 bc 80 23 01 00 00[ 	]+\{nf\} idivb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 bc 80 23 01 00 00[ 	]+\{nf\} idivb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 eb[ 	]+\{nf\} imul %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 ea[ 	]+\{nf\} imul %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c af c2[ 	]+\{nf\} imul %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c af c2[ 	]+\{nf\} imul %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e9[ 	]+\{nf\} imul %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c af d1[ 	]+\{nf\} imul %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c af d1[ 	]+\{nf\} imul %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e9[ 	]+\{nf\} imul %r9
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c af f9[ 	]+\{nf\} imul %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 44 a4 1c af f9[ 	]+\{nf\} imul %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 ac 80 23 01 00 00[ 	]+\{nf\} imulb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imulw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c af 94 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c af 94 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imull 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imulq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 6b c2 7b[ 	]+\{nf\} imul \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 6b d1 7b[ 	]+\{nf\} imul \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 6b f9 7b[ 	]+\{nf\} imul \$0x7b,%r9,%r15
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 6b c9 7b[ 	]+\{nf\} imul \$0x7b,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 6b 94 80 23 01 00 00 7b[ 	]+\{nf\} imul \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 6b 8c 80 23 01 00 00 7b[ 	]+\{nf\} imul \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 6b 8c 80 23 01 00 00 7b[ 	]+\{nf\} imul \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 6b c2 90[ 	]+\{nf\} imul \$0xff90,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 69 d1 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 69 f9 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,%r9,%r15
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 69 c9 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 6b 94 80 23 01 00 00 90[ 	]+\{nf\} imul \$0xff90,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 69 8c 80 23 01 00 00 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 69 8c 80 23 01 00 00 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c fe c3[ 	]+\{nf\} inc %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c fe c3[ 	]+\{nf\} inc %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ff c2[ 	]+\{nf\} inc %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c ff c2[ 	]+\{nf\} inc %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ff c1[ 	]+\{nf\} inc %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c ff c1[ 	]+\{nf\} inc %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff c1[ 	]+\{nf\} inc %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 ff c1[ 	]+\{nf\} inc %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c fe 84 80 23 01 00 00[ 	]+\{nf\} incb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c fe 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f5 c2[ 	]+\{nf\} lzcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f5 d1[ 	]+\{nf\} lzcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c f5 f9[ 	]+\{nf\} lzcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f5 94 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 e3[ 	]+\{nf\} mul %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 e2[ 	]+\{nf\} mul %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e1[ 	]+\{nf\} mul %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e1[ 	]+\{nf\} mul %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 a4 80 23 01 00 00[ 	]+\{nf\} mulb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mull 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 db[ 	]+\{nf\} neg %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c f6 db[ 	]+\{nf\} neg %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 da[ 	]+\{nf\} neg %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c f7 da[ 	]+\{nf\} neg %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 d9[ 	]+\{nf\} neg %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c f7 d9[ 	]+\{nf\} neg %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 d9[ 	]+\{nf\} neg %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 f7 d9[ 	]+\{nf\} neg %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 9c 80 23 01 00 00[ 	]+\{nf\} negb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c f6 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 cb 7b[ 	]+\{nf\} or \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 cb 7b[ 	]+\{nf\} or \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 ca 7b[ 	]+\{nf\} or \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ca 7b[ 	]+\{nf\} or \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 c9 7b[ 	]+\{nf\} or \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 8c 80 23 01 00 00 7b[ 	]+\{nf\} orb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 08 da[ 	]+\{nf\} or %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 08 da[ 	]+\{nf\} or %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 08 9c 80 23 01 00 00[ 	]+\{nf\} or %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 08 9c 80 23 01 00 00[ 	]+\{nf\} or %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 09 d0[ 	]+\{nf\} or %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 09 d0[ 	]+\{nf\} or %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 09 94 80 23 01 00 00[ 	]+\{nf\} or %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 09 94 80 23 01 00 00[ 	]+\{nf\} or %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 09 ca[ 	]+\{nf\} or %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 09 ca[ 	]+\{nf\} or %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 09 cf[ 	]+\{nf\} or %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 09 cf[ 	]+\{nf\} or %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 09 8c 80 23 01 00 00[ 	]+\{nf\} or %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 0a 9c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 0a 9c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 0b 94 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 0b 94 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 88 c2[ 	]+\{nf\} popcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 88 d1[ 	]+\{nf\} popcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c 88 f9[ 	]+\{nf\} popcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 88 94 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 88 8c 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 88 8c 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 c3[ 	]+\{nf\} rol \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 c3[ 	]+\{nf\} rol \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 c2[ 	]+\{nf\} rol \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 c2[ 	]+\{nf\} rol \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c1[ 	]+\{nf\} rol \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 c1[ 	]+\{nf\} rol \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 c1[ 	]+\{nf\} rol \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 c1[ 	]+\{nf\} rol \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 84 80 23 01 00 00[ 	]+\{nf\} rolb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 84 80 23 01 00 00[ 	]+\{nf\} rolw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 84 80 23 01 00 00[ 	]+\{nf\} roll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 84 80 23 01 00 00[ 	]+\{nf\} rolq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 c3 7b[ 	]+\{nf\} rol \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 c3 7b[ 	]+\{nf\} rol \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 c2 7b[ 	]+\{nf\} rol \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 c2 7b[ 	]+\{nf\} rol \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 84 80 23 01 00 00 7b[ 	]+\{nf\} rolb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rolw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} roll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rolq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 c3[ 	]+\{nf\} rol %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 c3[ 	]+\{nf\} rol %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 c2[ 	]+\{nf\} rol %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 c2[ 	]+\{nf\} rol %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 c1[ 	]+\{nf\} rol %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 c1[ 	]+\{nf\} rol %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 c1[ 	]+\{nf\} rol %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 c1[ 	]+\{nf\} rol %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 84 80 23 01 00 00[ 	]+\{nf\} rolb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 84 80 23 01 00 00[ 	]+\{nf\} rolw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 84 80 23 01 00 00[ 	]+\{nf\} roll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 84 80 23 01 00 00[ 	]+\{nf\} rolq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 cb[ 	]+\{nf\} ror \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 cb[ 	]+\{nf\} ror \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ca[ 	]+\{nf\} ror \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ca[ 	]+\{nf\} ror \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c9[ 	]+\{nf\} ror \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 c9[ 	]+\{nf\} ror \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 c9[ 	]+\{nf\} ror \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 c9[ 	]+\{nf\} ror \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 8c 80 23 01 00 00[ 	]+\{nf\} rorb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 cb 7b[ 	]+\{nf\} ror \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 cb 7b[ 	]+\{nf\} ror \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 ca 7b[ 	]+\{nf\} ror \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 ca 7b[ 	]+\{nf\} ror \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 cb[ 	]+\{nf\} ror %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 cb[ 	]+\{nf\} ror %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 ca[ 	]+\{nf\} ror %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 ca[ 	]+\{nf\} ror %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 c9[ 	]+\{nf\} ror %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 c9[ 	]+\{nf\} ror %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 c9[ 	]+\{nf\} ror %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 c9[ 	]+\{nf\} ror %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 8c 80 23 01 00 00[ 	]+\{nf\} rorb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 e3[ 	]+\{nf\} shl \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 e3[ 	]+\{nf\} shl \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*66 8d 14 12[ 	]+lea[ 	]+\(%rdx,%rdx,1\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 e2[ 	]+\{nf\} shl \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*8d 0c 09[ 	]+lea[ 	]+\(%rcx,%rcx,1\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*8d 14 09[ 	]+lea[ 	]+\(%rcx,%rcx,1\),%edx
+[ 	]*[a-f0-9]+:[ 	]*4f 8d 0c 09[ 	]+lea[ 	]+\(%r9,%r9,1\),%r9
+[ 	]*[a-f0-9]+:[ 	]*d5 4f 8d 3c 09[ 	]+lea[ 	]+\(%r9,%r9,1\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 a4 80 23 01 00 00[ 	]+\{nf\} shlb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 e3[ 	]+\{nf\} shl %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 e3[ 	]+\{nf\} shl %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 e2[ 	]+\{nf\} shl %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 e2[ 	]+\{nf\} shl %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 e1[ 	]+\{nf\} shl %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 e1[ 	]+\{nf\} shl %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 e1[ 	]+\{nf\} shl %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e1[ 	]+\{nf\} shl %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 a4 80 23 01 00 00[ 	]+\{nf\} shlb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 fb[ 	]+\{nf\} sar \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 fb[ 	]+\{nf\} sar \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 fa[ 	]+\{nf\} sar \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 fa[ 	]+\{nf\} sar \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 f9[ 	]+\{nf\} sar \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 f9[ 	]+\{nf\} sar \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 f9[ 	]+\{nf\} sar \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 f9[ 	]+\{nf\} sar \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 bc 80 23 01 00 00[ 	]+\{nf\} sarb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 fb 7b[ 	]+\{nf\} sar \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 fb 7b[ 	]+\{nf\} sar \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 fa 7b[ 	]+\{nf\} sar \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 fa 7b[ 	]+\{nf\} sar \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 fb[ 	]+\{nf\} sar %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 fb[ 	]+\{nf\} sar %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 fa[ 	]+\{nf\} sar %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 fa[ 	]+\{nf\} sar %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 f9[ 	]+\{nf\} sar %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 f9[ 	]+\{nf\} sar %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 f9[ 	]+\{nf\} sar %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 f9[ 	]+\{nf\} sar %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 bc 80 23 01 00 00[ 	]+\{nf\} sarb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 e3[ 	]+\{nf\} shl \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 e3[ 	]+\{nf\} shl \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*66 8d 14 12[ 	]+lea[ 	]+\(%rdx,%rdx,1\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 e2[ 	]+\{nf\} shl \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*8d 0c 09[ 	]+lea[ 	]+\(%rcx,%rcx,1\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*8d 14 09[ 	]+lea[ 	]+\(%rcx,%rcx,1\),%edx
+[ 	]*[a-f0-9]+:[ 	]*4f 8d 0c 09[ 	]+lea[ 	]+\(%r9,%r9,1\),%r9
+[ 	]*[a-f0-9]+:[ 	]*d5 4f 8d 3c 09[ 	]+lea[ 	]+\(%r9,%r9,1\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 a4 80 23 01 00 00[ 	]+\{nf\} shlb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 e3[ 	]+\{nf\} shl %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 e3[ 	]+\{nf\} shl %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 e2[ 	]+\{nf\} shl %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 e2[ 	]+\{nf\} shl %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 e1[ 	]+\{nf\} shl %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 e1[ 	]+\{nf\} shl %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 e1[ 	]+\{nf\} shl %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e1[ 	]+\{nf\} shl %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 a4 80 23 01 00 00[ 	]+\{nf\} shlb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 24 d0 7b[ 	]+\{nf\} shld \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 24 d0 7b[ 	]+\{nf\} shld \$0x7b,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 24 94 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 24 94 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 24 ca 7b[ 	]+\{nf\} shld \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 24 ca 7b[ 	]+\{nf\} shld \$0x7b,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 24 cf 7b[ 	]+\{nf\} shld \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 24 cf 7b[ 	]+\{nf\} shld \$0x7b,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c a5 d0[ 	]+\{nf\} shld %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c a5 d0[ 	]+\{nf\} shld %cl,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c a5 94 80 23 01 00 00[ 	]+\{nf\} shld %cl,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c a5 94 80 23 01 00 00[ 	]+\{nf\} shld %cl,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c a5 ca[ 	]+\{nf\} shld %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c a5 ca[ 	]+\{nf\} shld %cl,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c a5 cf[ 	]+\{nf\} shld %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c a5 cf[ 	]+\{nf\} shld %cl,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 eb[ 	]+\{nf\} shr \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 eb[ 	]+\{nf\} shr \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ea[ 	]+\{nf\} shr \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ea[ 	]+\{nf\} shr \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 e9[ 	]+\{nf\} shr \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 e9[ 	]+\{nf\} shr \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 e9[ 	]+\{nf\} shr \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 e9[ 	]+\{nf\} shr \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 ac 80 23 01 00 00[ 	]+\{nf\} shrb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 eb 7b[ 	]+\{nf\} shr \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 eb 7b[ 	]+\{nf\} shr \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 ea 7b[ 	]+\{nf\} shr \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 ea 7b[ 	]+\{nf\} shr \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 eb[ 	]+\{nf\} shr %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 eb[ 	]+\{nf\} shr %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 ea[ 	]+\{nf\} shr %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 ea[ 	]+\{nf\} shr %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 e9[ 	]+\{nf\} shr %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 e9[ 	]+\{nf\} shr %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 e9[ 	]+\{nf\} shr %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e9[ 	]+\{nf\} shr %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 ac 80 23 01 00 00[ 	]+\{nf\} shrb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 2c d0 7b[ 	]+\{nf\} shrd \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 2c d0 7b[ 	]+\{nf\} shrd \$0x7b,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 2c 94 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 2c 94 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 2c ca 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 2c ca 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 2c cf 7b[ 	]+\{nf\} shrd \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 2c cf 7b[ 	]+\{nf\} shrd \$0x7b,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ad d0[ 	]+\{nf\} shrd %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c ad d0[ 	]+\{nf\} shrd %cl,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ad 94 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c ad 94 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ad ca[ 	]+\{nf\} shrd %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c ad ca[ 	]+\{nf\} shrd %cl,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c ad cf[ 	]+\{nf\} shrd %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c ad cf[ 	]+\{nf\} shrd %cl,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 eb 7b[ 	]+\{nf\} sub \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 eb 7b[ 	]+\{nf\} sub \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*66 8d 52 85[ 	]+lea    -0x7b\(%rdx\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ea 7b[ 	]+\{nf\} sub \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*8d 49 85[ 	]+lea    -0x7b\(%rcx\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*8d 51 85[ 	]+lea    -0x7b\(%rcx\),%edx
+[ 	]*[a-f0-9]+:[ 	]*4d 8d 49 85[ 	]+lea    -0x7b\(%r9\),%r9
+[ 	]*[a-f0-9]+:[ 	]*d5 4d 8d 79 85[ 	]+lea    -0x7b\(%r9\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 ac 80 23 01 00 00 7b[ 	]+\{nf\} subb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 28 da[ 	]+\{nf\} sub %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 28 da[ 	]+\{nf\} sub %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 28 9c 80 23 01 00 00[ 	]+\{nf\} sub %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 28 9c 80 23 01 00 00[ 	]+\{nf\} sub %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 29 d0[ 	]+\{nf\} sub %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 29 d0[ 	]+\{nf\} sub %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 29 94 80 23 01 00 00[ 	]+\{nf\} sub %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 29 94 80 23 01 00 00[ 	]+\{nf\} sub %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 29 ca[ 	]+\{nf\} sub %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 29 ca[ 	]+\{nf\} sub %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 29 cf[ 	]+\{nf\} sub %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 29 cf[ 	]+\{nf\} sub %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2a 9c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2a 9c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 2b 94 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 2b 94 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f4 c2[ 	]+\{nf\} tzcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f4 d1[ 	]+\{nf\} tzcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c f4 f9[ 	]+\{nf\} tzcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f4 94 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f4 8c 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f4 8c 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 f3 7b[ 	]+\{nf\} xor \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 f3 7b[ 	]+\{nf\} xor \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 f2 7b[ 	]+\{nf\} xor \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 f2 7b[ 	]+\{nf\} xor \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 30 da[ 	]+\{nf\} xor %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 30 da[ 	]+\{nf\} xor %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 30 9c 80 23 01 00 00[ 	]+\{nf\} xor %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 30 9c 80 23 01 00 00[ 	]+\{nf\} xor %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 31 d0[ 	]+\{nf\} xor %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 31 d0[ 	]+\{nf\} xor %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 31 94 80 23 01 00 00[ 	]+\{nf\} xor %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 31 94 80 23 01 00 00[ 	]+\{nf\} xor %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 31 ca[ 	]+\{nf\} xor %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 31 ca[ 	]+\{nf\} xor %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 31 cf[ 	]+\{nf\} xor %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 31 cf[ 	]+\{nf\} xor %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 32 9c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 32 9c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 33 94 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 33 94 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%r9,%r31
+
+0[0-9a-f]+ <intel>:
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 c3 7b[ 	]+\{nf\} add \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 c3 7b[ 	]+\{nf\} add \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*66 8d 52 7b[ 	]+lea    0x7b\(%rdx\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 c2 7b[ 	]+\{nf\} add \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*8d 49 7b[ 	]+lea    0x7b\(%rcx\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*8d 51 7b[ 	]+lea    0x7b\(%rcx\),%edx
+[ 	]*[a-f0-9]+:[ 	]*4d 8d 49 7b[ 	]+lea    0x7b\(%r9\),%r9
+[ 	]*[a-f0-9]+:[ 	]*d5 4d 8d 79 7b[ 	]+lea    0x7b\(%r9\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 84 80 23 01 00 00 7b[ 	]+\{nf\} addb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 da[ 	]+\{nf\} add %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 00 da[ 	]+\{nf\} add %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 00 9c 80 23 01 00 00[ 	]+\{nf\} add %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 00 9c 80 23 01 00 00[ 	]+\{nf\} add %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*66 8d 04 10[ 	]+lea[ 	]+\(%rax,%rdx,1\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 01 d0[ 	]+\{nf\} add %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 01 94 80 23 01 00 00[ 	]+\{nf\} add %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 01 94 80 23 01 00 00[ 	]+\{nf\} add %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*8d 14 0a[ 	]+lea[ 	]+\(%rdx,%rcx,1\),%edx
+[ 	]*[a-f0-9]+:[ 	]*44 8d 14 0a[ 	]+lea[ 	]+\(%rdx,%rcx,1\),%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*d5 5f 8d 3c 0f[ 	]+lea[ 	]+\(%r31,%r9,1\),%r31
+[ 	]*[a-f0-9]+:[ 	]*d5 1f 8d 1c 0f[ 	]+lea[ 	]+\(%r31,%r9,1\),%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 8c 80 23 01 00 00[ 	]+\{nf\} add %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 02 9c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 02 9c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 03 94 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 03 94 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 e3 7b[ 	]+\{nf\} and \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 e3 7b[ 	]+\{nf\} and \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 e2 7b[ 	]+\{nf\} and \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 e2 7b[ 	]+\{nf\} and \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 e1 7b[ 	]+\{nf\} and \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 a4 80 23 01 00 00 7b[ 	]+\{nf\} andb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 20 da[ 	]+\{nf\} and %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 20 da[ 	]+\{nf\} and %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 20 9c 80 23 01 00 00[ 	]+\{nf\} and %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 20 9c 80 23 01 00 00[ 	]+\{nf\} and %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 21 d0[ 	]+\{nf\} and %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 21 d0[ 	]+\{nf\} and %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 21 94 80 23 01 00 00[ 	]+\{nf\} and %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 21 94 80 23 01 00 00[ 	]+\{nf\} and %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 21 ca[ 	]+\{nf\} and %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 21 ca[ 	]+\{nf\} and %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 21 cf[ 	]+\{nf\} and %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 21 cf[ 	]+\{nf\} and %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 21 8c 80 23 01 00 00[ 	]+\{nf\} and %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 22 9c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 22 9c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 23 94 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 23 94 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 72 6c 0c f2 d1[ 	]+\{nf\} andn %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 52 84 04 f2 d9[ 	]+\{nf\} andn %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f2 94 80 23 01 00 00[ 	]+\{nf\} andn 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f2 bc 80 23 01 00 00[ 	]+\{nf\} andn 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 72 74 0c f7 d2[ 	]+\{nf\} bextr %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f7 94 80 23 01 00 00[ 	]+\{nf\} bextr %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5a b4 0c f7 df[ 	]+\{nf\} bextr %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} bextr %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 d9[ 	]+\{nf\} blsi %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 d9[ 	]+\{nf\} blsi %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 9c 80 23 01 00 00[ 	]+\{nf\} blsi 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 9c 80 23 01 00 00[ 	]+\{nf\} blsi 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 d1[ 	]+\{nf\} blsmsk %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 d1[ 	]+\{nf\} blsmsk %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 94 80 23 01 00 00[ 	]+\{nf\} blsmsk 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 94 80 23 01 00 00[ 	]+\{nf\} blsmsk 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 c9[ 	]+\{nf\} blsr %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 c9[ 	]+\{nf\} blsr %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 8c 80 23 01 00 00[ 	]+\{nf\} blsr 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 8c 80 23 01 00 00[ 	]+\{nf\} blsr 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 72 74 0c f5 d2[ 	]+\{nf\} bzhi %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f5 94 80 23 01 00 00[ 	]+\{nf\} bzhi %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5a b4 0c f5 df[ 	]+\{nf\} bzhi %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f5 bc 80 23 01 00 00[ 	]+\{nf\} bzhi %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 4c fc 0c 31 ff[ 	]+\{nf\} xor %r31,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c fe cb[ 	]+\{nf\} dec %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c fe cb[ 	]+\{nf\} dec %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ff ca[ 	]+\{nf\} dec %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c ff ca[ 	]+\{nf\} dec %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ff c9[ 	]+\{nf\} dec %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c ff c9[ 	]+\{nf\} dec %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff c9[ 	]+\{nf\} dec %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 ff c9[ 	]+\{nf\} dec %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c fe 8c 80 23 01 00 00[ 	]+\{nf\} decb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c fe 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 f3[ 	]+\{nf\} div %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 f2[ 	]+\{nf\} div %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f1[ 	]+\{nf\} div %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f1[ 	]+\{nf\} div %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 b4 80 23 01 00 00[ 	]+\{nf\} divb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 fb[ 	]+\{nf\} idiv %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 fb[ 	]+\{nf\} idiv %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 fa[ 	]+\{nf\} idiv %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 fa[ 	]+\{nf\} idiv %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f9[ 	]+\{nf\} idiv %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f9[ 	]+\{nf\} idiv %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f9[ 	]+\{nf\} idiv %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f9[ 	]+\{nf\} idiv %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 bc 80 23 01 00 00[ 	]+\{nf\} idivb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 bc 80 23 01 00 00[ 	]+\{nf\} idivb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 eb[ 	]+\{nf\} imul %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 ea[ 	]+\{nf\} imul %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c af c2[ 	]+\{nf\} imul %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c af c2[ 	]+\{nf\} imul %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e9[ 	]+\{nf\} imul %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c af d1[ 	]+\{nf\} imul %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c af d1[ 	]+\{nf\} imul %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e9[ 	]+\{nf\} imul %r9
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c af f9[ 	]+\{nf\} imul %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 44 a4 1c af f9[ 	]+\{nf\} imul %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 ac 80 23 01 00 00[ 	]+\{nf\} imulb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imulw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c af 94 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c af 94 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imull 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imulq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c fe c3[ 	]+\{nf\} inc %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c fe c3[ 	]+\{nf\} inc %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ff c2[ 	]+\{nf\} inc %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c ff c2[ 	]+\{nf\} inc %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ff c1[ 	]+\{nf\} inc %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c ff c1[ 	]+\{nf\} inc %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff c1[ 	]+\{nf\} inc %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 ff c1[ 	]+\{nf\} inc %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c fe 84 80 23 01 00 00[ 	]+\{nf\} incb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c fe 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f5 c2[ 	]+\{nf\} lzcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f5 d1[ 	]+\{nf\} lzcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c f5 f9[ 	]+\{nf\} lzcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f5 94 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 e3[ 	]+\{nf\} mul %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 e2[ 	]+\{nf\} mul %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e1[ 	]+\{nf\} mul %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e1[ 	]+\{nf\} mul %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 a4 80 23 01 00 00[ 	]+\{nf\} mulb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mull 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 db[ 	]+\{nf\} neg %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c f6 db[ 	]+\{nf\} neg %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 da[ 	]+\{nf\} neg %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c f7 da[ 	]+\{nf\} neg %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 d9[ 	]+\{nf\} neg %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c f7 d9[ 	]+\{nf\} neg %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 d9[ 	]+\{nf\} neg %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 f7 d9[ 	]+\{nf\} neg %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 9c 80 23 01 00 00[ 	]+\{nf\} negb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c f6 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 cb 7b[ 	]+\{nf\} or \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 cb 7b[ 	]+\{nf\} or \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 ca 7b[ 	]+\{nf\} or \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ca 7b[ 	]+\{nf\} or \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 c9 7b[ 	]+\{nf\} or \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 8c 80 23 01 00 00 7b[ 	]+\{nf\} orb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 08 da[ 	]+\{nf\} or %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 08 da[ 	]+\{nf\} or %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 08 9c 80 23 01 00 00[ 	]+\{nf\} or %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 08 9c 80 23 01 00 00[ 	]+\{nf\} or %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 09 d0[ 	]+\{nf\} or %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 09 d0[ 	]+\{nf\} or %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 09 94 80 23 01 00 00[ 	]+\{nf\} or %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 09 94 80 23 01 00 00[ 	]+\{nf\} or %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 09 ca[ 	]+\{nf\} or %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 09 ca[ 	]+\{nf\} or %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 09 cf[ 	]+\{nf\} or %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 09 cf[ 	]+\{nf\} or %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 09 8c 80 23 01 00 00[ 	]+\{nf\} or %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 0a 9c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 0a 9c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 0b 94 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 0b 94 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 88 c2[ 	]+\{nf\} popcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 88 d1[ 	]+\{nf\} popcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c 88 f9[ 	]+\{nf\} popcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 88 94 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 88 8c 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 88 8c 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 c3[ 	]+\{nf\} rol \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 c3[ 	]+\{nf\} rol \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 c2[ 	]+\{nf\} rol \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 c2[ 	]+\{nf\} rol \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c1[ 	]+\{nf\} rol \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 c1[ 	]+\{nf\} rol \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 c1[ 	]+\{nf\} rol \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 c1[ 	]+\{nf\} rol \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 84 80 23 01 00 00[ 	]+\{nf\} rolb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 84 80 23 01 00 00[ 	]+\{nf\} rolw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 84 80 23 01 00 00[ 	]+\{nf\} roll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 84 80 23 01 00 00[ 	]+\{nf\} rolq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 c3 7b[ 	]+\{nf\} rol \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 c3 7b[ 	]+\{nf\} rol \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 c2 7b[ 	]+\{nf\} rol \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 c2 7b[ 	]+\{nf\} rol \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 84 80 23 01 00 00 7b[ 	]+\{nf\} rolb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rolw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} roll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rolq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 c3[ 	]+\{nf\} rol %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 c3[ 	]+\{nf\} rol %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 c2[ 	]+\{nf\} rol %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 c2[ 	]+\{nf\} rol %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 c1[ 	]+\{nf\} rol %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 c1[ 	]+\{nf\} rol %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 c1[ 	]+\{nf\} rol %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 c1[ 	]+\{nf\} rol %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 84 80 23 01 00 00[ 	]+\{nf\} rolb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 84 80 23 01 00 00[ 	]+\{nf\} rolw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 84 80 23 01 00 00[ 	]+\{nf\} roll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 84 80 23 01 00 00[ 	]+\{nf\} rolq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 cb[ 	]+\{nf\} ror \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 cb[ 	]+\{nf\} ror \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ca[ 	]+\{nf\} ror \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ca[ 	]+\{nf\} ror \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c9[ 	]+\{nf\} ror \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 c9[ 	]+\{nf\} ror \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 c9[ 	]+\{nf\} ror \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 c9[ 	]+\{nf\} ror \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 8c 80 23 01 00 00[ 	]+\{nf\} rorb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 cb 7b[ 	]+\{nf\} ror \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 cb 7b[ 	]+\{nf\} ror \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 ca 7b[ 	]+\{nf\} ror \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 ca 7b[ 	]+\{nf\} ror \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 cb[ 	]+\{nf\} ror %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 cb[ 	]+\{nf\} ror %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 ca[ 	]+\{nf\} ror %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 ca[ 	]+\{nf\} ror %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 c9[ 	]+\{nf\} ror %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 c9[ 	]+\{nf\} ror %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 c9[ 	]+\{nf\} ror %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 c9[ 	]+\{nf\} ror %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 8c 80 23 01 00 00[ 	]+\{nf\} rorb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 e3[ 	]+\{nf\} shl \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 e3[ 	]+\{nf\} shl \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*66 8d 14 12[ 	]+lea[ 	]+\(%rdx,%rdx,1\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 e2[ 	]+\{nf\} shl \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*8d 0c 09[ 	]+lea[ 	]+\(%rcx,%rcx,1\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*8d 14 09[ 	]+lea[ 	]+\(%rcx,%rcx,1\),%edx
+[ 	]*[a-f0-9]+:[ 	]*4f 8d 0c 09[ 	]+lea[ 	]+\(%r9,%r9,1\),%r9
+[ 	]*[a-f0-9]+:[ 	]*d5 4f 8d 3c 09[ 	]+lea[ 	]+\(%r9,%r9,1\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 a4 80 23 01 00 00[ 	]+\{nf\} shlb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 e3[ 	]+\{nf\} shl %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 e3[ 	]+\{nf\} shl %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 e2[ 	]+\{nf\} shl %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 e2[ 	]+\{nf\} shl %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 e1[ 	]+\{nf\} shl %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 e1[ 	]+\{nf\} shl %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 e1[ 	]+\{nf\} shl %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e1[ 	]+\{nf\} shl %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 a4 80 23 01 00 00[ 	]+\{nf\} shlb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 fb[ 	]+\{nf\} sar \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 fb[ 	]+\{nf\} sar \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 fa[ 	]+\{nf\} sar \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 fa[ 	]+\{nf\} sar \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 f9[ 	]+\{nf\} sar \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 f9[ 	]+\{nf\} sar \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 f9[ 	]+\{nf\} sar \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 f9[ 	]+\{nf\} sar \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 bc 80 23 01 00 00[ 	]+\{nf\} sarb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 fb 7b[ 	]+\{nf\} sar \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 fb 7b[ 	]+\{nf\} sar \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 fa 7b[ 	]+\{nf\} sar \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 fa 7b[ 	]+\{nf\} sar \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 fb[ 	]+\{nf\} sar %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 fb[ 	]+\{nf\} sar %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 fa[ 	]+\{nf\} sar %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 fa[ 	]+\{nf\} sar %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 f9[ 	]+\{nf\} sar %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 f9[ 	]+\{nf\} sar %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 f9[ 	]+\{nf\} sar %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 f9[ 	]+\{nf\} sar %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 bc 80 23 01 00 00[ 	]+\{nf\} sarb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 e3[ 	]+\{nf\} shl \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 e3[ 	]+\{nf\} shl \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*66 8d 14 12[ 	]+lea[ 	]+\(%rdx,%rdx,1\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 e2[ 	]+\{nf\} shl \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*8d 0c 09[ 	]+lea[ 	]+\(%rcx,%rcx,1\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*8d 14 09[ 	]+lea[ 	]+\(%rcx,%rcx,1\),%edx
+[ 	]*[a-f0-9]+:[ 	]*4f 8d 0c 09[ 	]+lea[ 	]+\(%r9,%r9,1\),%r9
+[ 	]*[a-f0-9]+:[ 	]*d5 4f 8d 3c 09[ 	]+lea[ 	]+\(%r9,%r9,1\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 a4 80 23 01 00 00[ 	]+\{nf\} shlb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 e3[ 	]+\{nf\} shl %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 e3[ 	]+\{nf\} shl %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 e2[ 	]+\{nf\} shl %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 e2[ 	]+\{nf\} shl %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 e1[ 	]+\{nf\} shl %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 e1[ 	]+\{nf\} shl %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 e1[ 	]+\{nf\} shl %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e1[ 	]+\{nf\} shl %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 a4 80 23 01 00 00[ 	]+\{nf\} shlb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 24 d0 7b[ 	]+\{nf\} shld \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 24 d0 7b[ 	]+\{nf\} shld \$0x7b,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 24 94 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 24 94 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 24 ca 7b[ 	]+\{nf\} shld \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 24 ca 7b[ 	]+\{nf\} shld \$0x7b,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 24 cf 7b[ 	]+\{nf\} shld \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 24 cf 7b[ 	]+\{nf\} shld \$0x7b,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c a5 d0[ 	]+\{nf\} shld %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c a5 d0[ 	]+\{nf\} shld %cl,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c a5 94 80 23 01 00 00[ 	]+\{nf\} shld %cl,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c a5 94 80 23 01 00 00[ 	]+\{nf\} shld %cl,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c a5 ca[ 	]+\{nf\} shld %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c a5 ca[ 	]+\{nf\} shld %cl,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c a5 cf[ 	]+\{nf\} shld %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c a5 cf[ 	]+\{nf\} shld %cl,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 eb[ 	]+\{nf\} shr \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 eb[ 	]+\{nf\} shr \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ea[ 	]+\{nf\} shr \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ea[ 	]+\{nf\} shr \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 e9[ 	]+\{nf\} shr \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 e9[ 	]+\{nf\} shr \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 e9[ 	]+\{nf\} shr \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 e9[ 	]+\{nf\} shr \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 ac 80 23 01 00 00[ 	]+\{nf\} shrb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 eb 7b[ 	]+\{nf\} shr \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 eb 7b[ 	]+\{nf\} shr \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 ea 7b[ 	]+\{nf\} shr \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 ea 7b[ 	]+\{nf\} shr \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 eb[ 	]+\{nf\} shr %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 eb[ 	]+\{nf\} shr %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 ea[ 	]+\{nf\} shr %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 ea[ 	]+\{nf\} shr %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 e9[ 	]+\{nf\} shr %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 e9[ 	]+\{nf\} shr %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 e9[ 	]+\{nf\} shr %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e9[ 	]+\{nf\} shr %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 ac 80 23 01 00 00[ 	]+\{nf\} shrb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 2c d0 7b[ 	]+\{nf\} shrd \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 2c d0 7b[ 	]+\{nf\} shrd \$0x7b,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 2c 94 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 2c 94 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 2c ca 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 2c ca 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 2c cf 7b[ 	]+\{nf\} shrd \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 2c cf 7b[ 	]+\{nf\} shrd \$0x7b,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ad d0[ 	]+\{nf\} shrd %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c ad d0[ 	]+\{nf\} shrd %cl,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ad 94 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c ad 94 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ad ca[ 	]+\{nf\} shrd %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c ad ca[ 	]+\{nf\} shrd %cl,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c ad cf[ 	]+\{nf\} shrd %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c ad cf[ 	]+\{nf\} shrd %cl,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 eb 7b[ 	]+\{nf\} sub \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 eb 7b[ 	]+\{nf\} sub \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*66 8d 52 85[ 	]+lea    -0x7b\(%rdx\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ea 7b[ 	]+\{nf\} sub \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*8d 49 85[ 	]+lea    -0x7b\(%rcx\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*8d 51 85[ 	]+lea    -0x7b\(%rcx\),%edx
+[ 	]*[a-f0-9]+:[ 	]*4d 8d 49 85[ 	]+lea    -0x7b\(%r9\),%r9
+[ 	]*[a-f0-9]+:[ 	]*d5 4d 8d 79 85[ 	]+lea    -0x7b\(%r9\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 ac 80 23 01 00 00 7b[ 	]+\{nf\} subb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 28 da[ 	]+\{nf\} sub %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 28 da[ 	]+\{nf\} sub %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 28 9c 80 23 01 00 00[ 	]+\{nf\} sub %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 28 9c 80 23 01 00 00[ 	]+\{nf\} sub %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 29 d0[ 	]+\{nf\} sub %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 29 d0[ 	]+\{nf\} sub %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 29 94 80 23 01 00 00[ 	]+\{nf\} sub %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 29 94 80 23 01 00 00[ 	]+\{nf\} sub %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 29 ca[ 	]+\{nf\} sub %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 29 ca[ 	]+\{nf\} sub %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 29 cf[ 	]+\{nf\} sub %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 29 cf[ 	]+\{nf\} sub %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2a 9c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2a 9c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 2b 94 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 2b 94 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f4 c2[ 	]+\{nf\} tzcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f4 d1[ 	]+\{nf\} tzcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c f4 f9[ 	]+\{nf\} tzcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f4 94 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f4 8c 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f4 8c 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 f3 7b[ 	]+\{nf\} xor \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 f3 7b[ 	]+\{nf\} xor \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 f2 7b[ 	]+\{nf\} xor \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 f2 7b[ 	]+\{nf\} xor \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 30 da[ 	]+\{nf\} xor %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 30 da[ 	]+\{nf\} xor %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 30 9c 80 23 01 00 00[ 	]+\{nf\} xor %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 30 9c 80 23 01 00 00[ 	]+\{nf\} xor %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 31 d0[ 	]+\{nf\} xor %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 31 d0[ 	]+\{nf\} xor %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 31 94 80 23 01 00 00[ 	]+\{nf\} xor %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 31 94 80 23 01 00 00[ 	]+\{nf\} xor %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 31 ca[ 	]+\{nf\} xor %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 31 ca[ 	]+\{nf\} xor %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 31 cf[ 	]+\{nf\} xor %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 31 cf[ 	]+\{nf\} xor %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 32 9c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 32 9c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 33 94 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 33 94 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%r9,%r31
+
+0[0-9a-f]+ <optimize>:
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 c3 80[ 	]+\{nf\} add \$0x80,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 c3 80[ 	]+\{nf\} add \$0x80,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 ea 80[ 	]+\{nf\} sub \$0xf+80,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ea 80[ 	]+\{nf\} sub \$0xf+80,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*8d 89 80 00 00 00[ 	]+lea    0x80\(%rcx\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*8d 91 80 00 00 00[ 	]+lea    0x80\(%rcx\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 e9 80[ 	]+\{nf\} sub \$0xf+80,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 e9 80[ 	]+\{nf\} sub \$0xf+80,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 00 80[ 	]+\{nf\} addb \$0x80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 64 1c 80 00 80[ 	]+\{nf\} add \$0x80,\(%rax\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 28 80[ 	]+\{nf\} subw \$0xf+80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6d 1c 83 28 80[ 	]+\{nf\} sub \$0xf+80,\(%rax\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 28 80[ 	]+\{nf\} subl \$0xf+80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 74 1c 83 28 80[ 	]+\{nf\} sub \$0xf+80,\(%rax\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c 83 28 80[ 	]+\{nf\} subq \$0xf+80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 b4 1c 83 28 80[ 	]+\{nf\} sub \$0xf+80,\(%rax\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 eb 80[ 	]+\{nf\} sub \$0x80,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 eb 80[ 	]+\{nf\} sub \$0x80,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*66 8d 52 80[ 	]+lea    -0x80\(%rdx\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 c2 80[ 	]+\{nf\} add \$0xf+80,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*8d 49 80[ 	]+lea    -0x80\(%rcx\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*8d 51 80[ 	]+lea    -0x80\(%rcx\),%edx
+[ 	]*[a-f0-9]+:[ 	]*4d 8d 49 80[ 	]+lea    -0x80\(%r9\),%r9
+[ 	]*[a-f0-9]+:[ 	]*d5 4d 8d 79 80[ 	]+lea    -0x80\(%r9\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 28 80[ 	]+\{nf\} subb \$0x80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 64 1c 80 28 80[ 	]+\{nf\} sub \$0x80,\(%rax\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 00 80[ 	]+\{nf\} addw \$0xf+80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6d 1c 83 00 80[ 	]+\{nf\} add \$0xf+80,\(%rax\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 00 80[ 	]+\{nf\} addl \$0xf+80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 74 1c 83 00 80[ 	]+\{nf\} add \$0xf+80,\(%rax\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c 83 00 80[ 	]+\{nf\} addq \$0xf+80,\(%rax\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 b4 1c 83 00 80[ 	]+\{nf\} add \$0xf+80,\(%rax\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 ca[ 	]+\{nf\} ror \$1,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d0 ca[ 	]+\{nf\} ror \$1,%dl,%al
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ca[ 	]+\{nf\} ror \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ca[ 	]+\{nf\} ror \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 ca[ 	]+\{nf\} ror \$1,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d1 ca[ 	]+\{nf\} ror \$1,%edx,%eax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c d1 ca[ 	]+\{nf\} ror \$1,%rdx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 1c d1 ca[ 	]+\{nf\} ror \$1,%rdx,%rax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 0a[ 	]+\{nf\} rorb \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d0 0a[ 	]+\{nf\} ror \$1,\(%rdx\),%al
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 0a[ 	]+\{nf\} rorw \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 0a[ 	]+\{nf\} ror \$1,\(%rdx\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 0a[ 	]+\{nf\} rorl \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d1 0a[ 	]+\{nf\} ror \$1,\(%rdx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c d1 0a[ 	]+\{nf\} rorq \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 1c d1 0a[ 	]+\{nf\} ror \$1,\(%rdx\),%rax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 c2[ 	]+\{nf\} rol \$1,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d0 c2[ 	]+\{nf\} rol \$1,%dl,%al
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 c2[ 	]+\{nf\} rol \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 c2[ 	]+\{nf\} rol \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c2[ 	]+\{nf\} rol \$1,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d1 c2[ 	]+\{nf\} rol \$1,%edx,%eax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c d1 c2[ 	]+\{nf\} rol \$1,%rdx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 1c d1 c2[ 	]+\{nf\} rol \$1,%rdx,%rax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 02[ 	]+\{nf\} rolb \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d0 02[ 	]+\{nf\} rol \$1,\(%rdx\),%al
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 02[ 	]+\{nf\} rolw \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 02[ 	]+\{nf\} rol \$1,\(%rdx\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 02[ 	]+\{nf\} roll \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 1c d1 02[ 	]+\{nf\} rol \$1,\(%rdx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c d1 02[ 	]+\{nf\} rolq \$1,\(%rdx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 1c d1 02[ 	]+\{nf\} rol \$1,\(%rdx\),%rax
+[ 	]*[a-f0-9]+:[ 	]*66 8d 14 49[ 	]+lea    \(%rcx,%rcx,2\),%dx
+[ 	]*[a-f0-9]+:[ 	]*66 8d 54 ad 00[ 	]+lea    0x0\(%rbp,%rbp,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*66 8d 2c c9[ 	]+lea    \(%rcx,%rcx,8\),%bp
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 6b d4 03[ 	]+\{nf\} imul \$0x3,%sp,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 6b e4 05[ 	]+\{nf\} imul \$0x5,%sp,%sp
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 6b d1 03[ 	]+\{nf\} imulzu \$0x3,%cx,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 6b c9 05[ 	]+\{nf\} imulzu \$0x5,%cx,%cx
+[ 	]*[a-f0-9]+:[ 	]*62 e4 7d 0c 6b c5 03[ 	]+\{nf\} imul \$0x3,%bp,%r16w
+[ 	]*[a-f0-9]+:[ 	]*62 fc 7d 0c 6b d5 05[ 	]+\{nf\} imul \$0x5,%r21w,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 ec 7d 0c 6b ed 09[ 	]+\{nf\} imul \$0x9,%r21w,%r21w
+[ 	]*[a-f0-9]+:[ 	]*8d 14 49[ 	]+lea    \(%rcx,%rcx,2\),%edx
+[ 	]*[a-f0-9]+:[ 	]*8d 54 ad 00[ 	]+lea    0x0\(%rbp,%rbp,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*8d 2c c9[ 	]+lea    \(%rcx,%rcx,8\),%ebp
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 6b d4 03[ 	]+\{nf\} imul \$0x3,%esp,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 6b e4 05[ 	]+\{nf\} imul \$0x5,%esp,%esp
+[ 	]*[a-f0-9]+:[ 	]*48 8d 14 49[ 	]+lea    \(%rcx,%rcx,2\),%rdx
+[ 	]*[a-f0-9]+:[ 	]*48 8d 54 ad 00[ 	]+lea    0x0\(%rbp,%rbp,4\),%rdx
+[ 	]*[a-f0-9]+:[ 	]*48 8d 2c c9[ 	]+lea    \(%rcx,%rcx,8\),%rbp
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c 6b d4 03[ 	]+\{nf\} imul \$0x3,%rsp,%rdx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c 6b e4 05[ 	]+\{nf\} imul \$0x5,%rsp,%rsp
+#pass
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -312,7 +312,7 @@ sti, 0xfb, 0, NoSuf, {}
 // Arithmetic.
 
 <alu2:opc:c:optz:optt:opti:optiE:nf, +
-    add:0:C::::Optimize:NF, +
+    add:0:C:::::NF|Optimize, +
     or:1:C::Optimize:::NF, +
     adc:2:C:::::, +
     sbb:3::::::, +
@@ -323,9 +323,9 @@ sti, 0xfb, 0, NoSuf, {}
 <alu2>, <alu2:opc> << 3, APX_F, D|<alu2:c>|W|CheckOperandSize|Modrm|No_sSuf|DstVVVV|EVexMap4|<alu2:nf>|<alu2:optz>, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
 <alu2>, <alu2:opc> << 3, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock|<alu2:optz>|<alu2:optt>, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 <alu2>, <alu2:opc> << 3, APX_F, D|W|CheckOperandSize|Modrm|No_sSuf|EVexMap4|<alu2:nf>, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-<alu2>, 0x83/<alu2:opc>, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|DstVVVV|EVexMap4|<alu2:nf>, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
+<alu2>, 0x83/<alu2:opc>, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|DstVVVV|EVexMap4|<alu2:nf>|<alu2:optiE>, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
 <alu2>, 0x83/<alu2:opc>, 0, Modrm|No_bSuf|No_sSuf|HLEPrefixLock|<alu2:opti>, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-<alu2>, 0x83/<alu2:opc>, APX_F, Modrm|No_bSuf|No_sSuf|EVexMap4|<alu2:nf>, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
+<alu2>, 0x83/<alu2:opc>, APX_F, Modrm|No_bSuf|No_sSuf|EVexMap4|<alu2:nf>|<alu2:optiE>, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 <alu2>, 0x04 | (<alu2:opc> << 3), 0, W|No_sSuf|<alu2:opti>, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword }
 <alu2>, 0x80/<alu2:opc>, APX_F, W|Modrm|CheckOperandSize|No_sSuf|DstVVVV|EVexMap4|<alu2:nf>|<alu2:optiE>, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
 <alu2>, 0x80/<alu2:opc>, 0, W|Modrm|No_sSuf|HLEPrefixLock|<alu2:opti>, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
@@ -400,7 +400,7 @@ imul, 0xaf, APX_F, C|Modrm|CheckOperandS
 imul, 0xfaf, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
 imul, 0xaf, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|NF, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
 imul, 0x6b, i186, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-imul, 0x6b, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|NF, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
+imul, 0x6b, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|NF|Optimize, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
 imulzu, 0x6b, APX_F, Modrm|No_bSuf|No_sSuf|EVexMap4|NF|ZU, { Imm8S, Reg16|Unspecified|BaseIndex, Reg16 }
 imul, 0x69, i186, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Imm16|Imm32|Imm32S, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
 imul, 0x69, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|NF, { Imm16|Imm32|Imm32S, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
@@ -409,7 +409,7 @@ imulzu, 0x69, APX_F, Modrm|No_bSuf|No_sS
 // both i.rm.reg & i.rm.regmem fields.  RegKludge enables this
 // transformation.
 imul, 0x6b, i186, Modrm|No_bSuf|No_sSuf|RegKludge, { Imm8S, Reg16|Reg32|Reg64 }
-imul, 0x6b, APX_F, Modrm|No_bSuf|No_sSuf|RegKludge|EVexMap4|NF, { Imm8S, Reg16|Reg32|Reg64 }
+imul, 0x6b, APX_F, Modrm|No_bSuf|No_sSuf|RegKludge|EVexMap4|NF|Optimize, { Imm8S, Reg16|Reg32|Reg64 }
 imul, 0x69, i186, Modrm|No_bSuf|No_sSuf|RegKludge, { Imm16|Imm32|Imm32S, Reg16|Reg32|Reg64 }
 imul, 0x69, APX_F, Modrm|No_bSuf|No_sSuf|RegKludge|EVexMap4|NF, { Imm16|Imm32|Imm32S, Reg16|Reg32|Reg64 }
 // ZU is omitted here, for colliding with RegKludge.  process_operands() will


^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 5/6] x86/APX: optimize certain {nf}-form insns to BMI2 ones
  2024-06-14 12:10 [PATCH 0/6] x86: a few more optimizations Jan Beulich
                   ` (3 preceding siblings ...)
  2024-06-14 12:13 ` [PATCH 4/6] x86/APX: optimize certain {nf}-form insns to LEA Jan Beulich
@ 2024-06-14 12:14 ` Jan Beulich
  2024-06-17  6:36   ` Jiang, Haochen
  2024-06-14 12:14 ` [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0 Jan Beulich
                   ` (2 subsequent siblings)
  7 siblings, 1 reply; 22+ messages in thread
From: Jan Beulich @ 2024-06-14 12:14 UTC (permalink / raw)
  To: Binutils; +Cc: H.J. Lu, Lili Cui

..., as those leave EFLAGS untouched anyway. That's a shorter encoding,
available as long as no eGPR is in use anywhere.
---
RFC: Especially because of the need to explicitly enable BMI2 this may
     be deemed not worth it; seeking views.

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -5098,6 +5098,116 @@ optimize_encoding (void)
       i.tm.operand_types[0].bitfield.imm1 = 1;
       i.imm_operands = 0;
     }
+  else if (i.has_nf
+	   && i.tm.opcode_space == SPACE_EVEXMAP4
+	   && cpu_arch_isa_flags.bitfield.cpubmi2
+	   && i.encoding == encoding_default
+	   && (i.operands > 2 || !i.mem_operands)
+	   && (i.types[i.operands - 1].bitfield.dword
+	       || i.types[i.operands - 1].bitfield.qword))
+    {
+      if (i.tm.base_opcode == 0xd2)
+	{
+	  /* Optimize: -O:
+	       <OP> one of sal, sar, shl, shr:
+	       {nf} <OP> %cl, %rN       -> <OP>x %{e,r}cx, %rN, %rN (N < 16)
+	       {nf} <OP> %cl, ..., %rN  -> <OP>x %{e,r}cx, ..., %rN (no eGPR used)
+	   */
+	  gas_assert (i.tm.extension_opcode & 4);
+	  i.tm.operand_types[0] = i.tm.operand_types[i.operands - 1];
+	  /* NB: i.op[0].regs specifying %cl is good enough.  */
+	  i.types[0] = i.types[i.operands - 1];
+	  if (i.operands == 2)
+	    {
+	      i.tm.operand_types[0].bitfield.baseindex = 0;
+	      i.tm.operand_types[2] = i.tm.operand_types[0];
+	      i.op[2].regs = i.op[1].regs;
+	      i.types[2] = i.types[1];
+	      i.reg_operands = i.operands = 3;
+	    }
+	  i.has_nf = false;
+	  i.tm.opcode_modifier.w = 0;
+	  i.tm.opcode_modifier.evex = 0;
+	  i.tm.opcode_modifier.vex = VEX128;
+	  i.tm.opcode_modifier.vexvvvv = VexVVVV_SRC2;
+	  i.tm.opcode_space = SPACE_0F38;
+	  i.tm.base_opcode = 0xf7;
+	  i.tm.opcode_modifier.opcodeprefix
+	    = !(i.tm.extension_opcode & 1)
+	      ? PREFIX_0X66 /* shlx */
+	      : i.tm.extension_opcode & 2
+		? PREFIX_0XF3 /* sarx */
+		: PREFIX_0XF2 /* shrx */;
+	  i.tm.extension_opcode = None;
+	}
+      else if (i.tm.base_opcode == 0xc0
+	       && (i.tm.extension_opcode ||
+		   i.op[0].imms->X_op == O_constant))
+	{
+	  /* Optimize: -O:
+	       {nf} rol $I, %rN       -> rorx $osz-I, %rN, %rN (I != osz-1, N < 16)
+	       {nf} rol $I, ..., %rN  -> rorx $osz-I, ..., %rN (I != osz-1, no eGPR used)
+	       {nf} ror $I, %rN       -> rorx $I, %rN, %rN (I != 1, N < 16)
+	       {nf} ror $I, ..., %rN  -> rorx $I,..., %rN (I != 1, no eGPR used)
+	     NB: rol -> ror transformation for I == osz-1 was already handled above.
+	     NB2: ror with an immediate of 1 uses a different base opcode.
+	   */
+	  gas_assert (i.tm.extension_opcode <= 1);
+	  if (i.operands == 2)
+	    {
+	      i.tm.operand_types[2] = i.tm.operand_types[1];
+	      i.tm.operand_types[2].bitfield.baseindex = 0;
+	      i.op[2].regs = i.op[1].regs;
+	      i.types[2] = i.types[1];
+	      i.reg_operands = 2;
+	      i.operands = 3;
+	    }
+	  i.has_nf = false;
+	  i.tm.opcode_modifier.w = 0;
+	  i.tm.opcode_modifier.evex = 0;
+	  i.tm.opcode_modifier.vex = VEX128;
+	  i.tm.opcode_modifier.vexvvvv = 0;
+	  i.tm.opcode_space = SPACE_0F3A;
+	  i.tm.base_opcode = 0xf0;
+	  i.tm.opcode_modifier.opcodeprefix = PREFIX_0XF2;
+	  if (!i.tm.extension_opcode)
+	    i.op[0].imms->X_add_number =
+	      (i.types[i.operands - 1].bitfield.byte
+	       ? 8 : i.types[i.operands - 1].bitfield.word
+		     ? 16 : 64 >> i.types[i.operands - 1].bitfield.dword)
+	      - i.op[0].imms->X_add_number;
+	  i.tm.extension_opcode = None;
+	}
+      else if (i.tm.base_opcode == 0xf6
+	       && !i.mem_operands
+	       && i.op[0].regs->reg_num == 2
+	       && !(i.op[0].regs->reg_flags & RegRex) )
+	{
+	  /* Optimize: -O:
+	       {nf} mul %edx  -> mulx %eax, %eax, %edx
+	       {nf} mul %rdx  -> mulx %rax, %rax, %rdx
+	   */
+	  gas_assert (i.tm.extension_opcode == 4);
+	  i.tm.operand_types[1] = i.tm.operand_types[0];
+	  i.tm.operand_types[1].bitfield.baseindex = 0;
+	  i.tm.operand_types[2] = i.tm.operand_types[1];
+	  i.op[2].regs = i.op[0].regs;
+	  /* NB: %eax is good enough also for 64-bit operand size.  */
+	  i.op[1].regs = i.op[0].regs = reg_eax;
+	  i.types[2] = i.types[1] = i.types[0];
+	  i.reg_operands = i.operands = 3;
+
+	  i.has_nf = false;
+	  i.tm.opcode_modifier.w = 0;
+	  i.tm.opcode_modifier.evex = 0;
+	  i.tm.opcode_modifier.vex = VEX128;
+	  i.tm.opcode_modifier.vexvvvv = VexVVVV_SRC1;
+	  i.tm.opcode_space = SPACE_0F38;
+	  i.tm.base_opcode = 0xf6;
+	  i.tm.opcode_modifier.opcodeprefix = PREFIX_0XF2;
+	  i.tm.extension_opcode = None;
+	}
+    }
   else if (i.tm.base_opcode == 0xba
 	   && i.tm.opcode_space == SPACE_0F
 	   && i.reg_operands == 1
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -392,6 +392,7 @@ run_dump_test "x86-64-apx-nf"
 run_dump_test "x86-64-apx-nf-intel"
 run_dump_test "x86-64-apx-nf-optimize"
 run_dump_test "x86-64-apx-nf-optimize-size"
+run_dump_test "x86-64-apx-nf-optimize-BMI2"
 run_dump_test "x86-64-apx-zu"
 run_dump_test "x86-64-apx-zu-intel"
 run_list_test "x86-64-apx-zu-inval"
--- a/gas/testsuite/gas/i386/x86-64-apx-nf.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf.d
@@ -212,7 +212,7 @@ Disassembly of section \.text:
 \s*[a-f0-9]+:\s*62 f4 7c 0c f6 e3\s+\{nf\} mul %bl
 \s*[a-f0-9]+:\s*62 f4 7d 0c f7 e2\s+\{nf\} mul %dx
 \s*[a-f0-9]+:\s*62 f4 7c 0c f7 e1\s+\{nf\} mul %ecx
-\s*[a-f0-9]+:\s*62 d4 fc 0c f7 e1\s+\{nf\} mul %r9
+\s*[a-f0-9]+:\s*62 f4 fc 0c f7 e2\s+\{nf\} mul %rdx
 \s*[a-f0-9]+:\s*62 d4 7c 0c f6 a4 80 23 01 00 00\s+\{nf\} mulb 0x123\(%r8,%rax,4\)
 \s*[a-f0-9]+:\s*62 d4 7d 0c f7 a4 80 23 01 00 00\s+\{nf\} mulw 0x123\(%r8,%rax,4\)
 \s*[a-f0-9]+:\s*62 d4 7c 0c f7 a4 80 23 01 00 00\s+\{nf\} mull 0x123\(%r8,%rax,4\)
@@ -892,7 +892,7 @@ Disassembly of section \.text:
 \s*[a-f0-9]+:\s*62 54 fc 0c f5 8c 80 23 01 00 00\s+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%r9
 \s*[a-f0-9]+:\s*62 f4 7c 0c f6 e3\s+\{nf\} mul %bl
 \s*[a-f0-9]+:\s*62 f4 7d 0c f7 e2\s+\{nf\} mul %dx
-\s*[a-f0-9]+:\s*62 f4 7c 0c f7 e1\s+\{nf\} mul %ecx
+\s*[a-f0-9]+:\s*62 f4 7c 0c f7 e2\s+\{nf\} mul %edx
 \s*[a-f0-9]+:\s*62 d4 fc 0c f7 e1\s+\{nf\} mul %r9
 \s*[a-f0-9]+:\s*62 d4 7c 0c f6 a4 80 23 01 00 00\s+\{nf\} mulb 0x123\(%r8,%rax,4\)
 \s*[a-f0-9]+:\s*62 d4 7d 0c f7 a4 80 23 01 00 00\s+\{nf\} mulw 0x123\(%r8,%rax,4\)
--- a/gas/testsuite/gas/i386/x86-64-apx-nf.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf.s
@@ -207,7 +207,7 @@ _start:
 	{nf}	mul	%bl
 	{nf}	mul	%dx
 	{nf}	mul	%ecx
-	{nf}	mul	%r9
+	{nf}	mul	%rdx
 	{nf}	mulb	291(%r8, %rax, 4)
 	{nf}	mulw	291(%r8, %rax, 4)
 	{nf}	mull	291(%r8, %rax, 4)
@@ -888,7 +888,7 @@ intel:
 	{nf}	lzcnt	r9, QWORD PTR [r8+rax*4+291]
 	{nf}	mul	bl
 	{nf}	mul	dx
-	{nf}	mul	ecx
+	{nf}	mul	edx
 	{nf}	mul	r9
 	{nf}	mul	BYTE PTR [r8+rax*4+291]
 	{nf}	mul	WORD PTR [r8+rax*4+291]
--- a/gas/testsuite/gas/i386/x86-64-apx-nf-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf-intel.d
@@ -212,7 +212,7 @@ Disassembly of section \.text:
 \s*[a-f0-9]+:\s*62 f4 7c 0c f6 e3\s+\{nf\} mul bl
 \s*[a-f0-9]+:\s*62 f4 7d 0c f7 e2\s+\{nf\} mul dx
 \s*[a-f0-9]+:\s*62 f4 7c 0c f7 e1\s+\{nf\} mul ecx
-\s*[a-f0-9]+:\s*62 d4 fc 0c f7 e1\s+\{nf\} mul r9
+\s*[a-f0-9]+:\s*62 f4 fc 0c f7 e2\s+\{nf\} mul rdx
 \s*[a-f0-9]+:\s*62 d4 7c 0c f6 a4 80 23 01 00 00\s+\{nf\} mul BYTE PTR \[r8\+rax\*4\+0x123\]
 \s*[a-f0-9]+:\s*62 d4 7d 0c f7 a4 80 23 01 00 00\s+\{nf\} mul WORD PTR \[r8\+rax\*4\+0x123\]
 \s*[a-f0-9]+:\s*62 d4 7c 0c f7 a4 80 23 01 00 00\s+\{nf\} mul DWORD PTR \[r8\+rax\*4\+0x123\]
@@ -892,7 +892,7 @@ Disassembly of section \.text:
 \s*[a-f0-9]+:\s*62 54 fc 0c f5 8c 80 23 01 00 00\s+\{nf\} lzcnt r9,QWORD PTR \[r8\+rax\*4\+0x123\]
 \s*[a-f0-9]+:\s*62 f4 7c 0c f6 e3\s+\{nf\} mul bl
 \s*[a-f0-9]+:\s*62 f4 7d 0c f7 e2\s+\{nf\} mul dx
-\s*[a-f0-9]+:\s*62 f4 7c 0c f7 e1\s+\{nf\} mul ecx
+\s*[a-f0-9]+:\s*62 f4 7c 0c f7 e2\s+\{nf\} mul edx
 \s*[a-f0-9]+:\s*62 d4 fc 0c f7 e1\s+\{nf\} mul r9
 \s*[a-f0-9]+:\s*62 d4 7c 0c f6 a4 80 23 01 00 00\s+\{nf\} mul BYTE PTR \[r8\+rax\*4\+0x123\]
 \s*[a-f0-9]+:\s*62 d4 7d 0c f7 a4 80 23 01 00 00\s+\{nf\} mul WORD PTR \[r8\+rax\*4\+0x123\]
--- a/gas/testsuite/gas/i386/x86-64-apx-nf-optimize.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf-optimize.d
@@ -212,7 +212,7 @@ Disassembly of section \.text:
 [ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 e3[ 	]+\{nf\} mul %bl
 [ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 e2[ 	]+\{nf\} mul %dx
 [ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e1[ 	]+\{nf\} mul %ecx
-[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e1[ 	]+\{nf\} mul %r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c f7 e2[ 	]+\{nf\} mul %rdx
 [ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 a4 80 23 01 00 00[ 	]+\{nf\} mulb 0x123\(%r8,%rax,4\)
 [ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulw 0x123\(%r8,%rax,4\)
 [ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mull 0x123\(%r8,%rax,4\)
@@ -892,7 +892,7 @@ Disassembly of section \.text:
 [ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%r9
 [ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 e3[ 	]+\{nf\} mul %bl
 [ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 e2[ 	]+\{nf\} mul %dx
-[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e1[ 	]+\{nf\} mul %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e2[ 	]+\{nf\} mul %edx
 [ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e1[ 	]+\{nf\} mul %r9
 [ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 a4 80 23 01 00 00[ 	]+\{nf\} mulb 0x123\(%r8,%rax,4\)
 [ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulw 0x123\(%r8,%rax,4\)
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf-optimize-BMI2.d
@@ -0,0 +1,1385 @@
+#as: -O -march=+bmi2
+#objdump: -dw
+#name: x86_64 APX_F insns with nf pseudo prefix, -O, and BMI2
+#source: x86-64-apx-nf.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 c3 7b[ 	]+\{nf\} add \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 c3 7b[ 	]+\{nf\} add \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 c2 7b[ 	]+\{nf\} add \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 c2 7b[ 	]+\{nf\} add \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 c1 7b[ 	]+\{nf\} add \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 c1 7b[ 	]+\{nf\} add \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 c1 7b[ 	]+\{nf\} add \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 c1 7b[ 	]+\{nf\} add \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 84 80 23 01 00 00 7b[ 	]+\{nf\} addb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 da[ 	]+\{nf\} add %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 00 da[ 	]+\{nf\} add %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 00 9c 80 23 01 00 00[ 	]+\{nf\} add %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 00 9c 80 23 01 00 00[ 	]+\{nf\} add %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 01 d0[ 	]+\{nf\} add %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 01 d0[ 	]+\{nf\} add %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 01 94 80 23 01 00 00[ 	]+\{nf\} add %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 01 94 80 23 01 00 00[ 	]+\{nf\} add %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 01 ca[ 	]+\{nf\} add %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 01 ca[ 	]+\{nf\} add %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 01 cf[ 	]+\{nf\} add %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 01 cf[ 	]+\{nf\} add %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 8c 80 23 01 00 00[ 	]+\{nf\} add %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 02 9c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 02 9c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 03 94 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 03 94 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 e3 7b[ 	]+\{nf\} and \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 e3 7b[ 	]+\{nf\} and \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 e2 7b[ 	]+\{nf\} and \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 e2 7b[ 	]+\{nf\} and \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 e1 7b[ 	]+\{nf\} and \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 a4 80 23 01 00 00 7b[ 	]+\{nf\} andb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 20 da[ 	]+\{nf\} and %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 20 da[ 	]+\{nf\} and %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 20 9c 80 23 01 00 00[ 	]+\{nf\} and %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 20 9c 80 23 01 00 00[ 	]+\{nf\} and %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 21 d0[ 	]+\{nf\} and %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 21 d0[ 	]+\{nf\} and %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 21 94 80 23 01 00 00[ 	]+\{nf\} and %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 21 94 80 23 01 00 00[ 	]+\{nf\} and %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 21 ca[ 	]+\{nf\} and %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 21 ca[ 	]+\{nf\} and %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 21 cf[ 	]+\{nf\} and %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 21 cf[ 	]+\{nf\} and %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 21 8c 80 23 01 00 00[ 	]+\{nf\} and %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 22 9c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 22 9c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 23 94 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 23 94 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 72 6c 0c f2 d1[ 	]+\{nf\} andn %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 52 84 04 f2 d9[ 	]+\{nf\} andn %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f2 94 80 23 01 00 00[ 	]+\{nf\} andn 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f2 bc 80 23 01 00 00[ 	]+\{nf\} andn 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 72 74 0c f7 d2[ 	]+\{nf\} bextr %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f7 94 80 23 01 00 00[ 	]+\{nf\} bextr %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5a b4 0c f7 df[ 	]+\{nf\} bextr %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} bextr %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 d9[ 	]+\{nf\} blsi %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 d9[ 	]+\{nf\} blsi %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 9c 80 23 01 00 00[ 	]+\{nf\} blsi 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 9c 80 23 01 00 00[ 	]+\{nf\} blsi 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 d1[ 	]+\{nf\} blsmsk %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 d1[ 	]+\{nf\} blsmsk %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 94 80 23 01 00 00[ 	]+\{nf\} blsmsk 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 94 80 23 01 00 00[ 	]+\{nf\} blsmsk 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 c9[ 	]+\{nf\} blsr %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 c9[ 	]+\{nf\} blsr %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 8c 80 23 01 00 00[ 	]+\{nf\} blsr 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 8c 80 23 01 00 00[ 	]+\{nf\} blsr 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 72 74 0c f5 d2[ 	]+\{nf\} bzhi %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f5 94 80 23 01 00 00[ 	]+\{nf\} bzhi %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5a b4 0c f5 df[ 	]+\{nf\} bzhi %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f5 bc 80 23 01 00 00[ 	]+\{nf\} bzhi %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 4c fc 0c 31 ff[ 	]+\{nf\} xor %r31,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c fe cb[ 	]+\{nf\} dec %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c fe cb[ 	]+\{nf\} dec %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ff ca[ 	]+\{nf\} dec %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c ff ca[ 	]+\{nf\} dec %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ff c9[ 	]+\{nf\} dec %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c ff c9[ 	]+\{nf\} dec %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff c9[ 	]+\{nf\} dec %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 ff c9[ 	]+\{nf\} dec %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c fe 8c 80 23 01 00 00[ 	]+\{nf\} decb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c fe 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 f3[ 	]+\{nf\} div %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 f2[ 	]+\{nf\} div %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f1[ 	]+\{nf\} div %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f1[ 	]+\{nf\} div %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 b4 80 23 01 00 00[ 	]+\{nf\} divb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 fb[ 	]+\{nf\} idiv %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 fb[ 	]+\{nf\} idiv %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 fa[ 	]+\{nf\} idiv %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 fa[ 	]+\{nf\} idiv %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f9[ 	]+\{nf\} idiv %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f9[ 	]+\{nf\} idiv %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f9[ 	]+\{nf\} idiv %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f9[ 	]+\{nf\} idiv %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 bc 80 23 01 00 00[ 	]+\{nf\} idivb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 bc 80 23 01 00 00[ 	]+\{nf\} idivb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 eb[ 	]+\{nf\} imul %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 ea[ 	]+\{nf\} imul %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c af c2[ 	]+\{nf\} imul %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c af c2[ 	]+\{nf\} imul %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e9[ 	]+\{nf\} imul %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c af d1[ 	]+\{nf\} imul %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c af d1[ 	]+\{nf\} imul %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e9[ 	]+\{nf\} imul %r9
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c af f9[ 	]+\{nf\} imul %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 44 a4 1c af f9[ 	]+\{nf\} imul %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 ac 80 23 01 00 00[ 	]+\{nf\} imulb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imulw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c af 94 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c af 94 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imull 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imulq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 6b c2 7b[ 	]+\{nf\} imul \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 6b d1 7b[ 	]+\{nf\} imul \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 6b f9 7b[ 	]+\{nf\} imul \$0x7b,%r9,%r15
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 6b c9 7b[ 	]+\{nf\} imul \$0x7b,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 6b 94 80 23 01 00 00 7b[ 	]+\{nf\} imul \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 6b 8c 80 23 01 00 00 7b[ 	]+\{nf\} imul \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 6b 8c 80 23 01 00 00 7b[ 	]+\{nf\} imul \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 6b c2 90[ 	]+\{nf\} imul \$0xff90,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 69 d1 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 69 f9 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,%r9,%r15
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 69 c9 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 6b 94 80 23 01 00 00 90[ 	]+\{nf\} imul \$0xff90,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 69 8c 80 23 01 00 00 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 69 8c 80 23 01 00 00 90 ff 00 00[ 	]+\{nf\} imul \$0xff90,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c fe c3[ 	]+\{nf\} inc %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c fe c3[ 	]+\{nf\} inc %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ff c2[ 	]+\{nf\} inc %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c ff c2[ 	]+\{nf\} inc %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ff c1[ 	]+\{nf\} inc %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c ff c1[ 	]+\{nf\} inc %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff c1[ 	]+\{nf\} inc %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 ff c1[ 	]+\{nf\} inc %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c fe 84 80 23 01 00 00[ 	]+\{nf\} incb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c fe 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f5 c2[ 	]+\{nf\} lzcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f5 d1[ 	]+\{nf\} lzcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c f5 f9[ 	]+\{nf\} lzcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f5 94 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 e3[ 	]+\{nf\} mul %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 e2[ 	]+\{nf\} mul %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e1[ 	]+\{nf\} mul %ecx
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 fb f6 d0[ 	]+mulx[ 	]+%rax,%rax,%rdx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 a4 80 23 01 00 00[ 	]+\{nf\} mulb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mull 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 db[ 	]+\{nf\} neg %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c f6 db[ 	]+\{nf\} neg %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 da[ 	]+\{nf\} neg %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c f7 da[ 	]+\{nf\} neg %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 d9[ 	]+\{nf\} neg %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c f7 d9[ 	]+\{nf\} neg %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 d9[ 	]+\{nf\} neg %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 f7 d9[ 	]+\{nf\} neg %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 9c 80 23 01 00 00[ 	]+\{nf\} negb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c f6 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 cb 7b[ 	]+\{nf\} or \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 cb 7b[ 	]+\{nf\} or \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 ca 7b[ 	]+\{nf\} or \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ca 7b[ 	]+\{nf\} or \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 c9 7b[ 	]+\{nf\} or \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 8c 80 23 01 00 00 7b[ 	]+\{nf\} orb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 08 da[ 	]+\{nf\} or %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 08 da[ 	]+\{nf\} or %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 08 9c 80 23 01 00 00[ 	]+\{nf\} or %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 08 9c 80 23 01 00 00[ 	]+\{nf\} or %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 09 d0[ 	]+\{nf\} or %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 09 d0[ 	]+\{nf\} or %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 09 94 80 23 01 00 00[ 	]+\{nf\} or %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 09 94 80 23 01 00 00[ 	]+\{nf\} or %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 09 ca[ 	]+\{nf\} or %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 09 ca[ 	]+\{nf\} or %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 09 cf[ 	]+\{nf\} or %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 09 cf[ 	]+\{nf\} or %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 09 8c 80 23 01 00 00[ 	]+\{nf\} or %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 0a 9c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 0a 9c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 0b 94 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 0b 94 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 88 c2[ 	]+\{nf\} popcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 88 d1[ 	]+\{nf\} popcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c 88 f9[ 	]+\{nf\} popcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 88 94 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 88 8c 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 88 8c 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 c3[ 	]+\{nf\} rol \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 c3[ 	]+\{nf\} rol \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 c2[ 	]+\{nf\} rol \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 c2[ 	]+\{nf\} rol \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c1[ 	]+\{nf\} rol \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 c1[ 	]+\{nf\} rol \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 c1[ 	]+\{nf\} rol \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 c1[ 	]+\{nf\} rol \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 84 80 23 01 00 00[ 	]+\{nf\} rolb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 84 80 23 01 00 00[ 	]+\{nf\} rolw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 84 80 23 01 00 00[ 	]+\{nf\} roll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 84 80 23 01 00 00[ 	]+\{nf\} rolq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 c3 7b[ 	]+\{nf\} rol \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 c3 7b[ 	]+\{nf\} rol \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 c2 7b[ 	]+\{nf\} rol \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 c2 7b[ 	]+\{nf\} rol \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*c4 e3 7b f0 c9 a5[ 	]+rorx[ 	]+\$0xa5,%ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*c4 e3 7b f0 d1 a5[ 	]+rorx[ 	]+\$0xa5,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*c4 43 fb f0 c9 c5[ 	]+rorx[ 	]+\$0xc5,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 84 80 23 01 00 00 7b[ 	]+\{nf\} rolb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rolw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} roll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 c3 7b f0 8c 80 23 01 00 00 a5[ 	]+rorx[ 	]+\$0xa5,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rolq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 43 fb f0 8c 80 23 01 00 00 c5[ 	]+rorx[ 	]+\$0xc5,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 c3[ 	]+\{nf\} rol %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 c3[ 	]+\{nf\} rol %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 c2[ 	]+\{nf\} rol %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 c2[ 	]+\{nf\} rol %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 c1[ 	]+\{nf\} rol %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 c1[ 	]+\{nf\} rol %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 c1[ 	]+\{nf\} rol %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 c1[ 	]+\{nf\} rol %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 84 80 23 01 00 00[ 	]+\{nf\} rolb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 84 80 23 01 00 00[ 	]+\{nf\} rolw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 84 80 23 01 00 00[ 	]+\{nf\} roll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 84 80 23 01 00 00[ 	]+\{nf\} rolq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 cb[ 	]+\{nf\} ror \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 cb[ 	]+\{nf\} ror \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ca[ 	]+\{nf\} ror \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ca[ 	]+\{nf\} ror \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c9[ 	]+\{nf\} ror \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 c9[ 	]+\{nf\} ror \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 c9[ 	]+\{nf\} ror \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 c9[ 	]+\{nf\} ror \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 8c 80 23 01 00 00[ 	]+\{nf\} rorb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 cb 7b[ 	]+\{nf\} ror \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 cb 7b[ 	]+\{nf\} ror \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 ca 7b[ 	]+\{nf\} ror \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 ca 7b[ 	]+\{nf\} ror \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*c4 e3 7b f0 c9 7b[ 	]+rorx[ 	]+\$0x7b,%ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*c4 e3 7b f0 d1 7b[ 	]+rorx[ 	]+\$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*c4 43 fb f0 c9 7b[ 	]+rorx[ 	]+\$0x7b,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 c3 7b f0 8c 80 23 01 00 00 7b[ 	]+rorx[ 	]+\$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 43 fb f0 8c 80 23 01 00 00 7b[ 	]+rorx[ 	]+\$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 cb[ 	]+\{nf\} ror %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 cb[ 	]+\{nf\} ror %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 ca[ 	]+\{nf\} ror %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 ca[ 	]+\{nf\} ror %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 c9[ 	]+\{nf\} ror %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 c9[ 	]+\{nf\} ror %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 c9[ 	]+\{nf\} ror %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 c9[ 	]+\{nf\} ror %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 8c 80 23 01 00 00[ 	]+\{nf\} rorb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 db[ 	]+\{nf\} add %bl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 00 db[ 	]+\{nf\} add %bl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 01 d2[ 	]+\{nf\} add %dx,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 01 d2[ 	]+\{nf\} add %dx,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 01 c9[ 	]+\{nf\} add %ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 01 c9[ 	]+\{nf\} add %ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 c9[ 	]+\{nf\} add %r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 c9[ 	]+\{nf\} add %r9,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 a4 80 23 01 00 00[ 	]+\{nf\} shlb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 e3[ 	]+\{nf\} shl %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 e3[ 	]+\{nf\} shl %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 e2[ 	]+\{nf\} shl %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 e2[ 	]+\{nf\} shl %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 71 f7 c9[ 	]+shlx[ 	]+%ecx,%ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 71 f7 d1[ 	]+shlx[ 	]+%ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f1 f7 c9[ 	]+shlx[ 	]+%rcx,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e1[ 	]+\{nf\} shl %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 a4 80 23 01 00 00[ 	]+\{nf\} shlb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 71 f7 8c 80 23 01 00 00[ 	]+shlx[ 	]+%ecx,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f1 f7 8c 80 23 01 00 00[ 	]+shlx[ 	]+%rcx,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 fb[ 	]+\{nf\} sar \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 fb[ 	]+\{nf\} sar \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 fa[ 	]+\{nf\} sar \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 fa[ 	]+\{nf\} sar \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 f9[ 	]+\{nf\} sar \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 f9[ 	]+\{nf\} sar \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 f9[ 	]+\{nf\} sar \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 f9[ 	]+\{nf\} sar \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 bc 80 23 01 00 00[ 	]+\{nf\} sarb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 fb 7b[ 	]+\{nf\} sar \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 fb 7b[ 	]+\{nf\} sar \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 fa 7b[ 	]+\{nf\} sar \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 fa 7b[ 	]+\{nf\} sar \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 fb[ 	]+\{nf\} sar %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 fb[ 	]+\{nf\} sar %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 fa[ 	]+\{nf\} sar %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 fa[ 	]+\{nf\} sar %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 72 f7 c9[ 	]+sarx[ 	]+%ecx,%ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 72 f7 d1[ 	]+sarx[ 	]+%ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f2 f7 c9[ 	]+sarx[ 	]+%rcx,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 f9[ 	]+\{nf\} sar %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 bc 80 23 01 00 00[ 	]+\{nf\} sarb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 72 f7 8c 80 23 01 00 00[ 	]+sarx[ 	]+%ecx,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f2 f7 8c 80 23 01 00 00[ 	]+sarx[ 	]+%rcx,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 db[ 	]+\{nf\} add %bl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 00 db[ 	]+\{nf\} add %bl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 01 d2[ 	]+\{nf\} add %dx,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 01 d2[ 	]+\{nf\} add %dx,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 01 c9[ 	]+\{nf\} add %ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 01 c9[ 	]+\{nf\} add %ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 c9[ 	]+\{nf\} add %r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 c9[ 	]+\{nf\} add %r9,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 a4 80 23 01 00 00[ 	]+\{nf\} shlb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 e3[ 	]+\{nf\} shl %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 e3[ 	]+\{nf\} shl %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 e2[ 	]+\{nf\} shl %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 e2[ 	]+\{nf\} shl %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 71 f7 c9[ 	]+shlx[ 	]+%ecx,%ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 71 f7 d1[ 	]+shlx[ 	]+%ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f1 f7 c9[ 	]+shlx[ 	]+%rcx,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e1[ 	]+\{nf\} shl %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 a4 80 23 01 00 00[ 	]+\{nf\} shlb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 71 f7 8c 80 23 01 00 00[ 	]+shlx[ 	]+%ecx,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f1 f7 8c 80 23 01 00 00[ 	]+shlx[ 	]+%rcx,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 24 d0 7b[ 	]+\{nf\} shld \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 24 d0 7b[ 	]+\{nf\} shld \$0x7b,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 24 94 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 24 94 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 24 ca 7b[ 	]+\{nf\} shld \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 24 ca 7b[ 	]+\{nf\} shld \$0x7b,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 24 cf 7b[ 	]+\{nf\} shld \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 24 cf 7b[ 	]+\{nf\} shld \$0x7b,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c a5 d0[ 	]+\{nf\} shld %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c a5 d0[ 	]+\{nf\} shld %cl,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c a5 94 80 23 01 00 00[ 	]+\{nf\} shld %cl,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c a5 94 80 23 01 00 00[ 	]+\{nf\} shld %cl,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c a5 ca[ 	]+\{nf\} shld %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c a5 ca[ 	]+\{nf\} shld %cl,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c a5 cf[ 	]+\{nf\} shld %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c a5 cf[ 	]+\{nf\} shld %cl,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 eb[ 	]+\{nf\} shr \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 eb[ 	]+\{nf\} shr \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ea[ 	]+\{nf\} shr \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ea[ 	]+\{nf\} shr \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 e9[ 	]+\{nf\} shr \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 e9[ 	]+\{nf\} shr \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 e9[ 	]+\{nf\} shr \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 e9[ 	]+\{nf\} shr \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 ac 80 23 01 00 00[ 	]+\{nf\} shrb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 eb 7b[ 	]+\{nf\} shr \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 eb 7b[ 	]+\{nf\} shr \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 ea 7b[ 	]+\{nf\} shr \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 ea 7b[ 	]+\{nf\} shr \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 eb[ 	]+\{nf\} shr %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 eb[ 	]+\{nf\} shr %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 ea[ 	]+\{nf\} shr %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 ea[ 	]+\{nf\} shr %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 73 f7 c9[ 	]+shrx[ 	]+%ecx,%ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 73 f7 d1[ 	]+shrx[ 	]+%ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f3 f7 c9[ 	]+shrx[ 	]+%rcx,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e9[ 	]+\{nf\} shr %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 ac 80 23 01 00 00[ 	]+\{nf\} shrb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 73 f7 8c 80 23 01 00 00[ 	]+shrx[ 	]+%ecx,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f3 f7 8c 80 23 01 00 00[ 	]+shrx[ 	]+%rcx,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 2c d0 7b[ 	]+\{nf\} shrd \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 2c d0 7b[ 	]+\{nf\} shrd \$0x7b,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 2c 94 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 2c 94 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 2c ca 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 2c ca 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 2c cf 7b[ 	]+\{nf\} shrd \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 2c cf 7b[ 	]+\{nf\} shrd \$0x7b,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ad d0[ 	]+\{nf\} shrd %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c ad d0[ 	]+\{nf\} shrd %cl,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ad 94 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c ad 94 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ad ca[ 	]+\{nf\} shrd %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c ad ca[ 	]+\{nf\} shrd %cl,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c ad cf[ 	]+\{nf\} shrd %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c ad cf[ 	]+\{nf\} shrd %cl,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 eb 7b[ 	]+\{nf\} sub \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 eb 7b[ 	]+\{nf\} sub \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 ea 7b[ 	]+\{nf\} sub \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ea 7b[ 	]+\{nf\} sub \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 ac 80 23 01 00 00 7b[ 	]+\{nf\} subb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 28 da[ 	]+\{nf\} sub %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 28 da[ 	]+\{nf\} sub %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 28 9c 80 23 01 00 00[ 	]+\{nf\} sub %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 28 9c 80 23 01 00 00[ 	]+\{nf\} sub %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 29 d0[ 	]+\{nf\} sub %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 29 d0[ 	]+\{nf\} sub %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 29 94 80 23 01 00 00[ 	]+\{nf\} sub %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 29 94 80 23 01 00 00[ 	]+\{nf\} sub %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 29 ca[ 	]+\{nf\} sub %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 29 ca[ 	]+\{nf\} sub %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 29 cf[ 	]+\{nf\} sub %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 29 cf[ 	]+\{nf\} sub %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2a 9c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2a 9c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 2b 94 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 2b 94 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f4 c2[ 	]+\{nf\} tzcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f4 d1[ 	]+\{nf\} tzcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c f4 f9[ 	]+\{nf\} tzcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f4 94 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f4 8c 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f4 8c 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 f3 7b[ 	]+\{nf\} xor \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 f3 7b[ 	]+\{nf\} xor \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 f2 7b[ 	]+\{nf\} xor \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 f2 7b[ 	]+\{nf\} xor \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 30 da[ 	]+\{nf\} xor %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 30 da[ 	]+\{nf\} xor %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 30 9c 80 23 01 00 00[ 	]+\{nf\} xor %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 30 9c 80 23 01 00 00[ 	]+\{nf\} xor %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 31 d0[ 	]+\{nf\} xor %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 31 d0[ 	]+\{nf\} xor %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 31 94 80 23 01 00 00[ 	]+\{nf\} xor %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 31 94 80 23 01 00 00[ 	]+\{nf\} xor %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 31 ca[ 	]+\{nf\} xor %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 31 ca[ 	]+\{nf\} xor %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 31 cf[ 	]+\{nf\} xor %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 31 cf[ 	]+\{nf\} xor %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 32 9c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 32 9c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 33 94 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 33 94 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%r9,%r31
+
+0[0-9a-f]+ <intel>:
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 c3 7b[ 	]+\{nf\} add \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 c3 7b[ 	]+\{nf\} add \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 c2 7b[ 	]+\{nf\} add \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 c2 7b[ 	]+\{nf\} add \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 c1 7b[ 	]+\{nf\} add \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 c1 7b[ 	]+\{nf\} add \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 c1 7b[ 	]+\{nf\} add \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 c1 7b[ 	]+\{nf\} add \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 84 80 23 01 00 00 7b[ 	]+\{nf\} addb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} addq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 84 80 23 01 00 00 7b[ 	]+\{nf\} add \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 da[ 	]+\{nf\} add %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 00 da[ 	]+\{nf\} add %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 00 9c 80 23 01 00 00[ 	]+\{nf\} add %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 00 9c 80 23 01 00 00[ 	]+\{nf\} add %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 01 d0[ 	]+\{nf\} add %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 01 d0[ 	]+\{nf\} add %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 01 94 80 23 01 00 00[ 	]+\{nf\} add %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 01 94 80 23 01 00 00[ 	]+\{nf\} add %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 01 ca[ 	]+\{nf\} add %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 01 ca[ 	]+\{nf\} add %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 01 cf[ 	]+\{nf\} add %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 01 cf[ 	]+\{nf\} add %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 8c 80 23 01 00 00[ 	]+\{nf\} add %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 8c 80 23 01 00 00[ 	]+\{nf\} add %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 02 9c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 02 9c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 03 94 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 03 94 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 03 8c 80 23 01 00 00[ 	]+\{nf\} add 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 e3 7b[ 	]+\{nf\} and \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 e3 7b[ 	]+\{nf\} and \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 e2 7b[ 	]+\{nf\} and \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 e2 7b[ 	]+\{nf\} and \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 e1 7b[ 	]+\{nf\} and \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 e1 7b[ 	]+\{nf\} and \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 a4 80 23 01 00 00 7b[ 	]+\{nf\} andb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} andq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 a4 80 23 01 00 00 7b[ 	]+\{nf\} and \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 20 da[ 	]+\{nf\} and %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 20 da[ 	]+\{nf\} and %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 20 9c 80 23 01 00 00[ 	]+\{nf\} and %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 20 9c 80 23 01 00 00[ 	]+\{nf\} and %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 21 d0[ 	]+\{nf\} and %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 21 d0[ 	]+\{nf\} and %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 21 94 80 23 01 00 00[ 	]+\{nf\} and %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 21 94 80 23 01 00 00[ 	]+\{nf\} and %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 21 ca[ 	]+\{nf\} and %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 21 ca[ 	]+\{nf\} and %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 21 cf[ 	]+\{nf\} and %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 21 cf[ 	]+\{nf\} and %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 21 8c 80 23 01 00 00[ 	]+\{nf\} and %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 21 8c 80 23 01 00 00[ 	]+\{nf\} and %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 22 9c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 22 9c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 23 94 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 23 94 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 23 8c 80 23 01 00 00[ 	]+\{nf\} and 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 72 6c 0c f2 d1[ 	]+\{nf\} andn %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 52 84 04 f2 d9[ 	]+\{nf\} andn %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f2 94 80 23 01 00 00[ 	]+\{nf\} andn 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f2 bc 80 23 01 00 00[ 	]+\{nf\} andn 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 72 74 0c f7 d2[ 	]+\{nf\} bextr %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f7 94 80 23 01 00 00[ 	]+\{nf\} bextr %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5a b4 0c f7 df[ 	]+\{nf\} bextr %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} bextr %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 d9[ 	]+\{nf\} blsi %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 d9[ 	]+\{nf\} blsi %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 9c 80 23 01 00 00[ 	]+\{nf\} blsi 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 9c 80 23 01 00 00[ 	]+\{nf\} blsi 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 d1[ 	]+\{nf\} blsmsk %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 d1[ 	]+\{nf\} blsmsk %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 94 80 23 01 00 00[ 	]+\{nf\} blsmsk 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 94 80 23 01 00 00[ 	]+\{nf\} blsmsk 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f2 6c 0c f3 c9[ 	]+\{nf\} blsr %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 84 04 f3 c9[ 	]+\{nf\} blsr %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f3 8c 80 23 01 00 00[ 	]+\{nf\} blsr 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d2 b4 0c f3 8c 80 23 01 00 00[ 	]+\{nf\} blsr 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 72 74 0c f5 d2[ 	]+\{nf\} bzhi %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d2 74 0c f5 94 80 23 01 00 00[ 	]+\{nf\} bzhi %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5a b4 0c f5 df[ 	]+\{nf\} bzhi %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 42 b4 0c f5 bc 80 23 01 00 00[ 	]+\{nf\} bzhi %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 4c fc 0c 31 ff[ 	]+\{nf\} xor %r31,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c fe cb[ 	]+\{nf\} dec %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c fe cb[ 	]+\{nf\} dec %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ff ca[ 	]+\{nf\} dec %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c ff ca[ 	]+\{nf\} dec %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ff c9[ 	]+\{nf\} dec %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c ff c9[ 	]+\{nf\} dec %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff c9[ 	]+\{nf\} dec %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 ff c9[ 	]+\{nf\} dec %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c fe 8c 80 23 01 00 00[ 	]+\{nf\} decb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c fe 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff 8c 80 23 01 00 00[ 	]+\{nf\} decq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c ff 8c 80 23 01 00 00[ 	]+\{nf\} dec 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 f3[ 	]+\{nf\} div %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 f2[ 	]+\{nf\} div %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f1[ 	]+\{nf\} div %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f1[ 	]+\{nf\} div %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 b4 80 23 01 00 00[ 	]+\{nf\} divb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 b4 80 23 01 00 00[ 	]+\{nf\} divq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 fb[ 	]+\{nf\} idiv %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 fb[ 	]+\{nf\} idiv %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 fa[ 	]+\{nf\} idiv %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 fa[ 	]+\{nf\} idiv %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f9[ 	]+\{nf\} idiv %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 f9[ 	]+\{nf\} idiv %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f9[ 	]+\{nf\} idiv %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 f9[ 	]+\{nf\} idiv %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 bc 80 23 01 00 00[ 	]+\{nf\} idivb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 bc 80 23 01 00 00[ 	]+\{nf\} idivb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 bc 80 23 01 00 00[ 	]+\{nf\} idivq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 eb[ 	]+\{nf\} imul %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 ea[ 	]+\{nf\} imul %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c af c2[ 	]+\{nf\} imul %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c af c2[ 	]+\{nf\} imul %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e9[ 	]+\{nf\} imul %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c af d1[ 	]+\{nf\} imul %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c af d1[ 	]+\{nf\} imul %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e9[ 	]+\{nf\} imul %r9
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c af f9[ 	]+\{nf\} imul %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 44 a4 1c af f9[ 	]+\{nf\} imul %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 ac 80 23 01 00 00[ 	]+\{nf\} imulb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imulw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c af 94 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c af 94 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imull 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 ac 80 23 01 00 00[ 	]+\{nf\} imulq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 af 8c 80 23 01 00 00[ 	]+\{nf\} imul 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c fe c3[ 	]+\{nf\} inc %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c fe c3[ 	]+\{nf\} inc %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ff c2[ 	]+\{nf\} inc %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c ff c2[ 	]+\{nf\} inc %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ff c1[ 	]+\{nf\} inc %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c ff c1[ 	]+\{nf\} inc %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff c1[ 	]+\{nf\} inc %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 ff c1[ 	]+\{nf\} inc %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c fe 84 80 23 01 00 00[ 	]+\{nf\} incb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c fe 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c ff 84 80 23 01 00 00[ 	]+\{nf\} incq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c ff 84 80 23 01 00 00[ 	]+\{nf\} inc 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f5 c2[ 	]+\{nf\} lzcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f5 d1[ 	]+\{nf\} lzcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c f5 f9[ 	]+\{nf\} lzcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f5 94 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 e3[ 	]+\{nf\} mul %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 e2[ 	]+\{nf\} mul %dx
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 7b f6 d0[ 	]+mulx[ 	]+%eax,%eax,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e1[ 	]+\{nf\} mul %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 a4 80 23 01 00 00[ 	]+\{nf\} mulb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mull 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 db[ 	]+\{nf\} neg %bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c f6 db[ 	]+\{nf\} neg %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 da[ 	]+\{nf\} neg %dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c f7 da[ 	]+\{nf\} neg %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 d9[ 	]+\{nf\} neg %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c f7 d9[ 	]+\{nf\} neg %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 d9[ 	]+\{nf\} neg %r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 f7 d9[ 	]+\{nf\} neg %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 9c 80 23 01 00 00[ 	]+\{nf\} negb 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c f6 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negw 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negl 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 9c 80 23 01 00 00[ 	]+\{nf\} negq 0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c f7 9c 80 23 01 00 00[ 	]+\{nf\} neg 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 cb 7b[ 	]+\{nf\} or \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 cb 7b[ 	]+\{nf\} or \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 ca 7b[ 	]+\{nf\} or \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ca 7b[ 	]+\{nf\} or \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 c9 7b[ 	]+\{nf\} or \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 c9 7b[ 	]+\{nf\} or \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 8c 80 23 01 00 00 7b[ 	]+\{nf\} orb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} orq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 8c 80 23 01 00 00 7b[ 	]+\{nf\} or \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 08 da[ 	]+\{nf\} or %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 08 da[ 	]+\{nf\} or %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 08 9c 80 23 01 00 00[ 	]+\{nf\} or %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 08 9c 80 23 01 00 00[ 	]+\{nf\} or %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 09 d0[ 	]+\{nf\} or %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 09 d0[ 	]+\{nf\} or %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 09 94 80 23 01 00 00[ 	]+\{nf\} or %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 09 94 80 23 01 00 00[ 	]+\{nf\} or %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 09 ca[ 	]+\{nf\} or %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 09 ca[ 	]+\{nf\} or %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 09 cf[ 	]+\{nf\} or %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 09 cf[ 	]+\{nf\} or %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 09 8c 80 23 01 00 00[ 	]+\{nf\} or %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 09 8c 80 23 01 00 00[ 	]+\{nf\} or %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 0a 9c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 0a 9c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 0b 94 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 0b 94 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 0b 8c 80 23 01 00 00[ 	]+\{nf\} or 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 88 c2[ 	]+\{nf\} popcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 88 d1[ 	]+\{nf\} popcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c 88 f9[ 	]+\{nf\} popcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 88 94 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 88 8c 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 88 8c 80 23 01 00 00[ 	]+\{nf\} popcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 c3[ 	]+\{nf\} rol \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 c3[ 	]+\{nf\} rol \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 c2[ 	]+\{nf\} rol \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 c2[ 	]+\{nf\} rol \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c1[ 	]+\{nf\} rol \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 c1[ 	]+\{nf\} rol \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 c1[ 	]+\{nf\} rol \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 c1[ 	]+\{nf\} rol \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 84 80 23 01 00 00[ 	]+\{nf\} rolb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 84 80 23 01 00 00[ 	]+\{nf\} rolw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 84 80 23 01 00 00[ 	]+\{nf\} roll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 84 80 23 01 00 00[ 	]+\{nf\} rolq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 84 80 23 01 00 00[ 	]+\{nf\} rol \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 c3 7b[ 	]+\{nf\} rol \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 c3 7b[ 	]+\{nf\} rol \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 c2 7b[ 	]+\{nf\} rol \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 c2 7b[ 	]+\{nf\} rol \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*c4 e3 7b f0 c9 a5[ 	]+rorx[ 	]+\$0xa5,%ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*c4 e3 7b f0 d1 a5[ 	]+rorx[ 	]+\$0xa5,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*c4 43 fb f0 c9 c5[ 	]+rorx[ 	]+\$0xc5,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 c1 7b[ 	]+\{nf\} rol \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 84 80 23 01 00 00 7b[ 	]+\{nf\} rolb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rolw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rol \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} roll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 c3 7b f0 8c 80 23 01 00 00 a5[ 	]+rorx[ 	]+\$0xa5,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 84 80 23 01 00 00 7b[ 	]+\{nf\} rolq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 43 fb f0 8c 80 23 01 00 00 c5[ 	]+rorx[ 	]+\$0xc5,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 c3[ 	]+\{nf\} rol %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 c3[ 	]+\{nf\} rol %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 c2[ 	]+\{nf\} rol %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 c2[ 	]+\{nf\} rol %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 c1[ 	]+\{nf\} rol %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 c1[ 	]+\{nf\} rol %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 c1[ 	]+\{nf\} rol %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 c1[ 	]+\{nf\} rol %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 84 80 23 01 00 00[ 	]+\{nf\} rolb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 84 80 23 01 00 00[ 	]+\{nf\} rolw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 84 80 23 01 00 00[ 	]+\{nf\} roll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 84 80 23 01 00 00[ 	]+\{nf\} rolq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 84 80 23 01 00 00[ 	]+\{nf\} rol %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 cb[ 	]+\{nf\} ror \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 cb[ 	]+\{nf\} ror \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ca[ 	]+\{nf\} ror \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ca[ 	]+\{nf\} ror \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 c9[ 	]+\{nf\} ror \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 c9[ 	]+\{nf\} ror \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 c9[ 	]+\{nf\} ror \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 c9[ 	]+\{nf\} ror \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 8c 80 23 01 00 00[ 	]+\{nf\} rorb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 8c 80 23 01 00 00[ 	]+\{nf\} rorq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 8c 80 23 01 00 00[ 	]+\{nf\} ror \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 cb 7b[ 	]+\{nf\} ror \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 cb 7b[ 	]+\{nf\} ror \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 ca 7b[ 	]+\{nf\} ror \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 ca 7b[ 	]+\{nf\} ror \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*c4 e3 7b f0 c9 7b[ 	]+rorx[ 	]+\$0x7b,%ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*c4 e3 7b f0 d1 7b[ 	]+rorx[ 	]+\$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*c4 43 fb f0 c9 7b[ 	]+rorx[ 	]+\$0x7b,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 c9 7b[ 	]+\{nf\} ror \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} ror \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 c3 7b f0 8c 80 23 01 00 00 7b[ 	]+rorx[ 	]+\$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 8c 80 23 01 00 00 7b[ 	]+\{nf\} rorq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 43 fb f0 8c 80 23 01 00 00 7b[ 	]+rorx[ 	]+\$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 cb[ 	]+\{nf\} ror %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 cb[ 	]+\{nf\} ror %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 ca[ 	]+\{nf\} ror %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 ca[ 	]+\{nf\} ror %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d3 c9[ 	]+\{nf\} ror %cl,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d3 c9[ 	]+\{nf\} ror %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 c9[ 	]+\{nf\} ror %cl,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 c9[ 	]+\{nf\} ror %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 8c 80 23 01 00 00[ 	]+\{nf\} rorb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 8c 80 23 01 00 00[ 	]+\{nf\} rorq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d3 8c 80 23 01 00 00[ 	]+\{nf\} ror %cl,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 db[ 	]+\{nf\} add %bl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 00 db[ 	]+\{nf\} add %bl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 01 d2[ 	]+\{nf\} add %dx,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 01 d2[ 	]+\{nf\} add %dx,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 01 c9[ 	]+\{nf\} add %ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 01 c9[ 	]+\{nf\} add %ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 c9[ 	]+\{nf\} add %r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 c9[ 	]+\{nf\} add %r9,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 a4 80 23 01 00 00[ 	]+\{nf\} shlb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 e3[ 	]+\{nf\} shl %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 e3[ 	]+\{nf\} shl %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 e2[ 	]+\{nf\} shl %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 e2[ 	]+\{nf\} shl %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 71 f7 c9[ 	]+shlx[ 	]+%ecx,%ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 71 f7 d1[ 	]+shlx[ 	]+%ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f1 f7 c9[ 	]+shlx[ 	]+%rcx,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e1[ 	]+\{nf\} shl %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 a4 80 23 01 00 00[ 	]+\{nf\} shlb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 71 f7 8c 80 23 01 00 00[ 	]+shlx[ 	]+%ecx,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f1 f7 8c 80 23 01 00 00[ 	]+shlx[ 	]+%rcx,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 fb[ 	]+\{nf\} sar \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 fb[ 	]+\{nf\} sar \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 fa[ 	]+\{nf\} sar \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 fa[ 	]+\{nf\} sar \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 f9[ 	]+\{nf\} sar \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 f9[ 	]+\{nf\} sar \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 f9[ 	]+\{nf\} sar \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 f9[ 	]+\{nf\} sar \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 bc 80 23 01 00 00[ 	]+\{nf\} sarb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 bc 80 23 01 00 00[ 	]+\{nf\} sarq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 bc 80 23 01 00 00[ 	]+\{nf\} sar \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 fb 7b[ 	]+\{nf\} sar \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 fb 7b[ 	]+\{nf\} sar \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 fa 7b[ 	]+\{nf\} sar \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 fa 7b[ 	]+\{nf\} sar \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 f9 7b[ 	]+\{nf\} sar \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sarq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 bc 80 23 01 00 00 7b[ 	]+\{nf\} sar \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 fb[ 	]+\{nf\} sar %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 fb[ 	]+\{nf\} sar %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 fa[ 	]+\{nf\} sar %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 fa[ 	]+\{nf\} sar %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 72 f7 c9[ 	]+sarx[ 	]+%ecx,%ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 72 f7 d1[ 	]+sarx[ 	]+%ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f2 f7 c9[ 	]+sarx[ 	]+%rcx,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 f9[ 	]+\{nf\} sar %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 bc 80 23 01 00 00[ 	]+\{nf\} sarb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 bc 80 23 01 00 00[ 	]+\{nf\} sar %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 72 f7 8c 80 23 01 00 00[ 	]+sarx[ 	]+%ecx,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 bc 80 23 01 00 00[ 	]+\{nf\} sarq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f2 f7 8c 80 23 01 00 00[ 	]+sarx[ 	]+%rcx,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 00 db[ 	]+\{nf\} add %bl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 00 db[ 	]+\{nf\} add %bl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 01 d2[ 	]+\{nf\} add %dx,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 01 d2[ 	]+\{nf\} add %dx,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 01 c9[ 	]+\{nf\} add %ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 01 c9[ 	]+\{nf\} add %ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 01 c9[ 	]+\{nf\} add %r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 01 c9[ 	]+\{nf\} add %r9,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 a4 80 23 01 00 00[ 	]+\{nf\} shlb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shll \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 a4 80 23 01 00 00[ 	]+\{nf\} shlq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 a4 80 23 01 00 00[ 	]+\{nf\} shl \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 e3 7b[ 	]+\{nf\} shl \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 e2 7b[ 	]+\{nf\} shl \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e1 7b[ 	]+\{nf\} shl \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shll \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shlq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 a4 80 23 01 00 00 7b[ 	]+\{nf\} shl \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 e3[ 	]+\{nf\} shl %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 e3[ 	]+\{nf\} shl %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 e2[ 	]+\{nf\} shl %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 e2[ 	]+\{nf\} shl %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 71 f7 c9[ 	]+shlx[ 	]+%ecx,%ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 71 f7 d1[ 	]+shlx[ 	]+%ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f1 f7 c9[ 	]+shlx[ 	]+%rcx,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e1[ 	]+\{nf\} shl %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 a4 80 23 01 00 00[ 	]+\{nf\} shlb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 a4 80 23 01 00 00[ 	]+\{nf\} shl %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shll %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 71 f7 8c 80 23 01 00 00[ 	]+shlx[ 	]+%ecx,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 a4 80 23 01 00 00[ 	]+\{nf\} shlq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f1 f7 8c 80 23 01 00 00[ 	]+shlx[ 	]+%rcx,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 24 d0 7b[ 	]+\{nf\} shld \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 24 d0 7b[ 	]+\{nf\} shld \$0x7b,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 24 94 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 24 94 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 24 ca 7b[ 	]+\{nf\} shld \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 24 ca 7b[ 	]+\{nf\} shld \$0x7b,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 24 cf 7b[ 	]+\{nf\} shld \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 24 cf 7b[ 	]+\{nf\} shld \$0x7b,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 24 8c 80 23 01 00 00 7b[ 	]+\{nf\} shld \$0x7b,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c a5 d0[ 	]+\{nf\} shld %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c a5 d0[ 	]+\{nf\} shld %cl,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c a5 94 80 23 01 00 00[ 	]+\{nf\} shld %cl,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c a5 94 80 23 01 00 00[ 	]+\{nf\} shld %cl,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c a5 ca[ 	]+\{nf\} shld %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c a5 ca[ 	]+\{nf\} shld %cl,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c a5 cf[ 	]+\{nf\} shld %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c a5 cf[ 	]+\{nf\} shld %cl,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 a5 8c 80 23 01 00 00[ 	]+\{nf\} shld %cl,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d0 eb[ 	]+\{nf\} shr \$1,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d0 eb[ 	]+\{nf\} shr \$1,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d1 ea[ 	]+\{nf\} shr \$1,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d1 ea[ 	]+\{nf\} shr \$1,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d1 e9[ 	]+\{nf\} shr \$1,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d1 e9[ 	]+\{nf\} shr \$1,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 e9[ 	]+\{nf\} shr \$1,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d1 e9[ 	]+\{nf\} shr \$1,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d0 ac 80 23 01 00 00[ 	]+\{nf\} shrb \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d0 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrw \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrl \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d1 ac 80 23 01 00 00[ 	]+\{nf\} shrq \$1,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c d1 ac 80 23 01 00 00[ 	]+\{nf\} shr \$1,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c0 eb 7b[ 	]+\{nf\} shr \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c0 eb 7b[ 	]+\{nf\} shr \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c c1 ea 7b[ 	]+\{nf\} shr \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c c1 ea 7b[ 	]+\{nf\} shr \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 c1 e9 7b[ 	]+\{nf\} shr \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c0 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c c0 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shrq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c c1 ac 80 23 01 00 00 7b[ 	]+\{nf\} shr \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c d2 eb[ 	]+\{nf\} shr %cl,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c d2 eb[ 	]+\{nf\} shr %cl,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c d3 ea[ 	]+\{nf\} shr %cl,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c d3 ea[ 	]+\{nf\} shr %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 73 f7 c9[ 	]+shrx[ 	]+%ecx,%ecx,%ecx
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 73 f7 d1[ 	]+shrx[ 	]+%ecx,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f3 f7 c9[ 	]+shrx[ 	]+%rcx,%r9,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 d3 e9[ 	]+\{nf\} shr %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d2 ac 80 23 01 00 00[ 	]+\{nf\} shrb %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c d2 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrw %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c d3 ac 80 23 01 00 00[ 	]+\{nf\} shr %cl,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrl %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 73 f7 8c 80 23 01 00 00[ 	]+shrx[ 	]+%ecx,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c d3 ac 80 23 01 00 00[ 	]+\{nf\} shrq %cl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*c4 42 f3 f7 8c 80 23 01 00 00[ 	]+shrx[ 	]+%rcx,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 2c d0 7b[ 	]+\{nf\} shrd \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 2c d0 7b[ 	]+\{nf\} shrd \$0x7b,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 2c 94 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 2c 94 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 2c ca 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 2c ca 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 2c cf 7b[ 	]+\{nf\} shrd \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 2c cf 7b[ 	]+\{nf\} shrd \$0x7b,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 2c 8c 80 23 01 00 00 7b[ 	]+\{nf\} shrd \$0x7b,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c ad d0[ 	]+\{nf\} shrd %cl,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c ad d0[ 	]+\{nf\} shrd %cl,%dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c ad 94 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c ad 94 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c ad ca[ 	]+\{nf\} shrd %cl,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c ad ca[ 	]+\{nf\} shrd %cl,%ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c ad cf[ 	]+\{nf\} shrd %cl,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c ad cf[ 	]+\{nf\} shrd %cl,%r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 ad 8c 80 23 01 00 00[ 	]+\{nf\} shrd %cl,%r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 eb 7b[ 	]+\{nf\} sub \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 eb 7b[ 	]+\{nf\} sub \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 ea 7b[ 	]+\{nf\} sub \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 ea 7b[ 	]+\{nf\} sub \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 e9 7b[ 	]+\{nf\} sub \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 ac 80 23 01 00 00 7b[ 	]+\{nf\} subb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} subq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 ac 80 23 01 00 00 7b[ 	]+\{nf\} sub \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 28 da[ 	]+\{nf\} sub %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 28 da[ 	]+\{nf\} sub %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 28 9c 80 23 01 00 00[ 	]+\{nf\} sub %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 28 9c 80 23 01 00 00[ 	]+\{nf\} sub %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 29 d0[ 	]+\{nf\} sub %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 29 d0[ 	]+\{nf\} sub %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 29 94 80 23 01 00 00[ 	]+\{nf\} sub %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 29 94 80 23 01 00 00[ 	]+\{nf\} sub %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 29 ca[ 	]+\{nf\} sub %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 29 ca[ 	]+\{nf\} sub %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 29 cf[ 	]+\{nf\} sub %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 29 cf[ 	]+\{nf\} sub %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 29 8c 80 23 01 00 00[ 	]+\{nf\} sub %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2a 9c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2a 9c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 2b 94 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 2b 94 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 2b 8c 80 23 01 00 00[ 	]+\{nf\} sub 0x123\(%r8,%rax,4\),%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f4 c2[ 	]+\{nf\} tzcnt %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f4 d1[ 	]+\{nf\} tzcnt %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 44 fc 0c f4 f9[ 	]+\{nf\} tzcnt %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f4 94 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f4 8c 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f4 8c 80 23 01 00 00[ 	]+\{nf\} tzcnt 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 80 f3 7b[ 	]+\{nf\} xor \$0x7b,%bl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 80 f3 7b[ 	]+\{nf\} xor \$0x7b,%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 83 f2 7b[ 	]+\{nf\} xor \$0x7b,%dx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 1c 83 f2 7b[ 	]+\{nf\} xor \$0x7b,%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 6c 1c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%r9
+[ 	]*[a-f0-9]+:[ 	]*62 d4 84 14 83 f1 7b[ 	]+\{nf\} xor \$0x7b,%r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 80 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorb \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 64 1c 80 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorw \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6d 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorl \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 74 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xorq \$0x7b,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 b4 1c 83 b4 80 23 01 00 00 7b[ 	]+\{nf\} xor \$0x7b,0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 30 da[ 	]+\{nf\} xor %bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 3c 1c 30 da[ 	]+\{nf\} xor %bl,%dl,%r8b
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 30 9c 80 23 01 00 00[ 	]+\{nf\} xor %bl,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 30 9c 80 23 01 00 00[ 	]+\{nf\} xor %bl,0x123\(%r8,%rax,4\),%dl
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c 31 d0[ 	]+\{nf\} xor %dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 35 1c 31 d0[ 	]+\{nf\} xor %dx,%ax,%r9w
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 31 94 80 23 01 00 00[ 	]+\{nf\} xor %dx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 31 94 80 23 01 00 00[ 	]+\{nf\} xor %dx,0x123\(%r8,%rax,4\),%ax
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c 31 ca[ 	]+\{nf\} xor %ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 2c 1c 31 ca[ 	]+\{nf\} xor %ecx,%edx,%r10d
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %ecx,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %ecx,0x123\(%r8,%rax,4\),%edx
+[ 	]*[a-f0-9]+:[ 	]*62 5c fc 0c 31 cf[ 	]+\{nf\} xor %r9,%r31
+[ 	]*[a-f0-9]+:[ 	]*62 5c a4 1c 31 cf[ 	]+\{nf\} xor %r9,%r31,%r11
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %r9,0x123\(%r8,%rax,4\)
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 31 8c 80 23 01 00 00[ 	]+\{nf\} xor %r9,0x123\(%r8,%rax,4\),%r31
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 32 9c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%bl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 32 9c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%bl,%dl
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c 33 94 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%dx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7d 1c 33 94 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%dx,%ax
+[ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%ecx
+[ 	]*[a-f0-9]+:[ 	]*62 d4 6c 1c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%ecx,%edx
+[ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%r9
+[ 	]*[a-f0-9]+:[ 	]*62 54 84 14 33 8c 80 23 01 00 00[ 	]+\{nf\} xor 0x123\(%r8,%rax,4\),%r9,%r31
+#pass
--- a/gas/testsuite/gas/i386/x86-64-apx-nf-optimize-size.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-nf-optimize-size.d
@@ -212,7 +212,7 @@ Disassembly of section \.text:
 [ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 e3[ 	]+\{nf\} mul %bl
 [ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 e2[ 	]+\{nf\} mul %dx
 [ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e1[ 	]+\{nf\} mul %ecx
-[ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e1[ 	]+\{nf\} mul %r9
+[ 	]*[a-f0-9]+:[ 	]*62 f4 fc 0c f7 e2[ 	]+\{nf\} mul %rdx
 [ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 a4 80 23 01 00 00[ 	]+\{nf\} mulb 0x123\(%r8,%rax,4\)
 [ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulw 0x123\(%r8,%rax,4\)
 [ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mull 0x123\(%r8,%rax,4\)
@@ -892,7 +892,7 @@ Disassembly of section \.text:
 [ 	]*[a-f0-9]+:[ 	]*62 54 fc 0c f5 8c 80 23 01 00 00[ 	]+\{nf\} lzcnt 0x123\(%r8,%rax,4\),%r9
 [ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f6 e3[ 	]+\{nf\} mul %bl
 [ 	]*[a-f0-9]+:[ 	]*62 f4 7d 0c f7 e2[ 	]+\{nf\} mul %dx
-[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e1[ 	]+\{nf\} mul %ecx
+[ 	]*[a-f0-9]+:[ 	]*62 f4 7c 0c f7 e2[ 	]+\{nf\} mul %edx
 [ 	]*[a-f0-9]+:[ 	]*62 d4 fc 0c f7 e1[ 	]+\{nf\} mul %r9
 [ 	]*[a-f0-9]+:[ 	]*62 d4 7c 0c f6 a4 80 23 01 00 00[ 	]+\{nf\} mulb 0x123\(%r8,%rax,4\)
 [ 	]*[a-f0-9]+:[ 	]*62 d4 7d 0c f7 a4 80 23 01 00 00[ 	]+\{nf\} mulw 0x123\(%r8,%rax,4\)
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -392,10 +392,10 @@ cqto, 0x99, x64, Size64|NoSuf, {}
 // expanding 64-bit multiplies, and *cannot* be selected to accomplish
 // 'imul %ebx, %eax' (opcode 0x0faf must be used in this case)
 // These multiplies can only be selected with single operand forms.
-<mul:opc, mul:4, imul:5>
+<mul:opc:opt, mul:4:Optimize, imul:5:>
 
 <mul>, 0xf6/<mul:opc>, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-<mul>, 0xf6/<mul:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|NF, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
+<mul>, 0xf6/<mul:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|NF|<mul:opt>, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 imul, 0xaf, APX_F, C|Modrm|CheckOperandSize|No_bSuf|No_sSuf|DstVVVV|EVexMap4|NF, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64 }
 imul, 0xfaf, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
 imul, 0xaf, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|NF, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
@@ -428,15 +428,15 @@ imulzu, 0x69, APX_F, Modrm|No_bSuf|No_sS
 
 <div>
 
-<sr:opc:imm8:opt1:opti:nf, +
-    rol:0:Imm8|Imm8S::Optimize:NF, +
-    ror:1:Imm8|Imm8S::Optimize:NF, +
-    rcl:2:Imm8:::, +
-    rcr:3:Imm8:::, +
-    sal:4:Imm8:Optimize::NF, +
-    shl:4:Imm8:Optimize::NF, +
-    shr:5:Imm8:::NF, +
-    sar:7:Imm8:::NF>
+<sr:opc:imm8:opt1:opti:optc:nf, +
+    rol:0:Imm8|Imm8S::Optimize::NF, +
+    ror:1:Imm8|Imm8S::Optimize::NF, +
+    rcl:2:Imm8::::, +
+    rcr:3:Imm8::::, +
+    sal:4:Imm8:Optimize::Optimize:NF, +
+    shl:4:Imm8:Optimize::Optimize:NF, +
+    shr:5:Imm8:::Optimize:NF, +
+    sar:7:Imm8:::Optimize:NF>
 
 <sr>, 0xd0/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:opt1>|<sr:nf>, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
 <sr>, 0xd0/<sr:opc>, 0, W|Modrm|No_sSuf|<sr:opt1>, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
@@ -444,9 +444,9 @@ imulzu, 0x69, APX_F, Modrm|No_bSuf|No_sS
 <sr>, 0xc0/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:opti>|<sr:nf>, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
 <sr>, 0xc0/<sr:opc>, i186, W|Modrm|No_sSuf, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 <sr>, 0xc0/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:opti>|<sr:nf>, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-<sr>, 0xd2/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:nf>, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
-<sr>, 0xd2/<sr:opc>, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-<sr>, 0xd2/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:nf>, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
+<sr>, 0xd2/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:optc>|<sr:nf>, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
+<sr>, 0xd2/<sr:opc>, 0, W|Modrm|No_sSuf|<sr:optc>, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
+<sr>, 0xd2/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:optc>|<sr:nf>, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 <sr>, 0xd0/<sr:opc>, 0, W|Modrm|No_sSuf|<sr:opt1>, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
 
 <sr>


^ permalink raw reply	[flat|nested] 22+ messages in thread

* RE: [PATCH 5/6] x86/APX: optimize certain {nf}-form insns to BMI2 ones
  2024-06-14 12:14 ` [PATCH 5/6] x86/APX: optimize certain {nf}-form insns to BMI2 ones Jan Beulich
@ 2024-06-17  6:36   ` Jiang, Haochen
  0 siblings, 0 replies; 22+ messages in thread
From: Jiang, Haochen @ 2024-06-17  6:36 UTC (permalink / raw)
  To: Beulich, Jan, Binutils; +Cc: H.J. Lu, Cui, Lili

> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Friday, June 14, 2024 8:14 PM
> To: Binutils <binutils@sourceware.org>
> Cc: H.J. Lu <hjl.tools@gmail.com>; Cui, Lili <lili.cui@intel.com>
> Subject: [PATCH 5/6] x86/APX: optimize certain {nf}-form insns to BMI2 ones
> 
> ..., as those leave EFLAGS untouched anyway. That's a shorter encoding,
> available as long as no eGPR is in use anywhere.
> ---
> RFC: Especially because of the need to explicitly enable BMI2 this may
>      be deemed not worth it; seeking views.
> 

If we need explicitly enable BMI2, maybe doing that in compiler is a better choice
since we always enable everything by default in assembler in the real world usage.

However, since actually the change only benefits codesize, not latency (Throughput
might be benefited but not for all cases). Doing that in assembler seems also
reasonable.

Going either way seems ok to me.

Thx,
Haochen

^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0
  2024-06-14 12:10 [PATCH 0/6] x86: a few more optimizations Jan Beulich
                   ` (4 preceding siblings ...)
  2024-06-14 12:14 ` [PATCH 5/6] x86/APX: optimize certain {nf}-form insns to BMI2 ones Jan Beulich
@ 2024-06-14 12:14 ` Jan Beulich
  2024-06-17  6:49   ` Jiang, Haochen
  2024-06-17  2:51 ` [PATCH 0/6] x86: a few more optimizations Jiang, Haochen
  2024-06-17  8:09 ` Cui, Lili
  7 siblings, 1 reply; 22+ messages in thread
From: Jan Beulich @ 2024-06-14 12:14 UTC (permalink / raw)
  To: Binutils; +Cc: H.J. Lu, Lili Cui

Such are equivalent to simple moves, which are up to 3 bytes shorter to
encode (and perhaps also cheaper to execute).

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -5533,6 +5533,44 @@ optimize_encoding (void)
 
       swap_2_operands (1, 2);
     }
+  else if (i.tm.base_opcode == 0x16
+	   && i.tm.opcode_space == SPACE_0F3A
+	   && i.op[0].imms->X_op == O_constant
+	   && i.op[0].imms->X_add_number == 0)
+    {
+      /* Optimize: -O:
+         pextrd $0, %xmmN, ...   -> movd %xmmN, ...
+         pextrq $0, %xmmN, ...   -> movq %xmmN, ...
+         vpextrd $0, %xmmN, ...  -> vmovd %xmmN, ...
+         vpextrq $0, %xmmN, ...  -> vmovq %xmmN, ...
+       */
+      i.tm.opcode_space = SPACE_0F;
+      if (!i.mem_operands
+	  || i.tm.opcode_modifier.evex
+	  || (i.tm.opcode_modifier.vexw != VEXW1
+	      && i.tm.opcode_modifier.size != SIZE64))
+	i.tm.base_opcode = 0x7e;
+      else
+	{
+	  i.tm.base_opcode = 0xd6;
+	  i.tm.opcode_modifier.size = 0;
+	  i.tm.opcode_modifier.vexw
+	    = i.tm.opcode_modifier.sse2avx ? VEXW0 : VEXWIG;
+	}
+
+      i.op[0].regs = i.op[1].regs;
+      i.types[0] = i.types[1];
+      i.flags[0] = i.flags[1];
+      i.tm.operand_types[0] = i.tm.operand_types[1];
+
+      i.op[1].regs = i.op[2].regs;
+      i.types[1] = i.types[2];
+      i.flags[1] = i.flags[2];
+      i.tm.operand_types[1] = i.tm.operand_types[2];
+
+      i.operands = 2;
+      i.imm_operands = 0;
+    }
 }
 
 static void
--- a/gas/testsuite/gas/i386/optimize-1.d
+++ b/gas/testsuite/gas/i386/optimize-1.d
@@ -162,6 +162,10 @@ Disassembly of section .text:
  +[a-f0-9]+:	66 .*	pxor   %xmm2,%xmm2
  +[a-f0-9]+:	c5 .*	vpxor  %xmm2,%xmm2,%xmm0
  +[a-f0-9]+:	c5 .*	vpxor  %ymm2,%ymm2,%ymm0
+ +[a-f0-9]+:	66 .*	movd   %xmm1,%edx
+ +[a-f0-9]+:	66 .*	movd   %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovd  %xmm1,%edx
+ +[a-f0-9]+:	c5 .*	vmovd  %xmm1,\(%edx\)
  +[a-f0-9]+:	0f ba e0 0f          	bt     \$0xf,%eax
  +[a-f0-9]+:	66 0f ba e0 10       	bt     \$0x10,%ax
  +[a-f0-9]+:	0f ba f8 0f          	btc    \$0xf,%eax
--- a/gas/testsuite/gas/i386/optimize-1.s
+++ b/gas/testsuite/gas/i386/optimize-1.s
@@ -189,6 +189,11 @@ _start:
 	vpcmpgtq	%xmm2, %xmm2, %xmm0
 	vpcmpgtq	%ymm2, %ymm2, %ymm0
 
+	pextrd		$0, %xmm1, %edx
+	pextrd		$0, %xmm1, (%edx)
+	vpextrd		$0, %xmm1, %edx
+	vpextrd		$0, %xmm1, (%edx)
+
 	bt	$15, %ax
 	bt	$16, %ax
 	btc	$15, %ax
--- a/gas/testsuite/gas/i386/optimize-1a.d
+++ b/gas/testsuite/gas/i386/optimize-1a.d
@@ -163,6 +163,10 @@ Disassembly of section .text:
  +[a-f0-9]+:	66 .*	pxor   %xmm2,%xmm2
  +[a-f0-9]+:	c5 .*	vpxor  %xmm2,%xmm2,%xmm0
  +[a-f0-9]+:	c5 .*	vpxor  %ymm2,%ymm2,%ymm0
+ +[a-f0-9]+:	66 .*	movd   %xmm1,%edx
+ +[a-f0-9]+:	66 .*	movd   %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovd  %xmm1,%edx
+ +[a-f0-9]+:	c5 .*	vmovd  %xmm1,\(%edx\)
  +[a-f0-9]+:	0f ba e0 0f          	bt     \$0xf,%eax
  +[a-f0-9]+:	66 0f ba e0 10       	bt     \$0x10,%ax
  +[a-f0-9]+:	0f ba f8 0f          	btc    \$0xf,%eax
--- a/gas/testsuite/gas/i386/optimize-4.d
+++ b/gas/testsuite/gas/i386/optimize-4.d
@@ -162,6 +162,10 @@ Disassembly of section .text:
  +[a-f0-9]+:	66 .*	pxor   %xmm2,%xmm2
  +[a-f0-9]+:	c5 .*	vpxor  %xmm2,%xmm2,%xmm0
  +[a-f0-9]+:	c5 .*	vpxor  %ymm2,%ymm2,%ymm0
+ +[a-f0-9]+:	66 .*	movd   %xmm1,%edx
+ +[a-f0-9]+:	66 .*	movd   %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovd  %xmm1,%edx
+ +[a-f0-9]+:	c5 .*	vmovd  %xmm1,\(%edx\)
  +[a-f0-9]+:	0f ba e0 0f          	bt     \$0xf,%eax
  +[a-f0-9]+:	66 0f ba e0 10       	bt     \$0x10,%ax
  +[a-f0-9]+:	0f ba f8 0f          	btc    \$0xf,%eax
--- a/gas/testsuite/gas/i386/optimize-5.d
+++ b/gas/testsuite/gas/i386/optimize-5.d
@@ -162,6 +162,10 @@ Disassembly of section .text:
  +[a-f0-9]+:	66 .*	pxor   %xmm2,%xmm2
  +[a-f0-9]+:	c5 .*	vpxor  %xmm2,%xmm2,%xmm0
  +[a-f0-9]+:	c5 .*	vpxor  %ymm2,%ymm2,%ymm0
+ +[a-f0-9]+:	66 .*	movd   %xmm1,%edx
+ +[a-f0-9]+:	66 .*	movd   %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovd  %xmm1,%edx
+ +[a-f0-9]+:	c5 .*	vmovd  %xmm1,\(%edx\)
  +[a-f0-9]+:	0f ba e0 0f          	bt     \$0xf,%eax
  +[a-f0-9]+:	66 0f ba e0 10       	bt     \$0x10,%ax
  +[a-f0-9]+:	0f ba f8 0f          	btc    \$0xf,%eax
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-optimize-pextr.d
@@ -0,0 +1,29 @@
+#as: -O -msse2avx
+#objdump: -drw
+#name: x86-64 PEXTR optimized encoding with -msse2avx
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <pextr>:
+ +[a-f0-9]+:	c5 f9 7e ca          	vmovd  %xmm1,%edx
+ +[a-f0-9]+:	c5 f9 7e 0a          	vmovd  %xmm1,\(%rdx\)
+ +[a-f0-9]+:	62 f9 7d 08 7e ca    	vmovd  %xmm1,%r18d
+ +[a-f0-9]+:	62 f9 7d 08 7e 0a    	vmovd  %xmm1,\(%r18\)
+ +[a-f0-9]+:	c5 f9 7e ca          	vmovd  %xmm1,%edx
+ +[a-f0-9]+:	c5 f9 7e 0a          	vmovd  %xmm1,\(%rdx\)
+ +[a-f0-9]+:	62 e1 7d 08 7e ca    	vmovd  %xmm17,%edx
+ +[a-f0-9]+:	62 f9 7d 08 7e ca    	vmovd  %xmm1,%r18d
+ +[a-f0-9]+:	62 f9 7d 08 7e 0a    	vmovd  %xmm1,\(%r18\)
+ +[a-f0-9]+:	c4 e1 f9 7e ca       	vmovq  %xmm1,%rdx
+ +[a-f0-9]+:	c5 f9 d6 0a          	vmovq  %xmm1,\(%rdx\)
+ +[a-f0-9]+:	62 f9 fd 08 7e ca    	vmovq  %xmm1,%r18
+ +[a-f0-9]+:	62 f9 fd 08 7e 0a    	vmovq  %xmm1,\(%r18\)
+ +[a-f0-9]+:	c4 e1 f9 7e ca       	vmovq  %xmm1,%rdx
+ +[a-f0-9]+:	c5 f9 d6 0a          	vmovq  %xmm1,\(%rdx\)
+ +[a-f0-9]+:	62 e1 fd 08 7e ca    	vmovq  %xmm17,%rdx
+ +[a-f0-9]+:	62 f9 fd 08 7e ca    	vmovq  %xmm1,%r18
+ +[a-f0-9]+:	62 f9 fd 08 7e 0a    	vmovq  %xmm1,\(%r18\)
+#pass
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-optimize-pextr.l
@@ -0,0 +1,41 @@
+.*: Assembler messages:
+.*:6: Error: .*
+.*:7: Error: .*
+.*:19: Error: .*
+.*:20: Error: .*
+[ 	]*[0-9a-f]+[ 	]+\.text
+[ 	]*[0-9a-f]+[ 	]+pextr:
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 660F7ECA[ 	]+pextrd	\$0, %xmm1, %edx
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 660F7E0A[ 	]+pextrd	\$0, %xmm1, \(%rdx\)
+[ 	]*[0-9a-f]+[ 	]+
+[ 	]*[0-9a-f]+[ 	]+pextrd	\$0, %xmm1, %r18d
+[ 	]*[0-9a-f]+[ 	]+pextrd	\$0, %xmm1, \(%r18\)
+[ 	]*[0-9a-f]+[ 	]+
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C5F97ECA[ 	]+vpextrd	\$0, %xmm1, %edx
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C5F97E0A[ 	]+vpextrd	\$0, %xmm1, \(%rdx\)
+[ 	]*[0-9a-f]+[ 	]+
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 62E17D08[ 	]+vpextrd	\$0, %xmm17, %edx
+[ 	]*[0-9a-f]+[ 	]+7ECA
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 62F97D08[ 	]+vpextrd	\$0, %xmm1, %r18d
+[ 	]*[0-9a-f]+[ 	]+7ECA
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 62F97D08[ 	]+vpextrd	\$0, %xmm1, \(%r18\)
+[ 	]*[0-9a-f]+[ 	]+7E0A
+[ 	]*[0-9a-f]+[ 	]+
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 66480F7E[ 	]+pextrq	\$0, %xmm1, %rdx
+[ 	]*[0-9a-f]+[ 	]+CA
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 660FD60A[ 	]+pextrq	\$0, %xmm1, \(%rdx\)
+[ 	]*[0-9a-f]+[ 	]+
+[ 	]*[0-9a-f]+[ 	]+pextrq	\$0, %xmm1, %r18
+[ 	]*[0-9a-f]+[ 	]+pextrq	\$0, %xmm1, \(%r18\)
+[ 	]*[0-9a-f]+[ 	]+
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C4E1F97E[ 	]+vpextrq	\$0, %xmm1, %rdx
+[ 	]*[0-9a-f]+[ 	]+CA
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C5F9D60A[ 	]+vpextrq	\$0, %xmm1, \(%rdx\)
+[ 	]*[0-9a-f]+[ 	]+
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 62E1FD08[ 	]+vpextrq	\$0, %xmm17, %rdx
+[ 	]*[0-9a-f]+[ 	]+7ECA
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 62F9FD08[ 	]+vpextrq	\$0, %xmm1, %r18
+[ 	]*[0-9a-f]+[ 	]+7ECA
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 62F9FD08[ 	]+vpextrq	\$0, %xmm1, \(%r18\)
+[ 	]*[0-9a-f]+[ 	]+7E0A
+#pass
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-optimize-pextr.s
@@ -0,0 +1,27 @@
+	.text
+pextr:
+	pextrd	$0, %xmm1, %edx
+	pextrd	$0, %xmm1, (%rdx)
+
+	pextrd	$0, %xmm1, %r18d
+	pextrd	$0, %xmm1, (%r18)
+
+	vpextrd	$0, %xmm1, %edx
+	vpextrd	$0, %xmm1, (%rdx)
+
+	vpextrd	$0, %xmm17, %edx
+	vpextrd	$0, %xmm1, %r18d
+	vpextrd	$0, %xmm1, (%r18)
+
+	pextrq	$0, %xmm1, %rdx
+	pextrq	$0, %xmm1, (%rdx)
+
+	pextrq	$0, %xmm1, %r18
+	pextrq	$0, %xmm1, (%r18)
+
+	vpextrq	$0, %xmm1, %rdx
+	vpextrq	$0, %xmm1, (%rdx)
+
+	vpextrq	$0, %xmm17, %rdx
+	vpextrq	$0, %xmm1, %r18
+	vpextrq	$0, %xmm1, (%r18)
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -583,6 +583,8 @@ run_dump_test "x86-64-optimize-6"
 run_list_test "x86-64-optimize-7a" "-I${srcdir}/$subdir -march=+noavx -al"
 run_dump_test "x86-64-optimize-7b"
 run_list_test "x86-64-optimize-8" "-I${srcdir}/$subdir -march=+noavx2 -al"
+run_list_test "x86-64-optimize-pextr" "-O -aln"
+run_dump_test "x86-64-optimize-pextr"
 run_dump_test "x86-64-apx-ndd-optimize"
 run_dump_test "x86-64-align-branch-1a"
 run_dump_test "x86-64-align-branch-1b"
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -1500,10 +1500,10 @@ pblendw<sse41>, 0x660f3a0e, <sse41:cpu>,
 pcmpeqq<sse41>, 0x660f3829, <sse41:cpu>, Modrm|<sse41:attr>|<sse41:vvvv>|NoSuf|Optimize, { RegXMM|Unspecified|BaseIndex, RegXMM }
 pextr<bw><SSE41BW>, 0x660f3a14 | <bw:opc>, <SSE41BW:cpu>, RegMem|<SSE41BW:attr>|NoSuf|IgnoreSize|NoRex64, { Imm8, RegXMM, Reg32|Reg64 }
 pextr<bw><SSE41BW>, 0x660f3a14 | <bw:opc>, <SSE41BW:cpu>, Modrm|<SSE41BW:attr>|Disp8MemShift|NoSuf, { Imm8, RegXMM, <bw:elem>|Unspecified|BaseIndex }
-pextrd<SSE41DQ>, 0x660f3a16, <SSE41DQ:cpu>, Modrm|<SSE41DQ:attr>|Disp8MemShift|NoSuf|IgnoreSize, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
-pextrq, 0x6616, AVX&x64, Modrm|Vex|Space0F3A|VexW1|NoSuf|SSE2AVX, { Imm8, RegXMM, Reg64|Unspecified|BaseIndex }
-pextrq, 0x6616, AVX512DQ&AVX512VL&x64, Modrm|EVex128|Space0F3A|VexW1|Disp8MemShift=3|NoSuf|SSE2AVX, { Imm8, RegXMM, Reg64|Unspecified|BaseIndex }
-pextrq, 0x660f3a16, SSE4_1&x64, Modrm|Size64|NoSuf, { Imm8, RegXMM, Reg64|Unspecified|BaseIndex }
+pextrd<SSE41DQ>, 0x660f3a16, <SSE41DQ:cpu>, Modrm|<SSE41DQ:attr>|Disp8MemShift|NoSuf|IgnoreSize|Optimize, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
+pextrq, 0x6616, AVX&x64, Modrm|Vex|Space0F3A|VexW1|NoSuf|SSE2AVX|Optimize, { Imm8, RegXMM, Reg64|Unspecified|BaseIndex }
+pextrq, 0x6616, AVX512DQ&AVX512VL&x64, Modrm|EVex128|Space0F3A|VexW1|Disp8MemShift=3|NoSuf|SSE2AVX|Optimize, { Imm8, RegXMM, Reg64|Unspecified|BaseIndex }
+pextrq, 0x660f3a16, SSE4_1&x64, Modrm|Size64|NoSuf|Optimize, { Imm8, RegXMM, Reg64|Unspecified|BaseIndex }
 phminposuw<sse41>, 0x660f3841, <sse41:cpu>, Modrm|<sse41:attr>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 pinsrb<SSE41BW>, 0x660f3a20, <SSE41BW:cpu>, Modrm|<SSE41BW:attr>|<SSE41BW:vvvv>|NoSuf|IgnoreSize|NoRex64, { Imm8, Reg32|Reg64, RegXMM }
 pinsrb<SSE41BW>, 0x660f3a20, <SSE41BW:cpu>, Modrm|<SSE41BW:attr>|<SSE41BW:vvvv>|Disp8MemShift|NoSuf, { Imm8, Byte|Unspecified|BaseIndex, RegXMM }
@@ -1757,7 +1757,7 @@ vpermilps, 0x660c, AVX|AVX512F, Modrm|Ve
 vpermilps, 0x6604, AVX|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F3A|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 vpermilpd, 0x660d, AVX, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vpermilpd, 0x6605, AVX, Modrm|Vex|Space0F3A|VexW0|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
-vpextr<dq>, 0x6616, AVX&<dq:cpu64>, Modrm|Vex|Space0F3A|<dq:vexw64>|NoSuf, { Imm8, RegXMM, <dq:gpr>|Unspecified|BaseIndex }
+vpextr<dq>, 0x6616, AVX&<dq:cpu64>, Modrm|Vex|Space0F3A|<dq:vexw64>|NoSuf|Optimize, { Imm8, RegXMM, <dq:gpr>|Unspecified|BaseIndex }
 vpextrw, 0x66c5, AVX, Load|Modrm|Vex|Space0F|VexWIG|No_bSuf|No_wSuf|No_sSuf, { Imm8, RegXMM, Reg32|Reg64 }
 vpextr<bw>, 0x6614 | <bw:opc>, AVX, RegMem|Vex|Space0F3A|VexWIG|NoSuf, { Imm8, RegXMM, Reg32|Reg64 }
 vpextr<bw>, 0x6614 | <bw:opc>, AVX, Modrm|Vex|Space0F3A|VexWIG|NoSuf, { Imm8, RegXMM, <bw:elem>|Unspecified|BaseIndex }
@@ -2937,7 +2937,7 @@ vextracti32x8, 0x663B, AVX512DQ, Modrm|E
 vinsertf32x8, 0x661A, AVX512DQ, Modrm|EVex512|Masking|Space0F3A|Src1VVVV|VexW0|Disp8MemShift=5|NoSuf, { Imm8, RegYMM|Unspecified|BaseIndex, RegZMM, RegZMM }
 vinserti32x8, 0x663A, AVX512DQ, Modrm|EVex512|Masking|Space0F3A|Src1VVVV|VexW0|Disp8MemShift=5|NoSuf, { Imm8, RegYMM|Unspecified|BaseIndex, RegZMM, RegZMM }
 
-vpextr<dq>, 0x6616, AVX512DQ&<dq:cpu64>, Modrm|EVex128|Space0F3A|<dq:vexw64>|Disp8MemShift|NoSuf, { Imm8, RegXMM, <dq:gpr>|Unspecified|BaseIndex }
+vpextr<dq>, 0x6616, AVX512DQ&<dq:cpu64>, Modrm|EVex128|Space0F3A|<dq:vexw64>|Disp8MemShift|NoSuf|Optimize, { Imm8, RegXMM, <dq:gpr>|Unspecified|BaseIndex }
 vpinsr<dq>, 0x6622, AVX512DQ&<dq:cpu64>, Modrm|EVex128|Space0F3A|Src1VVVV|<dq:vexw64>|Disp8MemShift|NoSuf, { Imm8, <dq:gpr>|Unspecified|BaseIndex, RegXMM, RegXMM }
 
 vextractf64x2, 0x6619, AVX512DQ, Modrm|Masking|Space0F3A|VexW=2|Disp8MemShift=4|NoSuf, { Imm8, RegYMM|RegZMM, RegXMM|Unspecified|BaseIndex }


^ permalink raw reply	[flat|nested] 22+ messages in thread

* RE: [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0
  2024-06-14 12:14 ` [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0 Jan Beulich
@ 2024-06-17  6:49   ` Jiang, Haochen
  2024-06-17  8:56     ` Jan Beulich
  0 siblings, 1 reply; 22+ messages in thread
From: Jiang, Haochen @ 2024-06-17  6:49 UTC (permalink / raw)
  To: Beulich, Jan, Binutils; +Cc: H.J. Lu, Cui, Lili

> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Friday, June 14, 2024 8:15 PM
> To: Binutils <binutils@sourceware.org>
> Cc: H.J. Lu <hjl.tools@gmail.com>; Cui, Lili <lili.cui@intel.com>
> Subject: [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0
> 
> Such are equivalent to simple moves, which are up to 3 bytes shorter to
> encode (and perhaps also cheaper to execute).
> 

The optimization is problematic. Instead of movd/q, we should optimize to
psrldq, which has lower latency and it is exactly what GCC is doing for 0,1,2,3
in immediate.

psrldq has only 1 latency, while movd has 3 latency.

Also, I suppose the optimization related to latency should not be done in
assembler.

Thx,
Haochen

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0
  2024-06-17  6:49   ` Jiang, Haochen
@ 2024-06-17  8:56     ` Jan Beulich
  2024-06-18  3:25       ` Jiang, Haochen
  0 siblings, 1 reply; 22+ messages in thread
From: Jan Beulich @ 2024-06-17  8:56 UTC (permalink / raw)
  To: Jiang, Haochen; +Cc: H.J. Lu, Cui, Lili, Binutils

On 17.06.2024 08:49, Jiang, Haochen wrote:
>> -----Original Message-----
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Friday, June 14, 2024 8:15 PM
>> To: Binutils <binutils@sourceware.org>
>> Cc: H.J. Lu <hjl.tools@gmail.com>; Cui, Lili <lili.cui@intel.com>
>> Subject: [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0
>>
>> Such are equivalent to simple moves, which are up to 3 bytes shorter to
>> encode (and perhaps also cheaper to execute).
>>
> 
> The optimization is problematic. Instead of movd/q, we should optimize to
> psrldq, which has lower latency and it is exactly what GCC is doing for 0,1,2,3
> in immediate.
> 
> psrldq has only 1 latency, while movd has 3 latency.

Wait. While the compiler may use PSRLDQ here, based on knowing assumptions
made elsewhere, the assembler can't: The replacement insn must generate the
exact same result in the destination register. PSRLDQ with an immediate of
0 (which effectively you're suggesting to use here) doesn't alter the
destination register at all, though. When really we want the upper bits of
the register cleared.

By implication I question the use of PSRLDQ (should it really happen) when
the immediate is 0: If the upper bits are of no interest, a yet simpler
MOVDQ{A,U} could then be used. Or, if source and destination match, no insn
would need emitting at all.

> Also, I suppose the optimization related to latency should not be done in
> assembler.

Why? We have -O, -O1, and -O2 alongside -Os for a reason.

Jan

^ permalink raw reply	[flat|nested] 22+ messages in thread

* RE: [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0
  2024-06-17  8:56     ` Jan Beulich
@ 2024-06-18  3:25       ` Jiang, Haochen
  2024-06-18  6:14         ` Jan Beulich
  0 siblings, 1 reply; 22+ messages in thread
From: Jiang, Haochen @ 2024-06-18  3:25 UTC (permalink / raw)
  To: Beulich, Jan; +Cc: H.J. Lu, Cui, Lili, Binutils

> >> Such are equivalent to simple moves, which are up to 3 bytes shorter to
> >> encode (and perhaps also cheaper to execute).
> >
> > The optimization is problematic. Instead of movd/q, we should optimize to
> > psrldq, which has lower latency and it is exactly what GCC is doing for 0,1,2,3
> > in immediate.
> >
> > psrldq has only 1 latency, while movd has 3 latency.
> 
> Wait. While the compiler may use PSRLDQ here, based on knowing
> assumptions
> made elsewhere, the assembler can't: The replacement insn must generate the
> exact same result in the destination register. PSRLDQ with an immediate of
> 0 (which effectively you're suggesting to use here) doesn't alter the
> destination register at all, though. When really we want the upper bits of
> the register cleared.

pextrd/q also doesn't clear them at all. For vpextrd/q and vpsrldq, they will
both clear higher bits. So they will be the same.

But you are right, we do have some assumptions, it will be both registers,
movd/q does not have that restriction.

> 
> By implication I question the use of PSRLDQ (should it really happen) when
> the immediate is 0: If the upper bits are of no interest, a yet simpler
> MOVDQ{A,U} could then be used. Or, if source and destination match, no insn
> would need emitting at all.
> 
> > Also, I suppose the optimization related to latency should not be done in
> > assembler.
> 
> Why? We have -O, -O1, and -O2 alongside -Os for a reason.

I am quite conservative on the optimization in assembler. If we are also going to
optimize those hand-written code, the optimization could work.

However, when they hand write some code, are we supposed to change them?
For -Os, we could give them all the optimizations we have, but for -O, I am not
that sure.

And I suppose we might add too much burden for the assembler if we are going
to add too much optimizations related to latency. It will become another compiler.
Are we supposed to copy all the optimizations from compiler? IMO, optimization to
codesize is ok, but for latency, I am a little concerned.

Thx,
Haochen

> 
> Jan

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0
  2024-06-18  3:25       ` Jiang, Haochen
@ 2024-06-18  6:14         ` Jan Beulich
  2024-06-18  6:23           ` Jiang, Haochen
  0 siblings, 1 reply; 22+ messages in thread
From: Jan Beulich @ 2024-06-18  6:14 UTC (permalink / raw)
  To: Jiang, Haochen; +Cc: H.J. Lu, Cui, Lili, Binutils

On 18.06.2024 05:25, Jiang, Haochen wrote:
>>>> Such are equivalent to simple moves, which are up to 3 bytes shorter to
>>>> encode (and perhaps also cheaper to execute).
>>>
>>> The optimization is problematic. Instead of movd/q, we should optimize to
>>> psrldq, which has lower latency and it is exactly what GCC is doing for 0,1,2,3
>>> in immediate.
>>>
>>> psrldq has only 1 latency, while movd has 3 latency.
>>
>> Wait. While the compiler may use PSRLDQ here, based on knowing
>> assumptions
>> made elsewhere, the assembler can't: The replacement insn must generate the
>> exact same result in the destination register. PSRLDQ with an immediate of
>> 0 (which effectively you're suggesting to use here) doesn't alter the
>> destination register at all, though. When really we want the upper bits of
>> the register cleared.
> 
> pextrd/q also doesn't clear them at all. For vpextrd/q and vpsrldq, they will
> both clear higher bits. So they will be the same.

Wait - your suggestion is even more confusing: The destination of PSRLDQ is
an XMM register, whereas the destination of PEXTR* is a GPR or memory. This
is properly expressed in the constraints in the compiler, but clearly we
can't replace insns like this in the assembler.

>> By implication I question the use of PSRLDQ (should it really happen) when
>> the immediate is 0: If the upper bits are of no interest, a yet simpler
>> MOVDQ{A,U} could then be used. Or, if source and destination match, no insn
>> would need emitting at all.
>>
>>> Also, I suppose the optimization related to latency should not be done in
>>> assembler.
>>
>> Why? We have -O, -O1, and -O2 alongside -Os for a reason.
> 
> I am quite conservative on the optimization in assembler. If we are also going to
> optimize those hand-written code, the optimization could work.
> 
> However, when they hand write some code, are we supposed to change them?

Well, if we aren't to, people simply don't pass -O.

> For -Os, we could give them all the optimizations we have, but for -O, I am not
> that sure.
> 
> And I suppose we might add too much burden for the assembler if we are going
> to add too much optimizations related to latency. It will become another compiler.
> Are we supposed to copy all the optimizations from compiler?

Probably not all (and many aren't the the insn level anyway, nor do we - so
far at least - optimize for latency/throughput at the expense of code size).
But yes - this specific aspect is why I keep raising questions on what
optimizations are worth it vs where we'd better leave code alone.

Jan

> IMO, optimization to
> codesize is ok, but for latency, I am a little concerned.
> 
> Thx,
> Haochen
> 
>>
>> Jan


^ permalink raw reply	[flat|nested] 22+ messages in thread

* RE: [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0
  2024-06-18  6:14         ` Jan Beulich
@ 2024-06-18  6:23           ` Jiang, Haochen
  2024-06-18 20:37             ` H.J. Lu
  0 siblings, 1 reply; 22+ messages in thread
From: Jiang, Haochen @ 2024-06-18  6:23 UTC (permalink / raw)
  To: Beulich, Jan, H.J. Lu; +Cc: Cui, Lili, Binutils

> >> Wait. While the compiler may use PSRLDQ here, based on knowing
> >> assumptions
> >> made elsewhere, the assembler can't: The replacement insn must generate the
> >> exact same result in the destination register. PSRLDQ with an immediate of
> >> 0 (which effectively you're suggesting to use here) doesn't alter the
> >> destination register at all, though. When really we want the upper bits of
> >> the register cleared.
> >
> > pextrd/q also doesn't clear them at all. For vpextrd/q and vpsrldq, they will
> > both clear higher bits. So they will be the same.
> 
> Wait - your suggestion is even more confusing: The destination of PSRLDQ is
> an XMM register, whereas the destination of PEXTR* is a GPR or memory. This
> is properly expressed in the constraints in the compiler, but clearly we
> can't replace insns like this in the assembler.

Yes, I realized that I am wrong here, there are no constraints. vmovd/q would be
definitely better and doable here if we would like to do something.

> >>> Also, I suppose the optimization related to latency should not be done in
> >>> assembler.
> >>
> >> Why? We have -O, -O1, and -O2 alongside -Os for a reason.
> >
> > I am quite conservative on the optimization in assembler. If we are also going to
> > optimize those hand-written code, the optimization could work.
> >
> > However, when they hand write some code, are we supposed to change them?
> 
> Well, if we aren't to, people simply don't pass -O.
> 
> > For -Os, we could give them all the optimizations we have, but for -O, I am not
> > that sure.
> >
> > And I suppose we might add too much burden for the assembler if we are going
> > to add too much optimizations related to latency. It will become another compiler.
> > Are we supposed to copy all the optimizations from compiler?
> 
> Probably not all (and many aren't the the insn level anyway, nor do we - so
> far at least - optimize for latency/throughput at the expense of code size).
> But yes - this specific aspect is why I keep raising questions on what
> optimizations are worth it vs where we'd better leave code alone.

H.J., what is your opinion on that?

Thx,
Haochen

> 
> Jan
> 
> > IMO, optimization to
> > codesize is ok, but for latency, I am a little concerned.
> >
> > Thx,
> > Haochen
> >
> >>
> >> Jan


^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0
  2024-06-18  6:23           ` Jiang, Haochen
@ 2024-06-18 20:37             ` H.J. Lu
  2024-06-19  2:01               ` Jiang, Haochen
  0 siblings, 1 reply; 22+ messages in thread
From: H.J. Lu @ 2024-06-18 20:37 UTC (permalink / raw)
  To: Jiang, Haochen; +Cc: Beulich, Jan, Cui, Lili, Binutils

[-- Attachment #1: Type: text/plain, Size: 2695 bytes --]

-Os should optimize for code size. Other optimizations should
take performance into account.

On Tue, Jun 18, 2024, 2:23 PM Jiang, Haochen <haochen.jiang@intel.com>
wrote:

> > >> Wait. While the compiler may use PSRLDQ here, based on knowing
> > >> assumptions
> > >> made elsewhere, the assembler can't: The replacement insn must
> generate the
> > >> exact same result in the destination register. PSRLDQ with an
> immediate of
> > >> 0 (which effectively you're suggesting to use here) doesn't alter the
> > >> destination register at all, though. When really we want the upper
> bits of
> > >> the register cleared.
> > >
> > > pextrd/q also doesn't clear them at all. For vpextrd/q and vpsrldq,
> they will
> > > both clear higher bits. So they will be the same.
> >
> > Wait - your suggestion is even more confusing: The destination of PSRLDQ
> is
> > an XMM register, whereas the destination of PEXTR* is a GPR or memory.
> This
> > is properly expressed in the constraints in the compiler, but clearly we
> > can't replace insns like this in the assembler.
>
> Yes, I realized that I am wrong here, there are no constraints. vmovd/q
> would be
> definitely better and doable here if we would like to do something.
>
> > >>> Also, I suppose the optimization related to latency should not be
> done in
> > >>> assembler.
> > >>
> > >> Why? We have -O, -O1, and -O2 alongside -Os for a reason.
> > >
> > > I am quite conservative on the optimization in assembler. If we are
> also going to
> > > optimize those hand-written code, the optimization could work.
> > >
> > > However, when they hand write some code, are we supposed to change
> them?
> >
> > Well, if we aren't to, people simply don't pass -O.
> >
> > > For -Os, we could give them all the optimizations we have, but for -O,
> I am not
> > > that sure.
> > >
> > > And I suppose we might add too much burden for the assembler if we are
> going
> > > to add too much optimizations related to latency. It will become
> another compiler.
> > > Are we supposed to copy all the optimizations from compiler?
> >
> > Probably not all (and many aren't the the insn level anyway, nor do we -
> so
> > far at least - optimize for latency/throughput at the expense of code
> size).
> > But yes - this specific aspect is why I keep raising questions on what
> > optimizations are worth it vs where we'd better leave code alone.
>
> H.J., what is your opinion on that?
>
> Thx,
> Haochen
>
> >
> > Jan
> >
> > > IMO, optimization to
> > > codesize is ok, but for latency, I am a little concerned.
> > >
> > > Thx,
> > > Haochen
> > >
> > >>
> > >> Jan
>
>

^ permalink raw reply	[flat|nested] 22+ messages in thread

* RE: [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0
  2024-06-18 20:37             ` H.J. Lu
@ 2024-06-19  2:01               ` Jiang, Haochen
  0 siblings, 0 replies; 22+ messages in thread
From: Jiang, Haochen @ 2024-06-19  2:01 UTC (permalink / raw)
  To: H.J. Lu; +Cc: Beulich, Jan, Cui, Lili, Binutils

[-- Attachment #1: Type: text/plain, Size: 2957 bytes --]

I see, that refreshes my understanding on that. I have no concern now.

Thx,
Haochen

From: H.J. Lu <hjl.tools@gmail.com>
Sent: Wednesday, June 19, 2024 4:38 AM
To: Jiang, Haochen <haochen.jiang@intel.com>
Cc: Beulich, Jan <JBeulich@suse.com>; Cui, Lili <lili.cui@intel.com>; Binutils <binutils@sourceware.org>
Subject: Re: [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0

-Os should optimize for code size. Other optimizations should
take performance into account.

On Tue, Jun 18, 2024, 2:23 PM Jiang, Haochen <haochen.jiang@intel.com<mailto:haochen.jiang@intel.com>> wrote:
> >> Wait. While the compiler may use PSRLDQ here, based on knowing
> >> assumptions
> >> made elsewhere, the assembler can't: The replacement insn must generate the
> >> exact same result in the destination register. PSRLDQ with an immediate of
> >> 0 (which effectively you're suggesting to use here) doesn't alter the
> >> destination register at all, though. When really we want the upper bits of
> >> the register cleared.
> >
> > pextrd/q also doesn't clear them at all. For vpextrd/q and vpsrldq, they will
> > both clear higher bits. So they will be the same.
>
> Wait - your suggestion is even more confusing: The destination of PSRLDQ is
> an XMM register, whereas the destination of PEXTR* is a GPR or memory. This
> is properly expressed in the constraints in the compiler, but clearly we
> can't replace insns like this in the assembler.

Yes, I realized that I am wrong here, there are no constraints. vmovd/q would be
definitely better and doable here if we would like to do something.

> >>> Also, I suppose the optimization related to latency should not be done in
> >>> assembler.
> >>
> >> Why? We have -O, -O1, and -O2 alongside -Os for a reason.
> >
> > I am quite conservative on the optimization in assembler. If we are also going to
> > optimize those hand-written code, the optimization could work.
> >
> > However, when they hand write some code, are we supposed to change them?
>
> Well, if we aren't to, people simply don't pass -O.
>
> > For -Os, we could give them all the optimizations we have, but for -O, I am not
> > that sure.
> >
> > And I suppose we might add too much burden for the assembler if we are going
> > to add too much optimizations related to latency. It will become another compiler.
> > Are we supposed to copy all the optimizations from compiler?
>
> Probably not all (and many aren't the the insn level anyway, nor do we - so
> far at least - optimize for latency/throughput at the expense of code size).
> But yes - this specific aspect is why I keep raising questions on what
> optimizations are worth it vs where we'd better leave code alone.

H.J., what is your opinion on that?

Thx,
Haochen

>
> Jan
>
> > IMO, optimization to
> > codesize is ok, but for latency, I am a little concerned.
> >
> > Thx,
> > Haochen
> >
> >>
> >> Jan

^ permalink raw reply	[flat|nested] 22+ messages in thread

* RE: [PATCH 0/6] x86: a few more optimizations
  2024-06-14 12:10 [PATCH 0/6] x86: a few more optimizations Jan Beulich
                   ` (5 preceding siblings ...)
  2024-06-14 12:14 ` [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0 Jan Beulich
@ 2024-06-17  2:51 ` Jiang, Haochen
  2024-06-17  8:33   ` Jan Beulich
  2024-06-17  8:09 ` Cui, Lili
  7 siblings, 1 reply; 22+ messages in thread
From: Jiang, Haochen @ 2024-06-17  2:51 UTC (permalink / raw)
  To: Beulich, Jan, Binutils; +Cc: H.J. Lu, Cui, Lili

> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Friday, June 14, 2024 8:11 PM
> To: Binutils <binutils@sourceware.org>
> Cc: H.J. Lu <hjl.tools@gmail.com>; Cui, Lili <lili.cui@intel.com>
> Subject: [PATCH 0/6] x86: a few more optimizations
> 
> APX {nf} insn forms present a number of interesting optimization
> opportunities, often mostly for size. There are a few more that I'm
> aware of, but where I'm less convinced that input code would really
> ever be written like this:
> 
> 1) Quite a few operations could be converted to plain MOV. For example
> 
> 	{nf} xor %cl, %cl
> 	{nf} sub %cl, %cl
> 	{nf} and $0, %cl
> 
> can all be replaced by the much shorter
> 
> 	mov	$0, %cl
> 
> 2) Certain forms of IMUL{,ZU} with a power-of-2 immediate could be
> converted to SHL. This could be beneficial even when size doesn't
> shrink, for SHL still having better latency/throughput.
> 

Hi Jan,

I suppose the first optimization is ok whether for compiler to do that or
assembler to do that. I don't see problems from the first glance since the
behavior seems the same.

The imul -> shl optimization should be done in compiler since it is
latency/throughput related.

Thx,
Haochen

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 0/6] x86: a few more optimizations
  2024-06-17  2:51 ` [PATCH 0/6] x86: a few more optimizations Jiang, Haochen
@ 2024-06-17  8:33   ` Jan Beulich
  0 siblings, 0 replies; 22+ messages in thread
From: Jan Beulich @ 2024-06-17  8:33 UTC (permalink / raw)
  To: Jiang, Haochen; +Cc: H.J. Lu, Cui, Lili, Binutils

On 17.06.2024 04:51, Jiang, Haochen wrote:
>> -----Original Message-----
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Friday, June 14, 2024 8:11 PM
>> To: Binutils <binutils@sourceware.org>
>> Cc: H.J. Lu <hjl.tools@gmail.com>; Cui, Lili <lili.cui@intel.com>
>> Subject: [PATCH 0/6] x86: a few more optimizations
>>
>> APX {nf} insn forms present a number of interesting optimization
>> opportunities, often mostly for size. There are a few more that I'm
>> aware of, but where I'm less convinced that input code would really
>> ever be written like this:
>>
>> 1) Quite a few operations could be converted to plain MOV. For example
>>
>> 	{nf} xor %cl, %cl
>> 	{nf} sub %cl, %cl
>> 	{nf} and $0, %cl
>>
>> can all be replaced by the much shorter
>>
>> 	mov	$0, %cl
>>
>> 2) Certain forms of IMUL{,ZU} with a power-of-2 immediate could be
>> converted to SHL. This could be beneficial even when size doesn't
>> shrink, for SHL still having better latency/throughput.
> 
> I suppose the first optimization is ok whether for compiler to do that or
> assembler to do that. I don't see problems from the first glance since the
> behavior seems the same.
> 
> The imul -> shl optimization should be done in compiler since it is
> latency/throughput related.

Optimizations done in the assembler are, imo, mainly targeting hand-
written assembly. Any optimizations whatsoever in compiled code should
be carried out by the compiler. Hence me having said "would really ever
be written like this" (and specifically not "emitted").

Jan

^ permalink raw reply	[flat|nested] 22+ messages in thread

* RE: [PATCH 0/6] x86: a few more optimizations
  2024-06-14 12:10 [PATCH 0/6] x86: a few more optimizations Jan Beulich
                   ` (6 preceding siblings ...)
  2024-06-17  2:51 ` [PATCH 0/6] x86: a few more optimizations Jiang, Haochen
@ 2024-06-17  8:09 ` Cui, Lili
  2024-06-17  8:37   ` Jan Beulich
  7 siblings, 1 reply; 22+ messages in thread
From: Cui, Lili @ 2024-06-17  8:09 UTC (permalink / raw)
  To: Beulich, Jan, Binutils; +Cc: H.J. Lu

> APX {nf} insn forms present a number of interesting optimization
> opportunities, often mostly for size. There are a few more that I'm aware of,
> but where I'm less convinced that input code would really ever be written like
> this:
> 
> 1) Quite a few operations could be converted to plain MOV. For example
> 
> 	{nf} xor %cl, %cl
> 	{nf} sub %cl, %cl
> 	{nf} and $0, %cl
> 
> can all be replaced by the much shorter
> 
> 	mov	$0, %cl
> 
> 2) Certain forms of IMUL{,ZU} with a power-of-2 immediate could be
> converted to SHL. This could be beneficial even when size doesn't shrink, for
> SHL still having better latency/throughput.
> 
> Thoughts?
> 

These two ideas are so good that several people think that GCC should support these two conversions. Would you consider implementing these conversions in gcc?

> Plus: Since, even if leaving out the further ones above, there are quite a few
> {nf}-specific ones, I was wondering whether it would make sense to put those
> in a separate optimize_nf_encoding() function, to somewhat limit
> optimize_encoding()'s growth.
> 

Agree, optimize_encoding is already big.

Thanks,
Lili.

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 0/6] x86: a few more optimizations
  2024-06-17  8:09 ` Cui, Lili
@ 2024-06-17  8:37   ` Jan Beulich
  2024-06-17  9:12     ` Cui, Lili
  0 siblings, 1 reply; 22+ messages in thread
From: Jan Beulich @ 2024-06-17  8:37 UTC (permalink / raw)
  To: Cui, Lili; +Cc: H.J. Lu, Binutils

On 17.06.2024 10:09, Cui, Lili wrote:
>> APX {nf} insn forms present a number of interesting optimization
>> opportunities, often mostly for size. There are a few more that I'm aware of,
>> but where I'm less convinced that input code would really ever be written like
>> this:
>>
>> 1) Quite a few operations could be converted to plain MOV. For example
>>
>> 	{nf} xor %cl, %cl
>> 	{nf} sub %cl, %cl
>> 	{nf} and $0, %cl
>>
>> can all be replaced by the much shorter
>>
>> 	mov	$0, %cl
>>
>> 2) Certain forms of IMUL{,ZU} with a power-of-2 immediate could be
>> converted to SHL. This could be beneficial even when size doesn't shrink, for
>> SHL still having better latency/throughput.
>>
>> Thoughts?
> 
> These two ideas are so good that several people think that GCC should support these two conversions. Would you consider implementing these conversions in gcc?

Multiplication to shift conversion is already done by the compiler, afaik. As
to 1), are you suggesting the compiler may emit such code? Imo it shouldn't.
Plus, as indicated in the reply to Haochen, I view optimizations in gas as
primarily targeting hand-written code anyway. Compilers shouldn't rely on the
assembler doing further transformations.

Jan

^ permalink raw reply	[flat|nested] 22+ messages in thread

* RE: [PATCH 0/6] x86: a few more optimizations
  2024-06-17  8:37   ` Jan Beulich
@ 2024-06-17  9:12     ` Cui, Lili
  0 siblings, 0 replies; 22+ messages in thread
From: Cui, Lili @ 2024-06-17  9:12 UTC (permalink / raw)
  To: Beulich, Jan; +Cc: H.J. Lu, Binutils

> On 17.06.2024 10:09, Cui, Lili wrote:
> >> APX {nf} insn forms present a number of interesting optimization
> >> opportunities, often mostly for size. There are a few more that I'm
> >> aware of, but where I'm less convinced that input code would really
> >> ever be written like
> >> this:
> >>
> >> 1) Quite a few operations could be converted to plain MOV. For
> >> example
> >>
> >> 	{nf} xor %cl, %cl
> >> 	{nf} sub %cl, %cl
> >> 	{nf} and $0, %cl
> >>
> >> can all be replaced by the much shorter
> >>
> >> 	mov	$0, %cl
> >>
> >> 2) Certain forms of IMUL{,ZU} with a power-of-2 immediate could be
> >> converted to SHL. This could be beneficial even when size doesn't
> >> shrink, for SHL still having better latency/throughput.
> >>
> >> Thoughts?
> >
> > These two ideas are so good that several people think that GCC should
> support these two conversions. Would you consider implementing these
> conversions in gcc?
> 
> Multiplication to shift conversion is already done by the compiler, afaik. As to
> 1), are you suggesting the compiler may emit such code? Imo it shouldn't.

Perhaps, but we can still add a pattern for it.

Lili.

> Plus, as indicated in the reply to Haochen, I view optimizations in gas as
> primarily targeting hand-written code anyway. Compilers shouldn't rely on the
> assembler doing further transformations.
> 

^ permalink raw reply	[flat|nested] 22+ messages in thread

end of thread, other threads:[~2024-06-19  2:01 UTC | newest]

Thread overview: 22+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-06-14 12:10 [PATCH 0/6] x86: a few more optimizations Jan Beulich
2024-06-14 12:12 ` [PATCH 1/6] x86: optimize left-shift-by-1 Jan Beulich
2024-06-17  2:56   ` Jiang, Haochen
2024-06-17  8:40     ` Jan Beulich
2024-06-14 12:12 ` [PATCH 2/6] x86/APX: optimize {nf} forms of ADD/SUB with immediate of 0x80 Jan Beulich
2024-06-14 12:13 ` [PATCH 3/6] x86/APX: optimize {nf}-form rotate-by-width-less-1 Jan Beulich
2024-06-14 12:13 ` [PATCH 4/6] x86/APX: optimize certain {nf}-form insns to LEA Jan Beulich
2024-06-14 12:14 ` [PATCH 5/6] x86/APX: optimize certain {nf}-form insns to BMI2 ones Jan Beulich
2024-06-17  6:36   ` Jiang, Haochen
2024-06-14 12:14 ` [PATCH 6/6] x86: optimize {,V}PEXTR{D,Q} with immediate of 0 Jan Beulich
2024-06-17  6:49   ` Jiang, Haochen
2024-06-17  8:56     ` Jan Beulich
2024-06-18  3:25       ` Jiang, Haochen
2024-06-18  6:14         ` Jan Beulich
2024-06-18  6:23           ` Jiang, Haochen
2024-06-18 20:37             ` H.J. Lu
2024-06-19  2:01               ` Jiang, Haochen
2024-06-17  2:51 ` [PATCH 0/6] x86: a few more optimizations Jiang, Haochen
2024-06-17  8:33   ` Jan Beulich
2024-06-17  8:09 ` Cui, Lili
2024-06-17  8:37   ` Jan Beulich
2024-06-17  9:12     ` Cui, Lili

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