From: Alan Modra <amodra@bigpond.net.au>
To: Thorsten Glaser <tg@66h.42h.de>
Cc: gcc@gcc.gnu.org, binutils@sources.redhat.com
Subject: Re: Change i386 assembler/disassembler for SIB with INDEX==4
Date: Fri, 14 Jan 2005 00:38:00 -0000 [thread overview]
Message-ID: <20050114003751.GC3408@bubble.modra.org> (raw)
In-Reply-To: <Pine.BSO.4.61L.0501140013160.13215@odem.66h.42h.de>
On Fri, Jan 14, 2005 at 12:14:53AM +0000, Thorsten Glaser wrote:
> The intel output looks even more weird, is this a shortcoming
> in the assembler?
Yes, that's plainly a bug, since the disassembled code is specifying
ebx as an index register, not a base register. ie. In intel mode
we should be showing
0: 8b 04 23 mov eax,DWORD PTR [ebx+0*1]
3: 8b 04 63 mov eax,DWORD PTR [ebx+0*2]
6: 8b 04 a3 mov eax,DWORD PTR [ebx+0*4]
9: 8b 04 e3 mov eax,DWORD PTR [ebx+0*8]
or something like that.
> (Use -M intel, not -m i386:intel, the latter gave me 64 bit output!)
>
> tg@odem:/home/tg $ objdump -d -M intel x.o
>
> x.o: file format elf32-i386
>
> Disassembly of section .text:
>
> 00000000 <.text>:
> 0: 8b 04 23 mov eax,DWORD PTR [ebx]
> 3: 8b 04 63 mov eax,DWORD PTR [ebx*2]
> 6: 8b 04 a3 mov eax,DWORD PTR [ebx*4]
> 9: 8b 04 e3 mov eax,DWORD PTR [ebx*8]
--
Alan Modra
IBM OzLabs - Linux Technology Centre
next prev parent reply other threads:[~2005-01-14 0:38 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-01-13 19:35 H. J. Lu
2005-01-14 0:22 ` Thorsten Glaser
2005-01-14 0:38 ` Alan Modra [this message]
2005-01-13 20:33 Allan B. Cruse
2005-01-13 22:48 ` H. J. Lu
2005-01-14 0:18 ` Alan Modra
2005-01-14 0:32 ` Thorsten Glaser
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