From: Alan Modra <amodra@bigpond.net.au>
To: Jeff Baker <jbaker@qnx.com>
Cc: binutils@sourceware.org
Subject: Re: [PATCH] Handle mtsprg and mfsprg properly for BookE
Date: Thu, 10 Mar 2005 12:42:00 -0000 [thread overview]
Message-ID: <20050310124206.GC7616@bubble.modra.org> (raw)
In-Reply-To: <422F271D.7080300@qnx.com>
On Wed, Mar 09, 2005 at 11:41:01AM -0500, Jeff Baker wrote:
> Here is the patch as you suggested.
Which didn't apply due to being mangled by your editor. I've extracted
it by hand, and extended it a little. I'll apply this to mainline and,
if no problems surface, to the branch in a few days.
opcodes/
* ppc-opc.c (insert_sprg, extract_sprg): New Functions.
(powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
(SPRG_MASK): Delete.
(XSPRG_MASK): Mask off extra bits now part of sprg field.
(powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
mfsprg4..7 after msprg and consolidate.
gas/testsuite
* gas/ppc/booke.s: Add new m[t,f]sprg testcases.
* gas/ppc/booke.d: Likewise.
Index: opcodes/ppc-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/ppc-opc.c,v
retrieving revision 1.79
diff -u -p -r1.79 ppc-opc.c
--- opcodes/ppc-opc.c 7 Mar 2005 20:05:44 -0000 1.79
+++ opcodes/ppc-opc.c 10 Mar 2005 12:32:48 -0000
@@ -84,6 +84,8 @@ static unsigned long insert_sh6 (unsigne
static long extract_sh6 (unsigned long, int, int *);
static unsigned long insert_spr (unsigned long, long, int, const char **);
static long extract_spr (unsigned long, int, int *);
+static unsigned long insert_sprg (unsigned long, long, int, const char **);
+static long extract_sprg (unsigned long, int, int *);
static unsigned long insert_tbr (unsigned long, long, int, const char **);
static long extract_tbr (unsigned long, int, int *);
static unsigned long insert_ev2 (unsigned long, long, int, const char **);
@@ -465,8 +467,7 @@ const struct powerpc_operand powerpc_ope
/* The SPRG register number in an XFX form m[ft]sprg instruction. */
#define SPRG SPRBAT + 1
-#define SPRG_MASK (0x3 << 16)
- { 2, 16, NULL, NULL, 0 },
+ { 5, 16, insert_sprg, extract_sprg, 0 },
/* The SR field in an X form instruction. */
#define SR SPRG + 1
@@ -1397,6 +1398,47 @@ extract_spr (unsigned long insn,
return ((insn >> 16) & 0x1f) | ((insn >> 6) & 0x3e0);
}
+/* Some dialects have 8 SPRG registers instead of the standard 4. */
+
+static unsigned long
+insert_sprg (unsigned long insn,
+ long value,
+ int dialect,
+ const char **errmsg)
+{
+ /* This check uses PPC_OPCODE_403 because PPC405 is later defined
+ as a synonym. If ever a 405 specific dialect is added this
+ check should use that instead. */
+ if (value > 7
+ || (value > 3
+ && (dialect & (PPC_OPCODE_BOOKE | PPC_OPCODE_403)) == 0))
+ *errmsg = _("invalid sprg number");
+
+ /* If this is mfsprg4..7 then use spr 260..263 which can be read in
+ user mode. Anything else must use spr 272..279. */
+ if (value <= 3 || (insn & 0x100) != 0)
+ value |= 0x10;
+
+ return insn | ((value & 0x17) << 16);
+}
+
+static long
+extract_sprg (unsigned long insn,
+ int dialect,
+ int *invalid)
+{
+ unsigned long val = (insn >> 16) & 0x1f;
+
+ /* mfsprg can use 260..263 and 272..279. mtsprg only uses spr 272..279
+ If not BOOKE or 405, then both use only 272..275. */
+ if (val <= 3
+ || (val < 0x10 && (insn & 0x100) != 0)
+ || (val - 0x10 > 3
+ && (dialect & (PPC_OPCODE_BOOKE | PPC_OPCODE_403)) == 0))
+ *invalid = 1;
+ return val & 7;
+}
+
/* The TBR field in an XFX instruction. This is just like SPR, but it
is optional. When TBR is omitted, it must be inserted as 268 (the
magic number of the TB register). These functions treat 0
@@ -1705,7 +1747,7 @@ extract_tbr (unsigned long insn,
/* An XFX form instruction with the SPR field filled in except for the
SPRG field. */
-#define XSPRG_MASK (XSPR_MASK &~ SPRG_MASK)
+#define XSPRG_MASK (XSPR_MASK & ~(0x17 << 16))
/* An X form instruction with everything filled in except the E field. */
#define XE_MASK (0xffff7fff)
@@ -3677,25 +3719,21 @@ const struct powerpc_opcode powerpc_opco
{ "mfbar", XSPR(31,339,159), XSPR_MASK, PPC860, { RT } },
{ "mfvrsave", XSPR(31,339,256), XSPR_MASK, PPCVEC, { RT } },
{ "mfusprg0", XSPR(31,339,256), XSPR_MASK, BOOKE, { RT } },
-{ "mfsprg4", XSPR(31,339,260), XSPR_MASK, PPC405, { RT } },
-{ "mfsprg4", XSPR(31,339,260), XSPR_MASK, BOOKE, { RT } },
-{ "mfsprg5", XSPR(31,339,261), XSPR_MASK, PPC405, { RT } },
-{ "mfsprg5", XSPR(31,339,261), XSPR_MASK, BOOKE, { RT } },
-{ "mfsprg6", XSPR(31,339,262), XSPR_MASK, PPC405, { RT } },
-{ "mfsprg6", XSPR(31,339,262), XSPR_MASK, BOOKE, { RT } },
-{ "mfsprg7", XSPR(31,339,263), XSPR_MASK, PPC405, { RT } },
-{ "mfsprg7", XSPR(31,339,263), XSPR_MASK, BOOKE, { RT } },
{ "mftb", X(31,371), X_MASK, CLASSIC, { RT, TBR } },
{ "mftb", XSPR(31,339,268), XSPR_MASK, BOOKE, { RT } },
{ "mftbl", XSPR(31,371,268), XSPR_MASK, CLASSIC, { RT } },
{ "mftbl", XSPR(31,339,268), XSPR_MASK, BOOKE, { RT } },
{ "mftbu", XSPR(31,371,269), XSPR_MASK, CLASSIC, { RT } },
{ "mftbu", XSPR(31,339,269), XSPR_MASK, BOOKE, { RT } },
-{ "mfsprg", XSPR(31,339,272), XSPRG_MASK, PPC, { RT, SPRG } },
+{ "mfsprg", XSPR(31,339,256), XSPRG_MASK, PPC, { RT, SPRG } },
{ "mfsprg0", XSPR(31,339,272), XSPR_MASK, PPC, { RT } },
{ "mfsprg1", XSPR(31,339,273), XSPR_MASK, PPC, { RT } },
{ "mfsprg2", XSPR(31,339,274), XSPR_MASK, PPC, { RT } },
{ "mfsprg3", XSPR(31,339,275), XSPR_MASK, PPC, { RT } },
+{ "mfsprg4", XSPR(31,339,260), XSPR_MASK, PPC405 | BOOKE, { RT } },
+{ "mfsprg5", XSPR(31,339,261), XSPR_MASK, PPC405 | BOOKE, { RT } },
+{ "mfsprg6", XSPR(31,339,262), XSPR_MASK, PPC405 | BOOKE, { RT } },
+{ "mfsprg7", XSPR(31,339,263), XSPR_MASK, PPC405 | BOOKE, { RT } },
{ "mfasr", XSPR(31,339,280), XSPR_MASK, PPC64, { RT } },
{ "mfear", XSPR(31,339,282), XSPR_MASK, PPC, { RT } },
{ "mfpir", XSPR(31,339,286), XSPR_MASK, BOOKE, { RT } },
@@ -3998,7 +4036,7 @@ const struct powerpc_opcode powerpc_opco
{ "mtbar", XSPR(31,467,159), XSPR_MASK, PPC860, { RS } },
{ "mtvrsave", XSPR(31,467,256), XSPR_MASK, PPCVEC, { RS } },
{ "mtusprg0", XSPR(31,467,256), XSPR_MASK, BOOKE, { RS } },
-{ "mtsprg", XSPR(31,467,272), XSPRG_MASK,PPC, { SPRG, RS } },
+{ "mtsprg", XSPR(31,467,256), XSPRG_MASK,PPC, { SPRG, RS } },
{ "mtsprg0", XSPR(31,467,272), XSPR_MASK, PPC, { RS } },
{ "mtsprg1", XSPR(31,467,273), XSPR_MASK, PPC, { RS } },
{ "mtsprg2", XSPR(31,467,274), XSPR_MASK, PPC, { RS } },
Index: gas/testsuite/gas/ppc/booke.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/ppc/booke.d,v
retrieving revision 1.9
diff -u -p -r1.9 booke.d
--- gas/testsuite/gas/ppc/booke.d 2 Mar 2005 13:25:01 -0000 1.9
+++ gas/testsuite/gas/ppc/booke.d 10 Mar 2005 11:33:56 -0000
@@ -142,3 +142,11 @@ Disassembly of section \.text:
1c0: 7c 00 06 ac mbar
1c4: 7c 00 06 ac mbar
1c8: 7c 20 06 ac mbar 1
+ 1cc: 7c 12 42 a6 mfsprg r0,2
+ 1d0: 7c 12 42 a6 mfsprg r0,2
+ 1d4: 7c 12 43 a6 mtsprg 2,r0
+ 1d8: 7c 12 43 a6 mtsprg 2,r0
+ 1dc: 7c 07 42 a6 mfsprg r0,7
+ 1e0: 7c 07 42 a6 mfsprg r0,7
+ 1e4: 7c 17 43 a6 mtsprg 7,r0
+ 1e8: 7c 17 43 a6 mtsprg 7,r0
Index: gas/testsuite/gas/ppc/booke.s
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/ppc/booke.s,v
retrieving revision 1.3
diff -u -p -r1.3 booke.s
--- gas/testsuite/gas/ppc/booke.s 10 Dec 2003 22:12:50 -0000 1.3
+++ gas/testsuite/gas/ppc/booke.s 10 Mar 2005 11:33:56 -0000
@@ -134,3 +134,12 @@ branch_target_8:
mbar
mbar 0
mbar 1
+
+ mfsprg 0, 2
+ mfsprg2 0
+ mtsprg 2, 0
+ mtsprg2 0
+ mfsprg 0, 7
+ mfsprg7 0
+ mtsprg 7, 0
+ mtsprg7 0
--
Alan Modra
IBM OzLabs - Linux Technology Centre
next prev parent reply other threads:[~2005-03-10 12:42 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-02-28 20:20 Jeff Baker
2005-02-28 21:11 ` Jeff Baker
2005-02-28 21:26 ` Kumar Gala
2005-02-28 22:52 ` Jeff Baker
2005-02-28 23:09 ` Jeff Baker
2005-03-07 15:22 ` Jeff Baker
2005-03-08 11:20 ` Alan Modra
2005-03-08 16:30 ` Jeff Baker
2005-03-08 23:51 ` Alan Modra
2005-03-09 1:18 ` Jeff Baker
2005-03-09 2:11 ` Alan Modra
2005-03-09 16:39 ` Jeff Baker
2005-03-10 12:42 ` Alan Modra [this message]
2005-03-09 22:30 ` Kumar Gala
2005-03-10 3:58 ` Alan Modra
[not found] ` <ad80a57d7a545e4541f6fbaa2178ad4c@leftfield.org>
2005-03-14 4:14 ` Alan Modra
2005-03-16 16:39 ` Jeff Baker
2005-03-17 15:36 ` Alan Modra
-- strict thread matches above, loose matches on Subject: below --
2005-02-24 0:32 Jeff Baker
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