Patches for review [Plt entry generation for coldfire v4e]

Patches for review [Plt entry generation for coldfire v4e]

[C Jaiprakash]

[-- Attachment #1: Type: text/plain, Size: 442 bytes --]

Hi,
  I am sorry for the disclaimer attached with my previous mail.. I am
resending the patches from other mail id.

Regards,
C Jaiprakash

=========
Hi,
  I am attaching patches for generating plt entris for coldfire v4e.
Since coldifire v4e do not support 32 bit displacement addressing mode
existing PLT entries will not work. Please review the patches and let
me know if any changes are required.
 

Thanks and best regards,
C Jaiprakash

[-- Attachment #2: tc-m68k.c.patch --]
[-- Type: text/plain, Size: 682 bytes --]

Index: tc-m68k.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-m68k.c,v
retrieving revision 1.62
diff -u -p -r1.62 tc-m68k.c
--- tc-m68k.c	1 Mar 2005 01:57:39 -0000	1.62
+++ tc-m68k.c	16 Mar 2005 06:40:31 -0000
@@ -7447,6 +7447,8 @@ void
 m68k_elf_final_processing (void)
 {
   /* Set file-specific flags if this is a cpu32 processor.  */
+  if ( arch_coldfire_fpu(current_architecture)  )
+    elf_elfheader (stdoutput)->e_flags |= EF_CFV4E;
   if (cpu_of_arch (current_architecture) & cpu32)
     elf_elfheader (stdoutput)->e_flags |= EF_CPU32;
   else if ((cpu_of_arch (current_architecture) & m68000up)

[-- Attachment #3: m68k.h.patch --]
[-- Type: text/plain, Size: 423 bytes --]

Index: m68k.h
===================================================================
RCS file: /cvs/src/src/include/elf/m68k.h,v
retrieving revision 1.8
diff -u -p -r1.8 m68k.h
--- m68k.h	3 Mar 2005 11:58:06 -0000	1.8
+++ m68k.h	16 Mar 2005 06:39:16 -0000
@@ -54,5 +54,6 @@ END_RELOC_NUMBERS (R_68K_max)
 
 #define EF_CPU32    0x00810000
 #define EF_M68000   0x01000000
+#define EF_CFV4E    0x00008000
 
 #endif

[-- Attachment #4: gasChangeLog.patch --]
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Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/ChangeLog,v
retrieving revision 1.2420
diff -u -p -r1.2420 ChangeLog
--- ChangeLog	15 Mar 2005 20:37:58 -0000	1.2420
+++ ChangeLog	16 Mar 2005 06:54:10 -0000
@@ -1,3 +1,7 @@
+2005-03-15  C Jaiprakash <cjaiprakash@noida.hcltech.com>
+	* config/tc-m68k.c (m68k_elf_final_processing): Set file specific flag
+	for coldfire v4e. 
+
 2005-03-15  Zack Weinberg  <zack@codesourcery.com>
 
 	* config/tc-arm.c (do_mla): Rename to do_mlas, take second

[-- Attachment #5: elfChangeLog.patch --]
[-- Type: text/plain, Size: 500 bytes --]

Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/include/elf/ChangeLog,v
retrieving revision 1.226
diff -u -p -r1.226 ChangeLog
--- ChangeLog	2 Mar 2005 21:21:50 -0000	1.226
+++ ChangeLog	16 Mar 2005 06:55:20 -0000
@@ -1,3 +1,6 @@
+2005-03-02  C Jaipraash <cjaiprakash@noida.hcltech.com>
+	* m68k.h: Define EF_CFV4E flag.
+
 2005-03-02  Daniel Jacobowitz  <dan@codesourcery.com>
 	    Joseph Myers  <joseph@codesourcery.com>
 

[-- Attachment #6: elf32-m68k.c.patch --]
[-- Type: text/plain, Size: 6118 bytes --]

Index: elf32-m68k.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-m68k.c,v
retrieving revision 1.73
diff -u -p -r1.73 elf32-m68k.c
--- elf32-m68k.c	20 Feb 2005 14:59:06 -0000	1.73
+++ elf32-m68k.c	16 Mar 2005 06:39:49 -0000
@@ -191,6 +191,37 @@ reloc_type_lookup (abfd, code)
 
 /* The size in bytes of an entry in the procedure linkage table.  */
 
+#define CFV4E_PLT_ENTRY_SIZE 24 
+
+#define CFV4E_FLAG(abfd)  (elf_elfheader (abfd)->e_flags & EF_CFV4E)
+
+static const bfd_byte elf_cfv4e_plt0_entry[CFV4E_PLT_ENTRY_SIZE] =
+{
+  0x20, 0x3c,
+  0, 0, 0, 0,             /* replaced with offset to .got + 4.  */
+  0x2f, 0x3b, 0x08, 0xfa, /* move.l (%pc,addr),-(%sp) */
+  0x20, 0x3c,
+  0, 0, 0, 0,             /* replaced with offset to .got + 8.  */
+  0x20, 0x7b, 0x08, 0x00, /* move.l (%pc,%d0:l), %a0 */
+  0x4e, 0xd0,             /* jmp (%a0) */
+  0x4e, 0x71		  /* nop */
+};
+
+/* Subsequent entries in a procedure linkage table look like this.  */
+
+static const bfd_byte elf_cfv4e_plt_entry[CFV4E_PLT_ENTRY_SIZE] =
+{
+  0x20, 0x3c,
+  0, 0, 0, 0,             /* replaced with offset to symbol's .got entry.  */
+  0x20, 0x7b, 0x08, 0x00, /* move.l (%pc,%d0:l), %a0 */
+  0x4e, 0xd0,             /* jmp (%a0) */
+  0x2f, 0x3c,             /* move.l #offset,-(%sp) */
+  0, 0, 0, 0,             /* replaced with offset into relocation table.  */
+  0x60, 0xff,             /* bra.l .plt */
+  0, 0, 0, 0              /* replaced with offset to start of .plt.  */
+};
+
+
 #define PLT_ENTRY_SIZE 20
 
 /* The first entry in a procedure linkage table looks like this.  See
@@ -977,6 +1008,8 @@ elf_m68k_adjust_dynamic_symbol (info, h)
 	{
 	  if (CPU32_FLAG (dynobj))
 	    s->size += PLT_CPU32_ENTRY_SIZE;
+	  else if( CFV4E_FLAG(dynobj) )
+	    s->_raw_size += CFV4E_PLT_ENTRY_SIZE;
 	  else
 	    s->size += PLT_ENTRY_SIZE;
 	}
@@ -998,6 +1031,8 @@ elf_m68k_adjust_dynamic_symbol (info, h)
       /* Make room for this entry.  */
       if (CPU32_FLAG (dynobj))
         s->size += PLT_CPU32_ENTRY_SIZE;
+      else if( CFV4E_FLAG(dynobj) )
+        s->_raw_size += CFV4E_PLT_ENTRY_SIZE;
       else
         s->size += PLT_ENTRY_SIZE;
 
@@ -1789,6 +1824,8 @@ elf_m68k_finish_dynamic_symbol (output_b
 	 first entry in the procedure linkage table is reserved.  */
       if ( CPU32_FLAG (output_bfd))
         plt_index = h->plt.offset / PLT_CPU32_ENTRY_SIZE - 1;
+      else if ( CFV4E_FLAG(output_bfd))
+        plt_index = h->plt.offset / CFV4E_PLT_ENTRY_SIZE - 1;
       else
         plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
 
@@ -1806,6 +1843,15 @@ elf_m68k_finish_dynamic_symbol (output_b
           plt_off2 = 12;
           plt_off3 = 18;
         }
+      else if (CFV4E_FLAG (output_bfd))
+        {
+          memcpy (splt->contents + h->plt.offset, elf_cfv4e_plt_entry,
+	          CFV4E_PLT_ENTRY_SIZE);
+          plt_off1 = 2;
+          plt_off2 = 14;
+          plt_off3 = 20;
+
+	}
       else
         {
           /* Fill in the entry in the procedure linkage table.  */
@@ -1816,26 +1862,48 @@ elf_m68k_finish_dynamic_symbol (output_b
           plt_off3 = 16;
         }
 
-      /* The offset is relative to the first extension word.  */
-      bfd_put_32 (output_bfd,
+      if ( !CFV4E_FLAG (output_bfd))
+        {
+          /* The offset is relative to the first extension word.  */
+          bfd_put_32 (output_bfd,
 		  (sgot->output_section->vma
 		   + sgot->output_offset
 		   + got_offset
 		   - (splt->output_section->vma
 		      + h->plt.offset + 2)),
 		  splt->contents + h->plt.offset + plt_off1);
-
+        }
+      else
+        {
+          bfd_put_32 (output_bfd,
+		  (sgot->output_section->vma
+		   + sgot->output_offset
+		   + got_offset
+		   - (splt->output_section->vma
+		      + h->plt.offset + 2) - 6),
+		  splt->contents + h->plt.offset + plt_off1);
+	  
+        }      
       bfd_put_32 (output_bfd, plt_index * sizeof (Elf32_External_Rela),
 		  splt->contents + h->plt.offset + plt_off2);
       bfd_put_32 (output_bfd, - (h->plt.offset + plt_off3),
 		  splt->contents + h->plt.offset + plt_off3);
-
-      /* Fill in the entry in the global offset table.  */
-      bfd_put_32 (output_bfd,
+      if ( !CFV4E_FLAG (output_bfd))
+        {
+           /* Fill in the entry in the global offset table.  */
+           bfd_put_32 (output_bfd,
+		       (splt->output_section->vma
+		        + splt->output_offset
+		        + h->plt.offset
+		        + 8),
+		       sgot->contents + got_offset);
+        }
+      else
+        bfd_put_32 (output_bfd,
 		  (splt->output_section->vma
 		   + splt->output_offset
 		   + h->plt.offset
-		   + 8),
+		   + 12),
 		  sgot->contents + got_offset);
 
       /* Fill in the entry in the .rela.plt section.  */
@@ -2013,7 +2081,24 @@ elf_m68k_finish_dynamic_sections (output
       /* Fill in the first entry in the procedure linkage table.  */
       if (splt->size > 0)
 	{
-          if (!CPU32_FLAG (output_bfd))
+
+	  if ( CFV4E_FLAG (output_bfd))
+            {
+	      memcpy (splt->contents, elf_cfv4e_plt0_entry, CFV4E_PLT_ENTRY_SIZE);
+              bfd_put_32 (output_bfd,
+                          (sgot->output_section->vma
+                           + sgot->output_offset + 4
+                           - (splt->output_section->vma + 2)),
+                          splt->contents + 2);
+              bfd_put_32 (output_bfd,
+                          (sgot->output_section->vma
+                           + sgot->output_offset + 8
+                           - (splt->output_section->vma + 10) - 8 ),
+                          splt->contents + 12);
+              elf_section_data (splt->output_section)->this_hdr.sh_entsize
+               = CFV4E_PLT_ENTRY_SIZE;
+            }
+          else if (!CPU32_FLAG (output_bfd))
             {
 	      memcpy (splt->contents, elf_m68k_plt0_entry, PLT_ENTRY_SIZE);
 	      bfd_put_32 (output_bfd,

[-- Attachment #7: ChangeLog.patch --]
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Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/bfd/ChangeLog,v
retrieving revision 1.2962
diff -u -p -r1.2962 ChangeLog
--- ChangeLog	16 Mar 2005 02:41:24 -0000	1.2962
+++ ChangeLog	16 Mar 2005 06:53:39 -0000
@@ -1,3 +1,8 @@
+2005-03-16  C Jaiprakash <cjaiprakash@noida.hcltech.com>
+	* elf32-m68k.c (elf_cfv4e_plt0_entry): plt entry for coldfire v4e. 
+	(elf_m68k_adjust_dynamic_symbol,elf_m68k_finish_dynamic_symbol,
+	 elf_m68k_finish_dynamic_sections): use it
+
 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 
 	* elf32-ppc.c (ppc_elf_create_linker_section): Set SEC_LINKER_CREATED

Patches for review [Plt entry generation for coldfire v4e]

[C Jaiprakash]

[-- Attachment #1: Type: text/plain, Size: 442 bytes --]

Hi,
  I am sorry for the disclaimer attached with my previous mail.. I am
resending the patches from other mail id.

Regards,
C Jaiprakash

=========
Hi,
  I am attaching patches for generating plt entris for coldfire v4e.
Since coldifire v4e do not support 32 bit displacement addressing mode
existing PLT entries will not work. Please review the patches and let
me know if any changes are required.
 

Thanks and best regards,
C Jaiprakash

[-- Attachment #2: tc-m68k.c.patch --]
[-- Type: text/plain, Size: 682 bytes --]

Index: tc-m68k.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-m68k.c,v
retrieving revision 1.62
diff -u -p -r1.62 tc-m68k.c
--- tc-m68k.c	1 Mar 2005 01:57:39 -0000	1.62
+++ tc-m68k.c	16 Mar 2005 06:40:31 -0000
@@ -7447,6 +7447,8 @@ void
 m68k_elf_final_processing (void)
 {
   /* Set file-specific flags if this is a cpu32 processor.  */
+  if ( arch_coldfire_fpu(current_architecture)  )
+    elf_elfheader (stdoutput)->e_flags |= EF_CFV4E;
   if (cpu_of_arch (current_architecture) & cpu32)
     elf_elfheader (stdoutput)->e_flags |= EF_CPU32;
   else if ((cpu_of_arch (current_architecture) & m68000up)

[-- Attachment #3: m68k.h.patch --]
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Index: m68k.h
===================================================================
RCS file: /cvs/src/src/include/elf/m68k.h,v
retrieving revision 1.8
diff -u -p -r1.8 m68k.h
--- m68k.h	3 Mar 2005 11:58:06 -0000	1.8
+++ m68k.h	16 Mar 2005 06:39:16 -0000
@@ -54,5 +54,6 @@ END_RELOC_NUMBERS (R_68K_max)
 
 #define EF_CPU32    0x00810000
 #define EF_M68000   0x01000000
+#define EF_CFV4E    0x00008000
 
 #endif

[-- Attachment #4: gasChangeLog.patch --]
[-- Type: text/plain, Size: 570 bytes --]

Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/ChangeLog,v
retrieving revision 1.2420
diff -u -p -r1.2420 ChangeLog
--- ChangeLog	15 Mar 2005 20:37:58 -0000	1.2420
+++ ChangeLog	16 Mar 2005 06:54:10 -0000
@@ -1,3 +1,7 @@
+2005-03-15  C Jaiprakash <cjaiprakash@noida.hcltech.com>
+	* config/tc-m68k.c (m68k_elf_final_processing): Set file specific flag
+	for coldfire v4e. 
+
 2005-03-15  Zack Weinberg  <zack@codesourcery.com>
 
 	* config/tc-arm.c (do_mla): Rename to do_mlas, take second

[-- Attachment #5: elfChangeLog.patch --]
[-- Type: text/plain, Size: 500 bytes --]

Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/include/elf/ChangeLog,v
retrieving revision 1.226
diff -u -p -r1.226 ChangeLog
--- ChangeLog	2 Mar 2005 21:21:50 -0000	1.226
+++ ChangeLog	16 Mar 2005 06:55:20 -0000
@@ -1,3 +1,6 @@
+2005-03-02  C Jaipraash <cjaiprakash@noida.hcltech.com>
+	* m68k.h: Define EF_CFV4E flag.
+
 2005-03-02  Daniel Jacobowitz  <dan@codesourcery.com>
 	    Joseph Myers  <joseph@codesourcery.com>
 

[-- Attachment #6: elf32-m68k.c.patch --]
[-- Type: text/plain, Size: 6118 bytes --]

Index: elf32-m68k.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-m68k.c,v
retrieving revision 1.73
diff -u -p -r1.73 elf32-m68k.c
--- elf32-m68k.c	20 Feb 2005 14:59:06 -0000	1.73
+++ elf32-m68k.c	16 Mar 2005 06:39:49 -0000
@@ -191,6 +191,37 @@ reloc_type_lookup (abfd, code)
 
 /* The size in bytes of an entry in the procedure linkage table.  */
 
+#define CFV4E_PLT_ENTRY_SIZE 24 
+
+#define CFV4E_FLAG(abfd)  (elf_elfheader (abfd)->e_flags & EF_CFV4E)
+
+static const bfd_byte elf_cfv4e_plt0_entry[CFV4E_PLT_ENTRY_SIZE] =
+{
+  0x20, 0x3c,
+  0, 0, 0, 0,             /* replaced with offset to .got + 4.  */
+  0x2f, 0x3b, 0x08, 0xfa, /* move.l (%pc,addr),-(%sp) */
+  0x20, 0x3c,
+  0, 0, 0, 0,             /* replaced with offset to .got + 8.  */
+  0x20, 0x7b, 0x08, 0x00, /* move.l (%pc,%d0:l), %a0 */
+  0x4e, 0xd0,             /* jmp (%a0) */
+  0x4e, 0x71		  /* nop */
+};
+
+/* Subsequent entries in a procedure linkage table look like this.  */
+
+static const bfd_byte elf_cfv4e_plt_entry[CFV4E_PLT_ENTRY_SIZE] =
+{
+  0x20, 0x3c,
+  0, 0, 0, 0,             /* replaced with offset to symbol's .got entry.  */
+  0x20, 0x7b, 0x08, 0x00, /* move.l (%pc,%d0:l), %a0 */
+  0x4e, 0xd0,             /* jmp (%a0) */
+  0x2f, 0x3c,             /* move.l #offset,-(%sp) */
+  0, 0, 0, 0,             /* replaced with offset into relocation table.  */
+  0x60, 0xff,             /* bra.l .plt */
+  0, 0, 0, 0              /* replaced with offset to start of .plt.  */
+};
+
+
 #define PLT_ENTRY_SIZE 20
 
 /* The first entry in a procedure linkage table looks like this.  See
@@ -977,6 +1008,8 @@ elf_m68k_adjust_dynamic_symbol (info, h)
 	{
 	  if (CPU32_FLAG (dynobj))
 	    s->size += PLT_CPU32_ENTRY_SIZE;
+	  else if( CFV4E_FLAG(dynobj) )
+	    s->_raw_size += CFV4E_PLT_ENTRY_SIZE;
 	  else
 	    s->size += PLT_ENTRY_SIZE;
 	}
@@ -998,6 +1031,8 @@ elf_m68k_adjust_dynamic_symbol (info, h)
       /* Make room for this entry.  */
       if (CPU32_FLAG (dynobj))
         s->size += PLT_CPU32_ENTRY_SIZE;
+      else if( CFV4E_FLAG(dynobj) )
+        s->_raw_size += CFV4E_PLT_ENTRY_SIZE;
       else
         s->size += PLT_ENTRY_SIZE;
 
@@ -1789,6 +1824,8 @@ elf_m68k_finish_dynamic_symbol (output_b
 	 first entry in the procedure linkage table is reserved.  */
       if ( CPU32_FLAG (output_bfd))
         plt_index = h->plt.offset / PLT_CPU32_ENTRY_SIZE - 1;
+      else if ( CFV4E_FLAG(output_bfd))
+        plt_index = h->plt.offset / CFV4E_PLT_ENTRY_SIZE - 1;
       else
         plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
 
@@ -1806,6 +1843,15 @@ elf_m68k_finish_dynamic_symbol (output_b
           plt_off2 = 12;
           plt_off3 = 18;
         }
+      else if (CFV4E_FLAG (output_bfd))
+        {
+          memcpy (splt->contents + h->plt.offset, elf_cfv4e_plt_entry,
+	          CFV4E_PLT_ENTRY_SIZE);
+          plt_off1 = 2;
+          plt_off2 = 14;
+          plt_off3 = 20;
+
+	}
       else
         {
           /* Fill in the entry in the procedure linkage table.  */
@@ -1816,26 +1862,48 @@ elf_m68k_finish_dynamic_symbol (output_b
           plt_off3 = 16;
         }
 
-      /* The offset is relative to the first extension word.  */
-      bfd_put_32 (output_bfd,
+      if ( !CFV4E_FLAG (output_bfd))
+        {
+          /* The offset is relative to the first extension word.  */
+          bfd_put_32 (output_bfd,
 		  (sgot->output_section->vma
 		   + sgot->output_offset
 		   + got_offset
 		   - (splt->output_section->vma
 		      + h->plt.offset + 2)),
 		  splt->contents + h->plt.offset + plt_off1);
-
+        }
+      else
+        {
+          bfd_put_32 (output_bfd,
+		  (sgot->output_section->vma
+		   + sgot->output_offset
+		   + got_offset
+		   - (splt->output_section->vma
+		      + h->plt.offset + 2) - 6),
+		  splt->contents + h->plt.offset + plt_off1);
+	  
+        }      
       bfd_put_32 (output_bfd, plt_index * sizeof (Elf32_External_Rela),
 		  splt->contents + h->plt.offset + plt_off2);
       bfd_put_32 (output_bfd, - (h->plt.offset + plt_off3),
 		  splt->contents + h->plt.offset + plt_off3);
-
-      /* Fill in the entry in the global offset table.  */
-      bfd_put_32 (output_bfd,
+      if ( !CFV4E_FLAG (output_bfd))
+        {
+           /* Fill in the entry in the global offset table.  */
+           bfd_put_32 (output_bfd,
+		       (splt->output_section->vma
+		        + splt->output_offset
+		        + h->plt.offset
+		        + 8),
+		       sgot->contents + got_offset);
+        }
+      else
+        bfd_put_32 (output_bfd,
 		  (splt->output_section->vma
 		   + splt->output_offset
 		   + h->plt.offset
-		   + 8),
+		   + 12),
 		  sgot->contents + got_offset);
 
       /* Fill in the entry in the .rela.plt section.  */
@@ -2013,7 +2081,24 @@ elf_m68k_finish_dynamic_sections (output
       /* Fill in the first entry in the procedure linkage table.  */
       if (splt->size > 0)
 	{
-          if (!CPU32_FLAG (output_bfd))
+
+	  if ( CFV4E_FLAG (output_bfd))
+            {
+	      memcpy (splt->contents, elf_cfv4e_plt0_entry, CFV4E_PLT_ENTRY_SIZE);
+              bfd_put_32 (output_bfd,
+                          (sgot->output_section->vma
+                           + sgot->output_offset + 4
+                           - (splt->output_section->vma + 2)),
+                          splt->contents + 2);
+              bfd_put_32 (output_bfd,
+                          (sgot->output_section->vma
+                           + sgot->output_offset + 8
+                           - (splt->output_section->vma + 10) - 8 ),
+                          splt->contents + 12);
+              elf_section_data (splt->output_section)->this_hdr.sh_entsize
+               = CFV4E_PLT_ENTRY_SIZE;
+            }
+          else if (!CPU32_FLAG (output_bfd))
             {
 	      memcpy (splt->contents, elf_m68k_plt0_entry, PLT_ENTRY_SIZE);
 	      bfd_put_32 (output_bfd,

[-- Attachment #7: ChangeLog.patch --]
[-- Type: text/plain, Size: 666 bytes --]

Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/bfd/ChangeLog,v
retrieving revision 1.2962
diff -u -p -r1.2962 ChangeLog
--- ChangeLog	16 Mar 2005 02:41:24 -0000	1.2962
+++ ChangeLog	16 Mar 2005 06:53:39 -0000
@@ -1,3 +1,8 @@
+2005-03-16  C Jaiprakash <cjaiprakash@noida.hcltech.com>
+	* elf32-m68k.c (elf_cfv4e_plt0_entry): plt entry for coldfire v4e. 
+	(elf_m68k_adjust_dynamic_symbol,elf_m68k_finish_dynamic_symbol,
+	 elf_m68k_finish_dynamic_sections): use it
+
 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 
 	* elf32-ppc.c (ppc_elf_create_linker_section): Set SEC_LINKER_CREATED

Re: Patches for review [Plt entry generation for coldfire v4e]

[Nick Clifton]

Hi C Jaiprakash,

>   I am sorry for the disclaimer attached with my previous mail.. I am
> resending the patches from other mail id.

Thank you.

Your patches are fine.  There were a few minor formatting problems, but 
I have taken care of these and then applied them.

Cheers
   Nick

include/elf/ChangeLog
2005-03-18  C Jaipraash  <cjaiprakash@noida.hcltech.com>

	* m68k.h (EF_CFV4E): Define.

bfd/ChangeLog
2005-03-18  C Jaiprakash  <cjaiprakash@noida.hcltech.com>

	* elf32-m68k.c (elf_cfv4e_plt0_entry): plt entry for coldfire v4e.
	(elf_m68k_adjust_dynamic_symbol,elf_m68k_finish_dynamic_symbol,
	 elf_m68k_finish_dynamic_sections): Use it.

gas/ChangeLog
2005-03-18  C Jaiprakash  <cjaiprakash@noida.hcltech.com>

	* config/tc-m68k.c (m68k_elf_final_processing): Set file specific
	flag for coldfire v4e.

Re: Patches for review [Plt entry generation for coldfire v4e]

[Nick Clifton]

Hi C Jaiprakash,

>   I am sorry for the disclaimer attached with my previous mail.. I am
> resending the patches from other mail id.

Thank you.

Your patches are fine.  There were a few minor formatting problems, but 
I have taken care of these and then applied them.

Cheers
   Nick

include/elf/ChangeLog
2005-03-18  C Jaipraash  <cjaiprakash@noida.hcltech.com>

	* m68k.h (EF_CFV4E): Define.

bfd/ChangeLog
2005-03-18  C Jaiprakash  <cjaiprakash@noida.hcltech.com>

	* elf32-m68k.c (elf_cfv4e_plt0_entry): plt entry for coldfire v4e.
	(elf_m68k_adjust_dynamic_symbol,elf_m68k_finish_dynamic_symbol,
	 elf_m68k_finish_dynamic_sections): Use it.

gas/ChangeLog
2005-03-18  C Jaiprakash  <cjaiprakash@noida.hcltech.com>

	* config/tc-m68k.c (m68k_elf_final_processing): Set file specific
	flag for coldfire v4e.

Re: Patches for review [Plt entry generation for coldfire v4e]

[Zack Weinberg]

"C Jaiprakash, Noida" <cjaiprakash@hcltech.com> writes:

> Hi,
>  I am sorry for that. I am resending the patches using another mail id
> c.jaiprakash@gmail.com

We appreciate that.  Note that binutils@sources.redhat.com and
binutils@sourceware.org are the same list, so you need not cc: them
both; also, please don't cc: me, as I am not the person who will
review this patch.

zw

Re: Patches for review [Plt entry generation for coldfire v4e]

[Zack Weinberg]

"C Jaiprakash, Noida" <cjaiprakash@hcltech.com> writes:

> Hi,
>  I am sorry for that. I am resending the patches using another mail id
> c.jaiprakash@gmail.com

We appreciate that.  Note that binutils@sources.redhat.com and
binutils@sourceware.org are the same list, so you need not cc: them
both; also, please don't cc: me, as I am not the person who will
review this patch.

zw

RE: Patches for review [Plt entry generation for coldfire v4e]

[C Jaiprakash, Noida]

Hi,
 I am sorry for that. I am resending the patches using another mail id
c.jaiprakash@gmail.com

Thanks and best regards, 
C Jaiprakash 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 
Contributing to the World by creating indispensable value ! 

System Software CoE @ HCLT-Noida 
http://www.hcltechnologies.com 
Ph. : +91-120-2510701/702 Ext : 3170 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 

 

> -----Original Message-----
> From: Zack Weinberg [mailto:zack@codesourcery.com] 
> Sent: Wednesday, March 16, 2005 12:55 PM
> To: C Jaiprakash, Noida
> Cc: binutils@sources.redhat.com; binutils@sourceware.org; 
> cjaiprakash@noida.hcltech.com
> Subject: Re: Patches for review [Plt entry generation for 
> coldfire v4e]
> 
> "C Jaiprakash, Noida" <cjaiprakash@hcltech.com> writes:
> 
> > This message and any attachment(s) contained here are 
> information that 
> > is confidential,proprietary to HCL Technologies and its customers, 
> > privileged or otherwise protected by law.The information is solely 
> > intended for the individual or the entity it is addressed 
> to. If you 
> > are not the intended recipient of this message, you are not 
> authorized 
> > to read, forward, print,retain, copy or disseminate this message or 
> > any part of it. If you have received this e-mail in error, please 
> > notify the sender immediately by return e-mail and delete 
> it from your computer.
> 
> We cannot even look at your patch as long as you have this 
> legalese attached to it.
> 
> zw
> 


Disclaimer: 

This message and any attachment(s) contained here are information that is
confidential,proprietary to HCL Technologies and its customers, privileged
or otherwise protected by law.The information is solely intended for the
individual or the entity it is addressed to. If you are not the intended
recipient of this message, you are not authorized to read, forward,
print,retain, copy or disseminate this message or any part of it. If you
have received this e-mail in error, please notify the sender immediately by
return e-mail and delete it from your computer.

RE: Patches for review [Plt entry generation for coldfire v4e]

[C Jaiprakash, Noida]

Hi,
 I am sorry for that. I am resending the patches using another mail id
c.jaiprakash@gmail.com

Thanks and best regards, 
C Jaiprakash 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 
Contributing to the World by creating indispensable value ! 

System Software CoE @ HCLT-Noida 
http://www.hcltechnologies.com 
Ph. : +91-120-2510701/702 Ext : 3170 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 

 

> -----Original Message-----
> From: Zack Weinberg [mailto:zack@codesourcery.com] 
> Sent: Wednesday, March 16, 2005 12:55 PM
> To: C Jaiprakash, Noida
> Cc: binutils@sources.redhat.com; binutils@sourceware.org; 
> cjaiprakash@noida.hcltech.com
> Subject: Re: Patches for review [Plt entry generation for 
> coldfire v4e]
> 
> "C Jaiprakash, Noida" <cjaiprakash@hcltech.com> writes:
> 
> > This message and any attachment(s) contained here are 
> information that 
> > is confidential,proprietary to HCL Technologies and its customers, 
> > privileged or otherwise protected by law.The information is solely 
> > intended for the individual or the entity it is addressed 
> to. If you 
> > are not the intended recipient of this message, you are not 
> authorized 
> > to read, forward, print,retain, copy or disseminate this message or 
> > any part of it. If you have received this e-mail in error, please 
> > notify the sender immediately by return e-mail and delete 
> it from your computer.
> 
> We cannot even look at your patch as long as you have this 
> legalese attached to it.
> 
> zw
> 


Disclaimer: 

This message and any attachment(s) contained here are information that is
confidential,proprietary to HCL Technologies and its customers, privileged
or otherwise protected by law.The information is solely intended for the
individual or the entity it is addressed to. If you are not the intended
recipient of this message, you are not authorized to read, forward,
print,retain, copy or disseminate this message or any part of it. If you
have received this e-mail in error, please notify the sender immediately by
return e-mail and delete it from your computer.

Re: Patches for review [Plt entry generation for coldfire v4e]

[Zack Weinberg]

"C Jaiprakash, Noida" <cjaiprakash@hcltech.com> writes:

> This message and any attachment(s) contained here are information that is
> confidential,proprietary to HCL Technologies and its customers, privileged
> or otherwise protected by law.The information is solely intended for the
> individual or the entity it is addressed to. If you are not the intended
> recipient of this message, you are not authorized to read, forward,
> print,retain, copy or disseminate this message or any part of it. If you
> have received this e-mail in error, please notify the sender immediately by
> return e-mail and delete it from your computer.

We cannot even look at your patch as long as you have this legalese
attached to it.

zw

Re: Patches for review [Plt entry generation for coldfire v4e]

[Zack Weinberg]

"C Jaiprakash, Noida" <cjaiprakash@hcltech.com> writes:

> This message and any attachment(s) contained here are information that is
> confidential,proprietary to HCL Technologies and its customers, privileged
> or otherwise protected by law.The information is solely intended for the
> individual or the entity it is addressed to. If you are not the intended
> recipient of this message, you are not authorized to read, forward,
> print,retain, copy or disseminate this message or any part of it. If you
> have received this e-mail in error, please notify the sender immediately by
> return e-mail and delete it from your computer.

We cannot even look at your patch as long as you have this legalese
attached to it.

zw

Patches for review [Plt entry generation for coldfire v4e]

[C Jaiprakash, Noida]

[-- Attachment #1: Type: text/plain, Size: 1175 bytes --]

Hi,
  I am attaching patches for generating plt entris for coldfire v4e. Since
coldifire v4e do not support 32 bit displacement addressing mode existing
PLT entries will not work. Please review the patches and let me know if any
changes are required.
 

Thanks and best regards, 
C Jaiprakash 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 
Contributing to the World by creating indispensable value ! 

System Software CoE @ HCLT-Noida 
http://www.hcltechnologies.com 
Ph. : +91-120-2510701/702 Ext : 3170 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 



Disclaimer: 

This message and any attachment(s) contained here are information that is
confidential,proprietary to HCL Technologies and its customers, privileged
or otherwise protected by law.The information is solely intended for the
individual or the entity it is addressed to. If you are not the intended
recipient of this message, you are not authorized to read, forward,
print,retain, copy or disseminate this message or any part of it. If you
have received this e-mail in error, please notify the sender immediately by
return e-mail and delete it from your computer.


            


[-- Attachment #2: tc-m68k.c.patch --]
[-- Type: application/octet-stream, Size: 682 bytes --]

Index: tc-m68k.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-m68k.c,v
retrieving revision 1.62
diff -u -p -r1.62 tc-m68k.c
--- tc-m68k.c	1 Mar 2005 01:57:39 -0000	1.62
+++ tc-m68k.c	16 Mar 2005 06:40:31 -0000
@@ -7447,6 +7447,8 @@ void
 m68k_elf_final_processing (void)
 {
   /* Set file-specific flags if this is a cpu32 processor.  */
+  if ( arch_coldfire_fpu(current_architecture)  )
+    elf_elfheader (stdoutput)->e_flags |= EF_CFV4E;
   if (cpu_of_arch (current_architecture) & cpu32)
     elf_elfheader (stdoutput)->e_flags |= EF_CPU32;
   else if ((cpu_of_arch (current_architecture) & m68000up)

[-- Attachment #3: ChangeLog.patch --]
[-- Type: application/octet-stream, Size: 666 bytes --]

Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/bfd/ChangeLog,v
retrieving revision 1.2962
diff -u -p -r1.2962 ChangeLog
--- ChangeLog	16 Mar 2005 02:41:24 -0000	1.2962
+++ ChangeLog	16 Mar 2005 06:53:39 -0000
@@ -1,3 +1,8 @@
+2005-03-16  C Jaiprakash <cjaiprakash@noida.hcltech.com>
+	* elf32-m68k.c (elf_cfv4e_plt0_entry): plt entry for coldfire v4e. 
+	(elf_m68k_adjust_dynamic_symbol,elf_m68k_finish_dynamic_symbol,
+	 elf_m68k_finish_dynamic_sections): use it
+
 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 
 	* elf32-ppc.c (ppc_elf_create_linker_section): Set SEC_LINKER_CREATED

[-- Attachment #4: elf32-m68k.c.patch --]
[-- Type: application/octet-stream, Size: 6118 bytes --]

Index: elf32-m68k.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-m68k.c,v
retrieving revision 1.73
diff -u -p -r1.73 elf32-m68k.c
--- elf32-m68k.c	20 Feb 2005 14:59:06 -0000	1.73
+++ elf32-m68k.c	16 Mar 2005 06:39:49 -0000
@@ -191,6 +191,37 @@ reloc_type_lookup (abfd, code)
 
 /* The size in bytes of an entry in the procedure linkage table.  */
 
+#define CFV4E_PLT_ENTRY_SIZE 24 
+
+#define CFV4E_FLAG(abfd)  (elf_elfheader (abfd)->e_flags & EF_CFV4E)
+
+static const bfd_byte elf_cfv4e_plt0_entry[CFV4E_PLT_ENTRY_SIZE] =
+{
+  0x20, 0x3c,
+  0, 0, 0, 0,             /* replaced with offset to .got + 4.  */
+  0x2f, 0x3b, 0x08, 0xfa, /* move.l (%pc,addr),-(%sp) */
+  0x20, 0x3c,
+  0, 0, 0, 0,             /* replaced with offset to .got + 8.  */
+  0x20, 0x7b, 0x08, 0x00, /* move.l (%pc,%d0:l), %a0 */
+  0x4e, 0xd0,             /* jmp (%a0) */
+  0x4e, 0x71		  /* nop */
+};
+
+/* Subsequent entries in a procedure linkage table look like this.  */
+
+static const bfd_byte elf_cfv4e_plt_entry[CFV4E_PLT_ENTRY_SIZE] =
+{
+  0x20, 0x3c,
+  0, 0, 0, 0,             /* replaced with offset to symbol's .got entry.  */
+  0x20, 0x7b, 0x08, 0x00, /* move.l (%pc,%d0:l), %a0 */
+  0x4e, 0xd0,             /* jmp (%a0) */
+  0x2f, 0x3c,             /* move.l #offset,-(%sp) */
+  0, 0, 0, 0,             /* replaced with offset into relocation table.  */
+  0x60, 0xff,             /* bra.l .plt */
+  0, 0, 0, 0              /* replaced with offset to start of .plt.  */
+};
+
+
 #define PLT_ENTRY_SIZE 20
 
 /* The first entry in a procedure linkage table looks like this.  See
@@ -977,6 +1008,8 @@ elf_m68k_adjust_dynamic_symbol (info, h)
 	{
 	  if (CPU32_FLAG (dynobj))
 	    s->size += PLT_CPU32_ENTRY_SIZE;
+	  else if( CFV4E_FLAG(dynobj) )
+	    s->_raw_size += CFV4E_PLT_ENTRY_SIZE;
 	  else
 	    s->size += PLT_ENTRY_SIZE;
 	}
@@ -998,6 +1031,8 @@ elf_m68k_adjust_dynamic_symbol (info, h)
       /* Make room for this entry.  */
       if (CPU32_FLAG (dynobj))
         s->size += PLT_CPU32_ENTRY_SIZE;
+      else if( CFV4E_FLAG(dynobj) )
+        s->_raw_size += CFV4E_PLT_ENTRY_SIZE;
       else
         s->size += PLT_ENTRY_SIZE;
 
@@ -1789,6 +1824,8 @@ elf_m68k_finish_dynamic_symbol (output_b
 	 first entry in the procedure linkage table is reserved.  */
       if ( CPU32_FLAG (output_bfd))
         plt_index = h->plt.offset / PLT_CPU32_ENTRY_SIZE - 1;
+      else if ( CFV4E_FLAG(output_bfd))
+        plt_index = h->plt.offset / CFV4E_PLT_ENTRY_SIZE - 1;
       else
         plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
 
@@ -1806,6 +1843,15 @@ elf_m68k_finish_dynamic_symbol (output_b
           plt_off2 = 12;
           plt_off3 = 18;
         }
+      else if (CFV4E_FLAG (output_bfd))
+        {
+          memcpy (splt->contents + h->plt.offset, elf_cfv4e_plt_entry,
+	          CFV4E_PLT_ENTRY_SIZE);
+          plt_off1 = 2;
+          plt_off2 = 14;
+          plt_off3 = 20;
+
+	}
       else
         {
           /* Fill in the entry in the procedure linkage table.  */
@@ -1816,26 +1862,48 @@ elf_m68k_finish_dynamic_symbol (output_b
           plt_off3 = 16;
         }
 
-      /* The offset is relative to the first extension word.  */
-      bfd_put_32 (output_bfd,
+      if ( !CFV4E_FLAG (output_bfd))
+        {
+          /* The offset is relative to the first extension word.  */
+          bfd_put_32 (output_bfd,
 		  (sgot->output_section->vma
 		   + sgot->output_offset
 		   + got_offset
 		   - (splt->output_section->vma
 		      + h->plt.offset + 2)),
 		  splt->contents + h->plt.offset + plt_off1);
-
+        }
+      else
+        {
+          bfd_put_32 (output_bfd,
+		  (sgot->output_section->vma
+		   + sgot->output_offset
+		   + got_offset
+		   - (splt->output_section->vma
+		      + h->plt.offset + 2) - 6),
+		  splt->contents + h->plt.offset + plt_off1);
+	  
+        }      
       bfd_put_32 (output_bfd, plt_index * sizeof (Elf32_External_Rela),
 		  splt->contents + h->plt.offset + plt_off2);
       bfd_put_32 (output_bfd, - (h->plt.offset + plt_off3),
 		  splt->contents + h->plt.offset + plt_off3);
-
-      /* Fill in the entry in the global offset table.  */
-      bfd_put_32 (output_bfd,
+      if ( !CFV4E_FLAG (output_bfd))
+        {
+           /* Fill in the entry in the global offset table.  */
+           bfd_put_32 (output_bfd,
+		       (splt->output_section->vma
+		        + splt->output_offset
+		        + h->plt.offset
+		        + 8),
+		       sgot->contents + got_offset);
+        }
+      else
+        bfd_put_32 (output_bfd,
 		  (splt->output_section->vma
 		   + splt->output_offset
 		   + h->plt.offset
-		   + 8),
+		   + 12),
 		  sgot->contents + got_offset);
 
       /* Fill in the entry in the .rela.plt section.  */
@@ -2013,7 +2081,24 @@ elf_m68k_finish_dynamic_sections (output
       /* Fill in the first entry in the procedure linkage table.  */
       if (splt->size > 0)
 	{
-          if (!CPU32_FLAG (output_bfd))
+
+	  if ( CFV4E_FLAG (output_bfd))
+            {
+	      memcpy (splt->contents, elf_cfv4e_plt0_entry, CFV4E_PLT_ENTRY_SIZE);
+              bfd_put_32 (output_bfd,
+                          (sgot->output_section->vma
+                           + sgot->output_offset + 4
+                           - (splt->output_section->vma + 2)),
+                          splt->contents + 2);
+              bfd_put_32 (output_bfd,
+                          (sgot->output_section->vma
+                           + sgot->output_offset + 8
+                           - (splt->output_section->vma + 10) - 8 ),
+                          splt->contents + 12);
+              elf_section_data (splt->output_section)->this_hdr.sh_entsize
+               = CFV4E_PLT_ENTRY_SIZE;
+            }
+          else if (!CPU32_FLAG (output_bfd))
             {
 	      memcpy (splt->contents, elf_m68k_plt0_entry, PLT_ENTRY_SIZE);
 	      bfd_put_32 (output_bfd,

[-- Attachment #5: elfChangeLog.patch --]
[-- Type: application/octet-stream, Size: 500 bytes --]

Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/include/elf/ChangeLog,v
retrieving revision 1.226
diff -u -p -r1.226 ChangeLog
--- ChangeLog	2 Mar 2005 21:21:50 -0000	1.226
+++ ChangeLog	16 Mar 2005 06:55:20 -0000
@@ -1,3 +1,6 @@
+2005-03-02  C Jaipraash <cjaiprakash@noida.hcltech.com>
+	* m68k.h: Define EF_CFV4E flag.
+
 2005-03-02  Daniel Jacobowitz  <dan@codesourcery.com>
 	    Joseph Myers  <joseph@codesourcery.com>
 

[-- Attachment #6: gasChangeLog.patch --]
[-- Type: application/octet-stream, Size: 570 bytes --]

Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/ChangeLog,v
retrieving revision 1.2420
diff -u -p -r1.2420 ChangeLog
--- ChangeLog	15 Mar 2005 20:37:58 -0000	1.2420
+++ ChangeLog	16 Mar 2005 06:54:10 -0000
@@ -1,3 +1,7 @@
+2005-03-15  C Jaiprakash <cjaiprakash@noida.hcltech.com>
+	* config/tc-m68k.c (m68k_elf_final_processing): Set file specific flag
+	for coldfire v4e. 
+
 2005-03-15  Zack Weinberg  <zack@codesourcery.com>
 
 	* config/tc-arm.c (do_mla): Rename to do_mlas, take second

[-- Attachment #7: m68k.h.patch --]
[-- Type: application/octet-stream, Size: 423 bytes --]

Index: m68k.h
===================================================================
RCS file: /cvs/src/src/include/elf/m68k.h,v
retrieving revision 1.8
diff -u -p -r1.8 m68k.h
--- m68k.h	3 Mar 2005 11:58:06 -0000	1.8
+++ m68k.h	16 Mar 2005 06:39:16 -0000
@@ -54,5 +54,6 @@ END_RELOC_NUMBERS (R_68K_max)
 
 #define EF_CPU32    0x00810000
 #define EF_M68000   0x01000000
+#define EF_CFV4E    0x00008000
 
 #endif

Patches for review [Plt entry generation for coldfire v4e]

[C Jaiprakash, Noida]

[-- Attachment #1: Type: text/plain, Size: 1175 bytes --]

Hi,
  I am attaching patches for generating plt entris for coldfire v4e. Since
coldifire v4e do not support 32 bit displacement addressing mode existing
PLT entries will not work. Please review the patches and let me know if any
changes are required.
 

Thanks and best regards, 
C Jaiprakash 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 
Contributing to the World by creating indispensable value ! 

System Software CoE @ HCLT-Noida 
http://www.hcltechnologies.com 
Ph. : +91-120-2510701/702 Ext : 3170 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 



Disclaimer: 

This message and any attachment(s) contained here are information that is
confidential,proprietary to HCL Technologies and its customers, privileged
or otherwise protected by law.The information is solely intended for the
individual or the entity it is addressed to. If you are not the intended
recipient of this message, you are not authorized to read, forward,
print,retain, copy or disseminate this message or any part of it. If you
have received this e-mail in error, please notify the sender immediately by
return e-mail and delete it from your computer.


            


[-- Attachment #2: tc-m68k.c.patch --]
[-- Type: application/octet-stream, Size: 682 bytes --]

Index: tc-m68k.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-m68k.c,v
retrieving revision 1.62
diff -u -p -r1.62 tc-m68k.c
--- tc-m68k.c	1 Mar 2005 01:57:39 -0000	1.62
+++ tc-m68k.c	16 Mar 2005 06:40:31 -0000
@@ -7447,6 +7447,8 @@ void
 m68k_elf_final_processing (void)
 {
   /* Set file-specific flags if this is a cpu32 processor.  */
+  if ( arch_coldfire_fpu(current_architecture)  )
+    elf_elfheader (stdoutput)->e_flags |= EF_CFV4E;
   if (cpu_of_arch (current_architecture) & cpu32)
     elf_elfheader (stdoutput)->e_flags |= EF_CPU32;
   else if ((cpu_of_arch (current_architecture) & m68000up)

[-- Attachment #3: ChangeLog.patch --]
[-- Type: application/octet-stream, Size: 666 bytes --]

Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/bfd/ChangeLog,v
retrieving revision 1.2962
diff -u -p -r1.2962 ChangeLog
--- ChangeLog	16 Mar 2005 02:41:24 -0000	1.2962
+++ ChangeLog	16 Mar 2005 06:53:39 -0000
@@ -1,3 +1,8 @@
+2005-03-16  C Jaiprakash <cjaiprakash@noida.hcltech.com>
+	* elf32-m68k.c (elf_cfv4e_plt0_entry): plt entry for coldfire v4e. 
+	(elf_m68k_adjust_dynamic_symbol,elf_m68k_finish_dynamic_symbol,
+	 elf_m68k_finish_dynamic_sections): use it
+
 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 
 	* elf32-ppc.c (ppc_elf_create_linker_section): Set SEC_LINKER_CREATED

[-- Attachment #4: elf32-m68k.c.patch --]
[-- Type: application/octet-stream, Size: 6118 bytes --]

Index: elf32-m68k.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-m68k.c,v
retrieving revision 1.73
diff -u -p -r1.73 elf32-m68k.c
--- elf32-m68k.c	20 Feb 2005 14:59:06 -0000	1.73
+++ elf32-m68k.c	16 Mar 2005 06:39:49 -0000
@@ -191,6 +191,37 @@ reloc_type_lookup (abfd, code)
 
 /* The size in bytes of an entry in the procedure linkage table.  */
 
+#define CFV4E_PLT_ENTRY_SIZE 24 
+
+#define CFV4E_FLAG(abfd)  (elf_elfheader (abfd)->e_flags & EF_CFV4E)
+
+static const bfd_byte elf_cfv4e_plt0_entry[CFV4E_PLT_ENTRY_SIZE] =
+{
+  0x20, 0x3c,
+  0, 0, 0, 0,             /* replaced with offset to .got + 4.  */
+  0x2f, 0x3b, 0x08, 0xfa, /* move.l (%pc,addr),-(%sp) */
+  0x20, 0x3c,
+  0, 0, 0, 0,             /* replaced with offset to .got + 8.  */
+  0x20, 0x7b, 0x08, 0x00, /* move.l (%pc,%d0:l), %a0 */
+  0x4e, 0xd0,             /* jmp (%a0) */
+  0x4e, 0x71		  /* nop */
+};
+
+/* Subsequent entries in a procedure linkage table look like this.  */
+
+static const bfd_byte elf_cfv4e_plt_entry[CFV4E_PLT_ENTRY_SIZE] =
+{
+  0x20, 0x3c,
+  0, 0, 0, 0,             /* replaced with offset to symbol's .got entry.  */
+  0x20, 0x7b, 0x08, 0x00, /* move.l (%pc,%d0:l), %a0 */
+  0x4e, 0xd0,             /* jmp (%a0) */
+  0x2f, 0x3c,             /* move.l #offset,-(%sp) */
+  0, 0, 0, 0,             /* replaced with offset into relocation table.  */
+  0x60, 0xff,             /* bra.l .plt */
+  0, 0, 0, 0              /* replaced with offset to start of .plt.  */
+};
+
+
 #define PLT_ENTRY_SIZE 20
 
 /* The first entry in a procedure linkage table looks like this.  See
@@ -977,6 +1008,8 @@ elf_m68k_adjust_dynamic_symbol (info, h)
 	{
 	  if (CPU32_FLAG (dynobj))
 	    s->size += PLT_CPU32_ENTRY_SIZE;
+	  else if( CFV4E_FLAG(dynobj) )
+	    s->_raw_size += CFV4E_PLT_ENTRY_SIZE;
 	  else
 	    s->size += PLT_ENTRY_SIZE;
 	}
@@ -998,6 +1031,8 @@ elf_m68k_adjust_dynamic_symbol (info, h)
       /* Make room for this entry.  */
       if (CPU32_FLAG (dynobj))
         s->size += PLT_CPU32_ENTRY_SIZE;
+      else if( CFV4E_FLAG(dynobj) )
+        s->_raw_size += CFV4E_PLT_ENTRY_SIZE;
       else
         s->size += PLT_ENTRY_SIZE;
 
@@ -1789,6 +1824,8 @@ elf_m68k_finish_dynamic_symbol (output_b
 	 first entry in the procedure linkage table is reserved.  */
       if ( CPU32_FLAG (output_bfd))
         plt_index = h->plt.offset / PLT_CPU32_ENTRY_SIZE - 1;
+      else if ( CFV4E_FLAG(output_bfd))
+        plt_index = h->plt.offset / CFV4E_PLT_ENTRY_SIZE - 1;
       else
         plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
 
@@ -1806,6 +1843,15 @@ elf_m68k_finish_dynamic_symbol (output_b
           plt_off2 = 12;
           plt_off3 = 18;
         }
+      else if (CFV4E_FLAG (output_bfd))
+        {
+          memcpy (splt->contents + h->plt.offset, elf_cfv4e_plt_entry,
+	          CFV4E_PLT_ENTRY_SIZE);
+          plt_off1 = 2;
+          plt_off2 = 14;
+          plt_off3 = 20;
+
+	}
       else
         {
           /* Fill in the entry in the procedure linkage table.  */
@@ -1816,26 +1862,48 @@ elf_m68k_finish_dynamic_symbol (output_b
           plt_off3 = 16;
         }
 
-      /* The offset is relative to the first extension word.  */
-      bfd_put_32 (output_bfd,
+      if ( !CFV4E_FLAG (output_bfd))
+        {
+          /* The offset is relative to the first extension word.  */
+          bfd_put_32 (output_bfd,
 		  (sgot->output_section->vma
 		   + sgot->output_offset
 		   + got_offset
 		   - (splt->output_section->vma
 		      + h->plt.offset + 2)),
 		  splt->contents + h->plt.offset + plt_off1);
-
+        }
+      else
+        {
+          bfd_put_32 (output_bfd,
+		  (sgot->output_section->vma
+		   + sgot->output_offset
+		   + got_offset
+		   - (splt->output_section->vma
+		      + h->plt.offset + 2) - 6),
+		  splt->contents + h->plt.offset + plt_off1);
+	  
+        }      
       bfd_put_32 (output_bfd, plt_index * sizeof (Elf32_External_Rela),
 		  splt->contents + h->plt.offset + plt_off2);
       bfd_put_32 (output_bfd, - (h->plt.offset + plt_off3),
 		  splt->contents + h->plt.offset + plt_off3);
-
-      /* Fill in the entry in the global offset table.  */
-      bfd_put_32 (output_bfd,
+      if ( !CFV4E_FLAG (output_bfd))
+        {
+           /* Fill in the entry in the global offset table.  */
+           bfd_put_32 (output_bfd,
+		       (splt->output_section->vma
+		        + splt->output_offset
+		        + h->plt.offset
+		        + 8),
+		       sgot->contents + got_offset);
+        }
+      else
+        bfd_put_32 (output_bfd,
 		  (splt->output_section->vma
 		   + splt->output_offset
 		   + h->plt.offset
-		   + 8),
+		   + 12),
 		  sgot->contents + got_offset);
 
       /* Fill in the entry in the .rela.plt section.  */
@@ -2013,7 +2081,24 @@ elf_m68k_finish_dynamic_sections (output
       /* Fill in the first entry in the procedure linkage table.  */
       if (splt->size > 0)
 	{
-          if (!CPU32_FLAG (output_bfd))
+
+	  if ( CFV4E_FLAG (output_bfd))
+            {
+	      memcpy (splt->contents, elf_cfv4e_plt0_entry, CFV4E_PLT_ENTRY_SIZE);
+              bfd_put_32 (output_bfd,
+                          (sgot->output_section->vma
+                           + sgot->output_offset + 4
+                           - (splt->output_section->vma + 2)),
+                          splt->contents + 2);
+              bfd_put_32 (output_bfd,
+                          (sgot->output_section->vma
+                           + sgot->output_offset + 8
+                           - (splt->output_section->vma + 10) - 8 ),
+                          splt->contents + 12);
+              elf_section_data (splt->output_section)->this_hdr.sh_entsize
+               = CFV4E_PLT_ENTRY_SIZE;
+            }
+          else if (!CPU32_FLAG (output_bfd))
             {
 	      memcpy (splt->contents, elf_m68k_plt0_entry, PLT_ENTRY_SIZE);
 	      bfd_put_32 (output_bfd,

[-- Attachment #5: elfChangeLog.patch --]
[-- Type: application/octet-stream, Size: 500 bytes --]

Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/include/elf/ChangeLog,v
retrieving revision 1.226
diff -u -p -r1.226 ChangeLog
--- ChangeLog	2 Mar 2005 21:21:50 -0000	1.226
+++ ChangeLog	16 Mar 2005 06:55:20 -0000
@@ -1,3 +1,6 @@
+2005-03-02  C Jaipraash <cjaiprakash@noida.hcltech.com>
+	* m68k.h: Define EF_CFV4E flag.
+
 2005-03-02  Daniel Jacobowitz  <dan@codesourcery.com>
 	    Joseph Myers  <joseph@codesourcery.com>
 

[-- Attachment #6: gasChangeLog.patch --]
[-- Type: application/octet-stream, Size: 570 bytes --]

Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/ChangeLog,v
retrieving revision 1.2420
diff -u -p -r1.2420 ChangeLog
--- ChangeLog	15 Mar 2005 20:37:58 -0000	1.2420
+++ ChangeLog	16 Mar 2005 06:54:10 -0000
@@ -1,3 +1,7 @@
+2005-03-15  C Jaiprakash <cjaiprakash@noida.hcltech.com>
+	* config/tc-m68k.c (m68k_elf_final_processing): Set file specific flag
+	for coldfire v4e. 
+
 2005-03-15  Zack Weinberg  <zack@codesourcery.com>
 
 	* config/tc-arm.c (do_mla): Rename to do_mlas, take second

[-- Attachment #7: m68k.h.patch --]
[-- Type: application/octet-stream, Size: 423 bytes --]

Index: m68k.h
===================================================================
RCS file: /cvs/src/src/include/elf/m68k.h,v
retrieving revision 1.8
diff -u -p -r1.8 m68k.h
--- m68k.h	3 Mar 2005 11:58:06 -0000	1.8
+++ m68k.h	16 Mar 2005 06:39:16 -0000
@@ -54,5 +54,6 @@ END_RELOC_NUMBERS (R_68K_max)
 
 #define EF_CPU32    0x00810000
 #define EF_M68000   0x01000000
+#define EF_CFV4E    0x00008000
 
 #endif