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From: "H. J. Lu" <hjl@lucon.org>
To: Ross Ridge <rridge@csclub.uwaterloo.ca>
Cc: binutils@sources.redhat.com
Subject: Re: i386/x86_64 segment register issuses
Date: Tue, 29 Mar 2005 03:00:00 -0000	[thread overview]
Message-ID: <20050328200711.GB27326@lucon.org> (raw)
In-Reply-To: <20050328193416.7E0A9A86AF@perpugilliam.csclub.uwaterloo.ca>

On Mon, Mar 28, 2005 at 02:34:16PM -0500, Ross Ridge wrote:
> > The assembler in CVS generates the same binary code as
> > 
> > 	movw %ds,(%eax)
> > 
> > for
> > 
> > 	movl %ds,(%eax)
> 
> Which is the way I think the GNU assembler should work.  In case like

I'd like to disallow

 	movl %ds,(%eax)

since there is no such an instruction. People can use

 	mov %ds,(%eax)

with old and new assemblers or

 	movw %ds,(%eax)

with the newer assembler.

> Linux kernel code you quoted, you really do want a 16-bit move when a
> memory destination is used and a 32-bit move when a register destination
> used.  The only problem here is that the Linux kernel doesn't ingore
> the higher 16-bits of the resulting variable, which aren't guaranteed
> to be zero in either case.
> 

The higher bits are guaranteed to be zero for x86_64 and Pentium Pro
or above. I am testing Linux kernel patches to make sure that both
old and new assembler will generate optimized binary.


H.J.

  reply	other threads:[~2005-03-28 20:07 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-03-28 10:39 Ross Ridge
2005-03-28 19:34 ` H. J. Lu
2005-03-28 20:07   ` Ross Ridge
2005-03-29  0:03     ` H. J. Lu
2005-03-29  2:06       ` Ross Ridge
2005-03-29  3:00         ` H. J. Lu [this message]
2005-03-30 15:56           ` Ross Ridge
2005-03-30 16:26             ` H. J. Lu
2005-03-30 16:37               ` Ross Ridge
2005-03-31 10:23 Ross Ridge

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