From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 8064 invoked by alias); 1 Apr 2006 02:49:27 -0000 Received: (qmail 8055 invoked by uid 22791); 1 Apr 2006 02:49:27 -0000 X-Spam-Check-By: sourceware.org Received: from intranet.codesourcery.com (HELO mail.codesourcery.com) (65.74.133.6) by sourceware.org (qpsmtpd/0.31) with ESMTP; Sat, 01 Apr 2006 02:49:27 +0000 Received: (qmail 3770 invoked from network); 1 Apr 2006 02:49:25 -0000 Received: from unknown (HELO 81-178-240-244.dsl.pipex.com) (paul@127.0.0.2) by mail.codesourcery.com with ESMTPA; 1 Apr 2006 02:49:25 -0000 From: Paul Brook To: Julian Brown Subject: Re: [PATCH] ARM Neon instruction set support Date: Sat, 01 Apr 2006 02:49:00 -0000 User-Agent: KMail/1.9.1 Cc: binutils@sources.redhat.com, Richard Earnshaw References: <442DD9E0.1090408@codesourcery.com> In-Reply-To: <442DD9E0.1090408@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200604010349.23269.paul@codesourcery.com> Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2006-04/txt/msg00002.txt.bz2 On Saturday 01 April 2006 02:39, Julian Brown wrote: > Hi, > > This patch provides support for ARM's new Advanced SIMD (Neon) > instruction set, and version 3 of the VFP instruction set. Code using > Neon instructions can be both assembled and disassembled. The full range > of SIMD data types is available, and should be correctly type-checked by > the assembler. As-is the patch looks generally ok to me, a couple of relatively minor points below. Ok for the csl branch once those are resolved. ARM have also defined all the existing VFP instructions in terms of the vector mnemonics. eg. "faddd d0, d0, d0" becomes "vadd.f64 d0, d0, d0). We probably want to consider the implications of this before applying to mainline. Hopefully this will be an incremental change that can be done without rewriting everything, but it's best to check :-) > + /* Undo polymorphism for Neon D and Q registers. */ > + if (reg && type == REG_TYPE_NDQ) > + type = (reg->type == REG_TYPE_NQ || reg->type == REG_TYPE_VFD) > + ? reg->type : type; Probably clearer as a single if: if (reg && type == REG_TYPE_NDQ &&(reg->type == REG_TYPE_NQ || reg->type == REG_TYPE_VFD)) type = reg->type; > ! /* FIXME: Check if cortex-a8 supports these things! */ > ! {"cortex-a8", ARM_ARCH_V7A, ARM_FEATURE(0, FPU_VFP_V3 Yes it does. You can remove the FIXME. > + {"vfp3", FPU_ARCH_VFP_V3}, You also need to add some way of enabling NEON. I'm not sure if it's best to have this as an independent architecture extension (like iWMMXt) or just a different type of FPU. Probably the latter. You also need to set the appropriate EABI build attributes to when NEON and VFPv3 instructions are used. Paul