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* [PATCH, ARM] Fix Neon floating-point constant encoding & support  floating-point syntax
@ 2006-04-24 12:28 Julian Brown
  2006-04-25 19:46 ` Nick Clifton
  0 siblings, 1 reply; 5+ messages in thread
From: Julian Brown @ 2006-04-24 12:28 UTC (permalink / raw)
  To: binutils; +Cc: Paul Brook, Richard Earnshaw, Julian Brown

[-- Attachment #1: Type: text/plain, Size: 1481 bytes --]

Hi,

This patch fixes a bug with floating-point constant encoding for the 
VMOV instruction, and enables support for floating-point syntax for 
assembly and disassembly for that instruction too. It also tweaks the 
encoding so that floating-point instructions are used in preference to 
integer ones in the couple of ambiguous cases where both may be used.

I've added a test case for the new floating-point constant support.

Tested with "make check" with cross to arm-none-eabi. OK to apply on the 
CSL branch? (This should probably be applied on mainline too at the same 
time as the initial Neon support patch).

Cheers,

Julian

ChangeLog (gas):

     * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename
     to...
     (is_quarter_float): Rename from above.
     (parse_qfloat_immediate): Parse a "quarter precision" floating-point
     number.
     (parse_neon_mov): Parse floating-point constants.
     (neon_qfloat_bits): Fix encoding.
     (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
     preference to integer encoding when using the F32 type.

ChangeLog (gas/testsuite):

     * gas/testsuite/gas/arm/neon-const.s: New testcase. Neon
     floating-point constants.
     * gas/testsuite/gas/arm/neon-const.d: Expected output of above.
     * gas/testsuite/gas/arm/neon-cov.d: Expect floating-point
     disassembly for VMOV.F32.

ChangeLog (opcodes):

     * arm-dis.c (print_insn_neon): Disassemble floating-point constant
     VMOV.

[-- Attachment #2: neon-float-const-1 --]
[-- Type: text/plain, Size: 37727 bytes --]

? bfd/doc/bfd.info
? binutils/doc/binutils.info
? gas/doc/as.info
? ld/ld.info
Index: gas/config/tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.250.2.9
diff -c -p -r1.250.2.9 tc-arm.c
*** gas/config/tc-arm.c	7 Apr 2006 15:46:20 -0000	1.250.2.9
--- gas/config/tc-arm.c	23 Apr 2006 20:07:20 -0000
*************** parse_fpa_immediate (char ** str)
*** 3994,3999 ****
--- 3994,4051 ----
    return FAIL;
  }
  
+ /* Returns 1 if a number has "quarter-precision" float format
+    0baBbbbbbc defgh000 00000000 00000000.  */
+ 
+ static int
+ is_quarter_float (unsigned imm)
+ {
+   int b = (imm & 0x20000000) != 0;
+   int bs = (b << 25) | (b << 26) | (b << 27) | (b << 28) | (b << 29)
+            | ((!b) << 30);
+   return (imm & 0x81ffffff) == (imm & 0x81f80000)
+          && ((imm & 0x7e000000) ^ bs) == 0;
+ }
+ 
+ /* Parse an 8-bit "quarter-precision" floating point number of the form:
+    0baBbbbbbc defgh000 00000000 00000000.
+    The minus-zero case needs special handling, since it can't be encoded in the
+    "quarter-precision" float format, but can nonetheless be loaded as an integer
+    constant.  */
+ 
+ static unsigned
+ parse_qfloat_immediate (char **ccp, int *immed)
+ {
+   char *str = *ccp;
+   LITTLENUM_TYPE words[MAX_LITTLENUMS];
+   
+   skip_past_char (&str, '#');
+   
+   if ((str = atof_ieee (str, 's', words)) != NULL)
+     {
+       unsigned fpword = 0;
+       int i;
+       
+       /* Our FP word must be 32 bits (single-precision FP).  */
+       for (i = 0; i < 32 / LITTLENUM_NUMBER_OF_BITS; i++)
+         {
+           fpword <<= LITTLENUM_NUMBER_OF_BITS;
+           fpword |= words[i];
+         }
+       
+       if (is_quarter_float (fpword) || fpword == 0x80000000)
+         *immed = fpword;
+       else
+         return FAIL;
+ 
+       *ccp = str;
+       
+       return SUCCESS;
+     }
+   
+   return FAIL;
+ }
+ 
  /* Shift operands.  */
  enum shift_kind
  {
*************** parse_neon_mov (char **str, int *which_o
*** 4702,4707 ****
--- 4754,4766 ----
            inst.operands[i].isreg = 1;
            inst.operands[i].present = 1;
          }
+       else if (parse_qfloat_immediate (&ptr, &inst.operands[i].imm) == SUCCESS)
+         {
+           /* Case 2: VMOV<c><q>.<dt> <Qd>, #<float-imm>
+              Case 3: VMOV<c><q>.<dt> <Dd>, #<float-imm>  */
+           if (!thumb_mode && (inst.instruction & 0xf0000000) != 0xe0000000)
+             goto bad_cond;
+         }
        else if (parse_big_immediate (&ptr, i) == SUCCESS)
          {
            /* Case 2: VMOV<c><q>.<dt> <Qd>, #<imm>
*************** neon_squash_bits (unsigned imm)
*** 10214,10238 ****
           | ((imm & 0x01000000) >> 21);
  }
  
! /* Returns 1 if a number has "quarter-precision" float format
!    0baBbbbbbc defgh000 00000000 00000000.  */
! 
! static int
! neon_is_quarter_float (unsigned imm)
! {
!   int b = (imm & 0x20000000) != 0;
!   int bs = (b << 25) | (b << 26) | (b << 27) | (b << 28) | (b << 29)
!            | ((!b) << 30);
!   return (imm & 0x81ffffff) == (imm & 0x81f80000)
!          && ((imm & 0x7e000000) ^ bs) == 0;
! }
! 
! /* Compress above representation to 0b...000 abcdefgh.  */
  
  static unsigned
  neon_qfloat_bits (unsigned imm)
  {
!   return ((imm >> 19) & 0x7f) | (imm >> 24);
  }
  
  /* Returns CMODE. IMMBITS [7:0] is set to bits suitable for inserting into
--- 10273,10284 ----
           | ((imm & 0x01000000) >> 21);
  }
  
! /* Compress quarter-float representation to 0b...000 abcdefgh.  */
  
  static unsigned
  neon_qfloat_bits (unsigned imm)
  {
!   return ((imm >> 19) & 0x7f) | ((imm >> 24) & 0x80);
  }
  
  /* Returns CMODE. IMMBITS [7:0] is set to bits suitable for inserting into
*************** neon_qfloat_bits (unsigned imm)
*** 10243,10251 ****
  
  static int
  neon_cmode_for_move_imm (unsigned immlo, unsigned immhi, unsigned *immbits,
!                          int *op, int size)
  {
!   if (size == 64 && neon_bits_same_in_bytes (immhi)
        && neon_bits_same_in_bytes (immlo))
      {
        /* Check this one first so we don't have to bother with immhi in later
--- 10289,10304 ----
  
  static int
  neon_cmode_for_move_imm (unsigned immlo, unsigned immhi, unsigned *immbits,
!                          int *op, int size, enum neon_el_type type)
  {
!   if (type == NT_float && is_quarter_float (immlo) && immhi == 0)
!     {
!       if (size != 32 || *op == 1)
!         return FAIL;
!       *immbits = neon_qfloat_bits (immlo);
!       return 0xf;
!     }
!   else if (size == 64 && neon_bits_same_in_bytes (immhi)
        && neon_bits_same_in_bytes (immlo))
      {
        /* Check this one first so we don't have to bother with immhi in later
*************** neon_cmode_for_move_imm (unsigned immlo,
*** 10303,10315 ****
        *immbits = (immlo >> 16) & 0xff;
        return 0xd;
      }
-   else if (neon_is_quarter_float (immlo))
-     {
-       if (size != 32 || *op == 1)
-         return FAIL;
-       *immbits = neon_qfloat_bits (immlo);
-       return 0xf;
-     }
  
    return FAIL;
  }
--- 10356,10361 ----
*************** neon_move_immediate (void)
*** 10996,11002 ****
                _("immediate has bits set outside the operand size"));
  
    if ((cmode = neon_cmode_for_move_imm (immlo, immhi, &immbits, &op,
!                                         et.size)) == FAIL)
      {
        /* Invert relevant bits only.  */
        neon_invert_size (&immlo, &immhi, et.size);
--- 11042,11048 ----
                _("immediate has bits set outside the operand size"));
  
    if ((cmode = neon_cmode_for_move_imm (immlo, immhi, &immbits, &op,
!                                         et.size, et.type)) == FAIL)
      {
        /* Invert relevant bits only.  */
        neon_invert_size (&immlo, &immhi, et.size);
*************** neon_move_immediate (void)
*** 11005,11011 ****
           neon_cmode_for_move_imm.  */
        op = !op;
        if ((cmode = neon_cmode_for_move_imm (immlo, immhi, &immbits, &op,
!                                             et.size)) == FAIL)
          {
            first_error (_("immediate out of range"));
            return;
--- 11051,11057 ----
           neon_cmode_for_move_imm.  */
        op = !op;
        if ((cmode = neon_cmode_for_move_imm (immlo, immhi, &immbits, &op,
!                                             et.size, et.type)) == FAIL)
          {
            first_error (_("immediate out of range"));
            return;
Index: gas/testsuite/gas/arm/neon-const.d
===================================================================
RCS file: gas/testsuite/gas/arm/neon-const.d
diff -N gas/testsuite/gas/arm/neon-const.d
*** /dev/null	1 Jan 1970 00:00:00 -0000
--- gas/testsuite/gas/arm/neon-const.d	23 Apr 2006 20:07:21 -0000
***************
*** 0 ****
--- 1,265 ----
+ # name: Neon floating-point constants
+ # as: -mfpu=neon
+ # objdump: -dr --prefix-addresses --show-raw-insn
+ 
+ .*: +file format .*arm.*
+ 
+ Disassembly of section .text:
+ 0[0-9a-f]+ <[^>]+> f2800050 	vmov\.i32	q0, #0	; 0x00000000
+ 0[0-9a-f]+ <[^>]+> f2800f50 	vmov\.f32	q0, #2	; 0x40000000
+ 0[0-9a-f]+ <[^>]+> f2810f50 	vmov\.f32	q0, #4	; 0x40800000
+ 0[0-9a-f]+ <[^>]+> f2820f50 	vmov\.f32	q0, #8	; 0x41000000
+ 0[0-9a-f]+ <[^>]+> f2830f50 	vmov\.f32	q0, #16	; 0x41800000
+ 0[0-9a-f]+ <[^>]+> f2840f50 	vmov\.f32	q0, #0\.125	; 0x3e000000
+ 0[0-9a-f]+ <[^>]+> f2850f50 	vmov\.f32	q0, #0\.25	; 0x3e800000
+ 0[0-9a-f]+ <[^>]+> f2860f50 	vmov\.f32	q0, #0\.5	; 0x3f000000
+ 0[0-9a-f]+ <[^>]+> f2870f50 	vmov\.f32	q0, #1	; 0x3f800000
+ 0[0-9a-f]+ <[^>]+> f2800f51 	vmov\.f32	q0, #2\.125	; 0x40080000
+ 0[0-9a-f]+ <[^>]+> f2810f51 	vmov\.f32	q0, #4\.25	; 0x40880000
+ 0[0-9a-f]+ <[^>]+> f2820f51 	vmov\.f32	q0, #8\.5	; 0x41080000
+ 0[0-9a-f]+ <[^>]+> f2830f51 	vmov\.f32	q0, #17	; 0x41880000
+ 0[0-9a-f]+ <[^>]+> f2840f51 	vmov\.f32	q0, #0\.1328125	; 0x3e080000
+ 0[0-9a-f]+ <[^>]+> f2850f51 	vmov\.f32	q0, #0\.265625	; 0x3e880000
+ 0[0-9a-f]+ <[^>]+> f2860f51 	vmov\.f32	q0, #0\.53125	; 0x3f080000
+ 0[0-9a-f]+ <[^>]+> f2870f51 	vmov\.f32	q0, #1\.0625	; 0x3f880000
+ 0[0-9a-f]+ <[^>]+> f2800f52 	vmov\.f32	q0, #2\.25	; 0x40100000
+ 0[0-9a-f]+ <[^>]+> f2810f52 	vmov\.f32	q0, #4\.5	; 0x40900000
+ 0[0-9a-f]+ <[^>]+> f2820f52 	vmov\.f32	q0, #9	; 0x41100000
+ 0[0-9a-f]+ <[^>]+> f2830f52 	vmov\.f32	q0, #18	; 0x41900000
+ 0[0-9a-f]+ <[^>]+> f2840f52 	vmov\.f32	q0, #0\.140625	; 0x3e100000
+ 0[0-9a-f]+ <[^>]+> f2850f52 	vmov\.f32	q0, #0\.28125	; 0x3e900000
+ 0[0-9a-f]+ <[^>]+> f2860f52 	vmov\.f32	q0, #0\.5625	; 0x3f100000
+ 0[0-9a-f]+ <[^>]+> f2870f52 	vmov\.f32	q0, #1\.125	; 0x3f900000
+ 0[0-9a-f]+ <[^>]+> f2800f53 	vmov\.f32	q0, #2\.375	; 0x40180000
+ 0[0-9a-f]+ <[^>]+> f2810f53 	vmov\.f32	q0, #4\.75	; 0x40980000
+ 0[0-9a-f]+ <[^>]+> f2820f53 	vmov\.f32	q0, #9\.5	; 0x41180000
+ 0[0-9a-f]+ <[^>]+> f2830f53 	vmov\.f32	q0, #19	; 0x41980000
+ 0[0-9a-f]+ <[^>]+> f2840f53 	vmov\.f32	q0, #0\.1484375	; 0x3e180000
+ 0[0-9a-f]+ <[^>]+> f2850f53 	vmov\.f32	q0, #0\.296875	; 0x3e980000
+ 0[0-9a-f]+ <[^>]+> f2860f53 	vmov\.f32	q0, #0\.59375	; 0x3f180000
+ 0[0-9a-f]+ <[^>]+> f2870f53 	vmov\.f32	q0, #1\.1875	; 0x3f980000
+ 0[0-9a-f]+ <[^>]+> f2800f54 	vmov\.f32	q0, #2\.5	; 0x40200000
+ 0[0-9a-f]+ <[^>]+> f2810f54 	vmov\.f32	q0, #5	; 0x40a00000
+ 0[0-9a-f]+ <[^>]+> f2820f54 	vmov\.f32	q0, #10	; 0x41200000
+ 0[0-9a-f]+ <[^>]+> f2830f54 	vmov\.f32	q0, #20	; 0x41a00000
+ 0[0-9a-f]+ <[^>]+> f2840f54 	vmov\.f32	q0, #0\.15625	; 0x3e200000
+ 0[0-9a-f]+ <[^>]+> f2850f54 	vmov\.f32	q0, #0\.3125	; 0x3ea00000
+ 0[0-9a-f]+ <[^>]+> f2860f54 	vmov\.f32	q0, #0\.625	; 0x3f200000
+ 0[0-9a-f]+ <[^>]+> f2870f54 	vmov\.f32	q0, #1\.25	; 0x3fa00000
+ 0[0-9a-f]+ <[^>]+> f2800f55 	vmov\.f32	q0, #2\.625	; 0x40280000
+ 0[0-9a-f]+ <[^>]+> f2810f55 	vmov\.f32	q0, #5\.25	; 0x40a80000
+ 0[0-9a-f]+ <[^>]+> f2820f55 	vmov\.f32	q0, #10\.5	; 0x41280000
+ 0[0-9a-f]+ <[^>]+> f2830f55 	vmov\.f32	q0, #21	; 0x41a80000
+ 0[0-9a-f]+ <[^>]+> f2840f55 	vmov\.f32	q0, #0\.1640625	; 0x3e280000
+ 0[0-9a-f]+ <[^>]+> f2850f55 	vmov\.f32	q0, #0\.328125	; 0x3ea80000
+ 0[0-9a-f]+ <[^>]+> f2860f55 	vmov\.f32	q0, #0\.65625	; 0x3f280000
+ 0[0-9a-f]+ <[^>]+> f2870f55 	vmov\.f32	q0, #1\.3125	; 0x3fa80000
+ 0[0-9a-f]+ <[^>]+> f2800f56 	vmov\.f32	q0, #2\.75	; 0x40300000
+ 0[0-9a-f]+ <[^>]+> f2810f56 	vmov\.f32	q0, #5\.5	; 0x40b00000
+ 0[0-9a-f]+ <[^>]+> f2820f56 	vmov\.f32	q0, #11	; 0x41300000
+ 0[0-9a-f]+ <[^>]+> f2830f56 	vmov\.f32	q0, #22	; 0x41b00000
+ 0[0-9a-f]+ <[^>]+> f2840f56 	vmov\.f32	q0, #0\.171875	; 0x3e300000
+ 0[0-9a-f]+ <[^>]+> f2850f56 	vmov\.f32	q0, #0\.34375	; 0x3eb00000
+ 0[0-9a-f]+ <[^>]+> f2860f56 	vmov\.f32	q0, #0\.6875	; 0x3f300000
+ 0[0-9a-f]+ <[^>]+> f2870f56 	vmov\.f32	q0, #1\.375	; 0x3fb00000
+ 0[0-9a-f]+ <[^>]+> f2800f57 	vmov\.f32	q0, #2\.875	; 0x40380000
+ 0[0-9a-f]+ <[^>]+> f2810f57 	vmov\.f32	q0, #5\.75	; 0x40b80000
+ 0[0-9a-f]+ <[^>]+> f2820f57 	vmov\.f32	q0, #11\.5	; 0x41380000
+ 0[0-9a-f]+ <[^>]+> f2830f57 	vmov\.f32	q0, #23	; 0x41b80000
+ 0[0-9a-f]+ <[^>]+> f2840f57 	vmov\.f32	q0, #0\.1796875	; 0x3e380000
+ 0[0-9a-f]+ <[^>]+> f2850f57 	vmov\.f32	q0, #0\.359375	; 0x3eb80000
+ 0[0-9a-f]+ <[^>]+> f2860f57 	vmov\.f32	q0, #0\.71875	; 0x3f380000
+ 0[0-9a-f]+ <[^>]+> f2870f57 	vmov\.f32	q0, #1\.4375	; 0x3fb80000
+ 0[0-9a-f]+ <[^>]+> f2800f58 	vmov\.f32	q0, #3	; 0x40400000
+ 0[0-9a-f]+ <[^>]+> f2810f58 	vmov\.f32	q0, #6	; 0x40c00000
+ 0[0-9a-f]+ <[^>]+> f2820f58 	vmov\.f32	q0, #12	; 0x41400000
+ 0[0-9a-f]+ <[^>]+> f2830f58 	vmov\.f32	q0, #24	; 0x41c00000
+ 0[0-9a-f]+ <[^>]+> f2840f58 	vmov\.f32	q0, #0\.1875	; 0x3e400000
+ 0[0-9a-f]+ <[^>]+> f2850f58 	vmov\.f32	q0, #0\.375	; 0x3ec00000
+ 0[0-9a-f]+ <[^>]+> f2860f58 	vmov\.f32	q0, #0\.75	; 0x3f400000
+ 0[0-9a-f]+ <[^>]+> f2870f58 	vmov\.f32	q0, #1\.5	; 0x3fc00000
+ 0[0-9a-f]+ <[^>]+> f2800f59 	vmov\.f32	q0, #3\.125	; 0x40480000
+ 0[0-9a-f]+ <[^>]+> f2810f59 	vmov\.f32	q0, #6\.25	; 0x40c80000
+ 0[0-9a-f]+ <[^>]+> f2820f59 	vmov\.f32	q0, #12\.5	; 0x41480000
+ 0[0-9a-f]+ <[^>]+> f2830f59 	vmov\.f32	q0, #25	; 0x41c80000
+ 0[0-9a-f]+ <[^>]+> f2840f59 	vmov\.f32	q0, #0\.1953125	; 0x3e480000
+ 0[0-9a-f]+ <[^>]+> f2850f59 	vmov\.f32	q0, #0\.390625	; 0x3ec80000
+ 0[0-9a-f]+ <[^>]+> f2860f59 	vmov\.f32	q0, #0\.78125	; 0x3f480000
+ 0[0-9a-f]+ <[^>]+> f2870f59 	vmov\.f32	q0, #1\.5625	; 0x3fc80000
+ 0[0-9a-f]+ <[^>]+> f2800f5a 	vmov\.f32	q0, #3\.25	; 0x40500000
+ 0[0-9a-f]+ <[^>]+> f2810f5a 	vmov\.f32	q0, #6\.5	; 0x40d00000
+ 0[0-9a-f]+ <[^>]+> f2820f5a 	vmov\.f32	q0, #13	; 0x41500000
+ 0[0-9a-f]+ <[^>]+> f2830f5a 	vmov\.f32	q0, #26	; 0x41d00000
+ 0[0-9a-f]+ <[^>]+> f2840f5a 	vmov\.f32	q0, #0\.203125	; 0x3e500000
+ 0[0-9a-f]+ <[^>]+> f2850f5a 	vmov\.f32	q0, #0\.40625	; 0x3ed00000
+ 0[0-9a-f]+ <[^>]+> f2860f5a 	vmov\.f32	q0, #0\.8125	; 0x3f500000
+ 0[0-9a-f]+ <[^>]+> f2870f5a 	vmov\.f32	q0, #1\.625	; 0x3fd00000
+ 0[0-9a-f]+ <[^>]+> f2800f5b 	vmov\.f32	q0, #3\.375	; 0x40580000
+ 0[0-9a-f]+ <[^>]+> f2810f5b 	vmov\.f32	q0, #6\.75	; 0x40d80000
+ 0[0-9a-f]+ <[^>]+> f2820f5b 	vmov\.f32	q0, #13\.5	; 0x41580000
+ 0[0-9a-f]+ <[^>]+> f2830f5b 	vmov\.f32	q0, #27	; 0x41d80000
+ 0[0-9a-f]+ <[^>]+> f2840f5b 	vmov\.f32	q0, #0\.2109375	; 0x3e580000
+ 0[0-9a-f]+ <[^>]+> f2850f5b 	vmov\.f32	q0, #0\.421875	; 0x3ed80000
+ 0[0-9a-f]+ <[^>]+> f2860f5b 	vmov\.f32	q0, #0\.84375	; 0x3f580000
+ 0[0-9a-f]+ <[^>]+> f2870f5b 	vmov\.f32	q0, #1\.6875	; 0x3fd80000
+ 0[0-9a-f]+ <[^>]+> f2800f5c 	vmov\.f32	q0, #3\.5	; 0x40600000
+ 0[0-9a-f]+ <[^>]+> f2810f5c 	vmov\.f32	q0, #7	; 0x40e00000
+ 0[0-9a-f]+ <[^>]+> f2820f5c 	vmov\.f32	q0, #14	; 0x41600000
+ 0[0-9a-f]+ <[^>]+> f2830f5c 	vmov\.f32	q0, #28	; 0x41e00000
+ 0[0-9a-f]+ <[^>]+> f2840f5c 	vmov\.f32	q0, #0\.21875	; 0x3e600000
+ 0[0-9a-f]+ <[^>]+> f2850f5c 	vmov\.f32	q0, #0\.4375	; 0x3ee00000
+ 0[0-9a-f]+ <[^>]+> f2860f5c 	vmov\.f32	q0, #0\.875	; 0x3f600000
+ 0[0-9a-f]+ <[^>]+> f2870f5c 	vmov\.f32	q0, #1\.75	; 0x3fe00000
+ 0[0-9a-f]+ <[^>]+> f2800f5d 	vmov\.f32	q0, #3\.625	; 0x40680000
+ 0[0-9a-f]+ <[^>]+> f2810f5d 	vmov\.f32	q0, #7\.25	; 0x40e80000
+ 0[0-9a-f]+ <[^>]+> f2820f5d 	vmov\.f32	q0, #14\.5	; 0x41680000
+ 0[0-9a-f]+ <[^>]+> f2830f5d 	vmov\.f32	q0, #29	; 0x41e80000
+ 0[0-9a-f]+ <[^>]+> f2840f5d 	vmov\.f32	q0, #0\.2265625	; 0x3e680000
+ 0[0-9a-f]+ <[^>]+> f2850f5d 	vmov\.f32	q0, #0\.453125	; 0x3ee80000
+ 0[0-9a-f]+ <[^>]+> f2860f5d 	vmov\.f32	q0, #0\.90625	; 0x3f680000
+ 0[0-9a-f]+ <[^>]+> f2870f5d 	vmov\.f32	q0, #1\.8125	; 0x3fe80000
+ 0[0-9a-f]+ <[^>]+> f2800f5e 	vmov\.f32	q0, #3\.75	; 0x40700000
+ 0[0-9a-f]+ <[^>]+> f2810f5e 	vmov\.f32	q0, #7\.5	; 0x40f00000
+ 0[0-9a-f]+ <[^>]+> f2820f5e 	vmov\.f32	q0, #15	; 0x41700000
+ 0[0-9a-f]+ <[^>]+> f2830f5e 	vmov\.f32	q0, #30	; 0x41f00000
+ 0[0-9a-f]+ <[^>]+> f2840f5e 	vmov\.f32	q0, #0\.234375	; 0x3e700000
+ 0[0-9a-f]+ <[^>]+> f2850f5e 	vmov\.f32	q0, #0\.46875	; 0x3ef00000
+ 0[0-9a-f]+ <[^>]+> f2860f5e 	vmov\.f32	q0, #0\.9375	; 0x3f700000
+ 0[0-9a-f]+ <[^>]+> f2870f5e 	vmov\.f32	q0, #1\.875	; 0x3ff00000
+ 0[0-9a-f]+ <[^>]+> f2800f5f 	vmov\.f32	q0, #3\.875	; 0x40780000
+ 0[0-9a-f]+ <[^>]+> f2810f5f 	vmov\.f32	q0, #7\.75	; 0x40f80000
+ 0[0-9a-f]+ <[^>]+> f2820f5f 	vmov\.f32	q0, #15\.5	; 0x41780000
+ 0[0-9a-f]+ <[^>]+> f2830f5f 	vmov\.f32	q0, #31	; 0x41f80000
+ 0[0-9a-f]+ <[^>]+> f2840f5f 	vmov\.f32	q0, #0\.2421875	; 0x3e780000
+ 0[0-9a-f]+ <[^>]+> f2850f5f 	vmov\.f32	q0, #0\.484375	; 0x3ef80000
+ 0[0-9a-f]+ <[^>]+> f2860f5f 	vmov\.f32	q0, #0\.96875	; 0x3f780000
+ 0[0-9a-f]+ <[^>]+> f2870f5f 	vmov\.f32	q0, #1\.9375	; 0x3ff80000
+ 0[0-9a-f]+ <[^>]+> f3800650 	vmov\.i32	q0, #-2147483648	; 0x80000000
+ 0[0-9a-f]+ <[^>]+> f3800f50 	vmov\.f32	q0, #-2	; 0xc0000000
+ 0[0-9a-f]+ <[^>]+> f3810f50 	vmov\.f32	q0, #-4	; 0xc0800000
+ 0[0-9a-f]+ <[^>]+> f3820f50 	vmov\.f32	q0, #-8	; 0xc1000000
+ 0[0-9a-f]+ <[^>]+> f3830f50 	vmov\.f32	q0, #-16	; 0xc1800000
+ 0[0-9a-f]+ <[^>]+> f3840f50 	vmov\.f32	q0, #-0\.125	; 0xbe000000
+ 0[0-9a-f]+ <[^>]+> f3850f50 	vmov\.f32	q0, #-0\.25	; 0xbe800000
+ 0[0-9a-f]+ <[^>]+> f3860f50 	vmov\.f32	q0, #-0\.5	; 0xbf000000
+ 0[0-9a-f]+ <[^>]+> f3870f50 	vmov\.f32	q0, #-1	; 0xbf800000
+ 0[0-9a-f]+ <[^>]+> f3800f51 	vmov\.f32	q0, #-2\.125	; 0xc0080000
+ 0[0-9a-f]+ <[^>]+> f3810f51 	vmov\.f32	q0, #-4\.25	; 0xc0880000
+ 0[0-9a-f]+ <[^>]+> f3820f51 	vmov\.f32	q0, #-8\.5	; 0xc1080000
+ 0[0-9a-f]+ <[^>]+> f3830f51 	vmov\.f32	q0, #-17	; 0xc1880000
+ 0[0-9a-f]+ <[^>]+> f3840f51 	vmov\.f32	q0, #-0\.1328125	; 0xbe080000
+ 0[0-9a-f]+ <[^>]+> f3850f51 	vmov\.f32	q0, #-0\.265625	; 0xbe880000
+ 0[0-9a-f]+ <[^>]+> f3860f51 	vmov\.f32	q0, #-0\.53125	; 0xbf080000
+ 0[0-9a-f]+ <[^>]+> f3870f51 	vmov\.f32	q0, #-1\.0625	; 0xbf880000
+ 0[0-9a-f]+ <[^>]+> f3800f52 	vmov\.f32	q0, #-2\.25	; 0xc0100000
+ 0[0-9a-f]+ <[^>]+> f3810f52 	vmov\.f32	q0, #-4\.5	; 0xc0900000
+ 0[0-9a-f]+ <[^>]+> f3820f52 	vmov\.f32	q0, #-9	; 0xc1100000
+ 0[0-9a-f]+ <[^>]+> f3830f52 	vmov\.f32	q0, #-18	; 0xc1900000
+ 0[0-9a-f]+ <[^>]+> f3840f52 	vmov\.f32	q0, #-0\.140625	; 0xbe100000
+ 0[0-9a-f]+ <[^>]+> f3850f52 	vmov\.f32	q0, #-0\.28125	; 0xbe900000
+ 0[0-9a-f]+ <[^>]+> f3860f52 	vmov\.f32	q0, #-0\.5625	; 0xbf100000
+ 0[0-9a-f]+ <[^>]+> f3870f52 	vmov\.f32	q0, #-1\.125	; 0xbf900000
+ 0[0-9a-f]+ <[^>]+> f3800f53 	vmov\.f32	q0, #-2\.375	; 0xc0180000
+ 0[0-9a-f]+ <[^>]+> f3810f53 	vmov\.f32	q0, #-4\.75	; 0xc0980000
+ 0[0-9a-f]+ <[^>]+> f3820f53 	vmov\.f32	q0, #-9\.5	; 0xc1180000
+ 0[0-9a-f]+ <[^>]+> f3830f53 	vmov\.f32	q0, #-19	; 0xc1980000
+ 0[0-9a-f]+ <[^>]+> f3840f53 	vmov\.f32	q0, #-0\.1484375	; 0xbe180000
+ 0[0-9a-f]+ <[^>]+> f3850f53 	vmov\.f32	q0, #-0\.296875	; 0xbe980000
+ 0[0-9a-f]+ <[^>]+> f3860f53 	vmov\.f32	q0, #-0\.59375	; 0xbf180000
+ 0[0-9a-f]+ <[^>]+> f3870f53 	vmov\.f32	q0, #-1\.1875	; 0xbf980000
+ 0[0-9a-f]+ <[^>]+> f3800f54 	vmov\.f32	q0, #-2\.5	; 0xc0200000
+ 0[0-9a-f]+ <[^>]+> f3810f54 	vmov\.f32	q0, #-5	; 0xc0a00000
+ 0[0-9a-f]+ <[^>]+> f3820f54 	vmov\.f32	q0, #-10	; 0xc1200000
+ 0[0-9a-f]+ <[^>]+> f3830f54 	vmov\.f32	q0, #-20	; 0xc1a00000
+ 0[0-9a-f]+ <[^>]+> f3840f54 	vmov\.f32	q0, #-0\.15625	; 0xbe200000
+ 0[0-9a-f]+ <[^>]+> f3850f54 	vmov\.f32	q0, #-0\.3125	; 0xbea00000
+ 0[0-9a-f]+ <[^>]+> f3860f54 	vmov\.f32	q0, #-0\.625	; 0xbf200000
+ 0[0-9a-f]+ <[^>]+> f3870f54 	vmov\.f32	q0, #-1\.25	; 0xbfa00000
+ 0[0-9a-f]+ <[^>]+> f3800f55 	vmov\.f32	q0, #-2\.625	; 0xc0280000
+ 0[0-9a-f]+ <[^>]+> f3810f55 	vmov\.f32	q0, #-5\.25	; 0xc0a80000
+ 0[0-9a-f]+ <[^>]+> f3820f55 	vmov\.f32	q0, #-10\.5	; 0xc1280000
+ 0[0-9a-f]+ <[^>]+> f3830f55 	vmov\.f32	q0, #-21	; 0xc1a80000
+ 0[0-9a-f]+ <[^>]+> f3840f55 	vmov\.f32	q0, #-0\.1640625	; 0xbe280000
+ 0[0-9a-f]+ <[^>]+> f3850f55 	vmov\.f32	q0, #-0\.328125	; 0xbea80000
+ 0[0-9a-f]+ <[^>]+> f3860f55 	vmov\.f32	q0, #-0\.65625	; 0xbf280000
+ 0[0-9a-f]+ <[^>]+> f3870f55 	vmov\.f32	q0, #-1\.3125	; 0xbfa80000
+ 0[0-9a-f]+ <[^>]+> f3800f56 	vmov\.f32	q0, #-2\.75	; 0xc0300000
+ 0[0-9a-f]+ <[^>]+> f3810f56 	vmov\.f32	q0, #-5\.5	; 0xc0b00000
+ 0[0-9a-f]+ <[^>]+> f3820f56 	vmov\.f32	q0, #-11	; 0xc1300000
+ 0[0-9a-f]+ <[^>]+> f3830f56 	vmov\.f32	q0, #-22	; 0xc1b00000
+ 0[0-9a-f]+ <[^>]+> f3840f56 	vmov\.f32	q0, #-0\.171875	; 0xbe300000
+ 0[0-9a-f]+ <[^>]+> f3850f56 	vmov\.f32	q0, #-0\.34375	; 0xbeb00000
+ 0[0-9a-f]+ <[^>]+> f3860f56 	vmov\.f32	q0, #-0\.6875	; 0xbf300000
+ 0[0-9a-f]+ <[^>]+> f3870f56 	vmov\.f32	q0, #-1\.375	; 0xbfb00000
+ 0[0-9a-f]+ <[^>]+> f3800f57 	vmov\.f32	q0, #-2\.875	; 0xc0380000
+ 0[0-9a-f]+ <[^>]+> f3810f57 	vmov\.f32	q0, #-5\.75	; 0xc0b80000
+ 0[0-9a-f]+ <[^>]+> f3820f57 	vmov\.f32	q0, #-11\.5	; 0xc1380000
+ 0[0-9a-f]+ <[^>]+> f3830f57 	vmov\.f32	q0, #-23	; 0xc1b80000
+ 0[0-9a-f]+ <[^>]+> f3840f57 	vmov\.f32	q0, #-0\.1796875	; 0xbe380000
+ 0[0-9a-f]+ <[^>]+> f3850f57 	vmov\.f32	q0, #-0\.359375	; 0xbeb80000
+ 0[0-9a-f]+ <[^>]+> f3860f57 	vmov\.f32	q0, #-0\.71875	; 0xbf380000
+ 0[0-9a-f]+ <[^>]+> f3870f57 	vmov\.f32	q0, #-1\.4375	; 0xbfb80000
+ 0[0-9a-f]+ <[^>]+> f3800f58 	vmov\.f32	q0, #-3	; 0xc0400000
+ 0[0-9a-f]+ <[^>]+> f3810f58 	vmov\.f32	q0, #-6	; 0xc0c00000
+ 0[0-9a-f]+ <[^>]+> f3820f58 	vmov\.f32	q0, #-12	; 0xc1400000
+ 0[0-9a-f]+ <[^>]+> f3830f58 	vmov\.f32	q0, #-24	; 0xc1c00000
+ 0[0-9a-f]+ <[^>]+> f3840f58 	vmov\.f32	q0, #-0\.1875	; 0xbe400000
+ 0[0-9a-f]+ <[^>]+> f3850f58 	vmov\.f32	q0, #-0\.375	; 0xbec00000
+ 0[0-9a-f]+ <[^>]+> f3860f58 	vmov\.f32	q0, #-0\.75	; 0xbf400000
+ 0[0-9a-f]+ <[^>]+> f3870f58 	vmov\.f32	q0, #-1\.5	; 0xbfc00000
+ 0[0-9a-f]+ <[^>]+> f3800f59 	vmov\.f32	q0, #-3\.125	; 0xc0480000
+ 0[0-9a-f]+ <[^>]+> f3810f59 	vmov\.f32	q0, #-6\.25	; 0xc0c80000
+ 0[0-9a-f]+ <[^>]+> f3820f59 	vmov\.f32	q0, #-12\.5	; 0xc1480000
+ 0[0-9a-f]+ <[^>]+> f3830f59 	vmov\.f32	q0, #-25	; 0xc1c80000
+ 0[0-9a-f]+ <[^>]+> f3840f59 	vmov\.f32	q0, #-0\.1953125	; 0xbe480000
+ 0[0-9a-f]+ <[^>]+> f3850f59 	vmov\.f32	q0, #-0\.390625	; 0xbec80000
+ 0[0-9a-f]+ <[^>]+> f3860f59 	vmov\.f32	q0, #-0\.78125	; 0xbf480000
+ 0[0-9a-f]+ <[^>]+> f3870f59 	vmov\.f32	q0, #-1\.5625	; 0xbfc80000
+ 0[0-9a-f]+ <[^>]+> f3800f5a 	vmov\.f32	q0, #-3\.25	; 0xc0500000
+ 0[0-9a-f]+ <[^>]+> f3810f5a 	vmov\.f32	q0, #-6\.5	; 0xc0d00000
+ 0[0-9a-f]+ <[^>]+> f3820f5a 	vmov\.f32	q0, #-13	; 0xc1500000
+ 0[0-9a-f]+ <[^>]+> f3830f5a 	vmov\.f32	q0, #-26	; 0xc1d00000
+ 0[0-9a-f]+ <[^>]+> f3840f5a 	vmov\.f32	q0, #-0\.203125	; 0xbe500000
+ 0[0-9a-f]+ <[^>]+> f3850f5a 	vmov\.f32	q0, #-0\.40625	; 0xbed00000
+ 0[0-9a-f]+ <[^>]+> f3860f5a 	vmov\.f32	q0, #-0\.8125	; 0xbf500000
+ 0[0-9a-f]+ <[^>]+> f3870f5a 	vmov\.f32	q0, #-1\.625	; 0xbfd00000
+ 0[0-9a-f]+ <[^>]+> f3800f5b 	vmov\.f32	q0, #-3\.375	; 0xc0580000
+ 0[0-9a-f]+ <[^>]+> f3810f5b 	vmov\.f32	q0, #-6\.75	; 0xc0d80000
+ 0[0-9a-f]+ <[^>]+> f3820f5b 	vmov\.f32	q0, #-13\.5	; 0xc1580000
+ 0[0-9a-f]+ <[^>]+> f3830f5b 	vmov\.f32	q0, #-27	; 0xc1d80000
+ 0[0-9a-f]+ <[^>]+> f3840f5b 	vmov\.f32	q0, #-0\.2109375	; 0xbe580000
+ 0[0-9a-f]+ <[^>]+> f3850f5b 	vmov\.f32	q0, #-0\.421875	; 0xbed80000
+ 0[0-9a-f]+ <[^>]+> f3860f5b 	vmov\.f32	q0, #-0\.84375	; 0xbf580000
+ 0[0-9a-f]+ <[^>]+> f3870f5b 	vmov\.f32	q0, #-1\.6875	; 0xbfd80000
+ 0[0-9a-f]+ <[^>]+> f3800f5c 	vmov\.f32	q0, #-3\.5	; 0xc0600000
+ 0[0-9a-f]+ <[^>]+> f3810f5c 	vmov\.f32	q0, #-7	; 0xc0e00000
+ 0[0-9a-f]+ <[^>]+> f3820f5c 	vmov\.f32	q0, #-14	; 0xc1600000
+ 0[0-9a-f]+ <[^>]+> f3830f5c 	vmov\.f32	q0, #-28	; 0xc1e00000
+ 0[0-9a-f]+ <[^>]+> f3840f5c 	vmov\.f32	q0, #-0\.21875	; 0xbe600000
+ 0[0-9a-f]+ <[^>]+> f3850f5c 	vmov\.f32	q0, #-0\.4375	; 0xbee00000
+ 0[0-9a-f]+ <[^>]+> f3860f5c 	vmov\.f32	q0, #-0\.875	; 0xbf600000
+ 0[0-9a-f]+ <[^>]+> f3870f5c 	vmov\.f32	q0, #-1\.75	; 0xbfe00000
+ 0[0-9a-f]+ <[^>]+> f3800f5d 	vmov\.f32	q0, #-3\.625	; 0xc0680000
+ 0[0-9a-f]+ <[^>]+> f3810f5d 	vmov\.f32	q0, #-7\.25	; 0xc0e80000
+ 0[0-9a-f]+ <[^>]+> f3820f5d 	vmov\.f32	q0, #-14\.5	; 0xc1680000
+ 0[0-9a-f]+ <[^>]+> f3830f5d 	vmov\.f32	q0, #-29	; 0xc1e80000
+ 0[0-9a-f]+ <[^>]+> f3840f5d 	vmov\.f32	q0, #-0\.2265625	; 0xbe680000
+ 0[0-9a-f]+ <[^>]+> f3850f5d 	vmov\.f32	q0, #-0\.453125	; 0xbee80000
+ 0[0-9a-f]+ <[^>]+> f3860f5d 	vmov\.f32	q0, #-0\.90625	; 0xbf680000
+ 0[0-9a-f]+ <[^>]+> f3870f5d 	vmov\.f32	q0, #-1\.8125	; 0xbfe80000
+ 0[0-9a-f]+ <[^>]+> f3800f5e 	vmov\.f32	q0, #-3\.75	; 0xc0700000
+ 0[0-9a-f]+ <[^>]+> f3810f5e 	vmov\.f32	q0, #-7\.5	; 0xc0f00000
+ 0[0-9a-f]+ <[^>]+> f3820f5e 	vmov\.f32	q0, #-15	; 0xc1700000
+ 0[0-9a-f]+ <[^>]+> f3830f5e 	vmov\.f32	q0, #-30	; 0xc1f00000
+ 0[0-9a-f]+ <[^>]+> f3840f5e 	vmov\.f32	q0, #-0\.234375	; 0xbe700000
+ 0[0-9a-f]+ <[^>]+> f3850f5e 	vmov\.f32	q0, #-0\.46875	; 0xbef00000
+ 0[0-9a-f]+ <[^>]+> f3860f5e 	vmov\.f32	q0, #-0\.9375	; 0xbf700000
+ 0[0-9a-f]+ <[^>]+> f3870f5e 	vmov\.f32	q0, #-1\.875	; 0xbff00000
+ 0[0-9a-f]+ <[^>]+> f3800f5f 	vmov\.f32	q0, #-3\.875	; 0xc0780000
+ 0[0-9a-f]+ <[^>]+> f3810f5f 	vmov\.f32	q0, #-7\.75	; 0xc0f80000
+ 0[0-9a-f]+ <[^>]+> f3820f5f 	vmov\.f32	q0, #-15\.5	; 0xc1780000
+ 0[0-9a-f]+ <[^>]+> f3830f5f 	vmov\.f32	q0, #-31	; 0xc1f80000
+ 0[0-9a-f]+ <[^>]+> f3840f5f 	vmov\.f32	q0, #-0\.2421875	; 0xbe780000
+ 0[0-9a-f]+ <[^>]+> f3850f5f 	vmov\.f32	q0, #-0\.484375	; 0xbef80000
+ 0[0-9a-f]+ <[^>]+> f3860f5f 	vmov\.f32	q0, #-0\.96875	; 0xbf780000
+ 0[0-9a-f]+ <[^>]+> f3870f5f 	vmov\.f32	q0, #-1\.9375	; 0xbff80000
Index: gas/testsuite/gas/arm/neon-const.s
===================================================================
RCS file: gas/testsuite/gas/arm/neon-const.s
diff -N gas/testsuite/gas/arm/neon-const.s
*** /dev/null	1 Jan 1970 00:00:00 -0000
--- gas/testsuite/gas/arm/neon-const.s	23 Apr 2006 20:07:21 -0000
***************
*** 0 ****
--- 1,297 ----
+ @ test floating-point constant parsing.
+ 
+ 	.arm
+ 	.text
+ 	.syntax unified
+ 
+         vmov.f32 q0, 0
+ 
+ 	vmov.f32 q0, 2.0
+         vmov.f32 q0, 4.0
+         vmov.f32 q0, 8.0
+         vmov.f32 q0, 16.0
+         vmov.f32 q0, 0.125
+         vmov.f32 q0, 0.25
+         vmov.f32 q0, 0.5
+         vmov.f32 q0, 1.0
+ 
+         vmov.f32 q0, 2.125
+         vmov.f32 q0, 4.25
+         vmov.f32 q0, 8.5
+         vmov.f32 q0, 17.0
+         vmov.f32 q0, 0.1328125
+         vmov.f32 q0, 0.265625
+         vmov.f32 q0, 0.53125
+         vmov.f32 q0, 1.0625
+         
+         vmov.f32 q0, 2.25
+         vmov.f32 q0, 4.5
+         vmov.f32 q0, 9.0
+         vmov.f32 q0, 18.0
+         vmov.f32 q0, 0.140625
+         vmov.f32 q0, 0.28125
+         vmov.f32 q0, 0.5625
+         vmov.f32 q0, 1.125
+         
+         vmov.f32 q0, 2.375
+         vmov.f32 q0, 4.75
+         vmov.f32 q0, 9.5
+         vmov.f32 q0, 19.0
+         vmov.f32 q0, 0.1484375
+         vmov.f32 q0, 0.296875
+         vmov.f32 q0, 0.59375
+         vmov.f32 q0, 1.1875
+         
+         vmov.f32 q0, 2.5
+         vmov.f32 q0, 5.0
+         vmov.f32 q0, 10.0
+         vmov.f32 q0, 20.0
+         vmov.f32 q0, 0.15625
+         vmov.f32 q0, 0.3125
+         vmov.f32 q0, 0.625
+         vmov.f32 q0, 1.25
+         
+         vmov.f32 q0, 2.625
+         vmov.f32 q0, 5.25
+         vmov.f32 q0, 10.5
+         vmov.f32 q0, 21.0
+         vmov.f32 q0, 0.1640625
+         vmov.f32 q0, 0.328125
+         vmov.f32 q0, 0.65625
+         vmov.f32 q0, 1.3125
+         
+         vmov.f32 q0, 2.75
+         vmov.f32 q0, 5.5
+         vmov.f32 q0, 11.0
+         vmov.f32 q0, 22.0
+         vmov.f32 q0, 0.171875
+         vmov.f32 q0, 0.34375
+         vmov.f32 q0, 0.6875
+         vmov.f32 q0, 1.375
+         
+         vmov.f32 q0, 2.875
+         vmov.f32 q0, 5.75
+         vmov.f32 q0, 11.5
+         vmov.f32 q0, 23.0
+         vmov.f32 q0, 0.1796875
+         vmov.f32 q0, 0.359375
+         vmov.f32 q0, 0.71875
+         vmov.f32 q0, 1.4375
+         
+         vmov.f32 q0, 3.0
+         vmov.f32 q0, 6.0
+         vmov.f32 q0, 12.0
+         vmov.f32 q0, 24.0
+         vmov.f32 q0, 0.1875
+         vmov.f32 q0, 0.375
+         vmov.f32 q0, 0.75
+         vmov.f32 q0, 1.5
+         
+         vmov.f32 q0, 3.125
+         vmov.f32 q0, 6.25
+         vmov.f32 q0, 12.5
+         vmov.f32 q0, 25.0
+         vmov.f32 q0, 0.1953125
+         vmov.f32 q0, 0.390625
+         vmov.f32 q0, 0.78125
+         vmov.f32 q0, 1.5625
+         
+         vmov.f32 q0, 3.25
+         vmov.f32 q0, 6.5
+         vmov.f32 q0, 13.0
+         vmov.f32 q0, 26.0
+         vmov.f32 q0, 0.203125
+         vmov.f32 q0, 0.40625
+         vmov.f32 q0, 0.8125
+         vmov.f32 q0, 1.625
+         
+         vmov.f32 q0, 3.375
+         vmov.f32 q0, 6.75
+         vmov.f32 q0, 13.5
+         vmov.f32 q0, 27.0
+         vmov.f32 q0, 0.2109375
+         vmov.f32 q0, 0.421875
+         vmov.f32 q0, 0.84375
+         vmov.f32 q0, 1.6875
+ 
+         vmov.f32 q0, 3.5
+         vmov.f32 q0, 7.0
+         vmov.f32 q0, 14.0
+         vmov.f32 q0, 28.0
+         vmov.f32 q0, 0.21875
+         vmov.f32 q0, 0.4375
+         vmov.f32 q0, 0.875
+         vmov.f32 q0, 1.75
+         
+         vmov.f32 q0, 3.625
+         vmov.f32 q0, 7.25
+         vmov.f32 q0, 14.5
+         vmov.f32 q0, 29.0
+         vmov.f32 q0, 0.2265625
+         vmov.f32 q0, 0.453125
+         vmov.f32 q0, 0.90625
+         vmov.f32 q0, 1.8125
+         
+         vmov.f32 q0, 3.75
+         vmov.f32 q0, 7.5
+         vmov.f32 q0, 15.0
+         vmov.f32 q0, 30.0
+         vmov.f32 q0, 0.234375
+         vmov.f32 q0, 0.46875
+         vmov.f32 q0, 0.9375
+         vmov.f32 q0, 1.875
+         
+         vmov.f32 q0, 3.875
+         vmov.f32 q0, 7.75
+         vmov.f32 q0, 15.5
+         vmov.f32 q0, 31.0
+         vmov.f32 q0, 0.2421875
+         vmov.f32 q0, 0.484375
+         vmov.f32 q0, 0.96875
+         vmov.f32 q0, 1.9375
+ 
+         vmov.f32 q0, -0
+ 
+ 	vmov.f32 q0, -2.0
+         vmov.f32 q0, -4.0
+         vmov.f32 q0, -8.0
+         vmov.f32 q0, -16.0
+         vmov.f32 q0, -0.125
+         vmov.f32 q0, -0.25
+         vmov.f32 q0, -0.5
+         vmov.f32 q0, -1.0
+ 
+         vmov.f32 q0, -2.125
+         vmov.f32 q0, -4.25
+         vmov.f32 q0, -8.5
+         vmov.f32 q0, -17.0
+         vmov.f32 q0, -0.1328125
+         vmov.f32 q0, -0.265625
+         vmov.f32 q0, -0.53125
+         vmov.f32 q0, -1.0625
+         
+         vmov.f32 q0, -2.25
+         vmov.f32 q0, -4.5
+         vmov.f32 q0, -9.0
+         vmov.f32 q0, -18.0
+         vmov.f32 q0, -0.140625
+         vmov.f32 q0, -0.28125
+         vmov.f32 q0, -0.5625
+         vmov.f32 q0, -1.125
+         
+         vmov.f32 q0, -2.375
+         vmov.f32 q0, -4.75
+         vmov.f32 q0, -9.5
+         vmov.f32 q0, -19.0
+         vmov.f32 q0, -0.1484375
+         vmov.f32 q0, -0.296875
+         vmov.f32 q0, -0.59375
+         vmov.f32 q0, -1.1875
+         
+         vmov.f32 q0, -2.5
+         vmov.f32 q0, -5.0
+         vmov.f32 q0, -10.0
+         vmov.f32 q0, -20.0
+         vmov.f32 q0, -0.15625
+         vmov.f32 q0, -0.3125
+         vmov.f32 q0, -0.625
+         vmov.f32 q0, -1.25
+         
+         vmov.f32 q0, -2.625
+         vmov.f32 q0, -5.25
+         vmov.f32 q0, -10.5
+         vmov.f32 q0, -21.0
+         vmov.f32 q0, -0.1640625
+         vmov.f32 q0, -0.328125
+         vmov.f32 q0, -0.65625
+         vmov.f32 q0, -1.3125
+         
+         vmov.f32 q0, -2.75
+         vmov.f32 q0, -5.5
+         vmov.f32 q0, -11.0
+         vmov.f32 q0, -22.0
+         vmov.f32 q0, -0.171875
+         vmov.f32 q0, -0.34375
+         vmov.f32 q0, -0.6875
+         vmov.f32 q0, -1.375
+         
+         vmov.f32 q0, -2.875
+         vmov.f32 q0, -5.75
+         vmov.f32 q0, -11.5
+         vmov.f32 q0, -23.0
+         vmov.f32 q0, -0.1796875
+         vmov.f32 q0, -0.359375
+         vmov.f32 q0, -0.71875
+         vmov.f32 q0, -1.4375
+         
+         vmov.f32 q0, -3.0
+         vmov.f32 q0, -6.0
+         vmov.f32 q0, -12.0
+         vmov.f32 q0, -24.0
+         vmov.f32 q0, -0.1875
+         vmov.f32 q0, -0.375
+         vmov.f32 q0, -0.75
+         vmov.f32 q0, -1.5
+         
+         vmov.f32 q0, -3.125
+         vmov.f32 q0, -6.25
+         vmov.f32 q0, -12.5
+         vmov.f32 q0, -25.0
+         vmov.f32 q0, -0.1953125
+         vmov.f32 q0, -0.390625
+         vmov.f32 q0, -0.78125
+         vmov.f32 q0, -1.5625
+         
+         vmov.f32 q0, -3.25
+         vmov.f32 q0, -6.5
+         vmov.f32 q0, -13.0
+         vmov.f32 q0, -26.0
+         vmov.f32 q0, -0.203125
+         vmov.f32 q0, -0.40625
+         vmov.f32 q0, -0.8125
+         vmov.f32 q0, -1.625
+         
+         vmov.f32 q0, -3.375
+         vmov.f32 q0, -6.75
+         vmov.f32 q0, -13.5
+         vmov.f32 q0, -27.0
+         vmov.f32 q0, -0.2109375
+         vmov.f32 q0, -0.421875
+         vmov.f32 q0, -0.84375
+         vmov.f32 q0, -1.6875
+ 
+         vmov.f32 q0, -3.5
+         vmov.f32 q0, -7.0
+         vmov.f32 q0, -14.0
+         vmov.f32 q0, -28.0
+         vmov.f32 q0, -0.21875
+         vmov.f32 q0, -0.4375
+         vmov.f32 q0, -0.875
+         vmov.f32 q0, -1.75
+         
+         vmov.f32 q0, -3.625
+         vmov.f32 q0, -7.25
+         vmov.f32 q0, -14.5
+         vmov.f32 q0, -29.0
+         vmov.f32 q0, -0.2265625
+         vmov.f32 q0, -0.453125
+         vmov.f32 q0, -0.90625
+         vmov.f32 q0, -1.8125
+         
+         vmov.f32 q0, -3.75
+         vmov.f32 q0, -7.5
+         vmov.f32 q0, -15.0
+         vmov.f32 q0, -30.0
+         vmov.f32 q0, -0.234375
+         vmov.f32 q0, -0.46875
+         vmov.f32 q0, -0.9375
+         vmov.f32 q0, -1.875
+         
+         vmov.f32 q0, -3.875
+         vmov.f32 q0, -7.75
+         vmov.f32 q0, -15.5
+         vmov.f32 q0, -31.0
+         vmov.f32 q0, -0.2421875
+         vmov.f32 q0, -0.484375
+         vmov.f32 q0, -0.96875
+         vmov.f32 q0, -1.9375
Index: gas/testsuite/gas/arm/neon-cov.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/Attic/neon-cov.d,v
retrieving revision 1.1.2.1
diff -c -p -r1.1.2.1 neon-cov.d
*** gas/testsuite/gas/arm/neon-cov.d	3 Apr 2006 00:03:34 -0000	1.1.2.1
--- gas/testsuite/gas/arm/neon-cov.d	23 Apr 2006 20:07:21 -0000
*************** Disassembly of section \.text:
*** 989,996 ****
  0[0-9a-f]+ <[^>]+> f2870e17 	vmov\.i8	d0, #119	; 0x77
  0[0-9a-f]+ <[^>]+> f3810e71 	vmov\.i64	q0, #0xff0000ff000000ff
  0[0-9a-f]+ <[^>]+> f3810e31 	vmov\.i64	d0, #0xff0000ff000000ff
! 0[0-9a-f]+ <[^>]+> f2850f51 	vmov\.f32	q0, #1027866624	; 0x3d440000
! 0[0-9a-f]+ <[^>]+> f2850f11 	vmov\.f32	d0, #1027866624	; 0x3d440000
  0[0-9a-f]+ <[^>]+> f3b005c0 	vmvn	q0, q0
  0[0-9a-f]+ <[^>]+> f3b005c0 	vmvn	q0, q0
  0[0-9a-f]+ <[^>]+> f3b00580 	vmvn	d0, d0
--- 989,996 ----
  0[0-9a-f]+ <[^>]+> f2870e17 	vmov\.i8	d0, #119	; 0x77
  0[0-9a-f]+ <[^>]+> f3810e71 	vmov\.i64	q0, #0xff0000ff000000ff
  0[0-9a-f]+ <[^>]+> f3810e31 	vmov\.i64	d0, #0xff0000ff000000ff
! 0[0-9a-f]+ <[^>]+> f2810f51 	vmov\.f32	q0, #4\.25	; 0x40880000
! 0[0-9a-f]+ <[^>]+> f2810f11 	vmov\.f32	d0, #4\.25	; 0x40880000
  0[0-9a-f]+ <[^>]+> f3b005c0 	vmvn	q0, q0
  0[0-9a-f]+ <[^>]+> f3b005c0 	vmvn	q0, q0
  0[0-9a-f]+ <[^>]+> f3b00580 	vmvn	d0, d0
Index: opcodes/arm-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/arm-dis.c,v
retrieving revision 1.62.2.1
diff -c -p -r1.62.2.1 arm-dis.c
*** opcodes/arm-dis.c	3 Apr 2006 00:03:34 -0000	1.62.2.1
--- opcodes/arm-dis.c	23 Apr 2006 20:07:24 -0000
*************** print_insn_neon (struct disassemble_info
*** 2283,2288 ****
--- 2283,2289 ----
  			unsigned long value = 0, hival = 0;
  			unsigned shift;
                          int size = 0;
+                         int isfloat = 0;
  			
  			bits |= ((given >> 24) & 1) << 7;
  			bits |= ((given >> 16) & 7) << 4;
*************** print_insn_neon (struct disassemble_info
*** 2339,2349 ****
  			    /* floating point encoding */
  			    int tmp;
  			    
! 			    value = (unsigned long)(bits & 0x7f) << (24 - 6);
  			    value |= (unsigned long)(bits & 0x80) << 24;
  			    tmp = bits & 0x40 ? 0x3c : 0x40;
  			    value |= (unsigned long)tmp << 24;
                              size = 32;
  			  }
  			else
  			  {
--- 2340,2351 ----
  			    /* floating point encoding */
  			    int tmp;
  			    
! 			    value = (unsigned long)(bits & 0x7f) << 19;
  			    value |= (unsigned long)(bits & 0x80) << 24;
  			    tmp = bits & 0x40 ? 0x3c : 0x40;
  			    value |= (unsigned long)tmp << 24;
                              size = 32;
+                             isfloat = 1;
  			  }
  			else
  			  {
*************** print_insn_neon (struct disassemble_info
*** 2363,2369 ****
                              break;
  
                            case 32:
!                             func (stream, "#%ld\t; 0x%.8lx", value, value);
                              break;
  
                            case 64:
--- 2365,2404 ----
                              break;
  
                            case 32:
!                             if (isfloat)
!                               {
!                                 /* FIXME: Is there a more sane way of printing
!                                    IEEE754 floating-point numbers in binutils?
!                                    Of course, we aren't guaranteed to be on a
!                                    host system which uses them. Luckily we don't
!                                    have any fiddly corner cases to deal with. */
!                                 double sign = (value & 0x80000000) ? -1.0 : 1.0;
!                                 int exponent, mantissa;
!                                 double fvalue;
!                                 
!                                 exponent = ((value >> 23) & 0xff) - 127;
!                                 mantissa = (value & 0x7fffff) | 0x800000;
! 
!                                 /* Sanity check.  */
!                                 if (exponent < -31 || exponent > 31)
!                                   abort ();
!                                 
!                                 /* It'd be easier to use exp2 here, but that
!                                    means pulling in -lm, which we probably don't
!                                    want to do just for this.  */
!                                 if (exponent >= 0)
!                                   fvalue = (double) (1u << exponent);
!                                 else
!                                   fvalue = 1.0 / (double) (1u << -exponent);
!                                 
!                                 fvalue *= sign * (double) mantissa
!                                           / (double) (1 << 23);
!                                 
!                                 func (stream, "#%.7g\t; 0x%.8lx", fvalue,
!                                       value);
!                               }
!                             else
!                               func (stream, "#%ld\t; 0x%.8lx", value, value);
                              break;
  
                            case 64:

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH, ARM] Fix Neon floating-point constant encoding & support   floating-point syntax
  2006-04-24 12:28 [PATCH, ARM] Fix Neon floating-point constant encoding & support floating-point syntax Julian Brown
@ 2006-04-25 19:46 ` Nick Clifton
  2006-04-26  8:55   ` Julian Brown
  0 siblings, 1 reply; 5+ messages in thread
From: Nick Clifton @ 2006-04-25 19:46 UTC (permalink / raw)
  To: Julian Brown; +Cc: binutils, Paul Brook, Richard Earnshaw

Hi Julian,

> ChangeLog (gas):
> 
>     * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename
>     to...
>     (is_quarter_float): Rename from above.
>     (parse_qfloat_immediate): Parse a "quarter precision" floating-point
>     number.
>     (parse_neon_mov): Parse floating-point constants.
>     (neon_qfloat_bits): Fix encoding.
>     (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
>     preference to integer encoding when using the F32 type.
> 
> ChangeLog (gas/testsuite):
> 
>     * gas/testsuite/gas/arm/neon-const.s: New testcase. Neon
>     floating-point constants.
>     * gas/testsuite/gas/arm/neon-const.d: Expected output of above.
>     * gas/testsuite/gas/arm/neon-cov.d: Expect floating-point
>     disassembly for VMOV.F32.
> 
> ChangeLog (opcodes):
> 
>     * arm-dis.c (print_insn_neon): Disassemble floating-point constant
>     VMOV.

Approved for mainline.

Cheers
   Nick


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH, ARM] Fix Neon floating-point constant encoding & support   floating-point syntax
  2006-04-25 19:46 ` Nick Clifton
@ 2006-04-26  8:55   ` Julian Brown
  2006-04-26 11:58     ` Nick Clifton
  2006-04-27  0:35     ` Paul Brook
  0 siblings, 2 replies; 5+ messages in thread
From: Julian Brown @ 2006-04-26  8:55 UTC (permalink / raw)
  To: Nick Clifton; +Cc: binutils, Paul Brook, Richard Earnshaw

[-- Attachment #1: Type: text/plain, Size: 1460 bytes --]

Nick Clifton wrote:
> 
> Approved for mainline.
> 

Thanks! I've got a slightly-improved version of this patch thanks to 
offline discussion with Paul Brook though, which uses a generic function 
to help with the printing of float immediates. It relies on this 
(applied) fix:

http://gcc.gnu.org/ml/gcc-patches/2006-04/msg00925.html

The only differences are in arm-dis.c, and a small cleanup in 
is_quarter_float. Sorry for the hassle (the difference is probably small 
enough to count as obvious), but is this still OK to apply on mainline? 
(And also on the CSL branch?).

Thanks,

Julian

ChangeLog (gas):

     * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename
     to...
     (is_quarter_float): Rename from above. Simplify slightly.
     (parse_qfloat_immediate): Parse a "quarter precision" floating-point
     number.
     (parse_neon_mov): Parse floating-point constants.
     (neon_qfloat_bits): Fix encoding.
     (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
     preference to integer encoding when using the F32 type.

ChangeLog (gas/testsuite):

     * gas/testsuite/gas/arm/neon-const.s: New testcase. Neon
     floating-point constants.
     * gas/testsuite/gas/arm/neon-const.d: Expected output of above.
     * gas/testsuite/gas/arm/neon-cov.d: Expect floating-point
     disassembly for VMOV.F32.

ChangeLog (opcodes):

     * arm-dis.c (print_insn_neon): Disassemble floating-point constant
     VMOV.

[-- Attachment #2: neon-float-const-2 --]
[-- Type: text/plain, Size: 37030 bytes --]

? bfd/doc/bfd.info
? binutils/doc/binutils.info
? gas/doc/as.info
? ld/ld.info
Index: gas/config/tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.250.2.9
diff -c -p -r1.250.2.9 tc-arm.c
*** gas/config/tc-arm.c	7 Apr 2006 15:46:20 -0000	1.250.2.9
--- gas/config/tc-arm.c	24 Apr 2006 21:39:20 -0000
*************** parse_fpa_immediate (char ** str)
*** 3994,3999 ****
--- 3994,4048 ----
    return FAIL;
  }
  
+ /* Returns 1 if a number has "quarter-precision" float format
+    0baBbbbbbc defgh000 00000000 00000000.  */
+ 
+ static int
+ is_quarter_float (unsigned imm)
+ {
+   int bs = (imm & 0x20000000) ? 0x3e000000 : 0x40000000;
+   return (imm & 0x7ffff) == 0 && ((imm & 0x7e000000) ^ bs) == 0;
+ }
+ 
+ /* Parse an 8-bit "quarter-precision" floating point number of the form:
+    0baBbbbbbc defgh000 00000000 00000000.
+    The minus-zero case needs special handling, since it can't be encoded in the
+    "quarter-precision" float format, but can nonetheless be loaded as an integer
+    constant.  */
+ 
+ static unsigned
+ parse_qfloat_immediate (char **ccp, int *immed)
+ {
+   char *str = *ccp;
+   LITTLENUM_TYPE words[MAX_LITTLENUMS];
+   
+   skip_past_char (&str, '#');
+   
+   if ((str = atof_ieee (str, 's', words)) != NULL)
+     {
+       unsigned fpword = 0;
+       int i;
+       
+       /* Our FP word must be 32 bits (single-precision FP).  */
+       for (i = 0; i < 32 / LITTLENUM_NUMBER_OF_BITS; i++)
+         {
+           fpword <<= LITTLENUM_NUMBER_OF_BITS;
+           fpword |= words[i];
+         }
+       
+       if (is_quarter_float (fpword) || fpword == 0x80000000)
+         *immed = fpword;
+       else
+         return FAIL;
+ 
+       *ccp = str;
+       
+       return SUCCESS;
+     }
+   
+   return FAIL;
+ }
+ 
  /* Shift operands.  */
  enum shift_kind
  {
*************** parse_neon_mov (char **str, int *which_o
*** 4702,4707 ****
--- 4751,4763 ----
            inst.operands[i].isreg = 1;
            inst.operands[i].present = 1;
          }
+       else if (parse_qfloat_immediate (&ptr, &inst.operands[i].imm) == SUCCESS)
+         {
+           /* Case 2: VMOV<c><q>.<dt> <Qd>, #<float-imm>
+              Case 3: VMOV<c><q>.<dt> <Dd>, #<float-imm>  */
+           if (!thumb_mode && (inst.instruction & 0xf0000000) != 0xe0000000)
+             goto bad_cond;
+         }
        else if (parse_big_immediate (&ptr, i) == SUCCESS)
          {
            /* Case 2: VMOV<c><q>.<dt> <Qd>, #<imm>
*************** neon_squash_bits (unsigned imm)
*** 10214,10238 ****
           | ((imm & 0x01000000) >> 21);
  }
  
! /* Returns 1 if a number has "quarter-precision" float format
!    0baBbbbbbc defgh000 00000000 00000000.  */
! 
! static int
! neon_is_quarter_float (unsigned imm)
! {
!   int b = (imm & 0x20000000) != 0;
!   int bs = (b << 25) | (b << 26) | (b << 27) | (b << 28) | (b << 29)
!            | ((!b) << 30);
!   return (imm & 0x81ffffff) == (imm & 0x81f80000)
!          && ((imm & 0x7e000000) ^ bs) == 0;
! }
! 
! /* Compress above representation to 0b...000 abcdefgh.  */
  
  static unsigned
  neon_qfloat_bits (unsigned imm)
  {
!   return ((imm >> 19) & 0x7f) | (imm >> 24);
  }
  
  /* Returns CMODE. IMMBITS [7:0] is set to bits suitable for inserting into
--- 10270,10281 ----
           | ((imm & 0x01000000) >> 21);
  }
  
! /* Compress quarter-float representation to 0b...000 abcdefgh.  */
  
  static unsigned
  neon_qfloat_bits (unsigned imm)
  {
!   return ((imm >> 19) & 0x7f) | ((imm >> 24) & 0x80);
  }
  
  /* Returns CMODE. IMMBITS [7:0] is set to bits suitable for inserting into
*************** neon_qfloat_bits (unsigned imm)
*** 10243,10251 ****
  
  static int
  neon_cmode_for_move_imm (unsigned immlo, unsigned immhi, unsigned *immbits,
!                          int *op, int size)
  {
!   if (size == 64 && neon_bits_same_in_bytes (immhi)
        && neon_bits_same_in_bytes (immlo))
      {
        /* Check this one first so we don't have to bother with immhi in later
--- 10286,10301 ----
  
  static int
  neon_cmode_for_move_imm (unsigned immlo, unsigned immhi, unsigned *immbits,
!                          int *op, int size, enum neon_el_type type)
  {
!   if (type == NT_float && is_quarter_float (immlo) && immhi == 0)
!     {
!       if (size != 32 || *op == 1)
!         return FAIL;
!       *immbits = neon_qfloat_bits (immlo);
!       return 0xf;
!     }
!   else if (size == 64 && neon_bits_same_in_bytes (immhi)
        && neon_bits_same_in_bytes (immlo))
      {
        /* Check this one first so we don't have to bother with immhi in later
*************** neon_cmode_for_move_imm (unsigned immlo,
*** 10303,10315 ****
        *immbits = (immlo >> 16) & 0xff;
        return 0xd;
      }
-   else if (neon_is_quarter_float (immlo))
-     {
-       if (size != 32 || *op == 1)
-         return FAIL;
-       *immbits = neon_qfloat_bits (immlo);
-       return 0xf;
-     }
  
    return FAIL;
  }
--- 10353,10358 ----
*************** neon_move_immediate (void)
*** 10996,11002 ****
                _("immediate has bits set outside the operand size"));
  
    if ((cmode = neon_cmode_for_move_imm (immlo, immhi, &immbits, &op,
!                                         et.size)) == FAIL)
      {
        /* Invert relevant bits only.  */
        neon_invert_size (&immlo, &immhi, et.size);
--- 11039,11045 ----
                _("immediate has bits set outside the operand size"));
  
    if ((cmode = neon_cmode_for_move_imm (immlo, immhi, &immbits, &op,
!                                         et.size, et.type)) == FAIL)
      {
        /* Invert relevant bits only.  */
        neon_invert_size (&immlo, &immhi, et.size);
*************** neon_move_immediate (void)
*** 11005,11011 ****
           neon_cmode_for_move_imm.  */
        op = !op;
        if ((cmode = neon_cmode_for_move_imm (immlo, immhi, &immbits, &op,
!                                             et.size)) == FAIL)
          {
            first_error (_("immediate out of range"));
            return;
--- 11048,11054 ----
           neon_cmode_for_move_imm.  */
        op = !op;
        if ((cmode = neon_cmode_for_move_imm (immlo, immhi, &immbits, &op,
!                                             et.size, et.type)) == FAIL)
          {
            first_error (_("immediate out of range"));
            return;
Index: gas/testsuite/gas/arm/neon-const.d
===================================================================
RCS file: gas/testsuite/gas/arm/neon-const.d
diff -N gas/testsuite/gas/arm/neon-const.d
*** /dev/null	1 Jan 1970 00:00:00 -0000
--- gas/testsuite/gas/arm/neon-const.d	24 Apr 2006 21:39:21 -0000
***************
*** 0 ****
--- 1,265 ----
+ # name: Neon floating-point constants
+ # as: -mfpu=neon
+ # objdump: -dr --prefix-addresses --show-raw-insn
+ 
+ .*: +file format .*arm.*
+ 
+ Disassembly of section .text:
+ 0[0-9a-f]+ <[^>]+> f2800050 	vmov\.i32	q0, #0	; 0x00000000
+ 0[0-9a-f]+ <[^>]+> f2800f50 	vmov\.f32	q0, #2	; 0x40000000
+ 0[0-9a-f]+ <[^>]+> f2810f50 	vmov\.f32	q0, #4	; 0x40800000
+ 0[0-9a-f]+ <[^>]+> f2820f50 	vmov\.f32	q0, #8	; 0x41000000
+ 0[0-9a-f]+ <[^>]+> f2830f50 	vmov\.f32	q0, #16	; 0x41800000
+ 0[0-9a-f]+ <[^>]+> f2840f50 	vmov\.f32	q0, #0\.125	; 0x3e000000
+ 0[0-9a-f]+ <[^>]+> f2850f50 	vmov\.f32	q0, #0\.25	; 0x3e800000
+ 0[0-9a-f]+ <[^>]+> f2860f50 	vmov\.f32	q0, #0\.5	; 0x3f000000
+ 0[0-9a-f]+ <[^>]+> f2870f50 	vmov\.f32	q0, #1	; 0x3f800000
+ 0[0-9a-f]+ <[^>]+> f2800f51 	vmov\.f32	q0, #2\.125	; 0x40080000
+ 0[0-9a-f]+ <[^>]+> f2810f51 	vmov\.f32	q0, #4\.25	; 0x40880000
+ 0[0-9a-f]+ <[^>]+> f2820f51 	vmov\.f32	q0, #8\.5	; 0x41080000
+ 0[0-9a-f]+ <[^>]+> f2830f51 	vmov\.f32	q0, #17	; 0x41880000
+ 0[0-9a-f]+ <[^>]+> f2840f51 	vmov\.f32	q0, #0\.1328125	; 0x3e080000
+ 0[0-9a-f]+ <[^>]+> f2850f51 	vmov\.f32	q0, #0\.265625	; 0x3e880000
+ 0[0-9a-f]+ <[^>]+> f2860f51 	vmov\.f32	q0, #0\.53125	; 0x3f080000
+ 0[0-9a-f]+ <[^>]+> f2870f51 	vmov\.f32	q0, #1\.0625	; 0x3f880000
+ 0[0-9a-f]+ <[^>]+> f2800f52 	vmov\.f32	q0, #2\.25	; 0x40100000
+ 0[0-9a-f]+ <[^>]+> f2810f52 	vmov\.f32	q0, #4\.5	; 0x40900000
+ 0[0-9a-f]+ <[^>]+> f2820f52 	vmov\.f32	q0, #9	; 0x41100000
+ 0[0-9a-f]+ <[^>]+> f2830f52 	vmov\.f32	q0, #18	; 0x41900000
+ 0[0-9a-f]+ <[^>]+> f2840f52 	vmov\.f32	q0, #0\.140625	; 0x3e100000
+ 0[0-9a-f]+ <[^>]+> f2850f52 	vmov\.f32	q0, #0\.28125	; 0x3e900000
+ 0[0-9a-f]+ <[^>]+> f2860f52 	vmov\.f32	q0, #0\.5625	; 0x3f100000
+ 0[0-9a-f]+ <[^>]+> f2870f52 	vmov\.f32	q0, #1\.125	; 0x3f900000
+ 0[0-9a-f]+ <[^>]+> f2800f53 	vmov\.f32	q0, #2\.375	; 0x40180000
+ 0[0-9a-f]+ <[^>]+> f2810f53 	vmov\.f32	q0, #4\.75	; 0x40980000
+ 0[0-9a-f]+ <[^>]+> f2820f53 	vmov\.f32	q0, #9\.5	; 0x41180000
+ 0[0-9a-f]+ <[^>]+> f2830f53 	vmov\.f32	q0, #19	; 0x41980000
+ 0[0-9a-f]+ <[^>]+> f2840f53 	vmov\.f32	q0, #0\.1484375	; 0x3e180000
+ 0[0-9a-f]+ <[^>]+> f2850f53 	vmov\.f32	q0, #0\.296875	; 0x3e980000
+ 0[0-9a-f]+ <[^>]+> f2860f53 	vmov\.f32	q0, #0\.59375	; 0x3f180000
+ 0[0-9a-f]+ <[^>]+> f2870f53 	vmov\.f32	q0, #1\.1875	; 0x3f980000
+ 0[0-9a-f]+ <[^>]+> f2800f54 	vmov\.f32	q0, #2\.5	; 0x40200000
+ 0[0-9a-f]+ <[^>]+> f2810f54 	vmov\.f32	q0, #5	; 0x40a00000
+ 0[0-9a-f]+ <[^>]+> f2820f54 	vmov\.f32	q0, #10	; 0x41200000
+ 0[0-9a-f]+ <[^>]+> f2830f54 	vmov\.f32	q0, #20	; 0x41a00000
+ 0[0-9a-f]+ <[^>]+> f2840f54 	vmov\.f32	q0, #0\.15625	; 0x3e200000
+ 0[0-9a-f]+ <[^>]+> f2850f54 	vmov\.f32	q0, #0\.3125	; 0x3ea00000
+ 0[0-9a-f]+ <[^>]+> f2860f54 	vmov\.f32	q0, #0\.625	; 0x3f200000
+ 0[0-9a-f]+ <[^>]+> f2870f54 	vmov\.f32	q0, #1\.25	; 0x3fa00000
+ 0[0-9a-f]+ <[^>]+> f2800f55 	vmov\.f32	q0, #2\.625	; 0x40280000
+ 0[0-9a-f]+ <[^>]+> f2810f55 	vmov\.f32	q0, #5\.25	; 0x40a80000
+ 0[0-9a-f]+ <[^>]+> f2820f55 	vmov\.f32	q0, #10\.5	; 0x41280000
+ 0[0-9a-f]+ <[^>]+> f2830f55 	vmov\.f32	q0, #21	; 0x41a80000
+ 0[0-9a-f]+ <[^>]+> f2840f55 	vmov\.f32	q0, #0\.1640625	; 0x3e280000
+ 0[0-9a-f]+ <[^>]+> f2850f55 	vmov\.f32	q0, #0\.328125	; 0x3ea80000
+ 0[0-9a-f]+ <[^>]+> f2860f55 	vmov\.f32	q0, #0\.65625	; 0x3f280000
+ 0[0-9a-f]+ <[^>]+> f2870f55 	vmov\.f32	q0, #1\.3125	; 0x3fa80000
+ 0[0-9a-f]+ <[^>]+> f2800f56 	vmov\.f32	q0, #2\.75	; 0x40300000
+ 0[0-9a-f]+ <[^>]+> f2810f56 	vmov\.f32	q0, #5\.5	; 0x40b00000
+ 0[0-9a-f]+ <[^>]+> f2820f56 	vmov\.f32	q0, #11	; 0x41300000
+ 0[0-9a-f]+ <[^>]+> f2830f56 	vmov\.f32	q0, #22	; 0x41b00000
+ 0[0-9a-f]+ <[^>]+> f2840f56 	vmov\.f32	q0, #0\.171875	; 0x3e300000
+ 0[0-9a-f]+ <[^>]+> f2850f56 	vmov\.f32	q0, #0\.34375	; 0x3eb00000
+ 0[0-9a-f]+ <[^>]+> f2860f56 	vmov\.f32	q0, #0\.6875	; 0x3f300000
+ 0[0-9a-f]+ <[^>]+> f2870f56 	vmov\.f32	q0, #1\.375	; 0x3fb00000
+ 0[0-9a-f]+ <[^>]+> f2800f57 	vmov\.f32	q0, #2\.875	; 0x40380000
+ 0[0-9a-f]+ <[^>]+> f2810f57 	vmov\.f32	q0, #5\.75	; 0x40b80000
+ 0[0-9a-f]+ <[^>]+> f2820f57 	vmov\.f32	q0, #11\.5	; 0x41380000
+ 0[0-9a-f]+ <[^>]+> f2830f57 	vmov\.f32	q0, #23	; 0x41b80000
+ 0[0-9a-f]+ <[^>]+> f2840f57 	vmov\.f32	q0, #0\.1796875	; 0x3e380000
+ 0[0-9a-f]+ <[^>]+> f2850f57 	vmov\.f32	q0, #0\.359375	; 0x3eb80000
+ 0[0-9a-f]+ <[^>]+> f2860f57 	vmov\.f32	q0, #0\.71875	; 0x3f380000
+ 0[0-9a-f]+ <[^>]+> f2870f57 	vmov\.f32	q0, #1\.4375	; 0x3fb80000
+ 0[0-9a-f]+ <[^>]+> f2800f58 	vmov\.f32	q0, #3	; 0x40400000
+ 0[0-9a-f]+ <[^>]+> f2810f58 	vmov\.f32	q0, #6	; 0x40c00000
+ 0[0-9a-f]+ <[^>]+> f2820f58 	vmov\.f32	q0, #12	; 0x41400000
+ 0[0-9a-f]+ <[^>]+> f2830f58 	vmov\.f32	q0, #24	; 0x41c00000
+ 0[0-9a-f]+ <[^>]+> f2840f58 	vmov\.f32	q0, #0\.1875	; 0x3e400000
+ 0[0-9a-f]+ <[^>]+> f2850f58 	vmov\.f32	q0, #0\.375	; 0x3ec00000
+ 0[0-9a-f]+ <[^>]+> f2860f58 	vmov\.f32	q0, #0\.75	; 0x3f400000
+ 0[0-9a-f]+ <[^>]+> f2870f58 	vmov\.f32	q0, #1\.5	; 0x3fc00000
+ 0[0-9a-f]+ <[^>]+> f2800f59 	vmov\.f32	q0, #3\.125	; 0x40480000
+ 0[0-9a-f]+ <[^>]+> f2810f59 	vmov\.f32	q0, #6\.25	; 0x40c80000
+ 0[0-9a-f]+ <[^>]+> f2820f59 	vmov\.f32	q0, #12\.5	; 0x41480000
+ 0[0-9a-f]+ <[^>]+> f2830f59 	vmov\.f32	q0, #25	; 0x41c80000
+ 0[0-9a-f]+ <[^>]+> f2840f59 	vmov\.f32	q0, #0\.1953125	; 0x3e480000
+ 0[0-9a-f]+ <[^>]+> f2850f59 	vmov\.f32	q0, #0\.390625	; 0x3ec80000
+ 0[0-9a-f]+ <[^>]+> f2860f59 	vmov\.f32	q0, #0\.78125	; 0x3f480000
+ 0[0-9a-f]+ <[^>]+> f2870f59 	vmov\.f32	q0, #1\.5625	; 0x3fc80000
+ 0[0-9a-f]+ <[^>]+> f2800f5a 	vmov\.f32	q0, #3\.25	; 0x40500000
+ 0[0-9a-f]+ <[^>]+> f2810f5a 	vmov\.f32	q0, #6\.5	; 0x40d00000
+ 0[0-9a-f]+ <[^>]+> f2820f5a 	vmov\.f32	q0, #13	; 0x41500000
+ 0[0-9a-f]+ <[^>]+> f2830f5a 	vmov\.f32	q0, #26	; 0x41d00000
+ 0[0-9a-f]+ <[^>]+> f2840f5a 	vmov\.f32	q0, #0\.203125	; 0x3e500000
+ 0[0-9a-f]+ <[^>]+> f2850f5a 	vmov\.f32	q0, #0\.40625	; 0x3ed00000
+ 0[0-9a-f]+ <[^>]+> f2860f5a 	vmov\.f32	q0, #0\.8125	; 0x3f500000
+ 0[0-9a-f]+ <[^>]+> f2870f5a 	vmov\.f32	q0, #1\.625	; 0x3fd00000
+ 0[0-9a-f]+ <[^>]+> f2800f5b 	vmov\.f32	q0, #3\.375	; 0x40580000
+ 0[0-9a-f]+ <[^>]+> f2810f5b 	vmov\.f32	q0, #6\.75	; 0x40d80000
+ 0[0-9a-f]+ <[^>]+> f2820f5b 	vmov\.f32	q0, #13\.5	; 0x41580000
+ 0[0-9a-f]+ <[^>]+> f2830f5b 	vmov\.f32	q0, #27	; 0x41d80000
+ 0[0-9a-f]+ <[^>]+> f2840f5b 	vmov\.f32	q0, #0\.2109375	; 0x3e580000
+ 0[0-9a-f]+ <[^>]+> f2850f5b 	vmov\.f32	q0, #0\.421875	; 0x3ed80000
+ 0[0-9a-f]+ <[^>]+> f2860f5b 	vmov\.f32	q0, #0\.84375	; 0x3f580000
+ 0[0-9a-f]+ <[^>]+> f2870f5b 	vmov\.f32	q0, #1\.6875	; 0x3fd80000
+ 0[0-9a-f]+ <[^>]+> f2800f5c 	vmov\.f32	q0, #3\.5	; 0x40600000
+ 0[0-9a-f]+ <[^>]+> f2810f5c 	vmov\.f32	q0, #7	; 0x40e00000
+ 0[0-9a-f]+ <[^>]+> f2820f5c 	vmov\.f32	q0, #14	; 0x41600000
+ 0[0-9a-f]+ <[^>]+> f2830f5c 	vmov\.f32	q0, #28	; 0x41e00000
+ 0[0-9a-f]+ <[^>]+> f2840f5c 	vmov\.f32	q0, #0\.21875	; 0x3e600000
+ 0[0-9a-f]+ <[^>]+> f2850f5c 	vmov\.f32	q0, #0\.4375	; 0x3ee00000
+ 0[0-9a-f]+ <[^>]+> f2860f5c 	vmov\.f32	q0, #0\.875	; 0x3f600000
+ 0[0-9a-f]+ <[^>]+> f2870f5c 	vmov\.f32	q0, #1\.75	; 0x3fe00000
+ 0[0-9a-f]+ <[^>]+> f2800f5d 	vmov\.f32	q0, #3\.625	; 0x40680000
+ 0[0-9a-f]+ <[^>]+> f2810f5d 	vmov\.f32	q0, #7\.25	; 0x40e80000
+ 0[0-9a-f]+ <[^>]+> f2820f5d 	vmov\.f32	q0, #14\.5	; 0x41680000
+ 0[0-9a-f]+ <[^>]+> f2830f5d 	vmov\.f32	q0, #29	; 0x41e80000
+ 0[0-9a-f]+ <[^>]+> f2840f5d 	vmov\.f32	q0, #0\.2265625	; 0x3e680000
+ 0[0-9a-f]+ <[^>]+> f2850f5d 	vmov\.f32	q0, #0\.453125	; 0x3ee80000
+ 0[0-9a-f]+ <[^>]+> f2860f5d 	vmov\.f32	q0, #0\.90625	; 0x3f680000
+ 0[0-9a-f]+ <[^>]+> f2870f5d 	vmov\.f32	q0, #1\.8125	; 0x3fe80000
+ 0[0-9a-f]+ <[^>]+> f2800f5e 	vmov\.f32	q0, #3\.75	; 0x40700000
+ 0[0-9a-f]+ <[^>]+> f2810f5e 	vmov\.f32	q0, #7\.5	; 0x40f00000
+ 0[0-9a-f]+ <[^>]+> f2820f5e 	vmov\.f32	q0, #15	; 0x41700000
+ 0[0-9a-f]+ <[^>]+> f2830f5e 	vmov\.f32	q0, #30	; 0x41f00000
+ 0[0-9a-f]+ <[^>]+> f2840f5e 	vmov\.f32	q0, #0\.234375	; 0x3e700000
+ 0[0-9a-f]+ <[^>]+> f2850f5e 	vmov\.f32	q0, #0\.46875	; 0x3ef00000
+ 0[0-9a-f]+ <[^>]+> f2860f5e 	vmov\.f32	q0, #0\.9375	; 0x3f700000
+ 0[0-9a-f]+ <[^>]+> f2870f5e 	vmov\.f32	q0, #1\.875	; 0x3ff00000
+ 0[0-9a-f]+ <[^>]+> f2800f5f 	vmov\.f32	q0, #3\.875	; 0x40780000
+ 0[0-9a-f]+ <[^>]+> f2810f5f 	vmov\.f32	q0, #7\.75	; 0x40f80000
+ 0[0-9a-f]+ <[^>]+> f2820f5f 	vmov\.f32	q0, #15\.5	; 0x41780000
+ 0[0-9a-f]+ <[^>]+> f2830f5f 	vmov\.f32	q0, #31	; 0x41f80000
+ 0[0-9a-f]+ <[^>]+> f2840f5f 	vmov\.f32	q0, #0\.2421875	; 0x3e780000
+ 0[0-9a-f]+ <[^>]+> f2850f5f 	vmov\.f32	q0, #0\.484375	; 0x3ef80000
+ 0[0-9a-f]+ <[^>]+> f2860f5f 	vmov\.f32	q0, #0\.96875	; 0x3f780000
+ 0[0-9a-f]+ <[^>]+> f2870f5f 	vmov\.f32	q0, #1\.9375	; 0x3ff80000
+ 0[0-9a-f]+ <[^>]+> f3800650 	vmov\.i32	q0, #-2147483648	; 0x80000000
+ 0[0-9a-f]+ <[^>]+> f3800f50 	vmov\.f32	q0, #-2	; 0xc0000000
+ 0[0-9a-f]+ <[^>]+> f3810f50 	vmov\.f32	q0, #-4	; 0xc0800000
+ 0[0-9a-f]+ <[^>]+> f3820f50 	vmov\.f32	q0, #-8	; 0xc1000000
+ 0[0-9a-f]+ <[^>]+> f3830f50 	vmov\.f32	q0, #-16	; 0xc1800000
+ 0[0-9a-f]+ <[^>]+> f3840f50 	vmov\.f32	q0, #-0\.125	; 0xbe000000
+ 0[0-9a-f]+ <[^>]+> f3850f50 	vmov\.f32	q0, #-0\.25	; 0xbe800000
+ 0[0-9a-f]+ <[^>]+> f3860f50 	vmov\.f32	q0, #-0\.5	; 0xbf000000
+ 0[0-9a-f]+ <[^>]+> f3870f50 	vmov\.f32	q0, #-1	; 0xbf800000
+ 0[0-9a-f]+ <[^>]+> f3800f51 	vmov\.f32	q0, #-2\.125	; 0xc0080000
+ 0[0-9a-f]+ <[^>]+> f3810f51 	vmov\.f32	q0, #-4\.25	; 0xc0880000
+ 0[0-9a-f]+ <[^>]+> f3820f51 	vmov\.f32	q0, #-8\.5	; 0xc1080000
+ 0[0-9a-f]+ <[^>]+> f3830f51 	vmov\.f32	q0, #-17	; 0xc1880000
+ 0[0-9a-f]+ <[^>]+> f3840f51 	vmov\.f32	q0, #-0\.1328125	; 0xbe080000
+ 0[0-9a-f]+ <[^>]+> f3850f51 	vmov\.f32	q0, #-0\.265625	; 0xbe880000
+ 0[0-9a-f]+ <[^>]+> f3860f51 	vmov\.f32	q0, #-0\.53125	; 0xbf080000
+ 0[0-9a-f]+ <[^>]+> f3870f51 	vmov\.f32	q0, #-1\.0625	; 0xbf880000
+ 0[0-9a-f]+ <[^>]+> f3800f52 	vmov\.f32	q0, #-2\.25	; 0xc0100000
+ 0[0-9a-f]+ <[^>]+> f3810f52 	vmov\.f32	q0, #-4\.5	; 0xc0900000
+ 0[0-9a-f]+ <[^>]+> f3820f52 	vmov\.f32	q0, #-9	; 0xc1100000
+ 0[0-9a-f]+ <[^>]+> f3830f52 	vmov\.f32	q0, #-18	; 0xc1900000
+ 0[0-9a-f]+ <[^>]+> f3840f52 	vmov\.f32	q0, #-0\.140625	; 0xbe100000
+ 0[0-9a-f]+ <[^>]+> f3850f52 	vmov\.f32	q0, #-0\.28125	; 0xbe900000
+ 0[0-9a-f]+ <[^>]+> f3860f52 	vmov\.f32	q0, #-0\.5625	; 0xbf100000
+ 0[0-9a-f]+ <[^>]+> f3870f52 	vmov\.f32	q0, #-1\.125	; 0xbf900000
+ 0[0-9a-f]+ <[^>]+> f3800f53 	vmov\.f32	q0, #-2\.375	; 0xc0180000
+ 0[0-9a-f]+ <[^>]+> f3810f53 	vmov\.f32	q0, #-4\.75	; 0xc0980000
+ 0[0-9a-f]+ <[^>]+> f3820f53 	vmov\.f32	q0, #-9\.5	; 0xc1180000
+ 0[0-9a-f]+ <[^>]+> f3830f53 	vmov\.f32	q0, #-19	; 0xc1980000
+ 0[0-9a-f]+ <[^>]+> f3840f53 	vmov\.f32	q0, #-0\.1484375	; 0xbe180000
+ 0[0-9a-f]+ <[^>]+> f3850f53 	vmov\.f32	q0, #-0\.296875	; 0xbe980000
+ 0[0-9a-f]+ <[^>]+> f3860f53 	vmov\.f32	q0, #-0\.59375	; 0xbf180000
+ 0[0-9a-f]+ <[^>]+> f3870f53 	vmov\.f32	q0, #-1\.1875	; 0xbf980000
+ 0[0-9a-f]+ <[^>]+> f3800f54 	vmov\.f32	q0, #-2\.5	; 0xc0200000
+ 0[0-9a-f]+ <[^>]+> f3810f54 	vmov\.f32	q0, #-5	; 0xc0a00000
+ 0[0-9a-f]+ <[^>]+> f3820f54 	vmov\.f32	q0, #-10	; 0xc1200000
+ 0[0-9a-f]+ <[^>]+> f3830f54 	vmov\.f32	q0, #-20	; 0xc1a00000
+ 0[0-9a-f]+ <[^>]+> f3840f54 	vmov\.f32	q0, #-0\.15625	; 0xbe200000
+ 0[0-9a-f]+ <[^>]+> f3850f54 	vmov\.f32	q0, #-0\.3125	; 0xbea00000
+ 0[0-9a-f]+ <[^>]+> f3860f54 	vmov\.f32	q0, #-0\.625	; 0xbf200000
+ 0[0-9a-f]+ <[^>]+> f3870f54 	vmov\.f32	q0, #-1\.25	; 0xbfa00000
+ 0[0-9a-f]+ <[^>]+> f3800f55 	vmov\.f32	q0, #-2\.625	; 0xc0280000
+ 0[0-9a-f]+ <[^>]+> f3810f55 	vmov\.f32	q0, #-5\.25	; 0xc0a80000
+ 0[0-9a-f]+ <[^>]+> f3820f55 	vmov\.f32	q0, #-10\.5	; 0xc1280000
+ 0[0-9a-f]+ <[^>]+> f3830f55 	vmov\.f32	q0, #-21	; 0xc1a80000
+ 0[0-9a-f]+ <[^>]+> f3840f55 	vmov\.f32	q0, #-0\.1640625	; 0xbe280000
+ 0[0-9a-f]+ <[^>]+> f3850f55 	vmov\.f32	q0, #-0\.328125	; 0xbea80000
+ 0[0-9a-f]+ <[^>]+> f3860f55 	vmov\.f32	q0, #-0\.65625	; 0xbf280000
+ 0[0-9a-f]+ <[^>]+> f3870f55 	vmov\.f32	q0, #-1\.3125	; 0xbfa80000
+ 0[0-9a-f]+ <[^>]+> f3800f56 	vmov\.f32	q0, #-2\.75	; 0xc0300000
+ 0[0-9a-f]+ <[^>]+> f3810f56 	vmov\.f32	q0, #-5\.5	; 0xc0b00000
+ 0[0-9a-f]+ <[^>]+> f3820f56 	vmov\.f32	q0, #-11	; 0xc1300000
+ 0[0-9a-f]+ <[^>]+> f3830f56 	vmov\.f32	q0, #-22	; 0xc1b00000
+ 0[0-9a-f]+ <[^>]+> f3840f56 	vmov\.f32	q0, #-0\.171875	; 0xbe300000
+ 0[0-9a-f]+ <[^>]+> f3850f56 	vmov\.f32	q0, #-0\.34375	; 0xbeb00000
+ 0[0-9a-f]+ <[^>]+> f3860f56 	vmov\.f32	q0, #-0\.6875	; 0xbf300000
+ 0[0-9a-f]+ <[^>]+> f3870f56 	vmov\.f32	q0, #-1\.375	; 0xbfb00000
+ 0[0-9a-f]+ <[^>]+> f3800f57 	vmov\.f32	q0, #-2\.875	; 0xc0380000
+ 0[0-9a-f]+ <[^>]+> f3810f57 	vmov\.f32	q0, #-5\.75	; 0xc0b80000
+ 0[0-9a-f]+ <[^>]+> f3820f57 	vmov\.f32	q0, #-11\.5	; 0xc1380000
+ 0[0-9a-f]+ <[^>]+> f3830f57 	vmov\.f32	q0, #-23	; 0xc1b80000
+ 0[0-9a-f]+ <[^>]+> f3840f57 	vmov\.f32	q0, #-0\.1796875	; 0xbe380000
+ 0[0-9a-f]+ <[^>]+> f3850f57 	vmov\.f32	q0, #-0\.359375	; 0xbeb80000
+ 0[0-9a-f]+ <[^>]+> f3860f57 	vmov\.f32	q0, #-0\.71875	; 0xbf380000
+ 0[0-9a-f]+ <[^>]+> f3870f57 	vmov\.f32	q0, #-1\.4375	; 0xbfb80000
+ 0[0-9a-f]+ <[^>]+> f3800f58 	vmov\.f32	q0, #-3	; 0xc0400000
+ 0[0-9a-f]+ <[^>]+> f3810f58 	vmov\.f32	q0, #-6	; 0xc0c00000
+ 0[0-9a-f]+ <[^>]+> f3820f58 	vmov\.f32	q0, #-12	; 0xc1400000
+ 0[0-9a-f]+ <[^>]+> f3830f58 	vmov\.f32	q0, #-24	; 0xc1c00000
+ 0[0-9a-f]+ <[^>]+> f3840f58 	vmov\.f32	q0, #-0\.1875	; 0xbe400000
+ 0[0-9a-f]+ <[^>]+> f3850f58 	vmov\.f32	q0, #-0\.375	; 0xbec00000
+ 0[0-9a-f]+ <[^>]+> f3860f58 	vmov\.f32	q0, #-0\.75	; 0xbf400000
+ 0[0-9a-f]+ <[^>]+> f3870f58 	vmov\.f32	q0, #-1\.5	; 0xbfc00000
+ 0[0-9a-f]+ <[^>]+> f3800f59 	vmov\.f32	q0, #-3\.125	; 0xc0480000
+ 0[0-9a-f]+ <[^>]+> f3810f59 	vmov\.f32	q0, #-6\.25	; 0xc0c80000
+ 0[0-9a-f]+ <[^>]+> f3820f59 	vmov\.f32	q0, #-12\.5	; 0xc1480000
+ 0[0-9a-f]+ <[^>]+> f3830f59 	vmov\.f32	q0, #-25	; 0xc1c80000
+ 0[0-9a-f]+ <[^>]+> f3840f59 	vmov\.f32	q0, #-0\.1953125	; 0xbe480000
+ 0[0-9a-f]+ <[^>]+> f3850f59 	vmov\.f32	q0, #-0\.390625	; 0xbec80000
+ 0[0-9a-f]+ <[^>]+> f3860f59 	vmov\.f32	q0, #-0\.78125	; 0xbf480000
+ 0[0-9a-f]+ <[^>]+> f3870f59 	vmov\.f32	q0, #-1\.5625	; 0xbfc80000
+ 0[0-9a-f]+ <[^>]+> f3800f5a 	vmov\.f32	q0, #-3\.25	; 0xc0500000
+ 0[0-9a-f]+ <[^>]+> f3810f5a 	vmov\.f32	q0, #-6\.5	; 0xc0d00000
+ 0[0-9a-f]+ <[^>]+> f3820f5a 	vmov\.f32	q0, #-13	; 0xc1500000
+ 0[0-9a-f]+ <[^>]+> f3830f5a 	vmov\.f32	q0, #-26	; 0xc1d00000
+ 0[0-9a-f]+ <[^>]+> f3840f5a 	vmov\.f32	q0, #-0\.203125	; 0xbe500000
+ 0[0-9a-f]+ <[^>]+> f3850f5a 	vmov\.f32	q0, #-0\.40625	; 0xbed00000
+ 0[0-9a-f]+ <[^>]+> f3860f5a 	vmov\.f32	q0, #-0\.8125	; 0xbf500000
+ 0[0-9a-f]+ <[^>]+> f3870f5a 	vmov\.f32	q0, #-1\.625	; 0xbfd00000
+ 0[0-9a-f]+ <[^>]+> f3800f5b 	vmov\.f32	q0, #-3\.375	; 0xc0580000
+ 0[0-9a-f]+ <[^>]+> f3810f5b 	vmov\.f32	q0, #-6\.75	; 0xc0d80000
+ 0[0-9a-f]+ <[^>]+> f3820f5b 	vmov\.f32	q0, #-13\.5	; 0xc1580000
+ 0[0-9a-f]+ <[^>]+> f3830f5b 	vmov\.f32	q0, #-27	; 0xc1d80000
+ 0[0-9a-f]+ <[^>]+> f3840f5b 	vmov\.f32	q0, #-0\.2109375	; 0xbe580000
+ 0[0-9a-f]+ <[^>]+> f3850f5b 	vmov\.f32	q0, #-0\.421875	; 0xbed80000
+ 0[0-9a-f]+ <[^>]+> f3860f5b 	vmov\.f32	q0, #-0\.84375	; 0xbf580000
+ 0[0-9a-f]+ <[^>]+> f3870f5b 	vmov\.f32	q0, #-1\.6875	; 0xbfd80000
+ 0[0-9a-f]+ <[^>]+> f3800f5c 	vmov\.f32	q0, #-3\.5	; 0xc0600000
+ 0[0-9a-f]+ <[^>]+> f3810f5c 	vmov\.f32	q0, #-7	; 0xc0e00000
+ 0[0-9a-f]+ <[^>]+> f3820f5c 	vmov\.f32	q0, #-14	; 0xc1600000
+ 0[0-9a-f]+ <[^>]+> f3830f5c 	vmov\.f32	q0, #-28	; 0xc1e00000
+ 0[0-9a-f]+ <[^>]+> f3840f5c 	vmov\.f32	q0, #-0\.21875	; 0xbe600000
+ 0[0-9a-f]+ <[^>]+> f3850f5c 	vmov\.f32	q0, #-0\.4375	; 0xbee00000
+ 0[0-9a-f]+ <[^>]+> f3860f5c 	vmov\.f32	q0, #-0\.875	; 0xbf600000
+ 0[0-9a-f]+ <[^>]+> f3870f5c 	vmov\.f32	q0, #-1\.75	; 0xbfe00000
+ 0[0-9a-f]+ <[^>]+> f3800f5d 	vmov\.f32	q0, #-3\.625	; 0xc0680000
+ 0[0-9a-f]+ <[^>]+> f3810f5d 	vmov\.f32	q0, #-7\.25	; 0xc0e80000
+ 0[0-9a-f]+ <[^>]+> f3820f5d 	vmov\.f32	q0, #-14\.5	; 0xc1680000
+ 0[0-9a-f]+ <[^>]+> f3830f5d 	vmov\.f32	q0, #-29	; 0xc1e80000
+ 0[0-9a-f]+ <[^>]+> f3840f5d 	vmov\.f32	q0, #-0\.2265625	; 0xbe680000
+ 0[0-9a-f]+ <[^>]+> f3850f5d 	vmov\.f32	q0, #-0\.453125	; 0xbee80000
+ 0[0-9a-f]+ <[^>]+> f3860f5d 	vmov\.f32	q0, #-0\.90625	; 0xbf680000
+ 0[0-9a-f]+ <[^>]+> f3870f5d 	vmov\.f32	q0, #-1\.8125	; 0xbfe80000
+ 0[0-9a-f]+ <[^>]+> f3800f5e 	vmov\.f32	q0, #-3\.75	; 0xc0700000
+ 0[0-9a-f]+ <[^>]+> f3810f5e 	vmov\.f32	q0, #-7\.5	; 0xc0f00000
+ 0[0-9a-f]+ <[^>]+> f3820f5e 	vmov\.f32	q0, #-15	; 0xc1700000
+ 0[0-9a-f]+ <[^>]+> f3830f5e 	vmov\.f32	q0, #-30	; 0xc1f00000
+ 0[0-9a-f]+ <[^>]+> f3840f5e 	vmov\.f32	q0, #-0\.234375	; 0xbe700000
+ 0[0-9a-f]+ <[^>]+> f3850f5e 	vmov\.f32	q0, #-0\.46875	; 0xbef00000
+ 0[0-9a-f]+ <[^>]+> f3860f5e 	vmov\.f32	q0, #-0\.9375	; 0xbf700000
+ 0[0-9a-f]+ <[^>]+> f3870f5e 	vmov\.f32	q0, #-1\.875	; 0xbff00000
+ 0[0-9a-f]+ <[^>]+> f3800f5f 	vmov\.f32	q0, #-3\.875	; 0xc0780000
+ 0[0-9a-f]+ <[^>]+> f3810f5f 	vmov\.f32	q0, #-7\.75	; 0xc0f80000
+ 0[0-9a-f]+ <[^>]+> f3820f5f 	vmov\.f32	q0, #-15\.5	; 0xc1780000
+ 0[0-9a-f]+ <[^>]+> f3830f5f 	vmov\.f32	q0, #-31	; 0xc1f80000
+ 0[0-9a-f]+ <[^>]+> f3840f5f 	vmov\.f32	q0, #-0\.2421875	; 0xbe780000
+ 0[0-9a-f]+ <[^>]+> f3850f5f 	vmov\.f32	q0, #-0\.484375	; 0xbef80000
+ 0[0-9a-f]+ <[^>]+> f3860f5f 	vmov\.f32	q0, #-0\.96875	; 0xbf780000
+ 0[0-9a-f]+ <[^>]+> f3870f5f 	vmov\.f32	q0, #-1\.9375	; 0xbff80000
Index: gas/testsuite/gas/arm/neon-const.s
===================================================================
RCS file: gas/testsuite/gas/arm/neon-const.s
diff -N gas/testsuite/gas/arm/neon-const.s
*** /dev/null	1 Jan 1970 00:00:00 -0000
--- gas/testsuite/gas/arm/neon-const.s	24 Apr 2006 21:39:21 -0000
***************
*** 0 ****
--- 1,297 ----
+ @ test floating-point constant parsing.
+ 
+ 	.arm
+ 	.text
+ 	.syntax unified
+ 
+         vmov.f32 q0, 0
+ 
+ 	vmov.f32 q0, 2.0
+         vmov.f32 q0, 4.0
+         vmov.f32 q0, 8.0
+         vmov.f32 q0, 16.0
+         vmov.f32 q0, 0.125
+         vmov.f32 q0, 0.25
+         vmov.f32 q0, 0.5
+         vmov.f32 q0, 1.0
+ 
+         vmov.f32 q0, 2.125
+         vmov.f32 q0, 4.25
+         vmov.f32 q0, 8.5
+         vmov.f32 q0, 17.0
+         vmov.f32 q0, 0.1328125
+         vmov.f32 q0, 0.265625
+         vmov.f32 q0, 0.53125
+         vmov.f32 q0, 1.0625
+         
+         vmov.f32 q0, 2.25
+         vmov.f32 q0, 4.5
+         vmov.f32 q0, 9.0
+         vmov.f32 q0, 18.0
+         vmov.f32 q0, 0.140625
+         vmov.f32 q0, 0.28125
+         vmov.f32 q0, 0.5625
+         vmov.f32 q0, 1.125
+         
+         vmov.f32 q0, 2.375
+         vmov.f32 q0, 4.75
+         vmov.f32 q0, 9.5
+         vmov.f32 q0, 19.0
+         vmov.f32 q0, 0.1484375
+         vmov.f32 q0, 0.296875
+         vmov.f32 q0, 0.59375
+         vmov.f32 q0, 1.1875
+         
+         vmov.f32 q0, 2.5
+         vmov.f32 q0, 5.0
+         vmov.f32 q0, 10.0
+         vmov.f32 q0, 20.0
+         vmov.f32 q0, 0.15625
+         vmov.f32 q0, 0.3125
+         vmov.f32 q0, 0.625
+         vmov.f32 q0, 1.25
+         
+         vmov.f32 q0, 2.625
+         vmov.f32 q0, 5.25
+         vmov.f32 q0, 10.5
+         vmov.f32 q0, 21.0
+         vmov.f32 q0, 0.1640625
+         vmov.f32 q0, 0.328125
+         vmov.f32 q0, 0.65625
+         vmov.f32 q0, 1.3125
+         
+         vmov.f32 q0, 2.75
+         vmov.f32 q0, 5.5
+         vmov.f32 q0, 11.0
+         vmov.f32 q0, 22.0
+         vmov.f32 q0, 0.171875
+         vmov.f32 q0, 0.34375
+         vmov.f32 q0, 0.6875
+         vmov.f32 q0, 1.375
+         
+         vmov.f32 q0, 2.875
+         vmov.f32 q0, 5.75
+         vmov.f32 q0, 11.5
+         vmov.f32 q0, 23.0
+         vmov.f32 q0, 0.1796875
+         vmov.f32 q0, 0.359375
+         vmov.f32 q0, 0.71875
+         vmov.f32 q0, 1.4375
+         
+         vmov.f32 q0, 3.0
+         vmov.f32 q0, 6.0
+         vmov.f32 q0, 12.0
+         vmov.f32 q0, 24.0
+         vmov.f32 q0, 0.1875
+         vmov.f32 q0, 0.375
+         vmov.f32 q0, 0.75
+         vmov.f32 q0, 1.5
+         
+         vmov.f32 q0, 3.125
+         vmov.f32 q0, 6.25
+         vmov.f32 q0, 12.5
+         vmov.f32 q0, 25.0
+         vmov.f32 q0, 0.1953125
+         vmov.f32 q0, 0.390625
+         vmov.f32 q0, 0.78125
+         vmov.f32 q0, 1.5625
+         
+         vmov.f32 q0, 3.25
+         vmov.f32 q0, 6.5
+         vmov.f32 q0, 13.0
+         vmov.f32 q0, 26.0
+         vmov.f32 q0, 0.203125
+         vmov.f32 q0, 0.40625
+         vmov.f32 q0, 0.8125
+         vmov.f32 q0, 1.625
+         
+         vmov.f32 q0, 3.375
+         vmov.f32 q0, 6.75
+         vmov.f32 q0, 13.5
+         vmov.f32 q0, 27.0
+         vmov.f32 q0, 0.2109375
+         vmov.f32 q0, 0.421875
+         vmov.f32 q0, 0.84375
+         vmov.f32 q0, 1.6875
+ 
+         vmov.f32 q0, 3.5
+         vmov.f32 q0, 7.0
+         vmov.f32 q0, 14.0
+         vmov.f32 q0, 28.0
+         vmov.f32 q0, 0.21875
+         vmov.f32 q0, 0.4375
+         vmov.f32 q0, 0.875
+         vmov.f32 q0, 1.75
+         
+         vmov.f32 q0, 3.625
+         vmov.f32 q0, 7.25
+         vmov.f32 q0, 14.5
+         vmov.f32 q0, 29.0
+         vmov.f32 q0, 0.2265625
+         vmov.f32 q0, 0.453125
+         vmov.f32 q0, 0.90625
+         vmov.f32 q0, 1.8125
+         
+         vmov.f32 q0, 3.75
+         vmov.f32 q0, 7.5
+         vmov.f32 q0, 15.0
+         vmov.f32 q0, 30.0
+         vmov.f32 q0, 0.234375
+         vmov.f32 q0, 0.46875
+         vmov.f32 q0, 0.9375
+         vmov.f32 q0, 1.875
+         
+         vmov.f32 q0, 3.875
+         vmov.f32 q0, 7.75
+         vmov.f32 q0, 15.5
+         vmov.f32 q0, 31.0
+         vmov.f32 q0, 0.2421875
+         vmov.f32 q0, 0.484375
+         vmov.f32 q0, 0.96875
+         vmov.f32 q0, 1.9375
+ 
+         vmov.f32 q0, -0
+ 
+ 	vmov.f32 q0, -2.0
+         vmov.f32 q0, -4.0
+         vmov.f32 q0, -8.0
+         vmov.f32 q0, -16.0
+         vmov.f32 q0, -0.125
+         vmov.f32 q0, -0.25
+         vmov.f32 q0, -0.5
+         vmov.f32 q0, -1.0
+ 
+         vmov.f32 q0, -2.125
+         vmov.f32 q0, -4.25
+         vmov.f32 q0, -8.5
+         vmov.f32 q0, -17.0
+         vmov.f32 q0, -0.1328125
+         vmov.f32 q0, -0.265625
+         vmov.f32 q0, -0.53125
+         vmov.f32 q0, -1.0625
+         
+         vmov.f32 q0, -2.25
+         vmov.f32 q0, -4.5
+         vmov.f32 q0, -9.0
+         vmov.f32 q0, -18.0
+         vmov.f32 q0, -0.140625
+         vmov.f32 q0, -0.28125
+         vmov.f32 q0, -0.5625
+         vmov.f32 q0, -1.125
+         
+         vmov.f32 q0, -2.375
+         vmov.f32 q0, -4.75
+         vmov.f32 q0, -9.5
+         vmov.f32 q0, -19.0
+         vmov.f32 q0, -0.1484375
+         vmov.f32 q0, -0.296875
+         vmov.f32 q0, -0.59375
+         vmov.f32 q0, -1.1875
+         
+         vmov.f32 q0, -2.5
+         vmov.f32 q0, -5.0
+         vmov.f32 q0, -10.0
+         vmov.f32 q0, -20.0
+         vmov.f32 q0, -0.15625
+         vmov.f32 q0, -0.3125
+         vmov.f32 q0, -0.625
+         vmov.f32 q0, -1.25
+         
+         vmov.f32 q0, -2.625
+         vmov.f32 q0, -5.25
+         vmov.f32 q0, -10.5
+         vmov.f32 q0, -21.0
+         vmov.f32 q0, -0.1640625
+         vmov.f32 q0, -0.328125
+         vmov.f32 q0, -0.65625
+         vmov.f32 q0, -1.3125
+         
+         vmov.f32 q0, -2.75
+         vmov.f32 q0, -5.5
+         vmov.f32 q0, -11.0
+         vmov.f32 q0, -22.0
+         vmov.f32 q0, -0.171875
+         vmov.f32 q0, -0.34375
+         vmov.f32 q0, -0.6875
+         vmov.f32 q0, -1.375
+         
+         vmov.f32 q0, -2.875
+         vmov.f32 q0, -5.75
+         vmov.f32 q0, -11.5
+         vmov.f32 q0, -23.0
+         vmov.f32 q0, -0.1796875
+         vmov.f32 q0, -0.359375
+         vmov.f32 q0, -0.71875
+         vmov.f32 q0, -1.4375
+         
+         vmov.f32 q0, -3.0
+         vmov.f32 q0, -6.0
+         vmov.f32 q0, -12.0
+         vmov.f32 q0, -24.0
+         vmov.f32 q0, -0.1875
+         vmov.f32 q0, -0.375
+         vmov.f32 q0, -0.75
+         vmov.f32 q0, -1.5
+         
+         vmov.f32 q0, -3.125
+         vmov.f32 q0, -6.25
+         vmov.f32 q0, -12.5
+         vmov.f32 q0, -25.0
+         vmov.f32 q0, -0.1953125
+         vmov.f32 q0, -0.390625
+         vmov.f32 q0, -0.78125
+         vmov.f32 q0, -1.5625
+         
+         vmov.f32 q0, -3.25
+         vmov.f32 q0, -6.5
+         vmov.f32 q0, -13.0
+         vmov.f32 q0, -26.0
+         vmov.f32 q0, -0.203125
+         vmov.f32 q0, -0.40625
+         vmov.f32 q0, -0.8125
+         vmov.f32 q0, -1.625
+         
+         vmov.f32 q0, -3.375
+         vmov.f32 q0, -6.75
+         vmov.f32 q0, -13.5
+         vmov.f32 q0, -27.0
+         vmov.f32 q0, -0.2109375
+         vmov.f32 q0, -0.421875
+         vmov.f32 q0, -0.84375
+         vmov.f32 q0, -1.6875
+ 
+         vmov.f32 q0, -3.5
+         vmov.f32 q0, -7.0
+         vmov.f32 q0, -14.0
+         vmov.f32 q0, -28.0
+         vmov.f32 q0, -0.21875
+         vmov.f32 q0, -0.4375
+         vmov.f32 q0, -0.875
+         vmov.f32 q0, -1.75
+         
+         vmov.f32 q0, -3.625
+         vmov.f32 q0, -7.25
+         vmov.f32 q0, -14.5
+         vmov.f32 q0, -29.0
+         vmov.f32 q0, -0.2265625
+         vmov.f32 q0, -0.453125
+         vmov.f32 q0, -0.90625
+         vmov.f32 q0, -1.8125
+         
+         vmov.f32 q0, -3.75
+         vmov.f32 q0, -7.5
+         vmov.f32 q0, -15.0
+         vmov.f32 q0, -30.0
+         vmov.f32 q0, -0.234375
+         vmov.f32 q0, -0.46875
+         vmov.f32 q0, -0.9375
+         vmov.f32 q0, -1.875
+         
+         vmov.f32 q0, -3.875
+         vmov.f32 q0, -7.75
+         vmov.f32 q0, -15.5
+         vmov.f32 q0, -31.0
+         vmov.f32 q0, -0.2421875
+         vmov.f32 q0, -0.484375
+         vmov.f32 q0, -0.96875
+         vmov.f32 q0, -1.9375
Index: gas/testsuite/gas/arm/neon-cov.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/Attic/neon-cov.d,v
retrieving revision 1.1.2.1
diff -c -p -r1.1.2.1 neon-cov.d
*** gas/testsuite/gas/arm/neon-cov.d	3 Apr 2006 00:03:34 -0000	1.1.2.1
--- gas/testsuite/gas/arm/neon-cov.d	24 Apr 2006 21:39:21 -0000
*************** Disassembly of section \.text:
*** 989,996 ****
  0[0-9a-f]+ <[^>]+> f2870e17 	vmov\.i8	d0, #119	; 0x77
  0[0-9a-f]+ <[^>]+> f3810e71 	vmov\.i64	q0, #0xff0000ff000000ff
  0[0-9a-f]+ <[^>]+> f3810e31 	vmov\.i64	d0, #0xff0000ff000000ff
! 0[0-9a-f]+ <[^>]+> f2850f51 	vmov\.f32	q0, #1027866624	; 0x3d440000
! 0[0-9a-f]+ <[^>]+> f2850f11 	vmov\.f32	d0, #1027866624	; 0x3d440000
  0[0-9a-f]+ <[^>]+> f3b005c0 	vmvn	q0, q0
  0[0-9a-f]+ <[^>]+> f3b005c0 	vmvn	q0, q0
  0[0-9a-f]+ <[^>]+> f3b00580 	vmvn	d0, d0
--- 989,996 ----
  0[0-9a-f]+ <[^>]+> f2870e17 	vmov\.i8	d0, #119	; 0x77
  0[0-9a-f]+ <[^>]+> f3810e71 	vmov\.i64	q0, #0xff0000ff000000ff
  0[0-9a-f]+ <[^>]+> f3810e31 	vmov\.i64	d0, #0xff0000ff000000ff
! 0[0-9a-f]+ <[^>]+> f2810f51 	vmov\.f32	q0, #4\.25	; 0x40880000
! 0[0-9a-f]+ <[^>]+> f2810f11 	vmov\.f32	d0, #4\.25	; 0x40880000
  0[0-9a-f]+ <[^>]+> f3b005c0 	vmvn	q0, q0
  0[0-9a-f]+ <[^>]+> f3b005c0 	vmvn	q0, q0
  0[0-9a-f]+ <[^>]+> f3b00580 	vmvn	d0, d0
Index: opcodes/arm-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/arm-dis.c,v
retrieving revision 1.62.2.1
diff -c -p -r1.62.2.1 arm-dis.c
*** opcodes/arm-dis.c	3 Apr 2006 00:03:34 -0000	1.62.2.1
--- opcodes/arm-dis.c	24 Apr 2006 21:39:24 -0000
***************
*** 26,31 ****
--- 26,32 ----
  #include "opcode/arm.h"
  #include "opintl.h"
  #include "safe-ctype.h"
+ #include "floatformat.h"
  
  /* FIXME: This shouldn't be done here.  */
  #include "coff/internal.h"
*************** print_insn_neon (struct disassemble_info
*** 2283,2288 ****
--- 2284,2290 ----
  			unsigned long value = 0, hival = 0;
  			unsigned shift;
                          int size = 0;
+                         int isfloat = 0;
  			
  			bits |= ((given >> 24) & 1) << 7;
  			bits |= ((given >> 16) & 7) << 4;
*************** print_insn_neon (struct disassemble_info
*** 2339,2349 ****
  			    /* floating point encoding */
  			    int tmp;
  			    
! 			    value = (unsigned long)(bits & 0x7f) << (24 - 6);
  			    value |= (unsigned long)(bits & 0x80) << 24;
  			    tmp = bits & 0x40 ? 0x3c : 0x40;
  			    value |= (unsigned long)tmp << 24;
                              size = 32;
  			  }
  			else
  			  {
--- 2341,2352 ----
  			    /* floating point encoding */
  			    int tmp;
  			    
! 			    value = (unsigned long)(bits & 0x7f) << 19;
  			    value |= (unsigned long)(bits & 0x80) << 24;
  			    tmp = bits & 0x40 ? 0x3c : 0x40;
  			    value |= (unsigned long)tmp << 24;
                              size = 32;
+                             isfloat = 1;
  			  }
  			else
  			  {
*************** print_insn_neon (struct disassemble_info
*** 2363,2369 ****
                              break;
  
                            case 32:
!                             func (stream, "#%ld\t; 0x%.8lx", value, value);
                              break;
  
                            case 64:
--- 2366,2392 ----
                              break;
  
                            case 32:
!                             if (isfloat)
!                               {
!                                 unsigned char valbytes[4];
!                                 double fvalue;
!                                 
!                                 /* Do this a byte at a time so we don't have to
!                                    worry about the host's endianness.  */
!                                 valbytes[0] = value & 0xff;
!                                 valbytes[1] = (value >> 8) & 0xff;
!                                 valbytes[2] = (value >> 16) & 0xff;
!                                 valbytes[3] = (value >> 24) & 0xff;
!                                 
!                                 floatformat_to_double 
!                                   (&floatformat_ieee_single_little, valbytes,
!                                   &fvalue);
!                                                                 
!                                 func (stream, "#%.7g\t; 0x%.8lx", fvalue,
!                                       value);
!                               }
!                             else
!                               func (stream, "#%ld\t; 0x%.8lx", value, value);
                              break;
  
                            case 64:

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH, ARM] Fix Neon floating-point constant encoding & support   floating-point syntax
  2006-04-26  8:55   ` Julian Brown
@ 2006-04-26 11:58     ` Nick Clifton
  2006-04-27  0:35     ` Paul Brook
  1 sibling, 0 replies; 5+ messages in thread
From: Nick Clifton @ 2006-04-26 11:58 UTC (permalink / raw)
  To: Julian Brown; +Cc: binutils, Paul Brook, Richard Earnshaw

Hi Julian,

> Thanks! I've got a slightly-improved version of this patch thanks to 
> offline discussion with Paul Brook though, which uses a generic function 
> to help with the printing of float immediates. It relies on this 
> (applied) fix:
> 
> http://gcc.gnu.org/ml/gcc-patches/2006-04/msg00925.html
> 
> The only differences are in arm-dis.c, and a small cleanup in 
> is_quarter_float. Sorry for the hassle (the difference is probably small 
> enough to count as obvious), but is this still OK to apply on mainline? 
> (And also on the CSL branch?).

OK for mainline.

Check with CodeSourcery for permission to check into the CSL branch, but 
I expect that since you have been talking to Paul that they will have no 
objection.

Cheers
   Nick

> ChangeLog (gas):
> 
>     * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename
>     to...
>     (is_quarter_float): Rename from above. Simplify slightly.
>     (parse_qfloat_immediate): Parse a "quarter precision" floating-point
>     number.
>     (parse_neon_mov): Parse floating-point constants.
>     (neon_qfloat_bits): Fix encoding.
>     (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
>     preference to integer encoding when using the F32 type.
> 
> ChangeLog (gas/testsuite):
> 
>     * gas/testsuite/gas/arm/neon-const.s: New testcase. Neon
>     floating-point constants.
>     * gas/testsuite/gas/arm/neon-const.d: Expected output of above.
>     * gas/testsuite/gas/arm/neon-cov.d: Expect floating-point
>     disassembly for VMOV.F32.
> 
> ChangeLog (opcodes):
> 
>     * arm-dis.c (print_insn_neon): Disassemble floating-point constant
>     VMOV.


PS. Usually you would either delete these files or else put them into 
your global .cvsignore before performing the diff:

> ? bfd/doc/bfd.info
> ? binutils/doc/binutils.info
> ? gas/doc/as.info
> ? ld/ld.info

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH, ARM] Fix Neon floating-point constant encoding & support   floating-point syntax
  2006-04-26  8:55   ` Julian Brown
  2006-04-26 11:58     ` Nick Clifton
@ 2006-04-27  0:35     ` Paul Brook
  1 sibling, 0 replies; 5+ messages in thread
From: Paul Brook @ 2006-04-27  0:35 UTC (permalink / raw)
  To: binutils; +Cc: Julian Brown

On Wednesday 26 April 2006 01:38, Julian Brown wrote:
> Nick Clifton wrote:
> > Approved for mainline.
>
> Thanks! I've got a slightly-improved version of this patch thanks to
> offline discussion with Paul Brook though, which uses a generic function
> to help with the printing of float immediates. It relies on this
> (applied) fix:
>
> http://gcc.gnu.org/ml/gcc-patches/2006-04/msg00925.html
>
> The only differences are in arm-dis.c, and a small cleanup in
> is_quarter_float. Sorry for the hassle (the difference is probably small
> enough to count as obvious), but is this still OK to apply on mainline?
> (And also on the CSL branch?).

Ok for csl branch.

Paul

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2006-04-26 14:38 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2006-04-24 12:28 [PATCH, ARM] Fix Neon floating-point constant encoding & support floating-point syntax Julian Brown
2006-04-25 19:46 ` Nick Clifton
2006-04-26  8:55   ` Julian Brown
2006-04-26 11:58     ` Nick Clifton
2006-04-27  0:35     ` Paul Brook

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