From: Thiemo Seufer <ths@networkno.de>
To: binutils@sourceware.org
Cc: Julian Brown <julian@codesourcery.com>
Subject: [PATCH] Print symbolic CP0 names for MIPS MT ASE
Date: Fri, 28 Apr 2006 18:20:00 -0000 [thread overview]
Message-ID: <20060428132250.GH4579@networkno.de> (raw)
Hello All,
I applied the appended patch which prints symbolic CP0 names for the
MIPS MT ASE.
(I also fixed the file paths in gas/testsuite/ChangeLog for the
previous commit by Julian Brown.)
Thiemo
[ opcodes/ChangeLog ]
2006-04-28 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
Nigel Stevens <nigel@mips.com>
* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
names.
[ gas/testsuite/ChangeLog ]
2006-04-28 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
Nigel Stevens <nigel@mips.com>
* gas/mips/cp0sel-names-mips32r2.d,
gas/mips/cp0sel-names-mips64r2.d: Update for MT register names.
Index: gas/testsuite/gas/mips/cp0sel-names-mips32r2.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/cp0sel-names-mips32r2.d,v
retrieving revision 1.2
diff -u -p -r1.2 cp0sel-names-mips32r2.d
--- gas/testsuite/gas/mips/cp0sel-names-mips32r2.d 7 May 2003 05:08:20 -0000 1.2
+++ gas/testsuite/gas/mips/cp0sel-names-mips32r2.d 27 Apr 2006 12:53:36 -0000
@@ -8,27 +8,27 @@
.*: +file format .*mips.*
Disassembly of section .text:
-0+0000 <[^>]*> 40800001 mtc0 \$0,\$0,1
-0+0004 <[^>]*> 40800002 mtc0 \$0,\$0,2
-0+0008 <[^>]*> 40800003 mtc0 \$0,\$0,3
+0+0000 <[^>]*> 40800001 mtc0 \$0,c0_mvpcontrol
+0+0004 <[^>]*> 40800002 mtc0 \$0,c0_mvpconf0
+0+0008 <[^>]*> 40800003 mtc0 \$0,c0_mvpconf1
0+000c <[^>]*> 40800004 mtc0 \$0,\$0,4
0+0010 <[^>]*> 40800005 mtc0 \$0,\$0,5
0+0014 <[^>]*> 40800006 mtc0 \$0,\$0,6
0+0018 <[^>]*> 40800007 mtc0 \$0,\$0,7
-0+001c <[^>]*> 40800801 mtc0 \$0,\$1,1
-0+0020 <[^>]*> 40800802 mtc0 \$0,\$1,2
-0+0024 <[^>]*> 40800803 mtc0 \$0,\$1,3
-0+0028 <[^>]*> 40800804 mtc0 \$0,\$1,4
-0+002c <[^>]*> 40800805 mtc0 \$0,\$1,5
-0+0030 <[^>]*> 40800806 mtc0 \$0,\$1,6
+0+001c <[^>]*> 40800801 mtc0 \$0,c0_vpecontrol
+0+0020 <[^>]*> 40800802 mtc0 \$0,c0_vpeconf0
+0+0024 <[^>]*> 40800803 mtc0 \$0,c0_vpeconf1
+0+0028 <[^>]*> 40800804 mtc0 \$0,c0_yqmask
+0+002c <[^>]*> 40800805 mtc0 \$0,c0_vpeschedule
+0+0030 <[^>]*> 40800806 mtc0 \$0,c0_vpeschefback
0+0034 <[^>]*> 40800807 mtc0 \$0,\$1,7
-0+0038 <[^>]*> 40801001 mtc0 \$0,\$2,1
-0+003c <[^>]*> 40801002 mtc0 \$0,\$2,2
-0+0040 <[^>]*> 40801003 mtc0 \$0,\$2,3
-0+0044 <[^>]*> 40801004 mtc0 \$0,\$2,4
-0+0048 <[^>]*> 40801005 mtc0 \$0,\$2,5
-0+004c <[^>]*> 40801006 mtc0 \$0,\$2,6
-0+0050 <[^>]*> 40801007 mtc0 \$0,\$2,7
+0+0038 <[^>]*> 40801001 mtc0 \$0,c0_tcstatus
+0+003c <[^>]*> 40801002 mtc0 \$0,c0_tcbind
+0+0040 <[^>]*> 40801003 mtc0 \$0,c0_tcrestart
+0+0044 <[^>]*> 40801004 mtc0 \$0,c0_tchalt
+0+0048 <[^>]*> 40801005 mtc0 \$0,c0_tccontext
+0+004c <[^>]*> 40801006 mtc0 \$0,c0_tcschedule
+0+0050 <[^>]*> 40801007 mtc0 \$0,c0_tcschefback
0+0054 <[^>]*> 40801801 mtc0 \$0,\$3,1
0+0058 <[^>]*> 40801802 mtc0 \$0,\$3,2
0+005c <[^>]*> 40801803 mtc0 \$0,\$3,3
@@ -50,11 +50,11 @@ Disassembly of section .text:
0+009c <[^>]*> 40802805 mtc0 \$0,\$5,5
0+00a0 <[^>]*> 40802806 mtc0 \$0,\$5,6
0+00a4 <[^>]*> 40802807 mtc0 \$0,\$5,7
-0+00a8 <[^>]*> 40803001 mtc0 \$0,\$6,1
-0+00ac <[^>]*> 40803002 mtc0 \$0,\$6,2
-0+00b0 <[^>]*> 40803003 mtc0 \$0,\$6,3
-0+00b4 <[^>]*> 40803004 mtc0 \$0,\$6,4
-0+00b8 <[^>]*> 40803005 mtc0 \$0,\$6,5
+0+00a8 <[^>]*> 40803001 mtc0 \$0,c0_srsconf0
+0+00ac <[^>]*> 40803002 mtc0 \$0,c0_srsconf1
+0+00b0 <[^>]*> 40803003 mtc0 \$0,c0_srsconf2
+0+00b4 <[^>]*> 40803004 mtc0 \$0,c0_srsconf3
+0+00b8 <[^>]*> 40803005 mtc0 \$0,c0_srsconf4
0+00bc <[^>]*> 40803006 mtc0 \$0,\$6,6
0+00c0 <[^>]*> 40803007 mtc0 \$0,\$6,7
0+00c4 <[^>]*> 40803801 mtc0 \$0,\$7,1
Index: gas/testsuite/gas/mips/cp0sel-names-mips64r2.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/cp0sel-names-mips64r2.d,v
retrieving revision 1.1
diff -u -p -r1.1 cp0sel-names-mips64r2.d
--- gas/testsuite/gas/mips/cp0sel-names-mips64r2.d 30 Sep 2003 16:17:13 -0000 1.1
+++ gas/testsuite/gas/mips/cp0sel-names-mips64r2.d 27 Apr 2006 12:53:36 -0000
@@ -8,27 +8,27 @@
.*: +file format .*mips.*
Disassembly of section .text:
-0+0000 <[^>]*> 40800001 mtc0 \$0,\$0,1
-0+0004 <[^>]*> 40800002 mtc0 \$0,\$0,2
-0+0008 <[^>]*> 40800003 mtc0 \$0,\$0,3
+0+0000 <[^>]*> 40800001 mtc0 \$0,c0_mvpcontrol
+0+0004 <[^>]*> 40800002 mtc0 \$0,c0_mvpconf0
+0+0008 <[^>]*> 40800003 mtc0 \$0,c0_mvpconf1
0+000c <[^>]*> 40800004 mtc0 \$0,\$0,4
0+0010 <[^>]*> 40800005 mtc0 \$0,\$0,5
0+0014 <[^>]*> 40800006 mtc0 \$0,\$0,6
0+0018 <[^>]*> 40800007 mtc0 \$0,\$0,7
-0+001c <[^>]*> 40800801 mtc0 \$0,\$1,1
-0+0020 <[^>]*> 40800802 mtc0 \$0,\$1,2
-0+0024 <[^>]*> 40800803 mtc0 \$0,\$1,3
-0+0028 <[^>]*> 40800804 mtc0 \$0,\$1,4
-0+002c <[^>]*> 40800805 mtc0 \$0,\$1,5
-0+0030 <[^>]*> 40800806 mtc0 \$0,\$1,6
+0+001c <[^>]*> 40800801 mtc0 \$0,c0_vpecontrol
+0+0020 <[^>]*> 40800802 mtc0 \$0,c0_vpeconf0
+0+0024 <[^>]*> 40800803 mtc0 \$0,c0_vpeconf1
+0+0028 <[^>]*> 40800804 mtc0 \$0,c0_yqmask
+0+002c <[^>]*> 40800805 mtc0 \$0,c0_vpeschedule
+0+0030 <[^>]*> 40800806 mtc0 \$0,c0_vpeschefback
0+0034 <[^>]*> 40800807 mtc0 \$0,\$1,7
-0+0038 <[^>]*> 40801001 mtc0 \$0,\$2,1
-0+003c <[^>]*> 40801002 mtc0 \$0,\$2,2
-0+0040 <[^>]*> 40801003 mtc0 \$0,\$2,3
-0+0044 <[^>]*> 40801004 mtc0 \$0,\$2,4
-0+0048 <[^>]*> 40801005 mtc0 \$0,\$2,5
-0+004c <[^>]*> 40801006 mtc0 \$0,\$2,6
-0+0050 <[^>]*> 40801007 mtc0 \$0,\$2,7
+0+0038 <[^>]*> 40801001 mtc0 \$0,c0_tcstatus
+0+003c <[^>]*> 40801002 mtc0 \$0,c0_tcbind
+0+0040 <[^>]*> 40801003 mtc0 \$0,c0_tcrestart
+0+0044 <[^>]*> 40801004 mtc0 \$0,c0_tchalt
+0+0048 <[^>]*> 40801005 mtc0 \$0,c0_tccontext
+0+004c <[^>]*> 40801006 mtc0 \$0,c0_tcschedule
+0+0050 <[^>]*> 40801007 mtc0 \$0,c0_tcschefback
0+0054 <[^>]*> 40801801 mtc0 \$0,\$3,1
0+0058 <[^>]*> 40801802 mtc0 \$0,\$3,2
0+005c <[^>]*> 40801803 mtc0 \$0,\$3,3
@@ -50,11 +50,11 @@ Disassembly of section .text:
0+009c <[^>]*> 40802805 mtc0 \$0,\$5,5
0+00a0 <[^>]*> 40802806 mtc0 \$0,\$5,6
0+00a4 <[^>]*> 40802807 mtc0 \$0,\$5,7
-0+00a8 <[^>]*> 40803001 mtc0 \$0,\$6,1
-0+00ac <[^>]*> 40803002 mtc0 \$0,\$6,2
-0+00b0 <[^>]*> 40803003 mtc0 \$0,\$6,3
-0+00b4 <[^>]*> 40803004 mtc0 \$0,\$6,4
-0+00b8 <[^>]*> 40803005 mtc0 \$0,\$6,5
+0+00a8 <[^>]*> 40803001 mtc0 \$0,c0_srsconf0
+0+00ac <[^>]*> 40803002 mtc0 \$0,c0_srsconf1
+0+00b0 <[^>]*> 40803003 mtc0 \$0,c0_srsconf2
+0+00b4 <[^>]*> 40803004 mtc0 \$0,c0_srsconf3
+0+00b8 <[^>]*> 40803005 mtc0 \$0,c0_srsconf4
0+00bc <[^>]*> 40803006 mtc0 \$0,\$6,6
0+00c0 <[^>]*> 40803007 mtc0 \$0,\$6,7
0+00c4 <[^>]*> 40803801 mtc0 \$0,\$7,1
Index: opcodes/mips-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-dis.c,v
retrieving revision 1.55
diff -u -p -r1.55 mips-dis.c
--- opcodes/mips-dis.c 14 Nov 2005 02:25:39 -0000 1.55
+++ opcodes/mips-dis.c 27 Apr 2006 12:53:39 -0000
@@ -181,7 +184,28 @@ static const char * const mips_cp0_names
static const struct mips_cp0sel_name mips_cp0sel_names_mips3264r2[] =
{
{ 4, 1, "c0_contextconfig" },
+ { 0, 1, "c0_mvpcontrol" },
+ { 0, 2, "c0_mvpconf0" },
+ { 0, 3, "c0_mvpconf1" },
+ { 1, 1, "c0_vpecontrol" },
+ { 1, 2, "c0_vpeconf0" },
+ { 1, 3, "c0_vpeconf1" },
+ { 1, 4, "c0_yqmask" },
+ { 1, 5, "c0_vpeschedule" },
+ { 1, 6, "c0_vpeschefback" },
+ { 2, 1, "c0_tcstatus" },
+ { 2, 2, "c0_tcbind" },
+ { 2, 3, "c0_tcrestart" },
+ { 2, 4, "c0_tchalt" },
+ { 2, 5, "c0_tccontext" },
+ { 2, 6, "c0_tcschedule" },
+ { 2, 7, "c0_tcschefback" },
{ 5, 1, "c0_pagegrain" },
+ { 6, 1, "c0_srsconf0" },
+ { 6, 2, "c0_srsconf1" },
+ { 6, 3, "c0_srsconf2" },
+ { 6, 4, "c0_srsconf3" },
+ { 6, 5, "c0_srsconf4" },
{ 12, 1, "c0_intctl" },
{ 12, 2, "c0_srsctl" },
{ 12, 3, "c0_srsmap" },
reply other threads:[~2006-04-28 13:23 UTC|newest]
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