From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 18202 invoked by alias); 28 Apr 2006 16:37:25 -0000 Received: (qmail 18189 invoked by uid 22791); 28 Apr 2006 16:37:23 -0000 X-Spam-Check-By: sourceware.org Received: from intranet.codesourcery.com (HELO mail.codesourcery.com) (65.74.133.6) by sourceware.org (qpsmtpd/0.31) with ESMTP; Fri, 28 Apr 2006 16:37:20 +0000 Received: (qmail 2481 invoked from network); 28 Apr 2006 16:37:18 -0000 Received: from unknown (HELO 81-178-240-12.dsl.pipex.com) (paul@127.0.0.2) by mail.codesourcery.com with ESMTPA; 28 Apr 2006 16:37:18 -0000 From: Paul Brook To: binutils@sourceware.org Subject: Re: [patch] R_ARM_REL32 and Thumb functions. Date: Fri, 28 Apr 2006 19:03:00 -0000 User-Agent: KMail/1.9.1 Cc: Richard Earnshaw References: <200604201929.50393.paul@codesourcery.com> <1145607223.16122.77.camel@pc960.cambridge.arm.com> In-Reply-To: <1145607223.16122.77.camel@pc960.cambridge.arm.com> MIME-Version: 1.0 Content-Type: Multipart/Mixed; boundary="Boundary-00=_sajUEEcIW5ssUEJ" Message-Id: <200604281637.16027.paul@codesourcery.com> Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2006-04/txt/msg00416.txt.bz2 --Boundary-00=_sajUEEcIW5ssUEJ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Content-length: 1325 > > case BFD_RELOC_32_PCREL: > > + /* Set the low bit of the value if the target is a thumb function. > > */ + if (fixP->fx_done && fixP->fx_addsy && > > THUMB_IS_FUNC(fixP->fx_addsy)) + value |= 1; > > AFAICT, this is close, but not quite what AAELF says. The relocation > expression is > > ((S + A) | T) - . > > That is, the T bit is orred in before the address of the place is > subtracted. > > Normally, this doesn't change anything since the relocation is used with > .word which has 4-byte alignment. However, if a .4byte directive is > used, then there are no alignment constraints and the order of > processing becomes significant. It turns out this code never triggers because we force an external relocation. However the bfd code to process R_ARM_REL32 has a similar bug. Updated patch attached. Tested with cross to arm-none-eabi. Ok? Paul 2006-04-28 Paul Brook bfd/ * elf32-arm.c (elf32_arm_final_link_relocate): Set Thumb function bit for R_ARM_REL32. gas/ * config/tc-arm.c (arm_optimize_expr): New function. * config/tc-arm.h (md_optimize_expr): Define (arm_optimize_expr): Add prototype. (TC_FORCE_RELOCATION_SUB_SAME): Define. ld/testsuite/ * ld-arm/arm-elf.exp: Add thumb-rel32. * ld-arm/thumb-rel32.d: New test. * ld-arm/thumb-rel32.s: New test. --Boundary-00=_sajUEEcIW5ssUEJ Content-Type: text/x-diff; charset="iso-8859-1"; name="patch.rel32" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="patch.rel32" Content-length: 4735 Index: bfd/elf32-arm.c =================================================================== RCS file: /var/cvsroot/src-cvs/src/bfd/elf32-arm.c,v retrieving revision 1.71 diff -u -p -r1.71 elf32-arm.c --- bfd/elf32-arm.c 25 Apr 2006 17:46:15 -0000 1.71 +++ bfd/elf32-arm.c 28 Apr 2006 15:12:07 -0000 @@ -3274,9 +3274,11 @@ elf32_arm_final_link_relocate (reloc_how break; case R_ARM_REL32: + value += addend; + if (sym_flags == STT_ARM_TFUNC) + value |= 1; value -= (input_section->output_section->vma + input_section->output_offset + rel->r_offset); - value += addend; break; case R_ARM_PREL31: Index: gas/config/tc-arm.c =================================================================== RCS file: /var/cvsroot/src-cvs/src/gas/config/tc-arm.c,v retrieving revision 1.261 diff -u -p -r1.261 tc-arm.c --- gas/config/tc-arm.c 26 Apr 2006 16:03:02 -0000 1.261 +++ gas/config/tc-arm.c 28 Apr 2006 15:12:10 -0000 @@ -15811,6 +15811,29 @@ get_thumb32_insn (char * buf) return insn; } + +/* We usually want to set the low bit on the address of thumb function + symbols. In particular .word foo - . should have the low bit set. + Generic code tries to fold the difference of two symbols to + a constant. Prevent this and force a relocation when the first symbols + is a thumb function. */ +int +arm_optimize_expr (expressionS *l, operatorT op, expressionS *r) +{ + if (op == O_subtract + && l->X_op == O_symbol + && r->X_op == O_symbol + && THUMB_IS_FUNC (l->X_add_symbol)) + { + l->X_op = O_subtract; + l->X_op_symbol = r->X_add_symbol; + l->X_add_number -= r->X_add_number; + return 1; + } + /* Process as normal. */ + return 0; +} + void md_apply_fix (fixS * fixP, valueT * valP, Index: gas/config/tc-arm.h =================================================================== RCS file: /var/cvsroot/src-cvs/src/gas/config/tc-arm.h,v retrieving revision 1.36 diff -u -p -r1.36 tc-arm.h --- gas/config/tc-arm.h 8 Oct 2005 17:07:16 -0000 1.36 +++ gas/config/tc-arm.h 24 Apr 2006 14:59:51 -0000 @@ -83,6 +83,9 @@ struct fix; arm_relax_frag(segment, fragp, stretch) extern int arm_relax_frag (asection *, struct frag *, long); +#define md_optimize_expr(l,o,r) arm_optimize_expr (l, o, r) +extern int arm_optimize_expr (expressionS *, operatorT, expressionS *); + #define md_cleanup() arm_cleanup () #define md_start_line_hook() arm_start_line_hook () @@ -148,6 +151,12 @@ extern void arm_md_end (void); || (FIX)->fx_r_type == BFD_RELOC_32 \ || TC_FORCE_RELOCATION (FIX)) +/* Force output of R_ARM_REL32 relocations against thumb function symbols. + This is needed to ensure the low bit is handled correctly. */ +#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEG) \ + (THUMB_IS_FUNC ((FIX)->fx_addsy) \ + || !SEG_NORMAL (SEG)) + #define TC_CONS_FIX_NEW cons_fix_new_arm #define MAX_MEM_FOR_RS_ALIGN_CODE 31 Index: ld/testsuite/ld-arm/arm-elf.exp =================================================================== RCS file: /var/cvsroot/src-cvs/src/ld/testsuite/ld-arm/arm-elf.exp,v retrieving revision 1.11 diff -u -p -r1.11 arm-elf.exp --- ld/testsuite/ld-arm/arm-elf.exp 7 Mar 2006 08:39:21 -0000 1.11 +++ ld/testsuite/ld-arm/arm-elf.exp 24 Apr 2006 14:43:47 -0000 @@ -119,6 +119,9 @@ set armelftests { {"Thumb entry point" "-T arm.ld" "" {thumb-entry.s} {{readelf -h thumb-entry.d}} "thumb-entry"} + {"thumb-rel32" "-static -T arm.ld" "" {thumb-rel32.s} + {{objdump -s thumb-rel32.d}} + "thumb-rel32"} } run_ld_link_tests $armelftests Index: ld/testsuite/ld-arm/thumb-rel32.d =================================================================== RCS file: ld/testsuite/ld-arm/thumb-rel32.d diff -N ld/testsuite/ld-arm/thumb-rel32.d --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ ld/testsuite/ld-arm/thumb-rel32.d 25 Apr 2006 18:22:46 -0000 @@ -0,0 +1,7 @@ + +.*: file format.* + +Contents of section .text: + 8000 (00000011 fffffffd 00ffffff f8000000|11000000 fdffffff 00f8ffff ff000000) .* +# Ignore .ARM.attributes section +#... Index: ld/testsuite/ld-arm/thumb-rel32.s =================================================================== RCS file: ld/testsuite/ld-arm/thumb-rel32.s diff -N ld/testsuite/ld-arm/thumb-rel32.s --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ ld/testsuite/ld-arm/thumb-rel32.s 25 Apr 2006 18:23:00 -0000 @@ -0,0 +1,18 @@ + .text + .arch armv4t + .global _start + .type _start, %function + .thumb_func +_start: + .word bar - . + .word _start - . + .byte 0 + .4byte (_start - .) + 1 + .byte 0, 0, 0 + .section .after, "ax", %progbits + .global bar + .type bar, %function + .thumb_func +bar: + .word 0 + .ident "GCC: (GNU) 4.1.0 (CodeSourcery ARM)" --Boundary-00=_sajUEEcIW5ssUEJ--