From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 31038 invoked by alias); 28 Jul 2007 18:13:42 -0000 Received: (qmail 31020 invoked by uid 22791); 28 Jul 2007 18:13:40 -0000 X-Spam-Check-By: sourceware.org Received: from alnrmhc13.comcast.net (HELO alnrmhc13.comcast.net) (206.18.177.53) by sourceware.org (qpsmtpd/0.31) with ESMTP; Sat, 28 Jul 2007 18:13:36 +0000 Received: from lucon.org ([24.6.230.138]) by comcast.net (alnrmhc13) with ESMTP id <20070728181334b13006jrvre>; Sat, 28 Jul 2007 18:13:34 +0000 Received: by lucon.org (Postfix, from userid 500) id 4B504F8209; Sat, 28 Jul 2007 11:13:34 -0700 (PDT) Date: Sat, 28 Jul 2007 19:51:00 -0000 From: "H.J. Lu" To: binutils@sources.redhat.com Subject: PATCH: Fix disassembler for x86 SIMD instructions with 32/64bit memory Message-ID: <20070728181334.GA24704@lucon.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.14 (2007-02-12) Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2007-07/txt/msg00515.txt.bz2 The x86 disassembler doesn't properly handle x86 SIMD instructions with 32/64bit memory in Intel mode. This patch fixes them. H.J. ---- gas/testsuite/ 2007-07-28 H.J. Lu PR binutils/4835 * gas/i386/simd-intel.d: Updated. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. * gas/i386/simd.s: Add new tests. * gas/i386/x86-64-simd.s: Likewise. opcodes/ 2007-07-28 H.J. Lu PR binutils/4835 * i386-dis.c (Eq): New. (EMC): Renamed to ... (EMCq): This. Use q_mode instead of v_mode. (prefix_user_table): Updated to use EXd, EXq, EMCq, Ed and Eq when appropriated. --- binutils/gas/testsuite/gas/i386/simd-intel.d.scalar 2007-07-16 19:38:10.000000000 -0700 +++ binutils/gas/testsuite/gas/i386/simd-intel.d 2007-07-28 11:02:07.000000000 -0700 @@ -39,3 +39,35 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 0f 6c 0d 78 56 34 12 punpcklqdq xmm1,XMMWORD PTR ds:0x12345678 [ ]*[a-f0-9]+: 66 0f 2e 0d 78 56 34 12 ucomisd xmm1,QWORD PTR ds:0x12345678 [ ]*[a-f0-9]+: 0f 2e 0d 78 56 34 12 ucomiss xmm1,DWORD PTR ds:0x12345678 +[ ]*[a-f0-9]+: f2 0f c2 00 00 cmpeqsd xmm0,QWORD PTR \[eax\] +[ ]*[a-f0-9]+: f3 0f c2 00 00 cmpeqss xmm0,DWORD PTR \[eax\] +[ ]*[a-f0-9]+: 66 0f 2a 00 cvtpi2pd xmm0,QWORD PTR \[eax\] +[ ]*[a-f0-9]+: 0f 2a 00 cvtpi2ps xmm0,QWORD PTR \[eax\] +[ ]*[a-f0-9]+: 0f 2d 00 cvtps2pi mm0,QWORD PTR \[eax\] +[ ]*[a-f0-9]+: f2 0f 2d 00 cvtsd2si eax,QWORD PTR \[eax\] +[ ]*[a-f0-9]+: f2 0f 5a 00 cvtsd2ss xmm0,QWORD PTR \[eax\] +[ ]*[a-f0-9]+: f3 0f 5a 00 cvtss2sd xmm0,DWORD PTR \[eax\] +[ ]*[a-f0-9]+: f3 0f 2d 00 cvtss2si eax,DWORD PTR \[eax\] +[ ]*[a-f0-9]+: f2 0f 5e 00 divsd xmm0,QWORD PTR \[eax\] +[ ]*[a-f0-9]+: f3 0f 5e 00 divss xmm0,DWORD PTR \[eax\] +[ ]*[a-f0-9]+: f2 0f 5f 00 maxsd xmm0,QWORD PTR \[eax\] +[ ]*[a-f0-9]+: f3 0f 5f 00 maxss xmm0,DWORD PTR \[eax\] +[ ]*[a-f0-9]+: f3 0f 5d 00 minss xmm0,DWORD PTR \[eax\] +[ ]*[a-f0-9]+: f3 0f 5d 00 minss xmm0,DWORD PTR \[eax\] +[ ]*[a-f0-9]+: f2 0f 2b 00 movntsd QWORD PTR \[eax\],xmm0 +[ ]*[a-f0-9]+: f3 0f 2b 00 movntss DWORD PTR \[eax\],xmm0 +[ ]*[a-f0-9]+: f2 0f 10 00 movsd xmm0,QWORD PTR \[eax\] +[ ]*[a-f0-9]+: f2 0f 11 00 movsd QWORD PTR \[eax\],xmm0 +[ ]*[a-f0-9]+: f3 0f 10 00 movss xmm0,DWORD PTR \[eax\] +[ ]*[a-f0-9]+: f3 0f 11 00 movss DWORD PTR \[eax\],xmm0 +[ ]*[a-f0-9]+: f2 0f 59 00 mulsd xmm0,QWORD PTR \[eax\] +[ ]*[a-f0-9]+: f3 0f 59 00 mulss xmm0,DWORD PTR \[eax\] +[ ]*[a-f0-9]+: f3 0f 53 00 rcpss xmm0,DWORD PTR \[eax\] +[ ]*[a-f0-9]+: 66 0f 3a 0b 00 00 roundsd xmm0,QWORD PTR \[eax\],0x0 +[ ]*[a-f0-9]+: 66 0f 3a 0a 00 00 roundss xmm0,DWORD PTR \[eax\],0x0 +[ ]*[a-f0-9]+: f3 0f 52 00 rsqrtss xmm0,DWORD PTR \[eax\] +[ ]*[a-f0-9]+: f2 0f 51 00 sqrtsd xmm0,QWORD PTR \[eax\] +[ ]*[a-f0-9]+: f3 0f 51 00 sqrtss xmm0,DWORD PTR \[eax\] +[ ]*[a-f0-9]+: f2 0f 5c 00 subsd xmm0,QWORD PTR \[eax\] +[ ]*[a-f0-9]+: f3 0f 5c 00 subss xmm0,DWORD PTR \[eax\] +#pass --- binutils/gas/testsuite/gas/i386/simd.d.scalar 2007-07-16 19:38:10.000000000 -0700 +++ binutils/gas/testsuite/gas/i386/simd.d 2007-07-28 11:01:30.000000000 -0700 @@ -38,3 +38,35 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 0f 6c 0d 78 56 34 12 punpcklqdq 0x12345678,%xmm1 [ ]*[a-f0-9]+: 66 0f 2e 0d 78 56 34 12 ucomisd 0x12345678,%xmm1 [ ]*[a-f0-9]+: 0f 2e 0d 78 56 34 12 ucomiss 0x12345678,%xmm1 +[ ]*[a-f0-9]+: f2 0f c2 00 00 cmpeqsd \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f c2 00 00 cmpeqss \(%eax\),%xmm0 +[ ]*[a-f0-9]+: 66 0f 2a 00 cvtpi2pd \(%eax\),%xmm0 +[ ]*[a-f0-9]+: 0f 2a 00 cvtpi2ps \(%eax\),%xmm0 +[ ]*[a-f0-9]+: 0f 2d 00 cvtps2pi \(%eax\),%mm0 +[ ]*[a-f0-9]+: f2 0f 2d 00 cvtsd2si \(%eax\),%eax +[ ]*[a-f0-9]+: f2 0f 5a 00 cvtsd2ss \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 5a 00 cvtss2sd \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 2d 00 cvtss2si \(%eax\),%eax +[ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f2 0f 5f 00 maxsd \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 5f 00 maxss \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 5d 00 minss \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 5d 00 minss \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f2 0f 2b 00 movntsd %xmm0,\(%eax\) +[ ]*[a-f0-9]+: f3 0f 2b 00 movntss %xmm0,\(%eax\) +[ ]*[a-f0-9]+: f2 0f 10 00 movsd \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f2 0f 11 00 movsd %xmm0,\(%eax\) +[ ]*[a-f0-9]+: f3 0f 10 00 movss \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 11 00 movss %xmm0,\(%eax\) +[ ]*[a-f0-9]+: f2 0f 59 00 mulsd \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 53 00 rcpss \(%eax\),%xmm0 +[ ]*[a-f0-9]+: 66 0f 3a 0b 00 00 roundsd \$0x0,\(%eax\),%xmm0 +[ ]*[a-f0-9]+: 66 0f 3a 0a 00 00 roundss \$0x0,\(%eax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 52 00 rsqrtss \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f2 0f 51 00 sqrtsd \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 51 00 sqrtss \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f2 0f 5c 00 subsd \(%eax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 5c 00 subss \(%eax\),%xmm0 +#pass --- binutils/gas/testsuite/gas/i386/simd.s.scalar 2007-07-16 19:38:10.000000000 -0700 +++ binutils/gas/testsuite/gas/i386/simd.s 2007-07-28 10:59:42.000000000 -0700 @@ -31,3 +31,35 @@ _start: punpcklqdq 0x12345678,%xmm1 ucomisd 0x12345678,%xmm1 ucomiss 0x12345678,%xmm1 + + cmpeqsd (%eax),%xmm0 + cmpeqss (%eax),%xmm0 + cvtpi2pd (%eax),%xmm0 + cvtpi2ps (%eax),%xmm0 + cvtps2pi (%eax),%mm0 + cvtsd2si (%eax),%eax + cvtsd2ss (%eax),%xmm0 + cvtss2sd (%eax),%xmm0 + cvtss2si (%eax),%eax + divsd (%eax),%xmm0 + divss (%eax),%xmm0 + maxsd (%eax),%xmm0 + maxss (%eax),%xmm0 + minss (%eax),%xmm0 + minss (%eax),%xmm0 + movntsd %xmm0,(%eax) + movntss %xmm0,(%eax) + movsd (%eax),%xmm0 + movsd %xmm0,(%eax) + movss (%eax),%xmm0 + movss %xmm0,(%eax) + mulsd (%eax),%xmm0 + mulss (%eax),%xmm0 + rcpss (%eax),%xmm0 + roundsd $0,(%eax),%xmm0 + roundss $0,(%eax),%xmm0 + rsqrtss (%eax),%xmm0 + sqrtsd (%eax),%xmm0 + sqrtss (%eax),%xmm0 + subsd (%eax),%xmm0 + subss (%eax),%xmm0 --- binutils/gas/testsuite/gas/i386/x86-64-simd-intel.d.scalar 2007-07-28 09:32:26.000000000 -0700 +++ binutils/gas/testsuite/gas/i386/x86-64-simd-intel.d 2007-07-28 11:04:01.000000000 -0700 @@ -41,3 +41,37 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 0f 6c 0d 78 56 34 12 punpcklqdq xmm1,XMMWORD PTR \[rip\+0x12345678\][ ]*(#.*)? [ ]*[a-f0-9]+: 66 0f 2e 0d 78 56 34 12 ucomisd xmm1,QWORD PTR \[rip\+0x12345678\][ ]*(#.*)? [ ]*[a-f0-9]+: 0f 2e 0d 78 56 34 12 ucomiss xmm1,DWORD PTR \[rip\+0x12345678\][ ]*(#.*)? +[ ]*[a-f0-9]+: f2 0f c2 00 00 cmpeqsd xmm0,QWORD PTR \[rax\] +[ ]*[a-f0-9]+: f3 0f c2 00 00 cmpeqss xmm0,DWORD PTR \[rax\] +[ ]*[a-f0-9]+: 66 0f 2a 00 cvtpi2pd xmm0,QWORD PTR \[rax\] +[ ]*[a-f0-9]+: 0f 2a 00 cvtpi2ps xmm0,QWORD PTR \[rax\] +[ ]*[a-f0-9]+: 0f 2d 00 cvtps2pi mm0,QWORD PTR \[rax\] +[ ]*[a-f0-9]+: f2 0f 2d 00 cvtsd2si eax,QWORD PTR \[rax\] +[ ]*[a-f0-9]+: f2 48 0f 2d 00 cvtsd2si rax,QWORD PTR \[rax\] +[ ]*[a-f0-9]+: f2 0f 5a 00 cvtsd2ss xmm0,QWORD PTR \[rax\] +[ ]*[a-f0-9]+: f3 0f 5a 00 cvtss2sd xmm0,DWORD PTR \[rax\] +[ ]*[a-f0-9]+: f3 48 0f 2d 00 cvtss2si rax,DWORD PTR \[rax\] +[ ]*[a-f0-9]+: f3 0f 2d 00 cvtss2si eax,DWORD PTR \[rax\] +[ ]*[a-f0-9]+: f2 0f 5e 00 divsd xmm0,QWORD PTR \[rax\] +[ ]*[a-f0-9]+: f3 0f 5e 00 divss xmm0,DWORD PTR \[rax\] +[ ]*[a-f0-9]+: f2 0f 5f 00 maxsd xmm0,QWORD PTR \[rax\] +[ ]*[a-f0-9]+: f3 0f 5f 00 maxss xmm0,DWORD PTR \[rax\] +[ ]*[a-f0-9]+: f3 0f 5d 00 minss xmm0,DWORD PTR \[rax\] +[ ]*[a-f0-9]+: f3 0f 5d 00 minss xmm0,DWORD PTR \[rax\] +[ ]*[a-f0-9]+: f2 0f 2b 00 movntsd QWORD PTR \[rax\],xmm0 +[ ]*[a-f0-9]+: f3 0f 2b 00 movntss DWORD PTR \[rax\],xmm0 +[ ]*[a-f0-9]+: f2 0f 10 00 movsd xmm0,QWORD PTR \[rax\] +[ ]*[a-f0-9]+: f2 0f 11 00 movsd QWORD PTR \[rax\],xmm0 +[ ]*[a-f0-9]+: f3 0f 10 00 movss xmm0,DWORD PTR \[rax\] +[ ]*[a-f0-9]+: f3 0f 11 00 movss DWORD PTR \[rax\],xmm0 +[ ]*[a-f0-9]+: f2 0f 59 00 mulsd xmm0,QWORD PTR \[rax\] +[ ]*[a-f0-9]+: f3 0f 59 00 mulss xmm0,DWORD PTR \[rax\] +[ ]*[a-f0-9]+: f3 0f 53 00 rcpss xmm0,DWORD PTR \[rax\] +[ ]*[a-f0-9]+: 66 0f 3a 0b 00 00 roundsd xmm0,QWORD PTR \[rax\],0x0 +[ ]*[a-f0-9]+: 66 0f 3a 0a 00 00 roundss xmm0,DWORD PTR \[rax\],0x0 +[ ]*[a-f0-9]+: f3 0f 52 00 rsqrtss xmm0,DWORD PTR \[rax\] +[ ]*[a-f0-9]+: f2 0f 51 00 sqrtsd xmm0,QWORD PTR \[rax\] +[ ]*[a-f0-9]+: f3 0f 51 00 sqrtss xmm0,DWORD PTR \[rax\] +[ ]*[a-f0-9]+: f2 0f 5c 00 subsd xmm0,QWORD PTR \[rax\] +[ ]*[a-f0-9]+: f3 0f 5c 00 subss xmm0,DWORD PTR \[rax\] +#pass --- binutils/gas/testsuite/gas/i386/x86-64-simd.d.scalar 2007-07-28 09:32:26.000000000 -0700 +++ binutils/gas/testsuite/gas/i386/x86-64-simd.d 2007-07-28 11:02:50.000000000 -0700 @@ -40,3 +40,37 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 0f 6c 0d 78 56 34 12 punpcklqdq 0x12345678\(%rip\),%xmm1[ ]*(#.*)? [ ]*[a-f0-9]+: 66 0f 2e 0d 78 56 34 12 ucomisd 0x12345678\(%rip\),%xmm1[ ]*(#.*)? [ ]*[a-f0-9]+: 0f 2e 0d 78 56 34 12 ucomiss 0x12345678\(%rip\),%xmm1[ ]*(#.*)? +[ ]*[a-f0-9]+: f2 0f c2 00 00 cmpeqsd \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f c2 00 00 cmpeqss \(%rax\),%xmm0 +[ ]*[a-f0-9]+: 66 0f 2a 00 cvtpi2pd \(%rax\),%xmm0 +[ ]*[a-f0-9]+: 0f 2a 00 cvtpi2ps \(%rax\),%xmm0 +[ ]*[a-f0-9]+: 0f 2d 00 cvtps2pi \(%rax\),%mm0 +[ ]*[a-f0-9]+: f2 0f 2d 00 cvtsd2si \(%rax\),%eax +[ ]*[a-f0-9]+: f2 48 0f 2d 00 cvtsd2siq \(%rax\),%rax +[ ]*[a-f0-9]+: f2 0f 5a 00 cvtsd2ss \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 5a 00 cvtss2sd \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f3 48 0f 2d 00 cvtss2siq \(%rax\),%rax +[ ]*[a-f0-9]+: f3 0f 2d 00 cvtss2si \(%rax\),%eax +[ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f2 0f 5f 00 maxsd \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 5f 00 maxss \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 5d 00 minss \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 5d 00 minss \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f2 0f 2b 00 movntsd %xmm0,\(%rax\) +[ ]*[a-f0-9]+: f3 0f 2b 00 movntss %xmm0,\(%rax\) +[ ]*[a-f0-9]+: f2 0f 10 00 movsd \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f2 0f 11 00 movsd %xmm0,\(%rax\) +[ ]*[a-f0-9]+: f3 0f 10 00 movss \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 11 00 movss %xmm0,\(%rax\) +[ ]*[a-f0-9]+: f2 0f 59 00 mulsd \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 53 00 rcpss \(%rax\),%xmm0 +[ ]*[a-f0-9]+: 66 0f 3a 0b 00 00 roundsd \$0x0,\(%rax\),%xmm0 +[ ]*[a-f0-9]+: 66 0f 3a 0a 00 00 roundss \$0x0,\(%rax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 52 00 rsqrtss \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f2 0f 51 00 sqrtsd \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 51 00 sqrtss \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f2 0f 5c 00 subsd \(%rax\),%xmm0 +[ ]*[a-f0-9]+: f3 0f 5c 00 subss \(%rax\),%xmm0 +#pass --- binutils/gas/testsuite/gas/i386/x86-64-simd.s.scalar 2007-07-28 09:32:26.000000000 -0700 +++ binutils/gas/testsuite/gas/i386/x86-64-simd.s 2007-07-28 11:00:04.000000000 -0700 @@ -33,3 +33,37 @@ _start: punpcklqdq 0x12345678(%rip),%xmm1 ucomisd 0x12345678(%rip),%xmm1 ucomiss 0x12345678(%rip),%xmm1 + + cmpeqsd (%rax),%xmm0 + cmpeqss (%rax),%xmm0 + cvtpi2pd (%rax),%xmm0 + cvtpi2ps (%rax),%xmm0 + cvtps2pi (%rax),%mm0 + cvtsd2si (%rax),%eax + cvtsd2siq (%rax),%rax + cvtsd2ss (%rax),%xmm0 + cvtss2sd (%rax),%xmm0 + cvtss2siq (%rax),%rax + cvtss2si (%rax),%eax + divsd (%rax),%xmm0 + divss (%rax),%xmm0 + maxsd (%rax),%xmm0 + maxss (%rax),%xmm0 + minss (%rax),%xmm0 + minss (%rax),%xmm0 + movntsd %xmm0,(%rax) + movntss %xmm0,(%rax) + movsd (%rax),%xmm0 + movsd %xmm0,(%rax) + movss (%rax),%xmm0 + movss %xmm0,(%rax) + mulsd (%rax),%xmm0 + mulss (%rax),%xmm0 + rcpss (%rax),%xmm0 + roundsd $0,(%rax),%xmm0 + roundss $0,(%rax),%xmm0 + rsqrtss (%rax),%xmm0 + sqrtsd (%rax),%xmm0 + sqrtss (%rax),%xmm0 + subsd (%rax),%xmm0 + subss (%rax),%xmm0 --- binutils/opcodes/i386-dis.c.scalar 2007-07-28 09:32:26.000000000 -0700 +++ binutils/opcodes/i386-dis.c 2007-07-28 09:59:37.000000000 -0700 @@ -207,6 +207,7 @@ fetch_data (struct disassemble_info *inf #define Edqw { OP_E, dqw_mode } #define Edqb { OP_E, dqb_mode } #define Edqd { OP_E, dqd_mode } +#define Eq { OP_E, q_mode } #define indirEv { OP_indirE, stack_v_mode } #define indirEp { OP_indirE, f_mode } #define stackEv { OP_E, stack_v_mode } @@ -315,7 +316,7 @@ fetch_data (struct disassemble_info *inf #define EXx { OP_EX, x_mode } #define MS { OP_MS, v_mode } #define XS { OP_XS, v_mode } -#define EMC { OP_EMC, v_mode } +#define EMCq { OP_EMC, q_mode } #define MXC { OP_MXC, 0 } #define VM { OP_VMX, q_mode } #define OPSUF { OP_3DNowSuffix, 0 } @@ -1847,100 +1848,100 @@ static const struct dis386 prefix_user_t /* PREGRP1 */ { { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */ + { "", { XM, EXd, OPSIMD } }, { "", { XM, EXx, OPSIMD } }, - { "", { XM, EXx, OPSIMD } }, - { "", { XM, EXx, OPSIMD } }, + { "", { XM, EXq, OPSIMD } }, }, /* PREGRP2 */ { - { "cvtpi2ps", { XM, EMC } }, + { "cvtpi2ps", { XM, EMCq } }, { "cvtsi2ssY", { XM, Ev } }, - { "cvtpi2pd", { XM, EMC } }, + { "cvtpi2pd", { XM, EMCq } }, { "cvtsi2sdY", { XM, Ev } }, }, /* PREGRP3 */ { - { "cvtps2pi", { MXC, EXx } }, - { "cvtss2siY", { Gv, EXx } }, + { "cvtps2pi", { MXC, EXq } }, + { "cvtss2siY", { Gv, EXd } }, { "cvtpd2pi", { MXC, EXx } }, - { "cvtsd2siY", { Gv, EXx } }, + { "cvtsd2siY", { Gv, EXq } }, }, /* PREGRP4 */ { - { "cvttps2pi", { MXC, EXx } }, - { "cvttss2siY", { Gv, EXx } }, + { "cvttps2pi", { MXC, EXq } }, + { "cvttss2siY", { Gv, EXd } }, { "cvttpd2pi", { MXC, EXx } }, - { "cvttsd2siY", { Gv, EXx } }, + { "cvttsd2siY", { Gv, EXq } }, }, /* PREGRP5 */ { { "divps", { XM, EXx } }, - { "divss", { XM, EXx } }, + { "divss", { XM, EXd } }, { "divpd", { XM, EXx } }, - { "divsd", { XM, EXx } }, + { "divsd", { XM, EXq } }, }, /* PREGRP6 */ { { "maxps", { XM, EXx } }, - { "maxss", { XM, EXx } }, + { "maxss", { XM, EXd } }, { "maxpd", { XM, EXx } }, - { "maxsd", { XM, EXx } }, + { "maxsd", { XM, EXq } }, }, /* PREGRP7 */ { { "minps", { XM, EXx } }, - { "minss", { XM, EXx } }, + { "minss", { XM, EXd } }, { "minpd", { XM, EXx } }, - { "minsd", { XM, EXx } }, + { "minsd", { XM, EXq } }, }, /* PREGRP8 */ { { "movups", { XM, EXx } }, - { "movss", { XM, EXx } }, + { "movss", { XM, EXd } }, { "movupd", { XM, EXx } }, - { "movsd", { XM, EXx } }, + { "movsd", { XM, EXq } }, }, /* PREGRP9 */ { { "movups", { EXx, XM } }, - { "movss", { EXx, XM } }, + { "movss", { EXd, XM } }, { "movupd", { EXx, XM } }, - { "movsd", { EXx, XM } }, + { "movsd", { EXq, XM } }, }, /* PREGRP10 */ { { "mulps", { XM, EXx } }, - { "mulss", { XM, EXx } }, + { "mulss", { XM, EXd } }, { "mulpd", { XM, EXx } }, - { "mulsd", { XM, EXx } }, + { "mulsd", { XM, EXq } }, }, /* PREGRP11 */ { { "rcpps", { XM, EXx } }, - { "rcpss", { XM, EXx } }, + { "rcpss", { XM, EXd } }, { "(bad)", { XM, EXx } }, { "(bad)", { XM, EXx } }, }, /* PREGRP12 */ { { "rsqrtps",{ XM, EXx } }, - { "rsqrtss",{ XM, EXx } }, + { "rsqrtss",{ XM, EXd } }, { "(bad)", { XM, EXx } }, { "(bad)", { XM, EXx } }, }, /* PREGRP13 */ { { "sqrtps", { XM, EXx } }, - { "sqrtss", { XM, EXx } }, + { "sqrtss", { XM, EXd } }, { "sqrtpd", { XM, EXx } }, - { "sqrtsd", { XM, EXx } }, + { "sqrtsd", { XM, EXq } }, }, /* PREGRP14 */ { { "subps", { XM, EXx } }, - { "subss", { XM, EXx } }, + { "subss", { XM, EXd } }, { "subpd", { XM, EXx } }, - { "subsd", { XM, EXx } }, + { "subsd", { XM, EXq } }, }, /* PREGRP15 */ { @@ -1959,9 +1960,9 @@ static const struct dis386 prefix_user_t /* PREGRP17 */ { { "cvtps2pd", { XM, EXq } }, - { "cvtss2sd", { XM, EXx } }, + { "cvtss2sd", { XM, EXd } }, { "cvtpd2ps", { XM, EXx } }, - { "cvtsd2ss", { XM, EXx } }, + { "cvtsd2ss", { XM, EXq } }, }, /* PREGRP18 */ { @@ -2071,9 +2072,9 @@ static const struct dis386 prefix_user_t /* PREGRP33 */ { {"movntps", { Ev, XM } }, - {"movntss", { Ev, XM } }, + {"movntss", { Ed, XM } }, {"movntpd", { Ev, XM } }, - {"movntsd", { Ev, XM } }, + {"movntsd", { Eq, XM } }, }, /* PREGRP34 */ @@ -2376,7 +2377,7 @@ static const struct dis386 prefix_user_t { { "(bad)", { XX } }, { "(bad)", { XX } }, - { "roundss", { XM, EXx, Ib } }, + { "roundss", { XM, EXd, Ib } }, { "(bad)", { XX } }, }, @@ -2384,7 +2385,7 @@ static const struct dis386 prefix_user_t { { "(bad)", { XX } }, { "(bad)", { XX } }, - { "roundsd", { XM, EXx, Ib } }, + { "roundsd", { XM, EXq, Ib } }, { "(bad)", { XX } }, },