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From: "H.J. Lu" <hongjiu.lu@intel.com>
To: binutils@sources.redhat.com
Subject: PATCH: Add ymm tests for 16bit and 64bit
Date: Tue, 01 Sep 2009 23:58:00 -0000	[thread overview]
Message-ID: <20090901235804.GA13704@lucon.org> (raw)

I am checking in this patch to add ymm tests for 16bit and 64bit.


H.J.
---
Index: ChangeLog
===================================================================
--- ChangeLog	(revision 6692)
+++ ChangeLog	(working copy)
@@ -1,5 +1,13 @@
 2009-09-01  H.J. Lu  <hongjiu.lu@intel.com>
 
+	* gas/i386/att-regs.s: Add ymm tests for 16bit and 64bit.
+	* gas/i386/intel-regs.s: Likewise.
+
+	* gas/i386/att-regs.d: Updated.
+	* gas/i386/intel-regs.d: Likewise.
+
+2009-09-01  H.J. Lu  <hongjiu.lu@intel.com>
+
 	* gas/i386/att-regs.s: Remove a tab.
 
 2009-09-01  Jie Zhang  <jie.zhang@analog.com>
Index: gas/i386/att-regs.d
===================================================================
--- gas/i386/att-regs.d	(revision 6691)
+++ gas/i386/att-regs.d	(working copy)
@@ -19,6 +19,7 @@ Disassembly of section \.text:
 .*[ 	]+R_386_16[ 	]+tr0
 .*[ 	]+R_386_16[ 	]+mm0
 .*[ 	]+R_386_16[ 	]+xmm0
+.*[ 	]+R_386_16[ 	]+ymm0
 .*[ 	]+R_386_32[ 	]+rax
 .*[ 	]+R_386_32[ 	]+axl
 .*[ 	]+R_386_32[ 	]+r8b
@@ -44,4 +45,7 @@ Disassembly of section \.text:
 .*:[ 	]+89 c0[ 	]+mov[ 	]+%eax,%eax
 .*:[ 	]+4c[ 	]+dec    %esp
 .*:[ 	]+89 c0[ 	]+mov[ 	]+%eax,%eax
+
+.* <ymm8>:
+.*[ 	]+<ymm8>
 #pass
Index: gas/i386/att-regs.s
===================================================================
--- gas/i386/att-regs.s	(revision 6692)
+++ gas/i386/att-regs.s	(working copy)
@@ -17,6 +17,7 @@
 	mov	tr0, ax			; add	al, (bx,si)
 	mov	mm0, ax			; add	al, (bx,si)
 	mov	xmm0, ax		; add	al, (bx,si)
+	mov	ymm0, ax		; add	al, (bx,si)
 
 	.arch generic32
 	.code32
@@ -52,3 +53,5 @@
 	mov	r8w, ax
 	mov	r8d, eax
 	mov	r8, rax
+ymm8:
+	jmp	ymm8
Index: gas/i386/intel-regs.d
===================================================================
--- gas/i386/intel-regs.d	(revision 6691)
+++ gas/i386/intel-regs.d	(working copy)
@@ -19,6 +19,7 @@ Disassembly of section \.text:
 .*[ 	]+R_386_16[ 	]+tr0
 .*[ 	]+R_386_16[ 	]+mm0
 .*[ 	]+R_386_16[ 	]+xmm0
+.*[ 	]+R_386_16[ 	]+ymm0
 .*[ 	]+R_386_32[ 	]+rax
 .*[ 	]+R_386_32[ 	]+axl
 .*[ 	]+R_386_32[ 	]+r8b
@@ -44,4 +45,7 @@ Disassembly of section \.text:
 .*:[ 	]+89 c0[ 	]+mov[ 	]+%eax,%eax
 .*:[ 	]+4c[ 	]+dec    %esp
 .*:[ 	]+89 c0[ 	]+mov[ 	]+%eax,%eax
+
+.* <ymm8>:
+.*[ 	]+<ymm8>
 #pass
Index: gas/i386/intel-regs.s
===================================================================
--- gas/i386/intel-regs.s	(revision 6691)
+++ gas/i386/intel-regs.s	(working copy)
@@ -17,6 +17,7 @@
 	mov	ax, tr0			; add	[bx+si], al
 	mov	ax, mm0			; add	[bx+si], al
 	mov	ax, xmm0		; add	[bx+si], al
+	mov	ax, ymm0		; add	[bx+si], al
 
 	.arch generic32
 	.code32
@@ -52,3 +53,5 @@
 	mov	ax, r8w
 	mov	eax, r8d
 	mov	rax, r8
+ymm8:
+	jmp	ymm8

                 reply	other threads:[~2009-09-01 23:58 UTC|newest]

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