From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30924 invoked by alias); 18 Apr 2011 13:54:29 -0000 Received: (qmail 30886 invoked by uid 22791); 18 Apr 2011 13:54:27 -0000 X-SWARE-Spam-Status: No, hits=-1.7 required=5.0 tests=AWL,BAYES_00,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 18 Apr 2011 13:53:53 +0000 Received: (qmail 6403 invoked from network); 18 Apr 2011 13:53:52 -0000 Received: from unknown (HELO rex.config) (julian@127.0.0.2) by mail.codesourcery.com with ESMTPA; 18 Apr 2011 13:53:52 -0000 Date: Mon, 18 Apr 2011 13:54:00 -0000 From: Julian Brown To: Nick Clifton Cc: Hans-Peter Nilsson , binutils@sourceware.org Subject: Re: [PATCH, ARM] MSR/MRS assembly and disassembly tweaks Message-ID: <20110418145344.3ce05f5f@rex.config> In-Reply-To: <4DAC3CBD.3040501@redhat.com> References: <20110404150728.27eeeca9@rex.config> <201104121959.p3CJxbU3022379@ignucius.se.axis.com> <20110413155151.77dec560@rex.config> <4DAC3CBD.3040501@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2011-04/txt/msg00245.txt.bz2 On Mon, 18 Apr 2011 14:29:33 +0100 Nick Clifton wrote: > Hi Julian, > > > gas/ > > * config/tc-arm.c (parse_psr): Use selected_cpu not > > cpu_variant to detect M-profile targets. > > > > include/ > > * opcode/arm.h (ARM_AEXT_V7_ARM): Remove ARM_EXT_OS from > > bitmask. > > Right - I have applied this patch together with some fixes of my own. > (Full patch attached). We now have zero unexpected failures in the > GAS testsuite for EABI, ELF and PE based ARM toolchains. Thanks for this! > The problem with the SVC test was that removing ARM_EXT_OS from > ARM_AEXT_V7_ARM meant that -march=armv7 would select an architecture > that included v6m but which did not set ARM_EXT_OS. This is correct, > but the code in do_t_swi() did not allow for this and so triggered a > bogus error condition. I fixed this by extending the test in do_t_swi > to exclude all v7 and higher architectures. I don't understand the subtleties of what ARM_EXT_OS is supposed to do enough to comment on this, I don't think... > One thing that I am not sure about is the correct name for V7M PSR > register 18. Is it BASEPRI_MASK or BASEPRI_MAX. Judging by the > other register names it is BASEPRI_MASK, but I could not find any > documentation to confirm this. > opcodes/ChangeLog > 2011-04-18 Nick Clifton > > * arm-dis.c (psr_name): Revert previous delta. But I don't think this reversion is right. AFAICT IAPSR, etc. can have bitmasks specified for the APSR parts. Also AFAICT the name of the register is BASEPRI_MAX, and any use of BASEPRI_MASK is wrong. See e.g.: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/Cihjcedb.html Cheers, Julian