* PATCH: Support AVX Programming Reference (June, 2011)
@ 2011-06-10 21:29 H.J. Lu
2011-06-16 22:05 ` Quentin Neill
0 siblings, 1 reply; 3+ messages in thread
From: H.J. Lu @ 2011-06-10 21:29 UTC (permalink / raw)
To: binutils
[-- Attachment #1: Type: text/plain, Size: 6687 bytes --]
Hi,
I checked in this patch to support AVX Programming Reference (June,
2011).
H.J.
---
gas/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* config/tc-i386.c (i386_error): Add invalid_vsib_address and
unsupported_vector_index_register.
(cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
(check_VecOperands): New.
(match_template): Call check_VecOperands. Handle
invalid_vsib_address and unsupported_vector_index_register.
(build_modrm_byte): Support VecSIB. Check register-only source
operand when two source operands are swapped.
(i386_index_check): Allow Xmm/Ymm index registers.
* doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
and invpcid./invpcid.
gas/testsuite/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* gas/i386/arch-10-1.l: Updated.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Add LZCNT to comments.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10-lzcnt.d: New.
* gas/i386/avx-gather-intel.d: Likewise.
* gas/i386/avx-gather.d: Likewise.
* gas/i386/avx-gather.s: Likewise.
* gas/i386/avx2-intel.d: Likewise.
* gas/i386/avx2.d: Likewise.
* gas/i386/avx2.s: Likewise
* gas/i386/avx256int-intel.d: Likewise.
* gas/i386/avx256int.d: Likewise.
* gas/i386/avx256int.s: Likewise.
* gas/i386/bmi2-intel.d: Likewise.
* gas/i386/bmi2.d: Likewise.
* gas/i386/bmi2.s: Likewise.
* gas/i386/inval-invpcid.l:Likewise.
* gas/i386/inval-invpcid.s: Likewise.
* gas/i386/invpcid-intel.d: Likewise.
* gas/i386/invpcid.d: Likewise.
* gas/i386/invpcid.s: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/x86-64-avx-gather-intel.d: Likewise.
* gas/i386/x86-64-avx-gather.d: Likewise.
* gas/i386/x86-64-avx-gather.s: Likewise.
* gas/i386/x86-64-avx2-intel.d: Likewise.
* gas/i386/x86-64-avx2.d: Likewise.
* gas/i386/x86-64-avx2.s: Likewise.
* gas/i386/x86-64-avx256int-intel.d: Likewise.
* gas/i386/x86-64-avx256int.d: Likewise.
* gas/i386/x86-64-avx256int.s: Likewise.
* gas/i386/x86-64-bmi2-intel.d: Likewise.
* gas/i386/x86-64-bmi2.d: Likewise.
* gas/i386/x86-64-bmi2.s: Likewise.
* gas/i386/x86-64-inval-invpcid.l: Likewise.
* gas/i386/x86-64-inval-invpcid.s: Likewise.
* gas/i386/x86-64-invpcid-intel.d: Likewise.
* gas/i386/x86-64-invpcid.d: Likewise.
* gas/i386/x86-64-invpcid.s: Likewise.
opcodes/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* i386-dis.c (XMGatherQ): New.
* i386-dis.c (EXxmm_mb): New.
(EXxmm_mb): Likewise.
(EXxmm_mw): Likewise.
(EXxmm_md): Likewise.
(EXxmm_mq): Likewise.
(EXxmmdw): Likewise.
(EXxmmqd): Likewise.
(VexGatherQ): Likewise.
(MVexVSIBDWpX): Likewise.
(MVexVSIBQWpX): Likewise.
(xmm_mb_mode): Likewise.
(xmm_mw_mode): Likewise.
(xmm_md_mode): Likewise.
(xmm_mq_mode): Likewise.
(xmmdw_mode): Likewise.
(xmmqd_mode): Likewise.
(ymmxmm_mode): Likewise.
(vex_vsib_d_w_dq_mode): Likewise.
(vex_vsib_q_w_dq_mode): Likewise.
(MOD_VEX_0F385A_PREFIX_2): Likewise.
(MOD_VEX_0F388C_PREFIX_2): Likewise.
(MOD_VEX_0F388E_PREFIX_2): Likewise.
(PREFIX_0F3882): Likewise.
(PREFIX_VEX_0F3816): Likewise.
(PREFIX_VEX_0F3836): Likewise.
(PREFIX_VEX_0F3845): Likewise.
(PREFIX_VEX_0F3846): Likewise.
(PREFIX_VEX_0F3847): Likewise.
(PREFIX_VEX_0F3858): Likewise.
(PREFIX_VEX_0F3859): Likewise.
(PREFIX_VEX_0F385A): Likewise.
(PREFIX_VEX_0F3878): Likewise.
(PREFIX_VEX_0F3879): Likewise.
(PREFIX_VEX_0F388C): Likewise.
(PREFIX_VEX_0F388E): Likewise.
(PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
(PREFIX_VEX_0F38F5): Likewise.
(PREFIX_VEX_0F38F6): Likewise.
(PREFIX_VEX_0F3A00): Likewise.
(PREFIX_VEX_0F3A01): Likewise.
(PREFIX_VEX_0F3A02): Likewise.
(PREFIX_VEX_0F3A38): Likewise.
(PREFIX_VEX_0F3A39): Likewise.
(PREFIX_VEX_0F3A46): Likewise.
(PREFIX_VEX_0F3AF0): Likewise.
(VEX_LEN_0F3816_P_2): Likewise.
(VEX_LEN_0F3819_P_2): Likewise.
(VEX_LEN_0F3836_P_2): Likewise.
(VEX_LEN_0F385A_P_2_M_0): Likewise.
(VEX_LEN_0F38F5_P_0): Likewise.
(VEX_LEN_0F38F5_P_1): Likewise.
(VEX_LEN_0F38F5_P_3): Likewise.
(VEX_LEN_0F38F6_P_3): Likewise.
(VEX_LEN_0F38F7_P_1): Likewise.
(VEX_LEN_0F38F7_P_2): Likewise.
(VEX_LEN_0F38F7_P_3): Likewise.
(VEX_LEN_0F3A00_P_2): Likewise.
(VEX_LEN_0F3A01_P_2): Likewise.
(VEX_LEN_0F3A38_P_2): Likewise.
(VEX_LEN_0F3A39_P_2): Likewise.
(VEX_LEN_0F3A46_P_2): Likewise.
(VEX_LEN_0F3AF0_P_3): Likewise.
(VEX_W_0F3816_P_2): Likewise.
(VEX_W_0F3818_P_2): Likewise.
(VEX_W_0F3819_P_2): Likewise.
(VEX_W_0F3836_P_2): Likewise.
(VEX_W_0F3846_P_2): Likewise.
(VEX_W_0F3858_P_2): Likewise.
(VEX_W_0F3859_P_2): Likewise.
(VEX_W_0F385A_P_2_M_0): Likewise.
(VEX_W_0F3878_P_2): Likewise.
(VEX_W_0F3879_P_2): Likewise.
(VEX_W_0F3A00_P_2): Likewise.
(VEX_W_0F3A01_P_2): Likewise.
(VEX_W_0F3A02_P_2): Likewise.
(VEX_W_0F3A38_P_2): Likewise.
(VEX_W_0F3A39_P_2): Likewise.
(VEX_W_0F3A46_P_2): Likewise.
(MOD_VEX_0F3818_PREFIX_2): Removed.
(MOD_VEX_0F3819_PREFIX_2): Likewise.
(VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
(VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
(VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
(VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
(VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
(VEX_LEN_0F3A0E_P_2): Likewise.
(VEX_LEN_0F3A0F_P_2): Likewise.
(VEX_LEN_0F3A42_P_2): Likewise.
(VEX_LEN_0F3A4C_P_2): Likewise.
(VEX_W_0F3818_P_2_M_0): Likewise.
(VEX_W_0F3819_P_2_M_0): Likewise.
(prefix_table): Updated.
(three_byte_table): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(vex_w_table): Likewise.
(mod_table): Likewise.
(putop): Handle "LW".
(intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
(OP_EX): Likewise.
(OP_E_memory): Handle vex_vsib_d_w_dq_mode and
vex_vsib_q_w_dq_mode.
(OP_XMM): Handle vex_vsib_q_w_dq_mode.
(OP_VEX): Likewise.
* i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
(cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
(opcode_modifiers): Add VecSIB.
* i386-opc.h (CpuAVX2): New.
(CpuBMI2): Likewise.
(CpuLZCNT): Likewise.
(CpuINVPCID): Likewise.
(VecSIB128): Likewise.
(VecSIB256): Likewise.
(VecSIB): Likewise.
(i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
(i386_opcode_modifier): Add vecsib.
* i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
[-- Attachment #2: binutils-avx2-1.patch.bz2 --]
[-- Type: application/x-bzip2, Size: 60198 bytes --]
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: PATCH: Support AVX Programming Reference (June, 2011)
2011-06-10 21:29 PATCH: Support AVX Programming Reference (June, 2011) H.J. Lu
@ 2011-06-16 22:05 ` Quentin Neill
2011-06-16 22:10 ` H.J. Lu
0 siblings, 1 reply; 3+ messages in thread
From: Quentin Neill @ 2011-06-16 22:05 UTC (permalink / raw)
To: H.J. Lu; +Cc: binutils
On Fri, Jun 10, 2011 at 4:29 PM, H.J. Lu <hongjiu.lu@intel.com> wrote:
> Hi,
>
> I checked in this patch to support AVX Programming Reference (June,
> 2011).
>
>
> H.J.
> ---
> gas/
>
> 2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
>
> AVX Programming Reference (June, 2011)
> * config/tc-i386.c (i386_error): Add invalid_vsib_address and
> unsupported_vector_index_register.
> (cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
> (check_VecOperands): New.
> (match_template): Call check_VecOperands. Handle
> invalid_vsib_address and unsupported_vector_index_register.
> (build_modrm_byte): Support VecSIB. Check register-only source
> operand when two source operands are swapped.
> (i386_index_check): Allow Xmm/Ymm index registers.
>
> * doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
> and invpcid./invpcid.
>
> gas/testsuite/
>
> 2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
>
> AVX Programming Reference (June, 2011)
> * gas/i386/arch-10-1.l: Updated.
> * gas/i386/arch-10-2.l: Likewise.
> * gas/i386/arch-10-3.l: Likewise.
> * gas/i386/arch-10-4.l: Likewise.
>
> * gas/i386/arch-10.s: Add LZCNT to comments.
> * gas/i386/x86-64-arch-2.s: Likewise.
>
> * gas/i386/arch-10-lzcnt.d: New.
> * gas/i386/avx-gather-intel.d: Likewise.
> * gas/i386/avx-gather.d: Likewise.
> * gas/i386/avx-gather.s: Likewise.
> * gas/i386/avx2-intel.d: Likewise.
> * gas/i386/avx2.d: Likewise.
> * gas/i386/avx2.s: Likewise
> * gas/i386/avx256int-intel.d: Likewise.
> * gas/i386/avx256int.d: Likewise.
> * gas/i386/avx256int.s: Likewise.
> * gas/i386/bmi2-intel.d: Likewise.
> * gas/i386/bmi2.d: Likewise.
> * gas/i386/bmi2.s: Likewise.
> * gas/i386/inval-invpcid.l:Likewise.
> * gas/i386/inval-invpcid.s: Likewise.
> * gas/i386/invpcid-intel.d: Likewise.
> * gas/i386/invpcid.d: Likewise.
> * gas/i386/invpcid.s: Likewise.
> * gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
> * gas/i386/x86-64-avx-gather-intel.d: Likewise.
> * gas/i386/x86-64-avx-gather.d: Likewise.
> * gas/i386/x86-64-avx-gather.s: Likewise.
> * gas/i386/x86-64-avx2-intel.d: Likewise.
> * gas/i386/x86-64-avx2.d: Likewise.
> * gas/i386/x86-64-avx2.s: Likewise.
> * gas/i386/x86-64-avx256int-intel.d: Likewise.
> * gas/i386/x86-64-avx256int.d: Likewise.
> * gas/i386/x86-64-avx256int.s: Likewise.
> * gas/i386/x86-64-bmi2-intel.d: Likewise.
> * gas/i386/x86-64-bmi2.d: Likewise.
> * gas/i386/x86-64-bmi2.s: Likewise.
> * gas/i386/x86-64-inval-invpcid.l: Likewise.
> * gas/i386/x86-64-inval-invpcid.s: Likewise.
> * gas/i386/x86-64-invpcid-intel.d: Likewise.
> * gas/i386/x86-64-invpcid.d: Likewise.
> * gas/i386/x86-64-invpcid.s: Likewise.
>
> opcodes/
>
> 2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
>
> AVX Programming Reference (June, 2011)
> * i386-dis.c (XMGatherQ): New.
> * i386-dis.c (EXxmm_mb): New.
> (EXxmm_mb): Likewise.
> (EXxmm_mw): Likewise.
> (EXxmm_md): Likewise.
> (EXxmm_mq): Likewise.
> (EXxmmdw): Likewise.
> (EXxmmqd): Likewise.
> (VexGatherQ): Likewise.
> (MVexVSIBDWpX): Likewise.
> (MVexVSIBQWpX): Likewise.
> (xmm_mb_mode): Likewise.
> (xmm_mw_mode): Likewise.
> (xmm_md_mode): Likewise.
> (xmm_mq_mode): Likewise.
> (xmmdw_mode): Likewise.
> (xmmqd_mode): Likewise.
> (ymmxmm_mode): Likewise.
> (vex_vsib_d_w_dq_mode): Likewise.
> (vex_vsib_q_w_dq_mode): Likewise.
> (MOD_VEX_0F385A_PREFIX_2): Likewise.
> (MOD_VEX_0F388C_PREFIX_2): Likewise.
> (MOD_VEX_0F388E_PREFIX_2): Likewise.
> (PREFIX_0F3882): Likewise.
> (PREFIX_VEX_0F3816): Likewise.
> (PREFIX_VEX_0F3836): Likewise.
> (PREFIX_VEX_0F3845): Likewise.
> (PREFIX_VEX_0F3846): Likewise.
> (PREFIX_VEX_0F3847): Likewise.
> (PREFIX_VEX_0F3858): Likewise.
> (PREFIX_VEX_0F3859): Likewise.
> (PREFIX_VEX_0F385A): Likewise.
> (PREFIX_VEX_0F3878): Likewise.
> (PREFIX_VEX_0F3879): Likewise.
> (PREFIX_VEX_0F388C): Likewise.
> (PREFIX_VEX_0F388E): Likewise.
> (PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
> (PREFIX_VEX_0F38F5): Likewise.
> (PREFIX_VEX_0F38F6): Likewise.
> (PREFIX_VEX_0F3A00): Likewise.
> (PREFIX_VEX_0F3A01): Likewise.
> (PREFIX_VEX_0F3A02): Likewise.
> (PREFIX_VEX_0F3A38): Likewise.
> (PREFIX_VEX_0F3A39): Likewise.
> (PREFIX_VEX_0F3A46): Likewise.
> (PREFIX_VEX_0F3AF0): Likewise.
> (VEX_LEN_0F3816_P_2): Likewise.
> (VEX_LEN_0F3819_P_2): Likewise.
> (VEX_LEN_0F3836_P_2): Likewise.
> (VEX_LEN_0F385A_P_2_M_0): Likewise.
> (VEX_LEN_0F38F5_P_0): Likewise.
> (VEX_LEN_0F38F5_P_1): Likewise.
> (VEX_LEN_0F38F5_P_3): Likewise.
> (VEX_LEN_0F38F6_P_3): Likewise.
> (VEX_LEN_0F38F7_P_1): Likewise.
> (VEX_LEN_0F38F7_P_2): Likewise.
> (VEX_LEN_0F38F7_P_3): Likewise.
> (VEX_LEN_0F3A00_P_2): Likewise.
> (VEX_LEN_0F3A01_P_2): Likewise.
> (VEX_LEN_0F3A38_P_2): Likewise.
> (VEX_LEN_0F3A39_P_2): Likewise.
> (VEX_LEN_0F3A46_P_2): Likewise.
> (VEX_LEN_0F3AF0_P_3): Likewise.
> (VEX_W_0F3816_P_2): Likewise.
> (VEX_W_0F3818_P_2): Likewise.
> (VEX_W_0F3819_P_2): Likewise.
> (VEX_W_0F3836_P_2): Likewise.
> (VEX_W_0F3846_P_2): Likewise.
> (VEX_W_0F3858_P_2): Likewise.
> (VEX_W_0F3859_P_2): Likewise.
> (VEX_W_0F385A_P_2_M_0): Likewise.
> (VEX_W_0F3878_P_2): Likewise.
> (VEX_W_0F3879_P_2): Likewise.
> (VEX_W_0F3A00_P_2): Likewise.
> (VEX_W_0F3A01_P_2): Likewise.
> (VEX_W_0F3A02_P_2): Likewise.
> (VEX_W_0F3A38_P_2): Likewise.
> (VEX_W_0F3A39_P_2): Likewise.
> (VEX_W_0F3A46_P_2): Likewise.
> (MOD_VEX_0F3818_PREFIX_2): Removed.
> (MOD_VEX_0F3819_PREFIX_2): Likewise.
> (VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
> (VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
> (VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
> (VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
> (VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
> (VEX_LEN_0F3A0E_P_2): Likewise.
> (VEX_LEN_0F3A0F_P_2): Likewise.
> (VEX_LEN_0F3A42_P_2): Likewise.
> (VEX_LEN_0F3A4C_P_2): Likewise.
> (VEX_W_0F3818_P_2_M_0): Likewise.
> (VEX_W_0F3819_P_2_M_0): Likewise.
> (prefix_table): Updated.
> (three_byte_table): Likewise.
> (vex_table): Likewise.
> (vex_len_table): Likewise.
> (vex_w_table): Likewise.
> (mod_table): Likewise.
> (putop): Handle "LW".
> (intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
> xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
> vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
> (OP_EX): Likewise.
> (OP_E_memory): Handle vex_vsib_d_w_dq_mode and
> vex_vsib_q_w_dq_mode.
> (OP_XMM): Handle vex_vsib_q_w_dq_mode.
> (OP_VEX): Likewise.
>
> * i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
> and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
> CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
> (cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
> (opcode_modifiers): Add VecSIB.
>
> * i386-opc.h (CpuAVX2): New.
> (CpuBMI2): Likewise.
> (CpuLZCNT): Likewise.
> (CpuINVPCID): Likewise.
> (VecSIB128): Likewise.
> (VecSIB256): Likewise.
> (VecSIB): Likewise.
> (i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
> (i386_opcode_modifier): Add vecsib.
>
> * i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
> * i386-init.h: Regenerated.
> * i386-tbl.h: Likewise.
>
Will be documented in gas/doc/c-i386.texi?
--
Quentin
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: PATCH: Support AVX Programming Reference (June, 2011)
2011-06-16 22:05 ` Quentin Neill
@ 2011-06-16 22:10 ` H.J. Lu
0 siblings, 0 replies; 3+ messages in thread
From: H.J. Lu @ 2011-06-16 22:10 UTC (permalink / raw)
To: Quentin Neill; +Cc: binutils
On Thu, Jun 16, 2011 at 3:05 PM, Quentin Neill
<quentin.neill.gnu@gmail.com> wrote:
> On Fri, Jun 10, 2011 at 4:29 PM, H.J. Lu <hongjiu.lu@intel.com> wrote:
>> Hi,
>>
>> I checked in this patch to support AVX Programming Reference (June,
>> 2011).
>>
>>
>> H.J.
>> ---
>> gas/
>>
>> 2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
>>
>> AVX Programming Reference (June, 2011)
>> * config/tc-i386.c (i386_error): Add invalid_vsib_address and
>> unsupported_vector_index_register.
>> (cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
>> (check_VecOperands): New.
>> (match_template): Call check_VecOperands. Handle
>> invalid_vsib_address and unsupported_vector_index_register.
>> (build_modrm_byte): Support VecSIB. Check register-only source
>> operand when two source operands are swapped.
>> (i386_index_check): Allow Xmm/Ymm index registers.
>>
>> * doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
>> and invpcid./invpcid.
>>
> Will be documented in gas/doc/c-i386.texi?
Only very brief ones. See above.
--
H.J.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2011-06-10 21:29 PATCH: Support AVX Programming Reference (June, 2011) H.J. Lu
2011-06-16 22:05 ` Quentin Neill
2011-06-16 22:10 ` H.J. Lu
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