* new port for TILEPro and TILE-Gx processors (toplevel files) @ 2011-06-03 21:33 Walter Lee 2011-06-06 20:03 ` Joseph S. Myers 0 siblings, 1 reply; 8+ messages in thread From: Walter Lee @ 2011-06-03 21:33 UTC (permalink / raw) To: binutils [-- Attachment #1: Type: text/plain, Size: 935 bytes --] On behalf of Tilera Corporation, I'd like to contribute a binutils port to two of its families of architectures, the TILEPro architecture and the TILE-Gx architecture. The TILEPro port has been maintained at Tilera Corporation and available from Tilera since 2008. The TILE-Gx port has been available in beta since 2010, and will be officially available later this year. I will be the maintainer for both ports. I've split up the port into its individual components. Included in this email is the diff to the toplevel configure scripts. The rest will be incoming shortly. Tilera has completed the copyright assignment forms from FSF for binutils. However, I do not yet have an account on sourceware.org. Please let me know if I'm missing anything. Thanks, Walter Lee Tilera Corporation 2011-06-03 Walter Lee <walt@tilera.com> * configure.ac (tilepro-*-*) New case. (tilegx-*-*): Likewise. * configure: Regenerate. [-- Attachment #2: configure.diff.bz2 --] [-- Type: application/octet-stream, Size: 511 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: new port for TILEPro and TILE-Gx processors (toplevel files) 2011-06-03 21:33 new port for TILEPro and TILE-Gx processors (toplevel files) Walter Lee @ 2011-06-06 20:03 ` Joseph S. Myers 2011-06-10 6:03 ` Walter Lee 0 siblings, 1 reply; 8+ messages in thread From: Joseph S. Myers @ 2011-06-06 20:03 UTC (permalink / raw) To: Walter Lee; +Cc: binutils On Fri, 3 Jun 2011, Walter Lee wrote: > + tilepro-*-* | tilegx-*-*) > + noconfigdirs="$noconfigdirs gcc ${libgcj}" Generally disabling libgcj for particular target architectures is obsolete at toplevel; toplevel knows what targets support libffi and disables libgcj for all other targets. No existing target disables gcc at toplevel so I don't think you should do so. But if you do so then it should be in a separate case statement alongside those disabling particular bits of GCC, not mixed in with those for other components. > + case "${host}" in > + tilepro-*-* | tilegx-*-*) > + noconfigdirs="$noconfigdirs gprof sim" > + ;; > + *) > + # gprof can still be used to view simulator output when cross-compiling. > + skipdirs="`echo $skipdirs | sed s/gprof//`" > + ;; > + esac This host-specific configuration doesn't make sense to me. Remember that even if host and target are the same it could still be a cross compiler. Just disable sim and not gprof and be done with it. -- Joseph S. Myers joseph@codesourcery.com ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: new port for TILEPro and TILE-Gx processors (toplevel files) 2011-06-06 20:03 ` Joseph S. Myers @ 2011-06-10 6:03 ` Walter Lee 2011-06-10 6:07 ` Walter Lee 0 siblings, 1 reply; 8+ messages in thread From: Walter Lee @ 2011-06-10 6:03 UTC (permalink / raw) To: binutils [-- Attachment #1: Type: text/plain, Size: 117 bytes --] Hi Joseph, Thanks for the feedback. Here is a resubmission of the configure files with the fix. Thanks, Walter [-- Attachment #2: configure.diff.bz2 --] [-- Type: application/octet-stream, Size: 348 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: new port for TILEPro and TILE-Gx processors (toplevel files) 2011-06-10 6:03 ` Walter Lee @ 2011-06-10 6:07 ` Walter Lee 2011-06-13 15:32 ` Nick Clifton 0 siblings, 1 reply; 8+ messages in thread From: Walter Lee @ 2011-06-10 6:07 UTC (permalink / raw) To: binutils [-- Attachment #1: Type: text/plain, Size: 201 bytes --] I forgot to include the ChangeLog entry. Resending: 2011-06-10 Walter Lee <walt@tilera.com> * configure.ac (tilepro-*-*) New case. (tilegx-*-*): Likewise. * configure: Regenerate. [-- Attachment #2: configure.diff.bz2 --] [-- Type: application/octet-stream, Size: 348 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: new port for TILEPro and TILE-Gx processors (toplevel files) 2011-06-10 6:07 ` Walter Lee @ 2011-06-13 15:32 ` Nick Clifton 2011-06-13 16:02 ` Walter Lee 2011-06-14 4:04 ` Alan Modra 0 siblings, 2 replies; 8+ messages in thread From: Nick Clifton @ 2011-06-13 15:32 UTC (permalink / raw) To: Walter Lee; +Cc: binutils Hi Walter, > 2011-06-10 Walter Lee <walt@tilera.com> > > * configure.ac (tilepro-*-*) New case. > (tilegx-*-*): Likewise. > * configure: Regenerate. Thanks for contributing support for this target to the FSF GNU Binutils project. I have checked all of your patches in, although I did have to make a few modifications: * Your elfxx-tilegx.c file would not build on a 32-bit host when configured to only build 32-bit tilegx target. I fixed this. * You omitted a patch to readelf.c to allow it to recognize tilepro and tilegc relocations. I make the obvious additions to fix this. * The formatting in some of the new files in the opcodes/ directory needed to be tidied up. One last point - are you willing to become a maintainer for this target ? Ie can I add your name to binutils/MAINTAINERS ? Cheers Nick Clifton ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: new port for TILEPro and TILE-Gx processors (toplevel files) 2011-06-13 15:32 ` Nick Clifton @ 2011-06-13 16:02 ` Walter Lee 2011-06-14 4:04 ` Alan Modra 1 sibling, 0 replies; 8+ messages in thread From: Walter Lee @ 2011-06-13 16:02 UTC (permalink / raw) To: Nick Clifton; +Cc: binutils On 6/13/2011 11:32 AM, Nick Clifton wrote: > One last point - are you willing to become a maintainer for this target ? Ie > can I add your name to binutils/MAINTAINERS ? > Hi Nick. Thanks for fixing these issues. Yes I'm happy to be the maintainer for this target. Should I get an account for sourceware for that? Thanks, Walter ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: new port for TILEPro and TILE-Gx processors (toplevel files) 2011-06-13 15:32 ` Nick Clifton 2011-06-13 16:02 ` Walter Lee @ 2011-06-14 4:04 ` Alan Modra 2011-06-14 5:08 ` Alan Modra 1 sibling, 1 reply; 8+ messages in thread From: Alan Modra @ 2011-06-14 4:04 UTC (permalink / raw) To: binutils; +Cc: Walter Lee Committed. * elf32-tilepro.c (tilepro_elf_size_dynamic_sections): Don't use PTR. (allocate_dynrelocs, readonly_dynrelocs): Replace PTR with void *. Don't handle warning symbols here. * elfxx-tilegx.c (tilegx_elf_size_dynamic_sections): As above. (allocate_dynrelocs, readonly_dynrelocs): As above. Index: bfd/elf32-tilepro.c =================================================================== RCS file: /cvs/src/src/bfd/elf32-tilepro.c,v retrieving revision 1.2 diff -u -p -r1.2 elf32-tilepro.c --- bfd/elf32-tilepro.c 13 Jun 2011 15:57:19 -0000 1.2 +++ bfd/elf32-tilepro.c 14 Jun 2011 03:54:45 -0000 @@ -1969,7 +1969,7 @@ tilepro_elf_adjust_dynamic_symbol (struc dynamic relocs. */ static bfd_boolean -allocate_dynrelocs (struct elf_link_hash_entry *h, PTR inf) +allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) { struct bfd_link_info *info; struct tilepro_elf_link_hash_table *htab; @@ -1979,12 +1979,6 @@ allocate_dynrelocs (struct elf_link_hash if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; - info = (struct bfd_link_info *) inf; htab = tilepro_elf_hash_table (info); BFD_ASSERT (htab != NULL); @@ -2170,14 +2164,11 @@ allocate_dynrelocs (struct elf_link_hash /* Find any dynamic relocs that apply to read-only sections. */ static bfd_boolean -readonly_dynrelocs (struct elf_link_hash_entry *h, PTR inf) +readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf) { struct tilepro_elf_link_hash_entry *eh; struct tilepro_elf_dyn_relocs *p; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - eh = (struct tilepro_elf_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) { @@ -2313,7 +2304,7 @@ tilepro_elf_size_dynamic_sections (bfd * /* Allocate global sym .plt and .got entries, and space for global sym dynamic relocs. */ - elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, (PTR) info); + elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, info); if (elf_hash_table (info)->dynamic_sections_created) { @@ -2436,8 +2427,7 @@ tilepro_elf_size_dynamic_sections (bfd * /* If any dynamic relocs apply to a read-only section, then we need a DT_TEXTREL entry. */ if ((info->flags & DF_TEXTREL) == 0) - elf_link_hash_traverse (&htab->elf, readonly_dynrelocs, - (PTR) info); + elf_link_hash_traverse (&htab->elf, readonly_dynrelocs, info); if (info->flags & DF_TEXTREL) { Index: bfd/elfxx-tilegx.c =================================================================== RCS file: /cvs/src/src/bfd/elfxx-tilegx.c,v retrieving revision 1.2 diff -u -p -r1.2 elfxx-tilegx.c --- bfd/elfxx-tilegx.c 13 Jun 2011 15:57:19 -0000 1.2 +++ bfd/elfxx-tilegx.c 14 Jun 2011 03:54:46 -0000 @@ -2290,7 +2290,7 @@ tilegx_elf_adjust_dynamic_symbol (struct dynamic relocs. */ static bfd_boolean -allocate_dynrelocs (struct elf_link_hash_entry *h, PTR inf) +allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) { struct bfd_link_info *info; struct tilegx_elf_link_hash_table *htab; @@ -2300,12 +2300,6 @@ allocate_dynrelocs (struct elf_link_hash if (h->root.type == bfd_link_hash_indirect) return TRUE; - if (h->root.type == bfd_link_hash_warning) - /* When warning symbols are created, they **replace** the "real" - entry in the hash table, thus we never get to see the real - symbol in a hash traversal. So look at it now. */ - h = (struct elf_link_hash_entry *) h->root.u.i.link; - info = (struct bfd_link_info *) inf; htab = tilegx_elf_hash_table (info); BFD_ASSERT (htab != NULL); @@ -2490,14 +2484,11 @@ allocate_dynrelocs (struct elf_link_hash /* Find any dynamic relocs that apply to read-only sections. */ static bfd_boolean -readonly_dynrelocs (struct elf_link_hash_entry *h, PTR inf) +readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf) { struct tilegx_elf_link_hash_entry *eh; struct tilegx_elf_dyn_relocs *p; - if (h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - eh = (struct tilegx_elf_link_hash_entry *) h; for (p = eh->dyn_relocs; p != NULL; p = p->next) { @@ -2627,7 +2618,7 @@ tilegx_elf_size_dynamic_sections (bfd *o /* Allocate global sym .plt and .got entries, and space for global sym dynamic relocs. */ - elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, (PTR) info); + elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, info); if (elf_hash_table (info)->dynamic_sections_created) { @@ -2750,8 +2741,7 @@ tilegx_elf_size_dynamic_sections (bfd *o /* If any dynamic relocs apply to a read-only section, then we need a DT_TEXTREL entry. */ if ((info->flags & DF_TEXTREL) == 0) - elf_link_hash_traverse (&htab->elf, readonly_dynrelocs, - (PTR) info); + elf_link_hash_traverse (&htab->elf, readonly_dynrelocs, info); if (info->flags & DF_TEXTREL) { -- Alan Modra Australia Development Lab, IBM ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: new port for TILEPro and TILE-Gx processors (toplevel files) 2011-06-14 4:04 ` Alan Modra @ 2011-06-14 5:08 ` Alan Modra 0 siblings, 0 replies; 8+ messages in thread From: Alan Modra @ 2011-06-14 5:08 UTC (permalink / raw) To: binutils, Walter Lee Fixes some differences between source and generated files related to the recent new target. I'm also taking the liberty of updating gold's POTFILES.in. bfd/ * Makefile.am: Formatting. * Makefile.in: Regenerate. * configure.in (bfd_elf64_tilegx_vec): Add elfxx-tilegx.lo. * po/SRC-POTFILES.in: Regnerate. gas/ * po/POTFILES.in: Regenerate. gold/ * po/POTFILES.in: Regenerate. opcodes/ * Makefile.in: Regenerate. Index: bfd/Makefile.am =================================================================== RCS file: /cvs/src/src/bfd/Makefile.am,v retrieving revision 1.256 diff -u -p -r1.256 Makefile.am --- bfd/Makefile.am 13 Jun 2011 15:18:44 -0000 1.256 +++ bfd/Makefile.am 14 Jun 2011 04:38:49 -0000 @@ -612,7 +612,7 @@ BFD64_BACKENDS = \ elf64-s390.lo \ elf64-sh64.lo \ elf64-sparc.lo \ - elf64-tilegx.lo \ + elf64-tilegx.lo \ elf64-x86-64.lo \ elf64.lo \ elfn32-mips.lo \ Index: bfd/Makefile.in =================================================================== RCS file: /cvs/src/src/bfd/Makefile.in,v retrieving revision 1.284 diff -u -p -r1.284 Makefile.in --- bfd/Makefile.in 13 Jun 2011 15:18:44 -0000 1.284 +++ bfd/Makefile.in 14 Jun 2011 04:38:50 -0000 @@ -1307,6 +1307,8 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tic54x.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tic6x.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tic80.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tilegx.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tilepro.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-v850.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-vax.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-w65.Plo@am__quote@ @@ -1383,6 +1385,8 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-sparc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-spu.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-tic6x.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-tilegx.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-tilepro.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-v850.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-vax.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-xc16x.Plo@am__quote@ @@ -1399,6 +1403,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sh64.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elflink.Plo@am__quote@ @@ -1406,6 +1411,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-ia64.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-mips.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-sparc.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-tilegx.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epoc-pe-arm.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epoc-pei-arm.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/format.Plo@am__quote@ Index: bfd/configure.in =================================================================== RCS file: /cvs/src/src/bfd/configure.in,v retrieving revision 1.297 diff -u -p -r1.297 configure.in --- bfd/configure.in 13 Jun 2011 15:18:45 -0000 1.297 +++ bfd/configure.in 14 Jun 2011 04:39:01 -0000 @@ -835,7 +835,7 @@ do bfd_elf64_sparc_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;; bfd_elf64_sparc_freebsd_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;; bfd_elf64_sparc_sol2_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;; - bfd_elf64_tilegx_vec) tb="$tb elf64-tilegx.lo elf64.lo $elf" ; target_size=64 ;; + bfd_elf64_tilegx_vec) tb="$tb elf64-tilegx.lo elfxx-tilegx.lo elf64.lo $elf" ; target_size=64 ;; bfd_elf64_tradbigmips_vec | bfd_elf64_tradbigmips_freebsd_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;; bfd_elf64_tradlittlemips_vec | bfd_elf64_tradlittlemips_freebsd_vec) Index: bfd/po/SRC-POTFILES.in =================================================================== RCS file: /cvs/src/src/bfd/po/SRC-POTFILES.in,v retrieving revision 1.53 diff -u -p -r1.53 SRC-POTFILES.in --- bfd/po/SRC-POTFILES.in 2 Jun 2011 13:43:16 -0000 1.53 +++ bfd/po/SRC-POTFILES.in 14 Jun 2011 04:39:07 -0000 @@ -122,6 +122,8 @@ cpu-tic4x.c cpu-tic54x.c cpu-tic6x.c cpu-tic80.c +cpu-tilegx.c +cpu-tilepro.c cpu-v850.c cpu-vax.c cpu-w65.c @@ -201,6 +203,8 @@ elf32-sh64.c elf32-sparc.c elf32-spu.c elf32-tic6x.c +elf32-tilegx.c +elf32-tilepro.c elf32-v850.c elf32-vax.c elf32-xc16x.c @@ -217,6 +221,7 @@ elf64-ppc.c elf64-s390.c elf64-sh64.c elf64-sparc.c +elf64-tilegx.c elf64-x86-64.c elf64.c elfcode.h @@ -226,6 +231,7 @@ elfn32-mips.c elfxx-ia64.c elfxx-mips.c elfxx-sparc.c +elfxx-tilegx.c epoc-pe-arm.c epoc-pei-arm.c format.c Index: gas/po/POTFILES.in =================================================================== RCS file: /cvs/src/src/gas/po/POTFILES.in,v retrieving revision 1.47 diff -u -p -r1.47 POTFILES.in --- gas/po/POTFILES.in 5 Nov 2010 10:25:08 -0000 1.47 +++ gas/po/POTFILES.in 14 Jun 2011 04:39:13 -0000 @@ -144,6 +144,10 @@ config/tc-tic54x.c config/tc-tic54x.h config/tc-tic6x.c config/tc-tic6x.h +config/tc-tilegx.c +config/tc-tilegx.h +config/tc-tilepro.c +config/tc-tilepro.h config/tc-v850.c config/tc-v850.h config/tc-vax.c Index: gold/po/POTFILES.in =================================================================== RCS file: /cvs/src/src/gold/po/POTFILES.in,v retrieving revision 1.23 diff -u -p -r1.23 POTFILES.in --- gold/po/POTFILES.in 4 Aug 2008 06:55:33 -0000 1.23 +++ gold/po/POTFILES.in 14 Jun 2011 04:39:31 -0000 @@ -1,5 +1,10 @@ archive.cc archive.h +arm-reloc-property.cc +arm-reloc-property.h +arm.cc +attributes.cc +attributes.h binary.cc binary.h common.cc @@ -27,11 +32,19 @@ errors.h expression.cc fileread.cc fileread.h +freebsd.h +gc.cc +gc.h gold-threads.cc gold-threads.h gold.cc gold.h i386.cc +icf.cc +icf.h +incremental.cc +int_encoding.cc +int_encoding.h layout.cc layout.h mapfile.cc @@ -46,6 +59,8 @@ output.cc output.h parameters.cc parameters.h +plugin.cc +plugin.h powerpc.cc readsyms.cc readsyms.h @@ -68,7 +83,10 @@ symtab.h target-reloc.h target-select.cc target-select.h +target.cc target.h +timer.cc +timer.h tls.h token.h version.cc Index: opcodes/Makefile.in =================================================================== RCS file: /cvs/src/src/opcodes/Makefile.in,v retrieving revision 1.183 diff -u -p -r1.183 Makefile.in --- opcodes/Makefile.in 13 Jun 2011 15:18:52 -0000 1.183 +++ opcodes/Makefile.in 14 Jun 2011 04:39:38 -0000 @@ -852,7 +852,9 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tic80-dis.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tic80-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tilegx-dis.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tilegx-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tilepro-dis.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tilepro-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/v850-dis.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/v850-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vax-dis.Plo@am__quote@ -- Alan Modra Australia Development Lab, IBM ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2011-06-14 5:08 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2011-06-03 21:33 new port for TILEPro and TILE-Gx processors (toplevel files) Walter Lee 2011-06-06 20:03 ` Joseph S. Myers 2011-06-10 6:03 ` Walter Lee 2011-06-10 6:07 ` Walter Lee 2011-06-13 15:32 ` Nick Clifton 2011-06-13 16:02 ` Walter Lee 2011-06-14 4:04 ` Alan Modra 2011-06-14 5:08 ` Alan Modra
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