Re: [RFA] fix mingw32 --enable-targets=all --enable-64-bit-bfd failure in or1k-desc.h

Re: [RFA] fix mingw32 --enable-targets=all --enable-64-bit-bfd failure in or1k-desc.h

[Alan Modra]

On Sat, May 17, 2014 at 11:09:06PM +0200, Pierre Muller wrote:
> 2014-05-17  Pierre Muller  <muller@sourceware.org>
> 
> 	* or1k-desc.h (enum spr_field_masks): Remove compilation warning
> 	on 32-bit systems.
> 
> diff --git a/opcodes/or1k-desc.h b/opcodes/or1k-desc.h

No, sorry, this file is generated.  If this patch is committed, it
will be undone next time the file is regenerated.  I suspect you'll
need to poke at cgen itself to fix this problem.

Which reminds me.  Frank, is there any chance of
https://sourceware.org/ml/cgen/2014-q2/msg00001.html
being committed so I can turn back on --enable-cgen-maint for binutils
builds?

-- 
Alan Modra
Australia Development Lab, IBM

Re: [RFA] fix mingw32 --enable-targets=all --enable-64-bit-bfd failure in or1k-desc.h

[Frank Ch. Eigler]

Hi, Alan -

> [...]  Which reminds me.  Frank, is there any chance of
> https://sourceware.org/ml/cgen/2014-q2/msg00001.html being committed
> so I can turn back on --enable-cgen-maint for binutils builds?

Please feel free to go ahead (this is a port-maintainer-level issue).

- FChE

RE: [RFA] fix mingw32 --enable-targets=all --enable-64-bit-bfd failure in or1k-desc.h

[Pierre Muller]

> -----Message d'origine-----
> De : binutils-owner@sourceware.org [mailto:binutils-
> owner@sourceware.org] De la part de Alan Modra
> Envoyé : lundi 19 mai 2014 02:47
> À : Pierre Muller
> Cc : binutils@sourceware.org; fche@sourceware.org
> Objet : Re: [RFA] fix mingw32 --enable-targets=all --enable-64-bit-bfd
> failure in or1k-desc.h
> 
> On Sat, May 17, 2014 at 11:09:06PM +0200, Pierre Muller wrote:
> > 2014-05-17  Pierre Muller  <muller@sourceware.org>
> >
> > 	* or1k-desc.h (enum spr_field_masks): Remove compilation warning
> > 	on 32-bit systems.
> >
> > diff --git a/opcodes/or1k-desc.h b/opcodes/or1k-desc.h
> 
> No, sorry, this file is generated.  If this patch is committed, it
> will be undone next time the file is regenerated.  I suspect you'll
> need to poke at cgen itself to fix this problem.

  Sorry, but this goes way beyond my skills...
I looked a little bit in cpu/or1* files
and in the opcodes/cgen* files, and this seems to
be based on guile, which is a language I know nothing about ...

  Should I add some bug report?

Pierre Muller

Re: [RFA] fix mingw32 --enable-targets=all --enable-64-bit-bfd failure in or1k-desc.h

[Alan Modra]

On Tue, May 20, 2014 at 10:50:12AM +0200, Pierre Muller wrote:
> > On Sat, May 17, 2014 at 11:09:06PM +0200, Pierre Muller wrote:
> > > 2014-05-17  Pierre Muller  <muller@sourceware.org>
> > >
> > > 	* or1k-desc.h (enum spr_field_masks): Remove compilation warning
> > > 	on 32-bit systems.
> > >
> > > diff --git a/opcodes/or1k-desc.h b/opcodes/or1k-desc.h
> > 
> > No, sorry, this file is generated.  If this patch is committed, it
> > will be undone next time the file is regenerated.  I suspect you'll
> > need to poke at cgen itself to fix this problem.
> 
>   Sorry, but this goes way beyond my skills...
> I looked a little bit in cpu/or1* files
> and in the opcodes/cgen* files, and this seems to
> be based on guile, which is a language I know nothing about ...

I took a look, and it seems to me there is no need for enum
spr_field_masks..  OK, Christian?

cpu/
	* or1kcommon.cpu (spr-field-masks): Delete.
opcodes/
	* or1k-desc.h: Regenerate.

diff --git a/cpu/or1kcommon.cpu b/cpu/or1kcommon.cpu
index 1119f98..b23efbe 100644
--- a/cpu/or1kcommon.cpu
+++ b/cpu/or1kcommon.cpu
@@ -301,22 +301,6 @@
         )
   )
 
-(define-normal-enum
-  spr-field-masks
-  "SPR field masks"
-  ()
-  SPR-FIELD-MASK-
-  (.map (.pmacro (args)
-                 (.apply (.pmacro (group index field msb lsb comment)
-                                  (.splice (.str group "-" index "-" field) (.sll (.inv (.sll (.inv 0) (.add (.sub msb lsb) 1))) lsb))
-                                  )
-                         args
-                         )
-                 )
-        (spr-field-info)
-        )
-  )
-
 (define-pmacro (define-h-spr-field spr-group spr-index spr-field spr-field-msb spr-field-lsb spr-field-comment)
   (.let ((spr-field-name (.sym "h-" (.downcase spr-group) "-" (.downcase spr-index) "-" (.downcase spr-field)))
          )

-- 
Alan Modra
Australia Development Lab, IBM

Re: [RFA] fix mingw32 --enable-targets=all --enable-64-bit-bfd failure in or1k-desc.h

[Stefan Kristiansson]

On Tue, May 20, 2014 at 1:36 PM, Alan Modra <amodra@gmail.com> wrote:
> On Tue, May 20, 2014 at 10:50:12AM +0200, Pierre Muller wrote:
>> > On Sat, May 17, 2014 at 11:09:06PM +0200, Pierre Muller wrote:
>> > > 2014-05-17  Pierre Muller  <muller@sourceware.org>
>> > >
>> > >   * or1k-desc.h (enum spr_field_masks): Remove compilation warning
>> > >   on 32-bit systems.
>> > >
>> > > diff --git a/opcodes/or1k-desc.h b/opcodes/or1k-desc.h
>> >
>> > No, sorry, this file is generated.  If this patch is committed, it
>> > will be undone next time the file is regenerated.  I suspect you'll
>> > need to poke at cgen itself to fix this problem.
>>
>>   Sorry, but this goes way beyond my skills...
>> I looked a little bit in cpu/or1* files
>> and in the opcodes/cgen* files, and this seems to
>> be based on guile, which is a language I know nothing about ...
>
> I took a look, and it seems to me there is no need for enum
> spr_field_masks..  OK, Christian?
>

> cpu/
>         * or1kcommon.cpu (spr-field-masks): Delete.
> opcodes/
>         * or1k-desc.h: Regenerate.
>

I would prefer to fix this at the root of the problem, as we *do* use
the spr_field_mask in a soon to submitted sim simulator.
So, removing spr-field-masks will only be a temporary fix (under the
assumption that our sim port will be accepted).

I'll prepare a proper patch with what I suggested in:
https://sourceware.org/ml/binutils/2014-05/msg00198.html

Stefan

Re: [RFA] fix mingw32 --enable-targets=all --enable-64-bit-bfd failure in or1k-desc.h

[Alan Modra]

On Thu, May 22, 2014 at 06:30:17AM +0300, Stefan Kristiansson wrote:
> On Tue, May 20, 2014 at 1:36 PM, Alan Modra <amodra@gmail.com> wrote:
> > cpu/
> >         * or1kcommon.cpu (spr-field-masks): Delete.
> > opcodes/
> >         * or1k-desc.h: Regenerate.
> >
> 
> I would prefer to fix this at the root of the problem, as we *do* use
> the spr_field_mask in a soon to submitted sim simulator.

Fair enough.  I thought there might be something like this on the
horizon, which is why I asked about the patch before committing.

-- 
Alan Modra
Australia Development Lab, IBM

[RFA] fix mingw32 --enable-targets=all --enable-64-bit-bfd failure in or1k-desc.h

[Pierre Muller]

  Compilation fails for mingw32 host
with the following error:  

make[3]: Entering directory `/home/Pierre/git/build/mult-mingw32/opcodes'
/bin/sh ./libtool --tag=CC   --mode=compile gcc -DHAVE_CONFIG_H -I.
-I../../../b
inutils-gdb/opcodes  -I. -I../../../binutils-gdb/opcodes -I../bfd
-I../../../bin
utils-gdb/opcodes/../include -I../../../binutils-gdb/opcodes/../bfd
-D__USE_MING
W_FSEEK   -W -Wall -Wstrict-prototypes -Wmissing-prototypes -Wshadow
-Wno-format
 -Werror -gdwarf-4 -O0 -D__USE_MINGW_ACCESS -MT or1k-asm.lo -MD -MP -MF
.deps/or
1k-asm.Tpo -c -o or1k-asm.lo ../../../binutils-gdb/opcodes/or1k-asm.c
libtool: compile:  gcc -DHAVE_CONFIG_H -I. -I../../../binutils-gdb/opcodes
-I. -
I../../../binutils-gdb/opcodes -I../bfd
-I../../../binutils-gdb/opcodes/../inclu
de -I../../../binutils-gdb/opcodes/../bfd -D__USE_MINGW_FSEEK -W -Wall
-Wstrict-
prototypes -Wmissing-prototypes -Wshadow -Wno-format -Werror -gdwarf-4 -O0
-D__U
SE_MINGW_ACCESS -MT or1k-asm.lo -MD -MP -MF .deps/or1k-asm.Tpo -c
../../../binut
ils-gdb/opcodes/or1k-asm.c -o or1k-asm.o
In file included from ../../../binutils-gdb/opcodes/or1k-asm.c:34:0:
../../../binutils-gdb/opcodes/or1k-desc.h:260:73: error: this decimal
constant i
s unsigned only in ISO C90 [-Werror]
   SPR_FIELD_MASK_SYS_VR_REV = 63, SPR_FIELD_MASK_SYS_VR_CFG = 16711680,
SPR_FIE
LD_MASK_SYS_VR_VER = 4278190080, SPR_FIELD_MASK_SYS_UPR_UP = 1
                                                                         ^
../../../binutils-gdb/opcodes/or1k-desc.h:263:73: error: this decimal
constant i
s unsigned only in ISO C90 [-Werror]
  , SPR_FIELD_MASK_SYS_UPR_PMP = 512, SPR_FIELD_MASK_SYS_UPR_TTP = 1024,
SPR_FIE
LD_MASK_SYS_UPR_CUP = 4278190080, SPR_FIELD_MASK_SYS_CPUCFGR_NSGR = 15
                                                                         ^
../../../binutils-gdb/opcodes/or1k-desc.h:270:4: error: this decimal
constant is
 unsigned only in ISO C90 [-Werror]
  , SPR_FIELD_MASK_SYS_SR_CID = 4026531840, SPR_FIELD_MASK_SYS_FPCSR_FPEE =
1, S
PR_FIELD_MASK_SYS_FPCSR_RM = 6, SPR_FIELD_MASK_SYS_FPCSR_OVF = 8
    ^
cc1.exe: all warnings being treated as errors

  The error can be fixed by adding UL suffix,
I found that ULL suffix was used elsewhere,
but it seems that UL is enough here.


ChangeLog entry:

2014-05-17  Pierre Muller  <muller@sourceware.org>

	* or1k-desc.h (enum spr_field_masks): Remove compilation warning
	on 32-bit systems.

diff --git a/opcodes/or1k-desc.h b/opcodes/or1k-desc.h
old mode 100644
new mode 100755
index d27872f..748a963
--- a/opcodes/or1k-desc.h
+++ b/opcodes/or1k-desc.h
@@ -257,17 +257,17 @@ typedef enum spr_field_lsbs {

 /* Enum declaration for SPR field masks.  */
 typedef enum spr_field_masks {
-  SPR_FIELD_MASK_SYS_VR_REV = 63, SPR_FIELD_MASK_SYS_VR_CFG = 16711680,
SPR_FIELD_MASK_SYS_VR_VER = 4278190080, SPR_FIELD_MASK_SYS_UPR_UP = 1
+  SPR_FIELD_MASK_SYS_VR_REV = 63, SPR_FIELD_MASK_SYS_VR_CFG = 16711680,
SPR_FIELD_MASK_SYS_VR_VER = 4278190080UL, SPR_FIELD_MASK_SYS_UPR_UP = 1
  , SPR_FIELD_MASK_SYS_UPR_DCP = 2, SPR_FIELD_MASK_SYS_UPR_ICP = 4,
SPR_FIELD_MASK_SYS_UPR_DMP = 8, SPR_FIELD_MASK_SYS_UPR_MP = 16
  , SPR_FIELD_MASK_SYS_UPR_IMP = 32, SPR_FIELD_MASK_SYS_UPR_DUP = 64,
SPR_FIELD_MASK_SYS_UPR_PCUP = 128, SPR_FIELD_MASK_SYS_UPR_PICP = 256
- , SPR_FIELD_MASK_SYS_UPR_PMP = 512, SPR_FIELD_MASK_SYS_UPR_TTP = 1024,
SPR_FIELD_MASK_SYS_UPR_CUP = 4278190080, SPR_FIELD_MASK_SYS_CPUCFGR_NSGR =
15
+ , SPR_FIELD_MASK_SYS_UPR_PMP = 512, SPR_FIELD_MASK_SYS_UPR_TTP = 1024,
SPR_FIELD_MASK_SYS_UPR_CUP = 4278190080UL, SPR_FIELD_MASK_SYS_CPUCFGR_NSGR =
15
  , SPR_FIELD_MASK_SYS_CPUCFGR_CGF = 16, SPR_FIELD_MASK_SYS_CPUCFGR_OB32S =
32, SPR_FIELD_MASK_SYS_CPUCFGR_OB64S = 64, SPR_FIELD_MASK_SYS_CPUCFGR_OF32S
= 128
  , SPR_FIELD_MASK_SYS_CPUCFGR_OF64S = 256, SPR_FIELD_MASK_SYS_CPUCFGR_OV64S
= 512, SPR_FIELD_MASK_SYS_CPUCFGR_ND = 1024, SPR_FIELD_MASK_SYS_SR_SM = 1
  , SPR_FIELD_MASK_SYS_SR_TEE = 2, SPR_FIELD_MASK_SYS_SR_IEE = 4,
SPR_FIELD_MASK_SYS_SR_DCE = 8, SPR_FIELD_MASK_SYS_SR_ICE = 16
  , SPR_FIELD_MASK_SYS_SR_DME = 32, SPR_FIELD_MASK_SYS_SR_IME = 64,
SPR_FIELD_MASK_SYS_SR_LEE = 128, SPR_FIELD_MASK_SYS_SR_CE = 256
  , SPR_FIELD_MASK_SYS_SR_F = 512, SPR_FIELD_MASK_SYS_SR_CY = 1024,
SPR_FIELD_MASK_SYS_SR_OV = 2048, SPR_FIELD_MASK_SYS_SR_OVE = 4096
  , SPR_FIELD_MASK_SYS_SR_DSX = 8192, SPR_FIELD_MASK_SYS_SR_EPH = 16384,
SPR_FIELD_MASK_SYS_SR_FO = 32768, SPR_FIELD_MASK_SYS_SR_SUMRA = 65536
- , SPR_FIELD_MASK_SYS_SR_CID = 4026531840, SPR_FIELD_MASK_SYS_FPCSR_FPEE =
1, SPR_FIELD_MASK_SYS_FPCSR_RM = 6, SPR_FIELD_MASK_SYS_FPCSR_OVF = 8
+ , SPR_FIELD_MASK_SYS_SR_CID = 4026531840UL, SPR_FIELD_MASK_SYS_FPCSR_FPEE
= 1, SPR_FIELD_MASK_SYS_FPCSR_RM = 6, SPR_FIELD_MASK_SYS_FPCSR_OVF = 8
  , SPR_FIELD_MASK_SYS_FPCSR_UNF = 16, SPR_FIELD_MASK_SYS_FPCSR_SNF = 32,
SPR_FIELD_MASK_SYS_FPCSR_QNF = 64, SPR_FIELD_MASK_SYS_FPCSR_ZF = 128
  , SPR_FIELD_MASK_SYS_FPCSR_IXF = 256, SPR_FIELD_MASK_SYS_FPCSR_IVF = 512,
SPR_FIELD_MASK_SYS_FPCSR_INF = 1024, SPR_FIELD_MASK_SYS_FPCSR_DZF = 2048
 } SPR_FIELD_MASKS;