public inbox for binutils@sourceware.org
 help / color / mirror / Atom feed
* optimization by as
@ 2015-08-06  6:59 Virendra Kumar Pathak
  2015-08-06 14:08 ` Andrew Bennett
  0 siblings, 1 reply; 15+ messages in thread
From: Virendra Kumar Pathak @ 2015-08-06  6:59 UTC (permalink / raw)
  To: binutils

Hi Binutils Group,

I am new to writing assembly code. I know gcc can optimize C code
through various flags like -O, -O2, -O3 etc.
Does GNU 'as' also does any optimization (like instruction
re-ordering) when it compile assembly code (for arm/aarch64 cpu) ?

I see -O option for MIPS target in 'man as' but no such option for arm/aarch64.
Please give some insight on what type of optimization does this -O do.

Thanks.

-- 
with regards,
Virendra Kumar Pathak

^ permalink raw reply	[flat|nested] 15+ messages in thread

* RE: optimization by as
  2015-08-06  6:59 optimization by as Virendra Kumar Pathak
@ 2015-08-06 14:08 ` Andrew Bennett
  2015-08-10  6:41   ` Virendra Kumar Pathak
  0 siblings, 1 reply; 15+ messages in thread
From: Andrew Bennett @ 2015-08-06 14:08 UTC (permalink / raw)
  To: Virendra Kumar Pathak, binutils

> I see -O option for MIPS target in 'man as' but no such option for
> arm/aarch64.
> Please give some insight on what type of optimization does this -O do.

This optimisation is enabling the filling of branch delay slots, and the 
removal of unneeded nops.

Regards,



Andrew 

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: optimization by as
  2015-08-06 14:08 ` Andrew Bennett
@ 2015-08-10  6:41   ` Virendra Kumar Pathak
  2015-08-10 13:22     ` Matthew Fortune
  2015-08-10 14:53     ` Paul_Koning
  0 siblings, 2 replies; 15+ messages in thread
From: Virendra Kumar Pathak @ 2015-08-10  6:41 UTC (permalink / raw)
  To: Andrew Bennett; +Cc: binutils

Hi Andrew,

Thanks for the reply.

What other types of optimization can be handled by the assembler ?
Are they capable of re-ordering the instructions ?
For example inserting other instruction between two loads (on machine
with one load unit) to avoid pipeline stall.

Thanks.


On 6 August 2015 at 19:38, Andrew Bennett <Andrew.Bennett@imgtec.com> wrote:
>> I see -O option for MIPS target in 'man as' but no such option for
>> arm/aarch64.
>> Please give some insight on what type of optimization does this -O do.
>
> This optimisation is enabling the filling of branch delay slots, and the
> removal of unneeded nops.
>
> Regards,
>
>
>
> Andrew



-- 
with regards,
Virendra Kumar Pathak

^ permalink raw reply	[flat|nested] 15+ messages in thread

* RE: optimization by as
  2015-08-10  6:41   ` Virendra Kumar Pathak
@ 2015-08-10 13:22     ` Matthew Fortune
  2015-08-11  4:51       ` Virendra Kumar Pathak
  2015-08-11 14:22       ` Ian Lance Taylor
  2015-08-10 14:53     ` Paul_Koning
  1 sibling, 2 replies; 15+ messages in thread
From: Matthew Fortune @ 2015-08-10 13:22 UTC (permalink / raw)
  To: Virendra Kumar Pathak, Andrew Bennett; +Cc: binutils

Virendra Kumar Pathak <kumarvir.pathak@gmail.com> writes:
> What other types of optimization can be handled by the assembler ?
> Are they capable of re-ordering the instructions ?
> For example inserting other instruction between two loads (on machine
> with one load unit) to avoid pipeline stall.

No, that would then be a compiler/recompiler as it needs to do so much
analysis for safety. You 'can' do anything you like in the assembler
but probably shouldn't as it is not geared up for that kind of processing.

The assembler and linker for most architectures tend to be wysiwyg from
what I know; with special cases only where there are chip errata that need
fixing. The fixes tend to be things like nop insertion or something
equally simple but can get more elaborate. In general I would suggest
not surprising your users by making the assembler too smart.

Thanks,
Matthew

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: optimization by as
  2015-08-10  6:41   ` Virendra Kumar Pathak
  2015-08-10 13:22     ` Matthew Fortune
@ 2015-08-10 14:53     ` Paul_Koning
  2015-08-11  4:52       ` Virendra Kumar Pathak
  2015-08-17  9:29       ` Yury Gribov
  1 sibling, 2 replies; 15+ messages in thread
From: Paul_Koning @ 2015-08-10 14:53 UTC (permalink / raw)
  To: kumarvir.pathak; +Cc: Andrew.Bennett, binutils


> On Aug 10, 2015, at 2:41 AM, Virendra Kumar Pathak <kumarvir.pathak@gmail.com> wrote:
> 
> Hi Andrew,
> 
> Thanks for the reply.
> 
> What other types of optimization can be handled by the assembler ?
> Are they capable of re-ordering the instructions ?
> For example inserting other instruction between two loads (on machine
> with one load unit) to avoid pipeline stall.

Good assemblers don’t do optimization; that is the job of the compiler (or, in the uncommon case of hand-written assembly language, the programmer).  The MIPS assembler is an aberration, fortunately a rare one.  Note that this “optimization” machinery is turned off by recent compilers when they feed generated code to the assembler, because it gets in the way of the compiler doing a better job.

	paul


^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: optimization by as
  2015-08-10 13:22     ` Matthew Fortune
@ 2015-08-11  4:51       ` Virendra Kumar Pathak
  2015-08-11 14:22       ` Ian Lance Taylor
  1 sibling, 0 replies; 15+ messages in thread
From: Virendra Kumar Pathak @ 2015-08-11  4:51 UTC (permalink / raw)
  To: Matthew Fortune; +Cc: binutils

Hi Matthew,

Thanks for providing the information.

On 10 August 2015 at 18:52, Matthew Fortune <Matthew.Fortune@imgtec.com> wrote:
> Virendra Kumar Pathak <kumarvir.pathak@gmail.com> writes:
>> What other types of optimization can be handled by the assembler ?
>> Are they capable of re-ordering the instructions ?
>> For example inserting other instruction between two loads (on machine
>> with one load unit) to avoid pipeline stall.
>
> No, that would then be a compiler/recompiler as it needs to do so much
> analysis for safety. You 'can' do anything you like in the assembler
> but probably shouldn't as it is not geared up for that kind of processing.
>
> The assembler and linker for most architectures tend to be wysiwyg from
> what I know; with special cases only where there are chip errata that need
> fixing. The fixes tend to be things like nop insertion or something
> equally simple but can get more elaborate. In general I would suggest
> not surprising your users by making the assembler too smart.
>
> Thanks,
> Matthew



-- 
with regards,
Virendra Kumar Pathak

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: optimization by as
  2015-08-10 14:53     ` Paul_Koning
@ 2015-08-11  4:52       ` Virendra Kumar Pathak
  2015-08-17  9:29       ` Yury Gribov
  1 sibling, 0 replies; 15+ messages in thread
From: Virendra Kumar Pathak @ 2015-08-11  4:52 UTC (permalink / raw)
  To: Paul_Koning; +Cc: binutils

Hi Paul,

Thanks for the explanation.

On 10 August 2015 at 20:23,  <Paul_Koning@dell.com> wrote:
>
>> On Aug 10, 2015, at 2:41 AM, Virendra Kumar Pathak <kumarvir.pathak@gmail.com> wrote:
>>
>> Hi Andrew,
>>
>> Thanks for the reply.
>>
>> What other types of optimization can be handled by the assembler ?
>> Are they capable of re-ordering the instructions ?
>> For example inserting other instruction between two loads (on machine
>> with one load unit) to avoid pipeline stall.
>
> Good assemblers don’t do optimization; that is the job of the compiler (or, in the uncommon case of hand-written assembly language, the programmer).  The MIPS assembler is an aberration, fortunately a rare one.  Note that this “optimization” machinery is turned off by recent compilers when they feed generated code to the assembler, because it gets in the way of the compiler doing a better job.
>
>         paul
>



-- 
with regards,
Virendra Kumar Pathak

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: optimization by as
  2015-08-10 13:22     ` Matthew Fortune
  2015-08-11  4:51       ` Virendra Kumar Pathak
@ 2015-08-11 14:22       ` Ian Lance Taylor
  2015-08-12 14:10         ` Virendra Kumar Pathak
  1 sibling, 1 reply; 15+ messages in thread
From: Ian Lance Taylor @ 2015-08-11 14:22 UTC (permalink / raw)
  To: Matthew Fortune; +Cc: Virendra Kumar Pathak, Andrew Bennett, binutils

On Mon, Aug 10, 2015 at 6:22 AM, Matthew Fortune
<Matthew.Fortune@imgtec.com> wrote:
> Virendra Kumar Pathak <kumarvir.pathak@gmail.com> writes:
>> What other types of optimization can be handled by the assembler ?
>> Are they capable of re-ordering the instructions ?
>> For example inserting other instruction between two loads (on machine
>> with one load unit) to avoid pipeline stall.
>
> No, that would then be a compiler/recompiler as it needs to do so much
> analysis for safety. You 'can' do anything you like in the assembler
> but probably shouldn't as it is not geared up for that kind of processing.

Although for a while there was the MAO project:
http://code.google.com/p/mao/ .  As far as I know, though, it is dead.

Ian

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: optimization by as
  2015-08-11 14:22       ` Ian Lance Taylor
@ 2015-08-12 14:10         ` Virendra Kumar Pathak
  2015-08-12 16:05           ` Ian Lance Taylor
  0 siblings, 1 reply; 15+ messages in thread
From: Virendra Kumar Pathak @ 2015-08-12 14:10 UTC (permalink / raw)
  To: Ian Lance Taylor; +Cc: binutils

Hi Ian,

Could you please give some information on why MAO project is dead ?

Thanks.



On 11 August 2015 at 19:52, Ian Lance Taylor <iant@google.com> wrote:
> On Mon, Aug 10, 2015 at 6:22 AM, Matthew Fortune
> <Matthew.Fortune@imgtec.com> wrote:
>> Virendra Kumar Pathak <kumarvir.pathak@gmail.com> writes:
>>> What other types of optimization can be handled by the assembler ?
>>> Are they capable of re-ordering the instructions ?
>>> For example inserting other instruction between two loads (on machine
>>> with one load unit) to avoid pipeline stall.
>>
>> No, that would then be a compiler/recompiler as it needs to do so much
>> analysis for safety. You 'can' do anything you like in the assembler
>> but probably shouldn't as it is not geared up for that kind of processing.
>
> Although for a while there was the MAO project:
> http://code.google.com/p/mao/ .  As far as I know, though, it is dead.
>
> Ian



-- 
with regards,
Virendra Kumar Pathak

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: optimization by as
  2015-08-12 14:10         ` Virendra Kumar Pathak
@ 2015-08-12 16:05           ` Ian Lance Taylor
  0 siblings, 0 replies; 15+ messages in thread
From: Ian Lance Taylor @ 2015-08-12 16:05 UTC (permalink / raw)
  To: Virendra Kumar Pathak; +Cc: binutils

On Wed, Aug 12, 2015 at 7:10 AM, Virendra Kumar Pathak
<kumarvir.pathak@gmail.com> wrote:
>
> Could you please give some information on why MAO project is dead ?

I don't have any information on it, sorry.  I was never involved with it.

Ian

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: optimization by as
  2015-08-10 14:53     ` Paul_Koning
  2015-08-11  4:52       ` Virendra Kumar Pathak
@ 2015-08-17  9:29       ` Yury Gribov
  2015-08-17 10:53         ` pinskia
  2015-08-17 14:37         ` Paul_Koning
  1 sibling, 2 replies; 15+ messages in thread
From: Yury Gribov @ 2015-08-17  9:29 UTC (permalink / raw)
  To: Paul_Koning, kumarvir.pathak; +Cc: Andrew.Bennett, binutils

On 08/10/2015 05:53 PM, Paul_Koning@Dell.com wrote:
>
>> On Aug 10, 2015, at 2:41 AM, Virendra Kumar Pathak <kumarvir.pathak@gmail.com> wrote:
>>
>> Hi Andrew,
>>
>> Thanks for the reply.
>>
>> What other types of optimization can be handled by the assembler ?
>> Are they capable of re-ordering the instructions ?
>> For example inserting other instruction between two loads (on machine
>> with one load unit) to avoid pipeline stall.
>
> Good assemblers don’t do optimization; that is the job of the compiler (or, in the uncommon case of hand-written assembly language, the programmer).  The MIPS assembler is an aberration, fortunately a rare one.  Note that this “optimization” machinery is turned off by recent compilers when they feed generated code to the assembler, because it gets in the way of the compiler doing a better job.

AFAIR PS3 assembler was also optimizing (e.g. it could do register 
allocation and instruction scheduling).

-Y

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: optimization by as
  2015-08-17  9:29       ` Yury Gribov
@ 2015-08-17 10:53         ` pinskia
  2015-08-17 14:37         ` Paul_Koning
  1 sibling, 0 replies; 15+ messages in thread
From: pinskia @ 2015-08-17 10:53 UTC (permalink / raw)
  To: Yury Gribov; +Cc: Paul_Koning, kumarvir.pathak, Andrew.Bennett, binutils


> On Aug 17, 2015, at 5:29 PM, Yury Gribov <y.gribov@samsung.com> wrote:
> 
>> On 08/10/2015 05:53 PM, Paul_Koning@Dell.com wrote:
>> 
>>> On Aug 10, 2015, at 2:41 AM, Virendra Kumar Pathak <kumarvir.pathak@gmail.com> wrote:
>>> 
>>> Hi Andrew,
>>> 
>>> Thanks for the reply.
>>> 
>>> What other types of optimization can be handled by the assembler ?
>>> Are they capable of re-ordering the instructions ?
>>> For example inserting other instruction between two loads (on machine
>>> with one load unit) to avoid pipeline stall.
>> 
>> Good assemblers don’t do optimization; that is the job of the compiler (or, in the uncommon case of hand-written assembly language, the programmer).  The MIPS assembler is an aberration, fortunately a rare one.  Note that this “optimization” machinery is turned off by recent compilers when they feed generated code to the assembler, because it gets in the way of the compiler doing a better job.
> 
> AFAIR PS3 assembler was also optimizing (e.g. it could do register allocation and instruction scheduling).


There was a high level assembler for the cell processor. But it did not produce binaries from it but rather only produce assembly files which the standard assembler then assemble. I produced the testcase for it while I was at Sony. 

Thanks,
Andrew

> 
> -Y

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: optimization by as
  2015-08-17  9:29       ` Yury Gribov
  2015-08-17 10:53         ` pinskia
@ 2015-08-17 14:37         ` Paul_Koning
  2015-08-17 14:44           ` Yury Gribov
  2015-08-18  9:23           ` Erik Christiansen
  1 sibling, 2 replies; 15+ messages in thread
From: Paul_Koning @ 2015-08-17 14:37 UTC (permalink / raw)
  To: y.gribov; +Cc: kumarvir.pathak, Andrew.Bennett, binutils


> On Aug 17, 2015, at 5:29 AM, Yury Gribov <y.gribov@samsung.com> wrote:
> 
> On 08/10/2015 05:53 PM, Paul_Koning@Dell.com wrote:
>> 
>>> On Aug 10, 2015, at 2:41 AM, Virendra Kumar Pathak <kumarvir.pathak@gmail.com> wrote:
>>> 
>>> Hi Andrew,
>>> 
>>> Thanks for the reply.
>>> 
>>> What other types of optimization can be handled by the assembler ?
>>> Are they capable of re-ordering the instructions ?
>>> For example inserting other instruction between two loads (on machine
>>> with one load unit) to avoid pipeline stall.
>> 
>> Good assemblers don’t do optimization; that is the job of the compiler (or, in the uncommon case of hand-written assembly language, the programmer).  The MIPS assembler is an aberration, fortunately a rare one.  Note that this “optimization” machinery is turned off by recent compilers when they feed generated code to the assembler, because it gets in the way of the compiler doing a better job.
> 
> AFAIR PS3 assembler was also optimizing (e.g. it could do register allocation and instruction scheduling).

And DEC’s Alpha assembler could also do some of that (since it was in fact hacked into the back end of the compiler).

That doesn’t affect my conclusion.  The normal job (these days) of the assembler is to process compiler output.  For that, the compiler is doing the optimizing and it wants the assembler to keep its hands off.  In the days of GCC 3, the assembler did some of this stuff, and the result was at best suboptimal if not actually problematic.  Now the compiler tells the MIPS assembler to be a good assembler and all is well.

The other (now rare) job of the assembler is to process human-written assembly code.  There too it must stay out of the way, because the only time when hand-written assembly code is justified is when the human needs *complete* control over what happens.  I’ve seen any number of nasty bugs in MIPS hand-written assembly code (like bootstraps or low level diagnostics) cause by people forgetting to say “.set noreorder” and whatever other commands are needed to make the MIPS assembler work like a correct assembler.

So in short, I view all “optimizing assemblers” as design errors.

	paul


^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: optimization by as
  2015-08-17 14:37         ` Paul_Koning
@ 2015-08-17 14:44           ` Yury Gribov
  2015-08-18  9:23           ` Erik Christiansen
  1 sibling, 0 replies; 15+ messages in thread
From: Yury Gribov @ 2015-08-17 14:44 UTC (permalink / raw)
  To: Paul_Koning; +Cc: kumarvir.pathak, Andrew.Bennett, binutils

On 08/17/2015 05:37 PM, Paul_Koning@Dell.com wrote:
> The other (now rare) job of the assembler is to process human-written assembly code.  There too it must stay out of the way, because the only time when hand-written assembly code is justified is when the human needs *complete* control over what happens.

At least for VLIWs or some weird accelerators you'd want automatic 
scheduling and reg. allocation from assembler.  Otherwise it's 
practically impossible to write assembly code by hand in a scalable way.

-Y

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: optimization by as
  2015-08-17 14:37         ` Paul_Koning
  2015-08-17 14:44           ` Yury Gribov
@ 2015-08-18  9:23           ` Erik Christiansen
  1 sibling, 0 replies; 15+ messages in thread
From: Erik Christiansen @ 2015-08-18  9:23 UTC (permalink / raw)
  To: binutils

On 17.08.15 14:37, Paul_Koning@Dell.com wrote:
> The other (now rare) job of the assembler is to process human-written
> assembly code.  There too it must stay out of the way, because the
> only time when hand-written assembly code is justified is when the
> human needs *complete* control over what happens.  
...
> So in short, I view all “optimizing assemblers” as design errors.

+1

Over 3 decades of embedded systems development, I wrote a lot of
assembler, for a range of targets. (And most of it using the GNU
toolchain) It's not just when writing an ISR, or bit-banged I/O,
complete with nops to meet ASIC data set-up and write strobe timing
requirements, that the assembler cannot be permitted to finesse
any instructions in the case of hand coding.

I still occasionally code systems comprising interacting event-driven
complex state machines. Gas macros provide a custom language, making the
assembler environment as comfortable as C, mostly.

In short, I can only confirm that instruction-screwing assemblers must
retain a mode in which they do what they're told.

Erik

^ permalink raw reply	[flat|nested] 15+ messages in thread

end of thread, other threads:[~2015-08-18  9:23 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-08-06  6:59 optimization by as Virendra Kumar Pathak
2015-08-06 14:08 ` Andrew Bennett
2015-08-10  6:41   ` Virendra Kumar Pathak
2015-08-10 13:22     ` Matthew Fortune
2015-08-11  4:51       ` Virendra Kumar Pathak
2015-08-11 14:22       ` Ian Lance Taylor
2015-08-12 14:10         ` Virendra Kumar Pathak
2015-08-12 16:05           ` Ian Lance Taylor
2015-08-10 14:53     ` Paul_Koning
2015-08-11  4:52       ` Virendra Kumar Pathak
2015-08-17  9:29       ` Yury Gribov
2015-08-17 10:53         ` pinskia
2015-08-17 14:37         ` Paul_Koning
2015-08-17 14:44           ` Yury Gribov
2015-08-18  9:23           ` Erik Christiansen

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).