[PATCH 1/3] Add SFENCE.VMA instruction

[PATCH 1/3] Add SFENCE.VMA instruction

[Palmer Dabbelt]

From: Andrew Waterman <andrew@sifive.com>

include/ChangeLog:

2017-02-14  Andrew Waterman  <andrew@sifive.com>

        * opcode/riscv-opc.h (MATCH_SFENCE_VMA): New define.
        (MASK_SFENCE_VMA): Likewise.
        (sfence_vma): Declare instruction.

opcodes/ChangeLog:

2017-02-14  Andrew Waterman  <andrew@sifive.com>

        * riscv-opc.c (riscv_opcodes): Add sfence.vma instruction and
        pseudoinstructions.
---
 include/ChangeLog          | 6 ++++++
 include/opcode/riscv-opc.h | 3 +++
 opcodes/ChangeLog          | 5 +++++
 opcodes/riscv-opc.c        | 3 +++
 4 files changed, 17 insertions(+)

diff --git a/include/ChangeLog b/include/ChangeLog
index 6a61d61..df14aca 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,9 @@
+2017-02-14  Andrew Waterman  <andrew@sifive.com>
+
+	* opcode/riscv-opc.h (MATCH_SFENCE_VMA): New define.
+	(MASK_SFENCE_VMA): Likewise.
+	(sfence_vma): Declare instruction.
+
 2017-01-02  Alan Modra  <amodra@gmail.com>
 
 	Update year range in copyright notice of all files.
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index d10c7f8..cef2f3c 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -227,6 +227,8 @@
 #define MASK_DRET  0xffffffff
 #define MATCH_SFENCE_VM 0x10400073
 #define MASK_SFENCE_VM  0xfff07fff
+#define MATCH_SFENCE_VMA 0x12000073
+#define MASK_SFENCE_VMA  0xfe007fff
 #define MATCH_WFI 0x10500073
 #define MASK_WFI  0xffffffff
 #define MATCH_CSRRW 0x1073
@@ -815,6 +817,7 @@ DECLARE_INSN(hret, MATCH_HRET, MASK_HRET)
 DECLARE_INSN(mret, MATCH_MRET, MASK_MRET)
 DECLARE_INSN(dret, MATCH_DRET, MASK_DRET)
 DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM)
+DECLARE_INSN(sfence_vma, MATCH_SFENCE_VMA, MASK_SFENCE_VMA)
 DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI)
 DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW)
 DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS)
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d096ce1..04822ad 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2017-02-14  Andrew Waterman  <andrew@sifive.com>
+
+	* riscv-opc.c (riscv_opcodes): Add sfence.vma instruction and
+	pseudoinstructions.
+
 2017-02-11  Stafford Horne  <shorne@gmail.com>
 	    Alan Modra  <amodra@gmail.com>
 
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index 0a6f36f..867a026 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -618,6 +618,9 @@ const struct riscv_opcode riscv_opcodes[] =
 {"dret",      "I",   "",     MATCH_DRET, MASK_DRET, match_opcode, 0 },
 {"sfence.vm", "I",   "",     MATCH_SFENCE_VM, MASK_SFENCE_VM | MASK_RS1, match_opcode, 0 },
 {"sfence.vm", "I",   "s",    MATCH_SFENCE_VM, MASK_SFENCE_VM, match_opcode, 0 },
+{"sfence.vma","I",   "",     MATCH_SFENCE_VMA, MASK_SFENCE_VMA | MASK_RS1 | MASK_RS2, match_opcode, INSN_ALIAS },
+{"sfence.vma","I",   "s",    MATCH_SFENCE_VMA, MASK_SFENCE_VMA | MASK_RS2, match_opcode, INSN_ALIAS },
+{"sfence.vma","I",   "s,t",  MATCH_SFENCE_VMA, MASK_SFENCE_VMA, match_opcode, 0 },
 {"wfi",       "I",   "",     MATCH_WFI, MASK_WFI, match_opcode, 0 },
 
 /* Terminate the list.  */
-- 
2.10.2

[PATCH 2/3] Add new counter-enable CSRs

[Palmer Dabbelt]

From: Andrew Waterman <andrew@sifive.com>

include/ChangeLog:

2017-02-22  Andrew Waterman  <andrew@sifive.com>

       * opcode/riscv-opc.h (CSR_SCOUNTEREN): New define.
       (CSR_MCOUNTEREN): Likewise.
       (scounteren): Declare register.
       (mcounteren): Likewise.
---
 include/ChangeLog          | 7 +++++++
 include/opcode/riscv-opc.h | 4 ++++
 2 files changed, 11 insertions(+)

diff --git a/include/ChangeLog b/include/ChangeLog
index df14aca..cd89358 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,10 @@
+2017-02-22  Andrew Waterman  <andrew@sifive.com>
+
+	* opcode/riscv-opc.h (CSR_SCOUNTEREN): New define.
+	(CSR_MCOUNTEREN): Likewise.
+	(scounteren): Declare register.
+	(mcounteren): Likewise.
+
 2017-02-14  Andrew Waterman  <andrew@sifive.com>
 
 	* opcode/riscv-opc.h (MATCH_SFENCE_VMA): New define.
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index cef2f3c..9269c6b 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -537,6 +537,7 @@
 #define CSR_SSTATUS 0x100
 #define CSR_SIE 0x104
 #define CSR_STVEC 0x105
+#define CSR_SCOUNTEREN 0x106
 #define CSR_SSCRATCH 0x140
 #define CSR_SEPC 0x141
 #define CSR_SCAUSE 0x142
@@ -549,6 +550,7 @@
 #define CSR_MIDELEG 0x303
 #define CSR_MIE 0x304
 #define CSR_MTVEC 0x305
+#define CSR_MCOUNTEREN 0x306
 #define CSR_MSCRATCH 0x340
 #define CSR_MEPC 0x341
 #define CSR_MCAUSE 0x342
@@ -993,6 +995,7 @@ DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31)
 DECLARE_CSR(sstatus, CSR_SSTATUS)
 DECLARE_CSR(sie, CSR_SIE)
 DECLARE_CSR(stvec, CSR_STVEC)
+DECLARE_CSR(scounteren, CSR_SCOUNTEREN)
 DECLARE_CSR(sscratch, CSR_SSCRATCH)
 DECLARE_CSR(sepc, CSR_SEPC)
 DECLARE_CSR(scause, CSR_SCAUSE)
@@ -1005,6 +1008,7 @@ DECLARE_CSR(medeleg, CSR_MEDELEG)
 DECLARE_CSR(mideleg, CSR_MIDELEG)
 DECLARE_CSR(mie, CSR_MIE)
 DECLARE_CSR(mtvec, CSR_MTVEC)
+DECLARE_CSR(mcounteren, CSR_MCOUNTEREN)
 DECLARE_CSR(mscratch, CSR_MSCRATCH)
 DECLARE_CSR(mepc, CSR_MEPC)
 DECLARE_CSR(mcause, CSR_MCAUSE)
-- 
2.10.2

[PATCH 3/3] bfd: RISC-V: relax to gp in more cases.

[Palmer Dabbelt]

From: Andrew Waterman <andrew@sifive.com>

bfd/ChangeLog:

2017-02-24  Andrew Waterman  <andrew@sifive.com>

	* elfnn-riscv.c (GP_NAME): New macro.
	(riscv_global_pointer_value): Use it.
	(_bfd_riscv_relax_lui): If symbol and global pointer are in same
	output section, consider only that section's alignment.
---
 bfd/ChangeLog     |  7 +++++++
 bfd/elfnn-riscv.c | 16 +++++++++++++++-
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 4d1900e..9f3df5f 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,10 @@
+2017-02-24  Andrew Waterman  <andrew@sifive.com>
+
+	* elfnn-riscv.c (GP_NAME): New macro.
+	(riscv_global_pointer_value): Use it.
+	(_bfd_riscv_relax_lui): If symbol and global pointer are in same
+	output section, consider only that section's alignment.
+
 2017-02-23  Alan Modra  <amodra@gmail.com>
 
 	PR 20744
diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index ab002b6..732a989 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -52,6 +52,10 @@
 #define ELF_MAXPAGESIZE			0x1000
 #define ELF_COMMONPAGESIZE		0x1000
 
+/* The global pointer's symbol name.  */
+
+#define GP_NAME "__global_pointer$"
+
 /* The RISC-V linker needs to keep track of the number of relocs that it
    decides to copy as dynamic relocs in check_relocs for each symbol.
    This is so that it can later discard them if they are found to be
@@ -1463,7 +1467,7 @@ riscv_global_pointer_value (struct bfd_link_info *info)
 {
   struct bfd_link_hash_entry *h;
 
-  h = bfd_link_hash_lookup (info->hash, "__global_pointer$", FALSE, FALSE, TRUE);
+  h = bfd_link_hash_lookup (info->hash, GP_NAME, FALSE, FALSE, TRUE);
   if (h == NULL || h->type != bfd_link_hash_defined)
     return 0;
 
@@ -2809,6 +2813,16 @@ _bfd_riscv_relax_lui (bfd *abfd,
 
   BFD_ASSERT (rel->r_offset + 4 <= sec->size);
 
+  if (gp)
+    {
+      /* If gp and the symbol are in the same output section, then
+	 consider only that section's alignment.  */
+      struct bfd_link_hash_entry *h =
+	bfd_link_hash_lookup (link_info->hash, GP_NAME, FALSE, FALSE, TRUE);
+      if (h->u.def.section->output_section == sym_sec->output_section)
+	max_alignment = (bfd_vma) 1 << sym_sec->output_section->alignment_power;
+    }
+
   /* Is the reference in range of x0 or gp?
      Valid gp range conservatively because of alignment issue.  */
   if (VALID_ITYPE_IMM (symval)
-- 
2.10.2

binutils-2_28-branch: Various RISC-V Fixes

[Palmer Dabbelt]

Here are the three RISC-V patches that aren't on the 2.28 branch but are on
master.  One has been submitted for 2.28, but I haven't gotten any feedback,
while the other two are new.

We'd really like these in the release so we can build Linux with the 2.28
release rather that having to tell the Linux devs to patch it or get binutils
master.

Are these OK for the 2.28 branch?

Also: I'd like to check on the policy for commiting to 2.28.  I haven't gotten
any feedback on my "OK for 2.28?" messages recently and I was told that I
needed an OK for the 2.28 branch from Tristan Gingold.  I haven't seen any mail
from Tristan Gingold recently, but when I went to rebase I saw a bunch of
patches committed.  Am I asking for approval incorrectly?

[PATCH 1/3] Add SFENCE.VMA instruction
[PATCH 2/3] Add new counter-enable CSRs
[PATCH 3/3] bfd: RISC-V: relax to gp in more cases.

Re: binutils-2_28-branch: Various RISC-V Fixes

[Tristan Gingold]

> On 24 Feb 2017, at 18:42, Palmer Dabbelt <palmer@dabbelt.com> wrote:
> 
> Here are the three RISC-V patches that aren't on the 2.28 branch but are on
> master.  One has been submitted for 2.28, but I haven't gotten any feedback,
> while the other two are new.
> 
> We'd really like these in the release so we can build Linux with the 2.28
> release rather that having to tell the Linux devs to patch it or get binutils
> master.
> 
> Are these OK for the 2.28 branch?
> 
> Also: I'd like to check on the policy for commiting to 2.28.  I haven't gotten
> any feedback on my "OK for 2.28?" messages recently and I was told that I
> needed an OK for the 2.28 branch from Tristan Gingold.  I haven't seen any mail
> from Tristan Gingold recently, but when I went to rebase I saw a bunch of
> patches committed.  Am I asking for approval incorrectly?

Yes, they are OK.

You are asking correctly, but I have a backlog of emails to read.  Sorry!

Thanks,
Tristan.

Re: binutils-2_28-branch: Various RISC-V Fixes

[Palmer Dabbelt]

On Mon, 27 Feb 2017 02:21:01 PST (-0800), Tristan Gingold wrote:
>
>> On 24 Feb 2017, at 18:42, Palmer Dabbelt <palmer@dabbelt.com> wrote:
>>
>> Here are the three RISC-V patches that aren't on the 2.28 branch but are on
>> master.  One has been submitted for 2.28, but I haven't gotten any feedback,
>> while the other two are new.
>>
>> We'd really like these in the release so we can build Linux with the 2.28
>> release rather that having to tell the Linux devs to patch it or get binutils
>> master.
>>
>> Are these OK for the 2.28 branch?
>>
>> Also: I'd like to check on the policy for commiting to 2.28.  I haven't gotten
>> any feedback on my "OK for 2.28?" messages recently and I was told that I
>> needed an OK for the 2.28 branch from Tristan Gingold.  I haven't seen any mail
>> from Tristan Gingold recently, but when I went to rebase I saw a bunch of
>> patches committed.  Am I asking for approval incorrectly?
>
> Yes, they are OK.

Thanks!  They've been pushed.

> You are asking correctly, but I have a backlog of emails to read.  Sorry!

No problem.  I just didn't want to screw something up.