From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 47278 invoked by alias); 22 Mar 2017 23:04:31 -0000 Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org Received: (qmail 47164 invoked by uid 89); 22 Mar 2017 23:04:31 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.3 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=ham version=3.3.2 spammy=Hx-spam-relays-external:209.85.192.194, H*RU:209.85.192.194 X-HELO: mail-pf0-f194.google.com Received: from mail-pf0-f194.google.com (HELO mail-pf0-f194.google.com) (209.85.192.194) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 22 Mar 2017 23:04:29 +0000 Received: by mail-pf0-f194.google.com with SMTP id n11so17548834pfg.2 for ; Wed, 22 Mar 2017 16:04:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:to:cc:subject:date:message-id :in-reply-to:references; bh=PVW+hdyZOw00qS6kLi+Cs7fzcB7m8EAOSm1l62OEXxQ=; b=rkg/i+WpEw/4snOHpbtY0XvtWXOuQsHUy5C8B9OSBohnvJQOizb04dutj23b2DgucA 41stLm35/WWYohRIP+kl8630GAF4ZEweJaPwwzFjMqTItVV2uDHVeIw6POaS76PG46oH IwSjDAXFf91WDqCTfK7wijJ5t3VcE6/P1yx1ae2Y9vBqYvz5IEh1aO0yd2DWJyCVApCE 0p003mWM+VSIkNHs4+k0/6vki98PtjG1gkrZyhTnoWlrC5Xoo7wMo9Bh+Da1tuiIPp58 SlyxdhzQBbjgQE4Jo40jh0HxpXv2tMs36C+mK4IWiY2erJpv6rUgWZr2JTlWcSq9OINO nKfw== X-Gm-Message-State: AFeK/H2BfQjvKx2Zx8N48eJ16DtBKL2ZL4zq6bKlHgGc6Gf2E4dwnUqoTq+uhbi0ifOKAA== X-Received: by 10.98.200.136 with SMTP id i8mr50004932pfk.120.1490223869133; Wed, 22 Mar 2017 16:04:29 -0700 (PDT) Received: from localhost ([216.38.154.21]) by smtp.gmail.com with ESMTPSA id n85sm5876846pfi.101.2017.03.22.16.04.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 22 Mar 2017 16:04:28 -0700 (PDT) From: Palmer Dabbelt To: binutils@sourceware.org To: Tristan Gingold Cc: Andrew Waterman Subject: [PATCH 1/7] RISC-V: Fix [dis]assembly of srai/srli Date: Wed, 22 Mar 2017 23:04:00 -0000 Message-Id: <20170322230408.8885-2-palmer@dabbelt.com> In-Reply-To: <20170322230408.8885-1-palmer@dabbelt.com> References: <20170322230408.8885-1-palmer@dabbelt.com> X-IsSubscribed: yes X-SW-Source: 2017-03/txt/msg00315.txt.bz2 From: Andrew Waterman These were simple copy/paste errors from the compressed left shift pattern, which can't have a 0-register. --- opcodes/ChangeLog | 7 +++++++ opcodes/riscv-opc.c | 8 ++++---- 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index bdc6266..969129b 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2017-03-13 Andrew Waterman + + * riscv-opc.c (riscv_opcodes) : Use match_opcode. + Likewise. + Likewise. + Likewise. + 2017-03-21 Andreas Krebbel Backport from mainline diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c index 867a026..da33600 100644 --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -210,14 +210,14 @@ const struct riscv_opcode riscv_opcodes[] = {"sll", "C", "d,CU,C>", MATCH_C_SLLI, MASK_C_SLLI, match_rd_nonzero, INSN_ALIAS }, {"sll", "I", "d,s,t", MATCH_SLL, MASK_SLL, match_opcode, 0 }, {"sll", "I", "d,s,>", MATCH_SLLI, MASK_SLLI, match_opcode, INSN_ALIAS }, -{"srli", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_rd_nonzero, INSN_ALIAS }, +{"srli", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_opcode, INSN_ALIAS }, {"srli", "I", "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, 0 }, -{"srl", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_rd_nonzero, INSN_ALIAS }, +{"srl", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_opcode, INSN_ALIAS }, {"srl", "I", "d,s,t", MATCH_SRL, MASK_SRL, match_opcode, 0 }, {"srl", "I", "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, INSN_ALIAS }, -{"srai", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_rd_nonzero, INSN_ALIAS }, +{"srai", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_opcode, INSN_ALIAS }, {"srai", "I", "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, 0 }, -{"sra", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_rd_nonzero, INSN_ALIAS }, +{"sra", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_opcode, INSN_ALIAS }, {"sra", "I", "d,s,t", MATCH_SRA, MASK_SRA, match_opcode, 0 }, {"sra", "I", "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, INSN_ALIAS }, {"sub", "C", "Cs,Cw,Ct", MATCH_C_SUB, MASK_C_SUB, match_opcode, INSN_ALIAS }, -- 2.10.2